{
    machine().scheduler().timer_set(attotime::from_usec(10), FUNC(okean240_boot));
    memory_set_bank(machine(), "boot", 1);
    m_term_data = 0;
    m_j = 0;
    m_scroll = 0;
}

WRITE8_MEMBER( okean240_state::kbd_put )
{
    m_term_data = data;
}

static GENERIC_TERMINAL_INTERFACE( okean240_terminal_intf )
{
    DEVCB_DRIVER_MEMBER(okean240_state, kbd_put)
};

DRIVER_INIT( okean240 )
{
    UINT8 *RAM = machine.region("maincpu")->base();
    memory_configure_bank(machine, "boot", 0, 2, &RAM[0x0000], 0xe000);
}

VIDEO_START_MEMBER( okean240_state )
{
}

#ifndef OKEAN240_USING_TESTROM
static SCREEN_UPDATE( okean240 )
{
Beispiel #2
0
WRITE8_MEMBER(toypop_state::out_coin1)
{
	coin_counter_w(machine(), 1, ~data & 1);
}

WRITE8_MEMBER(toypop_state::flip)
{
	flip_screen_set(data & 1);
}

/* chip #0: player inputs, buttons, coins */
static const namcoio_interface intf0_coin =
{
	{ DEVCB_INPUT_PORT("COINS"), DEVCB_INPUT_PORT("P1_RIGHT"), DEVCB_INPUT_PORT("P2_RIGHT"), DEVCB_INPUT_PORT("BUTTONS") }, /* port read handlers */
	{ DEVCB_DRIVER_MEMBER(toypop_state,out_coin0), DEVCB_DRIVER_MEMBER(toypop_state,out_coin1) },       /* port write handlers */
	NULL    /* device */
};
static const namcoio_interface intf0 =
{
	{ DEVCB_INPUT_PORT("COINS"), DEVCB_INPUT_PORT("P1_RIGHT"), DEVCB_INPUT_PORT("P2_RIGHT"), DEVCB_INPUT_PORT("BUTTONS") }, /* port read handlers */
	{ DEVCB_NULL, DEVCB_NULL },                 /* port write handlers */
	NULL    /* device */
};

/* chip #1: dip switches */
static const namcoio_interface intf1 =
{
	{ DEVCB_DRIVER_MEMBER(toypop_state,dipA_h), DEVCB_DRIVER_MEMBER(toypop_state,dipB_l), DEVCB_DRIVER_MEMBER(toypop_state,dipB_h), DEVCB_DRIVER_MEMBER(toypop_state,dipA_l) }, /* port read handlers */
	{ DEVCB_DRIVER_MEMBER(toypop_state,flip), DEVCB_NULL },                     /* port write handlers */
	NULL    /* device */
Beispiel #3
0
AM_RANGE(0x00, 0x00) AM_READ(term_r) AM_DEVWRITE(TERMINAL_TAG, generic_terminal_device, write)
AM_RANGE(0x01, 0x01) AM_READ(term_status_r)
ADDRESS_MAP_END

/* Input ports */
static INPUT_PORTS_START( cm1800 )
INPUT_PORTS_END


static MACHINE_RESET(cm1800)
{
}

static GENERIC_TERMINAL_INTERFACE( terminal_intf )
{
    DEVCB_DRIVER_MEMBER(cm1800_state, kbd_put)
};

static MACHINE_CONFIG_START( cm1800, cm1800_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu",I8080, XTAL_2MHz)
MCFG_CPU_PROGRAM_MAP(cm1800_mem)
MCFG_CPU_IO_MAP(cm1800_io)

MCFG_MACHINE_RESET(cm1800)

/* video hardware */
MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
MACHINE_CONFIG_END

/* ROM definition */
Beispiel #4
0
	    PA6     SP0256 _ALD
	    PA7

	*/

	if (!BIT(data, 6))
	{
		m_sp0256->ald_w(space, 0, data & 0x3f);
	}
}

static I8255A_INTERFACE( ppi_intf )
{
	DEVCB_NULL,
	DEVCB_NULL,
	DEVCB_DRIVER_MEMBER(ace_state,sby_r),
	DEVCB_DRIVER_MEMBER(ace_state,ald_w),
	DEVCB_NULL,
	DEVCB_NULL
};


//-------------------------------------------------
//  Z80PIO_INTERFACE( pio_intf )
//-------------------------------------------------

READ8_MEMBER( ace_state::pio_pa_r )
{
	/*

	    bit     description
Beispiel #5
0
		m_crtc->dack_w(space, 0, data);
	}
	else
	{
		return prog_space.write_byte(offset, data);
	}
}

// busack on cpu connects to bai pin
static Z80DMA_INTERFACE( dma_intf )
{
	//DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_HALT), //busreq - connects to busreq on cpu
	DEVCB_DRIVER_LINE_MEMBER(zorba_state, busreq_w), //busreq - connects to busreq on cpu
	DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0), //int/pulse - connects to IRQ0 on cpu
	DEVCB_NULL, //ba0 - not connected
	DEVCB_DRIVER_MEMBER(zorba_state, memory_read_byte),
	DEVCB_DRIVER_MEMBER(zorba_state, memory_write_byte),
	DEVCB_DRIVER_MEMBER(zorba_state, io_read_byte),
	DEVCB_DRIVER_MEMBER(zorba_state, io_write_byte),
};

static SLOT_INTERFACE_START( zorba_floppies )
	SLOT_INTERFACE( "525dd", FLOPPY_525_DD )
SLOT_INTERFACE_END

// COM port
static const i8251_interface u0_intf =
{
	DEVCB_NULL,
	DEVCB_NULL,
	DEVCB_NULL,
Beispiel #6
0

WRITE_LINE_MEMBER(tail2nos_state::irqhandler)
{
	m_audiocpu->set_input_line(0, state ? ASSERT_LINE : CLEAR_LINE);
}

static const ay8910_interface ay8910_config =
{
	AY8910_LEGACY_OUTPUT | AY8910_SINGLE_OUTPUT,
	AY8910_DEFAULT_LOADS,
	DEVCB_NULL,
	DEVCB_NULL,
	DEVCB_NULL,
	DEVCB_DRIVER_MEMBER(tail2nos_state,sound_bankswitch_w)
};


static const k051316_interface tail2nos_k051316_intf =
{
	"gfx3", 2,
	-4, TRUE, 0,
	1, -89, -14,
	tail2nos_zoom_callback
};

void tail2nos_state::machine_start()
{
	UINT8 *ROM = memregion("audiocpu")->base();
Beispiel #7
0
	   bit 6 - Player 2 steering input (wheel moving or stopped)
	   bit 7 - Player 1 steering input (wheel moving or stopped) */

	ret = (m_ttl7474_1a_1->output_r() ? 0x10 : 0x00) |
			(m_ttl7474_1c_1->output_r() ? 0x20 : 0x00) |
			(m_ttl7474_1d_1->output_r() ? 0x40 : 0x00) |
			(m_ttl7474_1f_1->output_r() ? 0x80 : 0x00);

	return ret;
}


const pia6821_interface carpolo_pia0_intf =
{
	DEVCB_NULL,     /* port A in */
	DEVCB_DRIVER_MEMBER(carpolo_state,pia_0_port_b_r),  /* port B in */
	DEVCB_NULL,     /* line CA1 in */
	DEVCB_NULL,     /* line CB1 in */
	DEVCB_NULL,     /* line CA2 in */
	DEVCB_NULL,     /* line CB2 in */
	DEVCB_DRIVER_MEMBER(carpolo_state,pia_0_port_a_w),      /* port A out */
	DEVCB_DRIVER_MEMBER(carpolo_state,pia_0_port_b_w),      /* port B out */
	DEVCB_DRIVER_LINE_MEMBER(carpolo_state,coin1_interrupt_clear_w),        /* line CA2 out */
	DEVCB_DRIVER_LINE_MEMBER(carpolo_state,coin2_interrupt_clear_w),        /* port CB2 out */
	DEVCB_NULL,     /* IRQA */
	DEVCB_NULL      /* IRQB */
};


const pia6821_interface carpolo_pia1_intf =
{
Beispiel #8
0
Datei: apf.c Projekt: clobber/UME
WRITE_LINE_MEMBER( apf_state::apf_m1000_irq_a_func )
{
	apf_update_ints(0x01);
}


WRITE_LINE_MEMBER( apf_state::apf_m1000_irq_b_func )
{
	//logerror("pia 0 irq b %d\n",state);

	apf_update_ints(0x02);
}

static const pia6821_interface apf_m1000_pia_interface=
{
	DEVCB_DRIVER_MEMBER(apf_state, apf_m1000_pia_in_a_func),
	DEVCB_DRIVER_MEMBER(apf_state, apf_m1000_pia_in_b_func),
	DEVCB_DRIVER_MEMBER(apf_state, apf_m1000_pia_in_ca1_func),
	DEVCB_DRIVER_MEMBER(apf_state, apf_m1000_pia_in_cb1_func),
	DEVCB_DRIVER_MEMBER(apf_state, apf_m1000_pia_in_ca2_func),
	DEVCB_DRIVER_MEMBER(apf_state, apf_m1000_pia_in_cb2_func),
	DEVCB_DRIVER_MEMBER(apf_state, apf_m1000_pia_out_a_func),
	DEVCB_DRIVER_MEMBER(apf_state, apf_m1000_pia_out_b_func),
	DEVCB_DRIVER_LINE_MEMBER(apf_state, apf_m1000_pia_out_ca2_func),
	DEVCB_DRIVER_MEMBER(apf_state, apf_m1000_pia_out_cb2_func),
	DEVCB_DRIVER_LINE_MEMBER(apf_state, apf_m1000_irq_a_func),
	DEVCB_DRIVER_LINE_MEMBER(apf_state, apf_m1000_irq_b_func)
};


READ8_MEMBER( apf_state::apf_imagination_pia_in_a_func)
Beispiel #9
0
	/* Centronics Strobe */
	m_centronics->strobe_w(BIT(data, 5));

	/* FDC Reset */
	if (BIT(data, 6))
		compis_fdc_reset(machine());

	/* FDC Terminal count */
	compis_fdc_tc(BIT(data, 7));
}

I8255A_INTERFACE( compis_ppi_interface )
{
	DEVCB_NULL,
	DEVCB_DEVICE_MEMBER("centronics", centronics_device, write),
	DEVCB_DRIVER_MEMBER(compis_state, compis_ppi_port_b_r),
	DEVCB_NULL,
	DEVCB_NULL,
	DEVCB_DRIVER_MEMBER(compis_state, compis_ppi_port_c_w)
};


/*-------------------------------------------------------------------------*/
/*  PIT 8253                                                               */
/*-------------------------------------------------------------------------*/

const struct pit8253_config compis_pit8253_config =
{
	{
		/* Timer0 */
		{4770000/4, DEVCB_NULL, DEVCB_NULL },
Beispiel #10
0
				*p++ = BIT(gfx, 0);
			}
		}
		ma+=80;
	}
	return 0;
}

WRITE8_MEMBER( k8915_state::kbd_put )
{
	m_term_data = data;
}

static ASCII_KEYBOARD_INTERFACE( keyboard_intf )
{
	DEVCB_DRIVER_MEMBER(k8915_state, kbd_put)
};

static MACHINE_CONFIG_START( k8915, k8915_state )
	/* basic machine hardware */
	MCFG_CPU_ADD("maincpu", Z80, XTAL_16MHz / 4)
	MCFG_CPU_PROGRAM_MAP(k8915_mem)
	MCFG_CPU_IO_MAP(k8915_io)

	/* video hardware */
	MCFG_SCREEN_ADD("screen", RASTER)
	MCFG_SCREEN_REFRESH_RATE(60)
	MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */
	MCFG_SCREEN_UPDATE_DRIVER(k8915_state, screen_update)
	MCFG_SCREEN_SIZE(640, 250)
	MCFG_SCREEN_VISIBLE_AREA(0, 639, 0, 249)
Beispiel #11
0
	memcpy((UINT8*)m_p_ram.target(),user1,0x4000);

	m_maincpu->reset();
	m_term_data = 0;
}


WRITE8_MEMBER( sun1_state::kbd_put )
{
	m_term_data = data;
}

static GENERIC_TERMINAL_INTERFACE( terminal_intf )
{
	DEVCB_DRIVER_MEMBER(sun1_state, kbd_put)
};


static MACHINE_CONFIG_START( sun1, sun1_state )
	/* basic machine hardware */
	MCFG_CPU_ADD("maincpu", M68000, XTAL_10MHz)
	MCFG_CPU_PROGRAM_MAP(sun1_mem)

	/* video hardware */
	MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
MACHINE_CONFIG_END

/* ROM definition */
ROM_START( sun1 )
	ROM_REGION( 0x4000, "user1", ROMREGION_ERASEFF )
Beispiel #12
0
static const ay8910_interface ay8910_intf =
{
/*
  AY8910: Port A out: FF
  AY8910: Port B out: FF
  AY8910: Port A out: FF
  AY8910: Port B out: FF
  AY8910: Port A out: 00
  AY8910: Port B out: 00
*/
	AY8910_LEGACY_OUTPUT,
	AY8910_DEFAULT_LOADS,
	DEVCB_NULL,                 /* Seems unused */
	DEVCB_NULL,                 /* Seems unused */
	DEVCB_DRIVER_MEMBER(tonton_state,ay_aout_w),    /* Write all bits twice, and then reset them at boot */
	DEVCB_DRIVER_MEMBER(tonton_state,ay_bout_w)     /* Write all bits twice, and then reset them at boot */
};


/*************************************************
*                 Machine Driver                 *
*************************************************/

static MACHINE_CONFIG_START( tonton, tonton_state )

	/* basic machine hardware */
	MCFG_CPU_ADD("maincpu",Z80, CPU_CLOCK)  /* Guess. According to other MSX2 based gambling games */
	MCFG_CPU_PROGRAM_MAP(tonton_map)
	MCFG_CPU_IO_MAP(tonton_io)
	MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", tonton_state, tonton_interrupt, "screen", 0, 1)
Beispiel #13
0
	NULL
};

static const cassette_interface alice32_cassette_interface =
{
	alice32_cassette_formats,
	NULL,
	(cassette_state)(CASSETTE_STOPPED | CASSETTE_SPEAKER_ENABLED | CASSETTE_MOTOR_ENABLED),
	"alice32_cass",
	NULL
};

static const mc6847_interface mc10_mc6847_intf =
{
	"screen",
	DEVCB_DRIVER_MEMBER(mc10_state, mc10_mc6847_videoram_r)
};

static MACHINE_CONFIG_START( mc10, mc10_state )

	/* basic machine hardware */
	MCFG_CPU_ADD("maincpu", M6803, XTAL_3_579545MHz)  /* 0,894886 MHz */
	MCFG_CPU_PROGRAM_MAP(mc10_mem)
	MCFG_CPU_IO_MAP(mc10_io)

	/* video hardware */
	MCFG_SCREEN_MC6847_NTSC_ADD("screen", "mc6847")
	MCFG_MC6847_ADD("mc6847", MC6847_NTSC, XTAL_3_579545MHz, mc10_mc6847_intf)

	/* sound hardware */
	MCFG_SPEAKER_STANDARD_MONO("mono")
Beispiel #14
0
	switch (offset & 0x0c)
	{
		case 0x04:	/* Motherboard */
				switch (offset & 0x80)
				{
					case 0x80:	/* Motherboard 8255 */
							return machine().device<i8255_device>("ppi8255_0")->write(space, offset & 0x03, data);
				}
				break;
	}
}

const i8255_interface pmd85_ppi8255_interface[4] =
{
	{
		DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_0_porta_r),
		DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_0_porta_w),
		DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_0_portb_r),
		DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_0_portb_w),
		DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_0_portc_r),
		DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_0_portc_w)
	},
	{
		DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_1_porta_r),
		DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_1_porta_w),
		DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_1_portb_r),
		DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_1_portb_w),
		DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_1_portc_r),
		DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_1_portc_w)
	},
	{
Beispiel #15
0
void seattle_comp_state::machine_reset()
{
	m_key_available = 0;
	m_term_data = 0;
}

WRITE8_MEMBER( seattle_comp_state::kbd_put )
{
	m_term_data = data;
	m_key_available = 1;
}

static GENERIC_TERMINAL_INTERFACE( terminal_intf )
{
	DEVCB_DRIVER_MEMBER(seattle_comp_state, kbd_put)
};

static MACHINE_CONFIG_START( seattle, seattle_comp_state )
	/* basic machine hardware */
	MCFG_CPU_ADD("maincpu", I8086, 4000000) // no idea
	MCFG_CPU_PROGRAM_MAP(seattle_mem)
	MCFG_CPU_IO_MAP(seattle_io)

	/* video hardware */
	MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
MACHINE_CONFIG_END

/* ROM definition */
ROM_START( seattle )
	ROM_REGION( 0x800, "user1", 0 )
Beispiel #16
0
	// i8237_hlda_w(get_device_dma8237_2(device), state);
}

WRITE_LINE_MEMBER(apollo_state::apollo_dma_2_hrq_changed ) {
	CLOG2(("dma 2 hrq changed state %02x", state));
	m_maincpu->set_input_line(INPUT_LINE_HALT, state ? ASSERT_LINE : CLEAR_LINE);

	/* Assert HLDA */
	m_dma8237_2->hack_w(state);
}

static I8237_INTERFACE( apollo_dma8237_1_config )
{
	DEVCB_DRIVER_LINE_MEMBER(apollo_state, apollo_dma_1_hrq_changed),
	DEVCB_DRIVER_LINE_MEMBER(apollo_state, apollo_dma8237_out_eop),
	DEVCB_DRIVER_MEMBER(apollo_state, apollo_dma_read_byte),
	DEVCB_DRIVER_MEMBER(apollo_state, apollo_dma_write_byte),
	{   DEVCB_NULL, DEVCB_DRIVER_MEMBER(apollo_state, apollo_dma8237_ctape_dack_r), DEVCB_DRIVER_MEMBER(apollo_state, apollo_dma8237_fdc_dack_r), DEVCB_NULL},
	{   DEVCB_NULL, DEVCB_DRIVER_MEMBER(apollo_state, apollo_dma8237_ctape_dack_w), DEVCB_DRIVER_MEMBER(apollo_state, apollo_dma8237_fdc_dack_w), DEVCB_NULL},
	{   DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL}
};

static I8237_INTERFACE( apollo_dma8237_2_config )
{
	DEVCB_DRIVER_LINE_MEMBER(apollo_state, apollo_dma_2_hrq_changed),
	DEVCB_NULL,
	DEVCB_DRIVER_MEMBER(apollo_state, apollo_dma_read_word),
	DEVCB_DRIVER_MEMBER(apollo_state, apollo_dma_write_word),
	{   DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_DRIVER_MEMBER(apollo_state, apollo_dma8237_wdc_dack_r)},
	{   DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_DRIVER_MEMBER(apollo_state, apollo_dma8237_wdc_dack_w)},
	{   DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL}
Beispiel #17
0
{
	AY8910_LEGACY_OUTPUT,
	AY8910_DEFAULT_LOADS,
	DEVCB_INPUT_PORT("DSWA"),       // DSW A
	DEVCB_INPUT_PORT("DSWB"),       // DSW B
	DEVCB_NULL,
	DEVCB_NULL
};

static const ay8910_interface ay8910_interface_2 =
{
	AY8910_LEGACY_OUTPUT,
	AY8910_DEFAULT_LOADS,
	DEVCB_NULL,
	DEVCB_NULL,
	DEVCB_DRIVER_MEMBER(chaknpop_state,unknown_port_1_w),   // ??
	DEVCB_DRIVER_MEMBER(chaknpop_state,unknown_port_2_w)    // ??
};


/***************************************************************************

  Input Port(s)

***************************************************************************/

static INPUT_PORTS_START( chaknpop )
	PORT_START("SYSTEM")
	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN1 )  // LEFT COIN
Beispiel #18
0
   There's a separate ROM check for banked U04 at 30F3.
   It looks like dealer/revenger uses ppi8255 to control bankswitching.
*/
WRITE8_MEMBER(epos_state::write_prtc)
{
	membank("bank2")->set_entry(data & 0x01);
}

static I8255A_INTERFACE( ppi8255_intf )
{
	DEVCB_INPUT_PORT("INPUTS"),     /* Port A read */
	DEVCB_NULL,                     /* Port A write */
	DEVCB_NULL,                     /* Port B read */
	DEVCB_NULL,                     /* Port B write */
	DEVCB_NULL,                     /* Port C read */
	DEVCB_DRIVER_MEMBER(epos_state,write_prtc)      /* Port C write */
};


/*************************************
 *
 *  Port definitions
 *
 *************************************/

/* I think the upper two bits of port 1 are used as a simple form of protection,
   so that ROMs couldn't be simply swapped.  Each game checks these bits and halts
   the processor if an unexpected value is read. */

static INPUT_PORTS_START( megadon )
	PORT_START("DSW")
Beispiel #19
0
/*****************************************************************************/

static TMS9928A_INTERFACE(ti99_4_tms9928a_interface)
{
	SCREEN_TAG,
	0x4000,
	DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, set_tms9901_INT2)
};

/* TMS9901 setup. */
const tms9901_interface tms9901_wiring_ti99_4 =
{
	TMS9901_INT1 | TMS9901_INT2 | TMS9901_INTC, /* only input pins whose state is always known */

	// read handler
	DEVCB_DRIVER_MEMBER(ti99_4x_state, read_by_9901),

	// write handlers
	{
		DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, handset_ack),
		DEVCB_NULL,
		DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, keyC0),
		DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, keyC1),
		DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, keyC2),
		DEVCB_NULL,
		DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, cs1_motor),
		DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, cs2_motor),
		DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, audio_gate),
		DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, cassette_output),
		DEVCB_NULL,
		DEVCB_NULL,
Beispiel #20
0
WRITE8_MEMBER( fidelz80_state::vcc_porta_w )
{
	m_speech->set_volume(15); // hack, s14001a core should assume a volume of 15 unless otherwise stated...
	m_speech->reg_w(data & 0x3f);
	m_speech->rst_w(BIT(data, 7));

	m_digit_data = data;

	update_display();
}

static I8255_INTERFACE( cc10_ppi8255_intf )
{
	DEVCB_NULL,
	DEVCB_DRIVER_MEMBER(fidelz80_state, cc10_porta_w),
	DEVCB_INPUT_PORT("LEVEL"),
	DEVCB_DRIVER_MEMBER(fidelz80_state, fidelz80_portb_w),
	DEVCB_DRIVER_MEMBER(fidelz80_state, fidelz80_portc_r),
	DEVCB_DRIVER_MEMBER(fidelz80_state, fidelz80_portc_w)
};

static I8255_INTERFACE( vcc_ppi8255_intf )
{
	DEVCB_NULL, // only bit 6 is readable (and only sometimes) and I'm not emulating the language latch unless needed
	DEVCB_DRIVER_MEMBER(fidelz80_state, vcc_porta_w), // display segments and s14001a lines
	DEVCB_DRIVER_MEMBER(fidelz80_state, vcc_portb_r), // bit 7 is readable and is the done line from the s14001a
	DEVCB_DRIVER_MEMBER(fidelz80_state, fidelz80_portb_w), // display digits and led dots
	DEVCB_DRIVER_MEMBER(fidelz80_state, fidelz80_portc_r), // bits 0,1,2,3 are readable, have to do with input
	DEVCB_DRIVER_MEMBER(fidelz80_state, fidelz80_portc_w), // bits 4,5,6,7 are writable, have to do with input
};
Beispiel #21
0
		m_audiocpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
		m_pending_nmi = 0;
	}
}

WRITE8_MEMBER(ladyfrog_state::unk_w)
{
}

static const ay8910_interface ay8910_config =
{
	AY8910_LEGACY_OUTPUT,
	AY8910_DEFAULT_LOADS,
	DEVCB_NULL,
	DEVCB_NULL,
	DEVCB_DRIVER_MEMBER(ladyfrog_state,unk_w),
	DEVCB_DRIVER_MEMBER(ladyfrog_state,unk_w)
};

static const msm5232_interface msm5232_config =
{
	{ 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6 },
	DEVCB_NULL
};

READ8_MEMBER(ladyfrog_state::snd_flag_r)
{
	return m_snd_flag | 0xfd;
}

static ADDRESS_MAP_START( ladyfrog_map, AS_PROGRAM, 8, ladyfrog_state )
Beispiel #22
0
MACHINE_RESET_MEMBER(pdp11_state,pdp11qb)
{
	m_maincpu->set_state_int(T11_PC, 0xea00);
}


WRITE8_MEMBER( pdp11_state::kbd_put )
{
	m_teletype_data = data;
	m_teletype_status |= 0x80;
}

static GENERIC_TERMINAL_INTERFACE( terminal_intf )
{
	DEVCB_DRIVER_MEMBER(pdp11_state, kbd_put)
};

static MACHINE_CONFIG_START( pdp11, pdp11_state )
	/* basic machine hardware */
	MCFG_CPU_ADD("maincpu",T11, XTAL_4MHz) // Need proper CPU here
	MCFG_T11_INITIAL_MODE(6 << 13)
	MCFG_CPU_PROGRAM_MAP(pdp11_mem)


	/* video hardware */
	MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)

	MCFG_RX01_ADD("rx01")
MACHINE_CONFIG_END
Beispiel #23
0
	SLOT_INTERFACE("m034", KC_M034)         // 512KB segmented RAM
	SLOT_INTERFACE("m035", KC_M035)         // 1MB segmented RAM
	SLOT_INTERFACE("m036", KC_M036)         // 128KB segmented RAM
SLOT_INTERFACE_END

extern SLOT_INTERFACE_START(kc85_exp)
	SLOT_INTERFACE("d002", KC_D002)         // D002 Bus Driver
	SLOT_INTERFACE("d004", KC_D004)         // D004 Floppy Disk Interface
	SLOT_INTERFACE("d004gide", KC_D004_GIDE) // D004 Floppy Disk + GIDE Interface
SLOT_INTERFACE_END


Z80PIO_INTERFACE( kc85_pio_intf )
{
	DEVCB_CPU_INPUT_LINE("maincpu", 0),                     /* callback when change interrupt status */
	DEVCB_DRIVER_MEMBER(kc_state, pio_porta_r),             /* port A read callback */
	DEVCB_DRIVER_MEMBER(kc_state, pio_porta_w),             /* port A write callback */
	DEVCB_DRIVER_LINE_MEMBER(kc_state, pio_ardy_cb),        /* portA ready active callback */
	DEVCB_DRIVER_MEMBER(kc_state, pio_portb_r),             /* port B read callback */
	DEVCB_DRIVER_MEMBER(kc_state, pio_portb_w),             /* port B write callback */
	DEVCB_DRIVER_LINE_MEMBER(kc_state, pio_brdy_cb)         /* portB ready active callback */
};

Z80CTC_INTERFACE( kc85_ctc_intf )
{
	DEVCB_CPU_INPUT_LINE("maincpu", 0),
	DEVCB_DRIVER_LINE_MEMBER(kc_state, ctc_zc0_callback),
	DEVCB_DRIVER_LINE_MEMBER(kc_state, ctc_zc1_callback),
	DEVCB_DRIVER_LINE_MEMBER(kc_state, video_toggle_blink_state)
};
Beispiel #24
0
	output_set_lamp_value(8, (data >> 1) & 1);  /* hold1 lamp */
}


/*************************
*      Machine Init      *
*************************/

static I8255A_INTERFACE( ppi8255_intf )
{
	DEVCB_INPUT_PORT("IN0"),        /* Port A read */
	DEVCB_NULL,                     /* Port A write */
	DEVCB_INPUT_PORT("IN1"),        /* Port B read */
	DEVCB_NULL,                     /* Port B write */
	DEVCB_NULL,                     /* Port C read */
	DEVCB_DRIVER_MEMBER(gatron_state,output_port_1_w)   /* Port C write */
};


/*************************
* Memory Map Information *
*************************/

static ADDRESS_MAP_START( gat_map, AS_PROGRAM, 8, gatron_state )
	AM_RANGE(0x0000, 0x5fff) AM_ROM
	AM_RANGE(0x6000, 0x63ff) AM_RAM_WRITE(gat_videoram_w) AM_SHARE("videoram")
	AM_RANGE(0x8000, 0x87ff) AM_RAM AM_SHARE("nvram")                          /* battery backed RAM */
	AM_RANGE(0xa000, 0xa000) AM_DEVWRITE("snsnd", sn76496_device, write)       /* PSG */
	AM_RANGE(0xe000, 0xe000) AM_WRITE(output_port_0_w)                         /* lamps */
ADDRESS_MAP_END
Beispiel #25
0
	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(2)
	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2)
	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNUSED )
	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, madalien_state,coin_inserted, 0)
INPUT_PORTS_END


static const ay8910_interface ay8910_config =
{
	AY8910_LEGACY_OUTPUT,
	AY8910_DEFAULT_LOADS,
	DEVCB_NULL,
	DEVCB_NULL,
	DEVCB_DRIVER_MEMBER(madalien_state,madalien_portA_w),
	DEVCB_DRIVER_MEMBER(madalien_state,madalien_portB_w)
};


static MACHINE_CONFIG_START( madalien, madalien_state )

	/* main CPU */
	MCFG_CPU_ADD("maincpu", M6502, MADALIEN_MAIN_CLOCK / 8) /* 1324kHz */
	MCFG_CPU_PROGRAM_MAP(main_map)

	MCFG_CPU_ADD("audiocpu", M6502, SOUND_CLOCK / 8)        /* 512kHz */
	MCFG_CPU_PROGRAM_MAP(audio_map)
	MCFG_CPU_VBLANK_INT_DRIVER("screen", madalien_state,  nmi_line_pulse)

	/* video hardware */
Beispiel #26
0
WRITE8_MEMBER(apple2gs_state::a2bus_nmi_w)
{
	m_maincpu->set_input_line(INPUT_LINE_NMI, data);
}

WRITE8_MEMBER(apple2gs_state::a2bus_inh_w)
{
	m_inh_slot = data;
	apple2_update_memory();
}

static const struct a2bus_interface a2bus_intf =
{
	// interrupt lines
	DEVCB_DRIVER_MEMBER(apple2gs_state,a2bus_irq_w),
	DEVCB_DRIVER_MEMBER(apple2gs_state,a2bus_nmi_w),
	DEVCB_DRIVER_MEMBER(apple2gs_state,a2bus_inh_w)
};

static SLOT_INTERFACE_START(apple2_cards)
	SLOT_INTERFACE("diskii", A2BUS_DISKII)  /* Disk II Controller Card */
	SLOT_INTERFACE("mockingboard", A2BUS_MOCKINGBOARD)  /* Sweet Micro Systems Mockingboard */
	SLOT_INTERFACE("phasor", A2BUS_PHASOR)  /* Applied Engineering Phasor */
	SLOT_INTERFACE("cffa2", A2BUS_CFFA2)  /* CFFA2000 Compact Flash for Apple II (www.dreher.net), 65C02/65816 firmware */
	SLOT_INTERFACE("cffa202", A2BUS_CFFA2_6502)  /* CFFA2000 Compact Flash for Apple II (www.dreher.net), 6502 firmware */
	SLOT_INTERFACE("memexp", A2BUS_MEMEXP)  /* Apple II Memory Expansion Card */
	SLOT_INTERFACE("ramfactor", A2BUS_RAMFACTOR)    /* Applied Engineering RamFactor */
	SLOT_INTERFACE("thclock", A2BUS_THUNDERCLOCK)    /* ThunderWare ThunderClock Plus */
	SLOT_INTERFACE("ssc", A2BUS_SSC)    /* Apple Super Serial Card */
	SLOT_INTERFACE("sam", A2BUS_SAM)    /* SAM Software Automated Mouth (8-bit DAC + speaker) */
Beispiel #27
0
};

static GFXDECODE_START( wink )
	GFXDECODE_ENTRY( "gfx1", 0, charlayout, 0, 4 )
GFXDECODE_END

READ8_MEMBER(wink_state::sound_r)
{
	return m_sound_flag;
}

static const ay8910_interface ay8912_interface =
{
	AY8910_LEGACY_OUTPUT,
	AY8910_DEFAULT_LOADS,
	DEVCB_DRIVER_MEMBER(wink_state,sound_r),
	DEVCB_NULL,
	DEVCB_NULL,
	DEVCB_NULL
};

//AY portA is fed by an input clock at 15625 Hz
INTERRUPT_GEN_MEMBER(wink_state::wink_sound)
{
	m_sound_flag ^= 0x80;
}

void wink_state::machine_reset()
{
	m_sound_flag = 0;
}
Beispiel #28
0
	m_video_mode = BIT(data, 4);

	if (!BIT(data, 5))
		m_fdc->set_floppy(BIT(data, 6) ? m_floppy1->get_device() : m_floppy0->get_device());

	// switch video modes
	m_crtc->set_clock( m_video_mode ? XTAL_15MHz / 10 : XTAL_15MHz / 16);
	m_crtc->set_hpixels_per_column( m_video_mode ? 10 : 16);
}

static const i8255_interface apricot_i8255a_intf =
{
	DEVCB_DEVICE_MEMBER("centronics", centronics_device, read),
	DEVCB_DEVICE_MEMBER("centronics", centronics_device, write),
	DEVCB_NULL,
	DEVCB_DRIVER_MEMBER(apricot_state, apricot_sysctrl_w),
	DEVCB_DRIVER_MEMBER(apricot_state, apricot_sysctrl_r),
	DEVCB_NULL
};

WRITE_LINE_MEMBER( apricot_state::timer_out1 )
{
	// receive clock via timer 1
	if (m_data_selector_rts == 0 && m_data_selector_dtr == 0)
		m_sio->rxca_w(state);
}

WRITE_LINE_MEMBER( apricot_state::timer_out2 )
{
	// transmit clock via timer 2
	if (m_data_selector_rts == 0 && m_data_selector_dtr == 0)
Beispiel #29
0
        PA0     keyboard column 0
        PA1     keyboard column 1
        PA2     keyboard column 2
        PA3     keyboard column 3
        PA4     keyboard row 0
        PA5     keyboard row 1
        PA6     keyboard row 2
        PA7     keyboard row 3

    */

}

static const pia6821_interface d6800_mc6821_intf =
{
    DEVCB_DRIVER_MEMBER(d6800_state, d6800_keyboard_r), /* port A input */
    DEVCB_DRIVER_MEMBER(d6800_state, d6800_cassette_r), /* port B input */
    DEVCB_DRIVER_LINE_MEMBER(d6800_state, d6800_keydown_r), /* CA1 input */
    DEVCB_DRIVER_LINE_MEMBER(d6800_state, d6800_rtc_pulse), /* CB1 input */
    DEVCB_DRIVER_LINE_MEMBER(d6800_state, d6800_fn_key_r),  /* CA2 input */
    DEVCB_NULL,                     /* CB2 input */
    DEVCB_DRIVER_MEMBER(d6800_state, d6800_keyboard_w), /* port A output */
    DEVCB_DRIVER_MEMBER(d6800_state, d6800_cassette_w), /* port B output */
    DEVCB_NULL,                     /* CA2 output */
    DEVCB_DRIVER_LINE_MEMBER(d6800_state, d6800_screen_w),  /* CB2 output */
    DEVCB_CPU_INPUT_LINE("maincpu", M6800_IRQ_LINE),    /* IRQA output */
    DEVCB_CPU_INPUT_LINE("maincpu", M6800_IRQ_LINE)     /* IRQB output */
};

/* Machine Initialization */
Beispiel #30
0
	DEVCB_NULL,
	DEVCB_NULL,
	NULL
};


static MC6845_INTERFACE( lynx128k_crtc6845_interface )
{
	false,
	8,              /* dots per character */
	NULL,
	lynx128k_update_row,        /* callback to display one scanline */
	NULL,
	DEVCB_NULL,
	DEVCB_NULL,
	DEVCB_DRIVER_MEMBER(camplynx_state, lynx128k_irq),  /* callback when cursor pin changes state */
	DEVCB_NULL,
	NULL
};


static MACHINE_CONFIG_START( lynx48k, camplynx_state )

	/* basic machine hardware */
	MCFG_CPU_ADD("maincpu", Z80, XTAL_4MHz)
	MCFG_CPU_PROGRAM_MAP(lynx48k_mem)
	MCFG_CPU_IO_MAP(lynx48k_io)

	/* video hardware */
	MCFG_SCREEN_ADD("screen", RASTER)
	MCFG_SCREEN_REFRESH_RATE(50)