static void spm_trigger_wfi_for_sleep(bool cpu_pdn, bool infra_pdn)
{
//disable_peri_dcm(); /* workaround for WHQA_00013158 */
/* if (infra_pdn)
disable_infra_dcm(); EMI needs clock to sync register back */
if (cpu_pdn) {
if (!cpu_power_down(SHUTDOWN_MODE)) {
/* do not add code here */
wfi_with_sync();
}
cpu_check_dormant_abort();
} else {
//mci_snoop_sleep();
wfi_with_sync();
//mci_snoop_restore();
}
if (infra_pdn) {
//restore_infra_dcm();
if(console_suspend_enabled==0)
mtk_uart_restore();
}
//restore_peri_dcm();
}
static void spm_trigger_wfi_for_dpidle(bool cpu_pdn)
{
#if SPM_CTRL_33VCORE || SPM_CTRL_33VRF18
u32 pdn0;
pdn0 = spm_read(PERI_PDN0_STA) & (1U << 22);
spm_write(PERI_PDN0_CLR, pdn0); /* power on I2C1 */
spm_write(0xF1008010, 0); /* init I2C1_CONTROL */
spm_write(0xF1008018, 0x1); /* init I2C1_TRANSAC_LEN */
spm_write(0xF1008028, 0x1800); /* init I2C1_EXT_CONF */
spm_write(0xF1008040, 0x3); /* init I2C1_IO_CONFIG */
spm_write(0xF1008048, 0x102); /* init I2C1_HS */
#endif
if (cpu_pdn) {
if (!cpu_power_down(DORMANT_MODE)) {
switch_to_amp();
wfi_with_sync();
}
switch_to_smp();
cpu_check_dormant_abort();
} else {
wfi_with_sync();
}
#if SPM_CTRL_33VCORE || SPM_CTRL_33VRF18
spm_write(PERI_PDN0_SET, pdn0); /* restore I2C1 power */
#endif
}
static void sc_wait_for_interrupt(unsigned int pwrlevel, bool dpidle)
{
u32 ckdiv1;
/* for shutdown mode issue-2 */
ckdiv1 = sc_read(TOP_CKDIV1);
if (!((ckdiv1 >= 0x14 && ckdiv1 < 0x18) || ckdiv1 >= 0x1d)) /* !(1/5 || 1/6) */
sc_write(TOP_CKDIV1, 0x0b); /* (1/4) */
sc_write_sync();
if (pwrlevel == 0) {
wfi_with_sync();
} else {
if (dpidle) /* debug help */
aee_rr_rec_shutdown_mode(1);
else
aee_rr_rec_shutdown_mode(2);
if (!cpu_power_down(pwrlevel == 1 ? DORMANT_MODE : SHUTDOWN_MODE))
wfi_with_sync();
aee_rr_rec_shutdown_mode(0);
cpu_check_dormant_abort();
}
/* for shutdown mode issue-2 */
sc_write(TOP_CKDIV1, 0x00); /* (1/1) */
sc_write(TOP_CKDIV1, ckdiv1);
sc_write_sync();
}
void spm_trigger_wfi_for_dpidle(bool cpu_pdn)
{
//disable_peri_dcm(); /* workaround for WHQA_00013158 */
/* make PCM to be able to change voltage through PWRAP */
// pmicspi_mempll2clksq();
if (cpu_pdn) {
if (!cpu_power_down(DORMANT_MODE)) {
#if 0
//bus switch to 26MHz
spm_dpidle_axi_bus_clk = spm_read(0xf0000000);
spm_write(0xf0000000,(spm_dpidle_axi_bus_clk&0xffffff1f)|0x20);
//ahb:apb[1:1]
spm_dpidle_apb_ahb_set = spm_read(0xf000002c);
spm_write(0xf000002c,spm_dpidle_apb_ahb_set&0x7fffffff);
#endif
/* do not add code here */
wfi_with_sync();
#if 0
//ahb:apb restore
spm_write(0xf000002c,spm_dpidle_apb_ahb_set);
//bus clk restore
spm_write(0xf0000000,spm_dpidle_axi_bus_clk);
#endif
}
cpu_check_dormant_abort();
} else {
// mci_snoop_sleep();
wfi_with_sync();
// mci_snoop_restore();
}
/* restore PWRAP clock source */
// pmicspi_clksq2mempll();
//restore_peri_dcm();
}
//extern u32 cpu_pdn_cnt;
void spm_mcdi_wfi(void)
{
volatile u32 core_id;
//u32 clc_counter;
unsigned long flags;
//u32 temp_address;
#if 0
core_id = (u32)smp_processor_id();
if(core_id == 0)
{
if(MCDI_Test_Mode == 1)
{
//clc_notice("SPM_FC1_PWR_CON %x, cpu_pdn_cnt %d.\n",spm_read(SPM_FC1_PWR_CON),cpu_pdn_cnt);
clc_notice("core_%d set wfi_sel.\n", core_id);
}
spm_wfi_sel(pcm_config_mcdi.wfi_sel, SPM_CORE1_WFI_SEL_SW_MASK );
spm_mcdi_poll_mask(core_id,pcm_config_mcdi.wfi_sel);
if(MCDI_Test_Mode == 1)
{
clc_notice("core_%d mask polling done.\n", core_id);
}
wfi_with_sync(); // enter wfi
//spm_get_wakeup_status(&pcm_config_mcdi);
if(MCDI_Test_Mode == 1)
clc_notice("core_%d exit wfi.\n", core_id);
//if(MCDI_Test_Mode == 1)
//mdelay(10); // delay 10 ms
}
else // Core 1 Keep original IRQ
#endif
{
if(MCDI_Test_Mode == 1)
{
clc_notice("core_%d set wfi_sel.\n", core_id);
}
spm_wfi_sel(pcm_config_mcdi.wfi_sel, SPM_CORE0_WFI_SEL_SW_MASK );
////clc_notice("core_%d enter wfi.\n", core_id);
spm_mcdi_poll_mask(core_id,pcm_config_mcdi.wfi_sel);
if(MCDI_Test_Mode == 1)
{
clc_notice("core_%d mask polling done.\n", core_id);
}
mcidle_before_wfi(1);
if (!cpu_power_down(DORMANT_MODE))
{
switch_to_amp();
/* do not add code here */
wfi_with_sync();
}
switch_to_smp();
cpu_check_dormant_abort();
mcidle_after_wfi(1);
spm_get_wakeup_status(&pcm_config_mcdi);
if(MCDI_Test_Mode == 1)
clc_notice("core_%d exit wfi.\n", core_id);
}
}
wake_reason_t spm_go_to_mcdi_ipi_test(int cpu)
{
wake_status_t *wakesta;
unsigned long flags;
struct mtk_irq_mask mask;
wake_reason_t wr = WR_NONE;
u32 con0;
bool sodi_en = 0;
spin_lock_irqsave(&spm_lock, flags);
//mt_irq_mask_all(&mask);
//mt_irq_unmask_for_sleep(MT_SPM0_IRQ_ID);
if(cpu==0)//except mcdi
{
mt_irq_mask_all(&mask);
mt_irq_unmask_for_sleep(MT_SPM0_IRQ_ID);
//spm_wdt_config(false);
mt_cirq_clone_gic();
mt_cirq_enable();
}
pcm_config_sodi.spm_request_uart_sleep = true;
pcm_config_sodi.wake_src=WAKE_SRC_FOR_SODI;
if((sodi_en==1)&&(cpu==0))//SODI
{
spm_direct_enable_sodi();
pcm_config_sodi.wfi_sel[0]=true;
pcm_config_sodi.wfi_sel[1]=true;
pcm_config_sodi.wfi_scu_mask=false;
pcm_config_sodi.wfi_l2c_mask=false;
spm_write(SPM_PCM_RESERVE,spm_read(SPM_PCM_RESERVE)&~0x1);
}
else if((sodi_en==0)&&(cpu==0))//CPU Dormant
{
pcm_config_sodi.wfi_sel[0]=true;
pcm_config_sodi.wfi_sel[1]=true;
pcm_config_sodi.wfi_scu_mask=false;
pcm_config_sodi.wfi_l2c_mask=false;
spm_direct_disable_sodi();
spm_write(SPM_PCM_RESERVE,spm_read(SPM_PCM_RESERVE)&~0x1);
}
else if((sodi_en==0)&&(cpu!=0))//MCDI
{
//pcm_config_sodi.wake_src=WAKE_SRC_FOR_MCDI;
pcm_config_sodi.wake_src=0x0;//for test IPI only
pcm_config_sodi.wfi_sel[0]=false;
pcm_config_sodi.wfi_sel[1]=true;
pcm_config_sodi.wfi_scu_mask=true;
pcm_config_sodi.wfi_l2c_mask=true;
pcm_config_sodi.spm_request_uart_sleep = false;
spm_direct_disable_sodi();
spm_write(SPM_PCM_RESERVE,spm_read(SPM_PCM_RESERVE)|0x1);
}
else
{
printk("[SPM]Wrong para!!\n");
goto RESTORE_IRQ;
}
if( spm_last_senario != pcm_config_sodi.scenario)//MCDI SPM Initialize
{
//spm_direct_enable_sodi();
if (spm_init_pcm(&pcm_config_sodi)==false)
goto RESTORE_IRQ;
if(cpu==1)//except mcdi
{
spm_write(SPM_SLEEP_CPU_IRQ_MASK,0x2);
spm_mcdi_init_core_mux();
}
else
spm_write(SPM_SLEEP_CPU_IRQ_MASK,0x1);
spm_write(SPM_PCM_CON1,(spm_read(SPM_PCM_CON1)| CON1_CFG_KEY )&0xffffffdf);//temporary disable pcm timer
spm_wfi_sel(pcm_config_sodi.wfi_sel, SPM_CORE0_WFI_SEL_SW_MASK );
spm_wfi_sel(pcm_config_sodi.wfi_sel, SPM_CORE1_WFI_SEL_SW_MASK );
spm_kick_pcm(&pcm_config_sodi);
//spm_wfi_sel(pcm_config_sodi.wfi_sel, SPM_CORE0_WFI_SEL_SW_MASK );
//spm_wfi_sel(pcm_config_sodi.wfi_sel, SPM_CORE1_WFI_SEL_SW_MASK );
spm_change_fw = 1;
}
else
{
if(cpu==1)//except mcdi
{
spm_write(SPM_SLEEP_CPU_IRQ_MASK,0x2);
//spm_mcdi_init_core_mux();
}
else
spm_write(SPM_SLEEP_CPU_IRQ_MASK,0x1);
spm_wfi_sel(pcm_config_sodi.wfi_sel, SPM_CORE0_WFI_SEL_SW_MASK );
spm_wfi_sel(pcm_config_sodi.wfi_sel, SPM_CORE1_WFI_SEL_SW_MASK );
if( spm_secondary_kick(&pcm_config_sodi)==false)
goto RESTORE_IRQ;
spm_change_fw = 0;
}
if(cpu==0)
{
soidle_before_wfi();
spm_trigger_wfi_for_dpidle(1);//SODI with cpu dormant
soidle_after_wfi(sodi_en);
}
else
{
spm_pre_SPM_PCM_SW_INT_SET=spm_read(SPM_PCM_SW_INT_SET);
spm_pre_SPM_SLEEP_ISR_STATUS=spm_read(SPM_SLEEP_ISR_STATUS);
spm_write(SPM_PCM_SW_INT_CLEAR,0xf);
//mcidle_before_wfi(cpu);
if (!cpu_power_down(DORMANT_MODE))
{
switch_to_amp();
/* do not add code here */
wfi_with_sync();
}
switch_to_smp();
cpu_check_dormant_abort();
//mcidle_after_wfi(cpu);
spm_post_SPM_PCM_SW_INT_SET=spm_read(SPM_PCM_SW_INT_SET);
spm_post_SPM_SLEEP_ISR_STATUS=spm_read(SPM_SLEEP_ISR_STATUS);
spm_post_SPM_PCM_RESERVE = spm_read(SPM_PCM_RESERVE );
}
#if 1
wakesta = spm_get_wakeup_status(&pcm_config_sodi);
wr = wakesta->wake_reason;
#endif
spm_clean_after_wakeup();
spm_write(SPM_PCM_CON1,(spm_read(SPM_PCM_CON1)| CON1_CFG_KEY )|(CON1_PCM_TIMER_EN));
RESTORE_IRQ:
if(cpu==0)//except mcdi
{
mt_cirq_flush();
mt_cirq_disable();
mt_irq_mask_restore(&mask);
}
//mt_irq_mask_restore(&mask);
spin_unlock_irqrestore(&spm_lock, flags);
return wr;
}
