extern "C" void dc_debug(void)
{
static DebugMemoryState memory_ctx_sat;
ImGui::SetNextWindowPos(ImVec2(0.0f, 0.0f), ImGuiSetCond_FirstUseEver);
ImGui::Begin("Dreamcast", NULL, ImGuiWindowFlags_NoMove);
if(ImGui::CollapsingHeader("Memory", NULL, true, true)) {
static DebugMemoryState memory_state;
debug_memory("DC RAM", &memory_state, dc_ram, sizeof(dc_ram));
}
ImGui::End();
}
int handle_memtest(void)
{
unsigned int start, size;
if (com_argc != 2 && com_argc != 4)
{
printf(" Usage: memtest (1) [2] [3]\n"
" 1:device index number\n"
" 2:SDRAM start address\n"
" 3:test size\n");
return -1;
}
if (com_argc == 4) {
start = strtoul(com_argv[2], NULL, 0);
size = strtoul(com_argv[3], NULL, 0);
} else {
start = 0;
size = 0;
}
debug_memory(atoi(com_argv[1]), start, size);
return 1;
}
static void replay_one_trace_frame(struct dbg_context* dbg,
struct context* ctx)
{
struct dbg_request req;
struct rep_trace_step step;
int event = ctx->trace.stop_reason;
int stop_sig = 0;
debug("%d: replaying event %s, state %s",
ctx->rec_tid,
strevent(event), statename(ctx->trace.state));
if (ctx->syscallbuf_hdr) {
debug(" (syscllbufsz:%u, abrtcmt:%u)",
ctx->syscallbuf_hdr->num_rec_bytes,
ctx->syscallbuf_hdr->abort_commit);
}
/* Advance the trace until we've exec()'d the tracee before
* processing debugger requests. Otherwise the debugger host
* will be confused about the initial executable image,
* rr's. */
if (validate) {
req = process_debugger_requests(dbg, ctx);
assert(dbg_is_resume_request(&req));
}
/* print some kind of progress */
if (ctx->trace.global_time % 10000 == 0) {
fprintf(stderr, "time: %u\n",ctx->trace.global_time);
}
if (ctx->child_sig != 0) {
assert(event == -ctx->child_sig
|| event == -(ctx->child_sig | DET_SIGNAL_BIT));
ctx->child_sig = 0;
}
/* Ask the trace-interpretation code what to do next in order
* to retire the current frame. */
memset(&step, 0, sizeof(step));
switch (event) {
case USR_INIT_SCRATCH_MEM: {
/* for checksumming: make a note that this area is
* scratch and need not be validated. */
struct mmapped_file file;
read_next_mmapped_file_stats(&file);
replay_init_scratch_memory(ctx, &file);
add_scratch((void*)ctx->trace.recorded_regs.eax,
file.end - file.start);
step.action = TSTEP_RETIRE;
break;
}
case USR_EXIT:
rep_sched_deregister_thread(&ctx);
/* Early-return because |ctx| is gone now. */
return;
case USR_ARM_DESCHED:
case USR_DISARM_DESCHED:
rep_skip_desched_ioctl(ctx);
/* TODO */
step.action = TSTEP_RETIRE;
break;
case USR_SYSCALLBUF_ABORT_COMMIT:
ctx->syscallbuf_hdr->abort_commit = 1;
step.action = TSTEP_RETIRE;
break;
case USR_SYSCALLBUF_FLUSH:
rep_process_flush(ctx, rr_flags->redirect);
/* TODO */
step.action = TSTEP_RETIRE;
break;
case USR_SYSCALLBUF_RESET:
ctx->syscallbuf_hdr->num_rec_bytes = 0;
step.action = TSTEP_RETIRE;
break;
case USR_SCHED:
step.action = TSTEP_PROGRAM_ASYNC_SIGNAL_INTERRUPT;
step.target.rcb = ctx->trace.rbc;
step.target.regs = &ctx->trace.recorded_regs;
step.target.signo = 0;
break;
case SIG_SEGV_RDTSC:
step.action = TSTEP_DETERMINISTIC_SIGNAL;
step.signo = SIGSEGV;
break;
default:
/* Pseudosignals are handled above. */
assert(event > LAST_RR_PSEUDOSIGNAL);
if (FIRST_DET_SIGNAL <= event && event <= LAST_DET_SIGNAL) {
step.action = TSTEP_DETERMINISTIC_SIGNAL;
step.signo = (-event & ~DET_SIGNAL_BIT);
stop_sig = step.signo;
} else if (event < 0) {
assert(FIRST_ASYNC_SIGNAL <= event
&& event <= LAST_ASYNC_SIGNAL);
step.action = TSTEP_PROGRAM_ASYNC_SIGNAL_INTERRUPT;
step.target.rcb = ctx->trace.rbc;
step.target.regs = &ctx->trace.recorded_regs;
step.target.signo = -event;
stop_sig = step.target.signo;
} else {
assert(event > 0);
/* XXX not so pretty ... */
validate |= (ctx->trace.state == STATE_SYSCALL_EXIT
&& event == SYS_execve);
rep_process_syscall(ctx, rr_flags->redirect, &step);
}
}
/* See the comment below about *not* resetting the hpc for
* buffer flushes. Here, we're processing the *other* event,
* just after the buffer flush, where the rcb matters. To
* simplify the advance-to-target code that follows (namely,
* making debugger interrupts simpler), pretend like the
* execution in the BUFFER_FLUSH didn't happen by resetting
* the rbc and compensating down the target rcb. */
if (TSTEP_PROGRAM_ASYNC_SIGNAL_INTERRUPT == step.action) {
uint64_t rcb_now = read_rbc(ctx->hpc);
assert(step.target.rcb >= rcb_now);
step.target.rcb -= rcb_now;
reset_hpc(ctx, 0);
}
/* Advance until |step| has been fulfilled. */
while (try_one_trace_step(ctx, &step, &req)) {
struct user_regs_struct regs;
/* Currently we only understand software breakpoints
* and successful stepi's. */
assert(SIGTRAP == ctx->child_sig && "Unknown trap");
read_child_registers(ctx->child_tid, ®s);
if (ip_is_breakpoint((void*)regs.eip)) {
/* SW breakpoint: $ip is just past the
* breakpoint instruction. Move $ip back
* right before it. */
regs.eip -= sizeof(int_3_insn);
write_child_registers(ctx->child_tid, ®s);
} else {
/* Successful stepi. Nothing else to do. */
assert(DREQ_STEP == req.type
&& req.target == get_threadid(ctx));
}
/* Don't restart with SIGTRAP anywhere. */
ctx->child_sig = 0;
/* Notify the debugger and process any new requests
* that might have triggered before resuming. */
dbg_notify_stop(dbg, get_threadid(ctx), 0x05/*gdb mandate*/);
req = process_debugger_requests(dbg, ctx);
assert(dbg_is_resume_request(&req));
}
if (dbg && stop_sig) {
dbg_notify_stop(dbg, get_threadid(ctx), stop_sig);
}
/* We flush the syscallbuf in response to detecting *other*
* events, like signal delivery. Flushing the syscallbuf is a
* sort of side-effect of reaching the other event. But once
* we've flushed the syscallbuf during replay, we still must
* reach the execution point of the *other* event. For async
* signals, that requires us to have an "intact" rbc, with the
* same value as it was when the last buffered syscall was
* retired during replay. We'll be continuing from that rcb
* to reach the rcb we recorded at signal delivery. So don't
* reset the counter for buffer flushes. (It doesn't matter
* for non-async-signal types, which are deterministic.) */
switch (ctx->trace.stop_reason) {
case USR_SYSCALLBUF_ABORT_COMMIT:
case USR_SYSCALLBUF_FLUSH:
case USR_SYSCALLBUF_RESET:
break;
default:
reset_hpc(ctx, 0);
}
debug_memory(ctx);
}
