static int dpt_eisa_attach (device_t dev) { dpt_softc_t * dpt; int error = 0; dpt = device_get_softc(dev); dpt->dev = dev; dpt_alloc(dev); dpt->io_rid = 0; dpt->io_type = SYS_RES_IOPORT; dpt->irq_rid = 0; error = dpt_alloc_resources(dev); if (error) { goto bad; } /* Allocate a dmatag representing the capabilities of this attachment */ if (bus_dma_tag_create( /* parent */ bus_get_dma_tag(dev), /* alignemnt */ 1, /* boundary */ 0, /* lowaddr */ BUS_SPACE_MAXADDR_32BIT, /* highaddr */ BUS_SPACE_MAXADDR, /* filter */ NULL, /* filterarg */ NULL, /* maxsize */ BUS_SPACE_MAXSIZE_32BIT, /* nsegments */ ~0, /* maxsegsz */ BUS_SPACE_MAXSIZE_32BIT, /* flags */ 0, /* lockfunc */ NULL, /* lockarg */ NULL, &dpt->parent_dmat) != 0) { error = ENXIO; goto bad; } if (dpt_init(dpt) != 0) { error = ENXIO; goto bad; } /* Register with the XPT */ dpt_attach(dpt); if (bus_setup_intr(dev, dpt->irq_res, INTR_TYPE_CAM | INTR_ENTROPY | INTR_MPSAFE, NULL, dpt_intr, dpt, &dpt->ih)) { device_printf(dev, "Unable to register interrupt handler\n"); error = ENXIO; goto bad; } return (error); bad: dpt_release_resources(dev); dpt_free(dpt); return (error); }
static int dpt_pci_attach (device_t dev) { dpt_softc_t * dpt; int s; int error = 0; u_int32_t command; dpt = device_get_softc(dev); dpt->dev = dev; command = pci_read_config(dev, PCIR_COMMAND, /*bytes*/1); #ifdef DPT_ALLOW_MMIO if ((command & PCIM_CMD_MEMEN) != 0) { dpt->io_rid = DPT_PCI_MEMADDR; dpt->io_type = SYS_RES_MEMORY; dpt->io_res = bus_alloc_resource_any(dev, dpt->io_type, &dpt->io_rid, RF_ACTIVE); } #endif if (dpt->io_res == NULL && (command & PCIM_CMD_PORTEN) != 0) { dpt->io_rid = DPT_PCI_IOADDR; dpt->io_type = SYS_RES_IOPORT; dpt->io_res = bus_alloc_resource_any(dev, dpt->io_type, &dpt->io_rid, RF_ACTIVE); } if (dpt->io_res == NULL) { device_printf(dev, "can't allocate register resources\n"); error = ENOMEM; goto bad; } dpt->io_offset = 0x10; dpt->irq_rid = 0; dpt->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &dpt->irq_rid, RF_ACTIVE | RF_SHAREABLE); if (dpt->irq_res == NULL) { device_printf(dev, "No irq?!\n"); error = ENOMEM; goto bad; } /* Ensure busmastering is enabled */ command |= PCIM_CMD_BUSMASTEREN; pci_write_config(dev, PCIR_COMMAND, command, /*bytes*/1); if (rman_get_start(dpt->io_res) == (ISA_PRIMARY_WD_ADDRESS - 0x10)) { #ifdef DPT_DEBUG_WARN device_printf(dev, "Mapped as an IDE controller. " "Disabling SCSI setup\n"); #endif error = ENXIO; goto bad; } dpt_alloc(dev); /* Allocate a dmatag representing the capabilities of this attachment */ /* XXX Should be a child of the PCI bus dma tag */ if (bus_dma_tag_create( /* parent */ NULL, /* alignemnt */ 1, /* boundary */ 0, /* lowaddr */ BUS_SPACE_MAXADDR_32BIT, /* highaddr */ BUS_SPACE_MAXADDR, /* filter */ NULL, /* filterarg */ NULL, /* maxsize */ BUS_SPACE_MAXSIZE_32BIT, /* nsegments */ ~0, /* maxsegsz */ BUS_SPACE_MAXSIZE_32BIT, /* flags */ 0, /* lockfunc */ busdma_lock_mutex, /* lockarg */ &Giant, &dpt->parent_dmat) != 0) { error = ENXIO; goto bad; } s = splcam(); if (dpt_init(dpt) != 0) { error = ENXIO; goto bad; } /* Register with the XPT */ dpt_attach(dpt); splx(s); if (bus_setup_intr(dev, dpt->irq_res, INTR_TYPE_CAM | INTR_ENTROPY, NULL, dpt_intr, dpt, &dpt->ih)) { device_printf(dev, "Unable to register interrupt handler\n"); error = ENXIO; goto bad; } return (error); bad: dpt_release_resources(dev); dpt_free(dpt); return (error); }
static int dpt_eisa_attach (device_t dev) { dpt_softc_t * dpt; struct resource *io = 0; struct resource *irq = 0; int s; int rid; void * ih; int error = 0; rid = 0; io = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 0, ~0, 1, RF_ACTIVE); if (!io) { device_printf(dev, "No I/O space?!\n"); error = ENOMEM; goto bad; } rid = 0; irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0, 1, RF_ACTIVE); if (!irq) { device_printf(dev, "No irq?!\n"); error = ENOMEM; goto bad; } dpt = dpt_alloc(dev, rman_get_bustag(io), rman_get_bushandle(io) + DPT_EISA_EATA_REG_OFFSET); if (dpt == NULL) { error = ENOMEM; goto bad; } /* Allocate a dmatag representing the capabilities of this attachment */ /* XXX Should be a child of the EISA bus dma tag */ if (bus_dma_tag_create( /* parent */ NULL, /* alignemnt */ 1, /* boundary */ 0, /* lowaddr */ BUS_SPACE_MAXADDR_32BIT, /* highaddr */ BUS_SPACE_MAXADDR, /* filter */ NULL, /* filterarg */ NULL, /* maxsize */ BUS_SPACE_MAXSIZE_32BIT, /* nsegments */ ~0, /* maxsegsz */ BUS_SPACE_MAXSIZE_32BIT, /* flags */0, &dpt->parent_dmat) != 0) { dpt_free(dpt); error = ENXIO; goto bad; } s = splcam(); if (dpt_init(dpt) != 0) { dpt_free(dpt); error = ENXIO; goto bad; } /* Register with the XPT */ dpt_attach(dpt); splx(s); if (bus_setup_intr(dev, irq, INTR_TYPE_CAM | INTR_ENTROPY, dpt_intr, dpt, &ih)) { device_printf(dev, "Unable to register interrupt handler\n"); error = ENXIO; goto bad; } return (error); bad: if (io) bus_release_resource(dev, SYS_RES_IOPORT, 0, io); if (irq) bus_release_resource(dev, SYS_RES_IRQ, 0, irq); return (error); }
static int dpt_pci_attach (device_t dev) { dpt_softc_t * dpt; int error = 0; dpt = device_get_softc(dev); dpt->dev = dev; dpt_alloc(dev); #ifdef DPT_ALLOW_MMIO dpt->io_rid = DPT_PCI_MEMADDR; dpt->io_type = SYS_RES_MEMORY; dpt->io_res = bus_alloc_resource_any(dev, dpt->io_type, &dpt->io_rid, RF_ACTIVE); #endif if (dpt->io_res == NULL) { dpt->io_rid = DPT_PCI_IOADDR; dpt->io_type = SYS_RES_IOPORT; dpt->io_res = bus_alloc_resource_any(dev, dpt->io_type, &dpt->io_rid, RF_ACTIVE); } if (dpt->io_res == NULL) { device_printf(dev, "can't allocate register resources\n"); error = ENOMEM; goto bad; } dpt->io_offset = 0x10; dpt->irq_rid = 0; dpt->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &dpt->irq_rid, RF_ACTIVE | RF_SHAREABLE); if (dpt->irq_res == NULL) { device_printf(dev, "No irq?!\n"); error = ENOMEM; goto bad; } /* Ensure busmastering is enabled */ pci_enable_busmaster(dev); if (rman_get_start(dpt->io_res) == (ISA_PRIMARY_WD_ADDRESS - 0x10)) { #ifdef DPT_DEBUG_WARN device_printf(dev, "Mapped as an IDE controller. " "Disabling SCSI setup\n"); #endif error = ENXIO; goto bad; } /* Allocate a dmatag representing the capabilities of this attachment */ if (bus_dma_tag_create( /* PCI parent */ bus_get_dma_tag(dev), /* alignemnt */ 1, /* boundary */ 0, /* lowaddr */ BUS_SPACE_MAXADDR_32BIT, /* highaddr */ BUS_SPACE_MAXADDR, /* filter */ NULL, /* filterarg */ NULL, /* maxsize */ BUS_SPACE_MAXSIZE_32BIT, /* nsegments */ ~0, /* maxsegsz */ BUS_SPACE_MAXSIZE_32BIT, /* flags */ 0, /* lockfunc */ NULL, /* lockarg */ NULL, &dpt->parent_dmat) != 0) { error = ENXIO; goto bad; } if (dpt_init(dpt) != 0) { error = ENXIO; goto bad; } /* Register with the XPT */ dpt_attach(dpt); if (bus_setup_intr(dev, dpt->irq_res, INTR_TYPE_CAM | INTR_ENTROPY | INTR_MPSAFE, NULL, dpt_intr, dpt, &dpt->ih)) { device_printf(dev, "Unable to register interrupt handler\n"); error = ENXIO; goto bad; } return (error); bad: dpt_release_resources(dev); dpt_free(dpt); return (error); }
static int dpt_pci_attach (device_t dev) { dpt_softc_t * dpt; struct resource *io = NULL; struct resource *irq = NULL; int rid; void * ih; int error = 0; int iotype = 0; u_int32_t command; command = pci_read_config(dev, PCIR_COMMAND, /*bytes*/1); #ifdef DPT_ALLOW_MMIO if ((command & PCIM_CMD_MEMEN) != 0) { rid = DPT_PCI_MEMADDR; iotype = SYS_RES_MEMORY; io = bus_alloc_resource(dev, iotype, &rid, 0, ~0, 1, RF_ACTIVE); } #endif if (io == NULL && (command & PCIM_CMD_PORTEN) != 0) { rid = DPT_PCI_IOADDR; iotype = SYS_RES_IOPORT; io = bus_alloc_resource(dev, iotype, &rid, 0, ~0, 1, RF_ACTIVE); } if (io == NULL) { device_printf(dev, "can't allocate register resources\n"); error = ENOMEM; goto bad; } rid = 0; irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE); if (!irq) { device_printf(dev, "No irq?!\n"); error = ENOMEM; goto bad; } /* Ensure busmastering is enabled */ command |= PCIM_CMD_BUSMASTEREN; pci_write_config(dev, PCIR_COMMAND, command, /*bytes*/1); if (rman_get_start(io) == (ISA_PRIMARY_WD_ADDRESS - 0x10)) { #ifdef DPT_DEBUG_WARN device_printf(dev, "Mapped as an IDE controller. " "Disabling SCSI setup\n"); #endif error = ENXIO; goto bad; } /* Device registers are offset 0x10 into the register window. FEH */ dpt = dpt_alloc(dev, rman_get_bustag(io), rman_get_bushandle(io) + 0x10); if (dpt == NULL) { error = ENXIO; goto bad; } /* Allocate a dmatag representing the capabilities of this attachment */ /* XXX Should be a child of the PCI bus dma tag */ if (bus_dma_tag_create( /* parent */ NULL, /* alignemnt */ 1, /* boundary */ 0, /* lowaddr */ BUS_SPACE_MAXADDR_32BIT, /* highaddr */ BUS_SPACE_MAXADDR, /* filter */ NULL, /* filterarg */ NULL, /* maxsize */ BUS_SPACE_MAXSIZE_32BIT, /* nsegments */ BUS_SPACE_UNRESTRICTED, /* maxsegsz */ BUS_SPACE_MAXSIZE_32BIT, /* flags */ 0, &dpt->parent_dmat) != 0) { dpt_free(dpt); error = ENXIO; goto bad; } crit_enter(); if (dpt_init(dpt) != 0) { dpt_free(dpt); error = ENXIO; crit_exit(); goto bad; } /* Register with the XPT */ dpt_attach(dpt); crit_exit(); error = bus_setup_intr(dev, irq, 0, dpt_intr, dpt, &ih, NULL); if (error) { device_printf(dev, "Unable to register interrupt handler\n"); error = ENXIO; goto bad; } return (error); bad: if (io) bus_release_resource(dev, iotype, 0, io); if (irq) bus_release_resource(dev, SYS_RES_IRQ, 0, irq); return (error); }