void spm_mcdi_LDVT_sodi(void)
{
clc_notice("spm_mcdi_LDVT_sodi() start.\n");
mtk_wdt_suspend();
// show image on screen ============================
spm_show_lcm_image();
// spm_direct_enable_sodi ============================
spm_direct_enable_sodi();
mcdi_task_0 = kthread_create(spm_wfi_for_sodi_test, NULL, "mcdi_task_0");
mcdi_task_1 = kthread_create(spm_wfi_for_sodi_test, NULL, "mcdi_task_1");
if(IS_ERR(mcdi_task_0) ||IS_ERR(mcdi_task_1))
{
clc_notice("Unable to start kernel thread(0x%x, 0x%x)./n", (u32)IS_ERR(mcdi_task_0), (u32)IS_ERR(mcdi_task_1));
mcdi_task_0 = NULL;
mcdi_task_1 = NULL;
}
kthread_bind(mcdi_task_0, 0);
kthread_bind(mcdi_task_1, 1);
wake_up_process(mcdi_task_0);
wake_up_process(mcdi_task_1);
clc_notice("spm_mcdi_LDVT_01() end.\n");
}
void spm_mcdi_LDVT_mcdi(void)
{
clc_notice("spm_mcdi_LDVT_mcdi() start.\n");
mtk_wdt_suspend();
// spm_direct_disable_sodi ============================
spm_direct_disable_sodi();
#if 1
{
u32 mcdi_error;
// init GPT ==================================
free_gpt(GPT4);
mcdi_error = request_gpt(GPT4, GPT_ONE_SHOT, GPT_CLK_SRC_SYS, GPT_CLK_DIV_1, 0, NULL, GPT_NOAUTOEN);
if(mcdi_error != 0)
{
clc_notice("GPT4 init failed.(0x%x)\n", mcdi_error);
}
}
#else
// init GPT ==================================
//spm_write(0xf0008010, 0x2); //clear GPT1 count
//spm_write(0xf0008040, 0x2); //clear GPT4 count
//spm_write(0xf0008050, 0x2); //clear GPT5 count
//spm_write(0xf0008000, (spm_read(0xf0008000) | 0x19)); //enable GPT1, 4, 5 IRQ
#endif
#if 0
smp_call_function(spm_mcdi_wfi_for_test, NULL, 0);
spm_mcdi_wfi_for_test();
#else
mcdi_task_0 = kthread_create(spm_wfi_for_mcdi_test, NULL, "mcdi_task_0");
mcdi_task_1 = kthread_create(spm_wfi_for_mcdi_test, NULL, "mcdi_task_1");
if(IS_ERR(mcdi_task_0)||IS_ERR(mcdi_task_1) )
{
clc_notice("Unable to start kernel thread(0x%x, 0x%x)./n", (u32)IS_ERR(mcdi_task_0), (u32)IS_ERR(mcdi_task_1));
mcdi_task_0 = NULL;
mcdi_task_1 = NULL;
}
kthread_bind(mcdi_task_0, 0);
kthread_bind(mcdi_task_1, 1);
wake_up_process(mcdi_task_0);
wake_up_process(mcdi_task_1);
#endif
}
static inline int mcidle_handler(int cpu)
{
#if 1
if (idle_switch[IDLE_TYPE_MC]) {
if (mcidle_can_enter(cpu)) {
go_to_mcidle(cpu);
//go_to_soidle(0,cpu);
return 1;
}
}
#else
if (idle_switch[IDLE_TYPE_MC]) {
mtk_wdt_suspend();
for(;;)
{
if(cpu==1)
{
printk("MCDI start\n");
spm_go_to_mcdi_ipi_test(cpu);
printk("MCDI %s\n",spm_get_wake_up_result(SPM_PCM_SODI));
}
if(cpu==0)
{
#if 1
if(spm_read(SPM_FC1_PWR_CON)==0x32)
{
//printk("IPI start\n");
spm_check_core_status_before(2);
//printk("1. SPM_PCM_EVENT_VECTOR2 = 0x%x, SPM_PCM_REG15_DATA = 0x%x \n", spm_read(SPM_PCM_EVENT_VECTOR2),spm_read(SPM_PCM_REG15_DATA));
//mdelay(1);
spm_check_core_status_after(2);
//printk("2. SPM_PCM_EVENT_VECTOR2 = 0x%x, SPM_PCM_REG15_DATA = 0x%x \n", spm_read(SPM_PCM_EVENT_VECTOR2),spm_read(SPM_PCM_REG15_DATA));
}
#endif
}
}
}
#endif
return 0;
}
wake_reason_t spm_go_to_sleep(void)
{
wake_status_t *wakesta;
unsigned long flags,i;
struct mtk_irq_mask mask;
static wake_reason_t last_wr = WR_NONE;
if(pcm_config_suspend.reserved & SPM_SUSPEND_GET_FGUAGE)
pcm_config_suspend.timer_val_ms = spm_get_wake_period(last_wr)*1000;
mtk_wdt_suspend();
spin_lock_irqsave(&spm_lock, flags);
mt_irq_mask_all(&mask);
mt_irq_unmask_for_sleep(MT_SPM0_IRQ_ID);
if (spm_init_pcm(&pcm_config_suspend)==false)
goto RESTORE_IRQ;
spm_kick_pcm(&pcm_config_suspend);
snapshot_golden_setting(__FUNCTION__, __LINE__);
spm_trigger_wfi(&pcm_config_suspend);
wakesta = spm_get_wakeup_status(&pcm_config_suspend);
last_wr = wakesta->wake_reason;
spm_clean_after_wakeup();
RESTORE_IRQ:
mt_irq_mask_restore(&mask);
spin_unlock_irqrestore(&spm_lock, flags);
mtk_wdt_resume();
return last_wr;
}
/*
* pwrlevel:
* 0: CPU standby + AP sleep => legacy sleep mode
* 1: CPU dormant (L1/L2 sleep) + AP sleep
* 2: CPU shutdown (L1/L2 power down) + AP sleep
*/
wake_reason_t sc_go_to_sleep(unsigned int pwrlevel)
{
u32 wakesrc, dvfscon, sec = 0;
int i, r;
unsigned long flags;
struct mtk_irq_mask mask;
static wake_reason_t last_wr = WR_NONE;
sc_info2("pwrlevel = %u\n", pwrlevel);
if (sc_pwake_en)
sec = sc_get_wake_period(!!(last_wr != WR_SLP_TMR));
mtk_wdt_suspend();
spin_lock_irqsave(&sc_lock, flags);
wakesrc = sc_wake_src;
for (i = 0; i < NUM_WAKE_SRC; i++) {
if (wakesrc & (1U << i)) {
r = sc_enable_wake_irq(sc_wake_irq[i]);
if (r)
wakesrc &= ~(1U << i);
}
}
mt_irq_mask_all(&mask);
mt_irq_unmask_for_sleep(MT_SLEEP_IRQ_ID);
/* to workaround DVFS issue due to CKDIV1 failure */
dvfscon = sc_read(SC_AP_DVFS_CON);
//ckdiv1 = sc_read(TOP_CKDIV1);
sc_write(SC_AP_DVFS_CON, dvfscon | 0x3);
sc_write_sync();
sc_set_apmcu_pwrctl(pwrlevel);
#ifdef CONFIG_MTK_SC_DEBUG
/* bypass CSYSPWRUPREQ to avoid keeping SRCLKENA high */
sc_write(SC_CLK_CON, sc_read(SC_CLK_CON) | SC_CLK_CON_BYPASSDBG);
sc_write_sync();
#endif
last_wr = sc_enter_pause_mode(pwrlevel, sec, wakesrc);
#ifdef CONFIG_MTK_SC_DEBUG
/* restore SC_CLK_CON */
sc_write(SC_CLK_CON, sc_read(SC_CLK_CON) & ~SC_CLK_CON_BYPASSDBG);
sc_write_sync();
#endif
/* to workaround DVFS issue due to CKDIV1 failure */
//sc_write(TOP_CKDIV1, 0x00);
//sc_write(TOP_CKDIV1, ckdiv1);
sc_write(SC_AP_DVFS_CON, dvfscon);
sc_write_sync();
mt_irq_mask_restore(&mask);
spin_unlock_irqrestore(&sc_lock, flags);
mtk_wdt_resume();
return last_wr;
}