void powerpc_upload_stub(u32 entry) { u32 i; set32(HW_EXICTRL, EXICTRL_ENABLE_EXI); // lis r3, entry@h write32(EXI_BOOT_BASE + 4 * 0, 0x3c600000 | entry >> 16); // ori r3, r3, entry@l write32(EXI_BOOT_BASE + 4 * 1, 0x60630000 | (entry & 0xffff)); // mtsrr0 r3 write32(EXI_BOOT_BASE + 4 * 2, 0x7c7a03a6); // li r3, 0 write32(EXI_BOOT_BASE + 4 * 3, 0x38600000); // mtsrr1 r3 write32(EXI_BOOT_BASE + 4 * 4, 0x7c7b03a6); // rfi write32(EXI_BOOT_BASE + 4 * 5, 0x4c000064); for (i = 6; i < 0x10; ++i) write32(EXI_BOOT_BASE + 4 * i, 0); set32(HW_DIFLAGS, DIFLAGS_BOOT_CODE); set32(HW_AHBPROT, 0xFFFFFFFF); gecko_printf("disabling EXI now...\n"); clear32(HW_EXICTRL, EXICTRL_ENABLE_EXI); }
// // Send a command to card // int send_cmd(uint32_t command, uint32_t arg) { int count= 0; // Read current interrupt status and fail if an interrupt is already asserted if ((read32(MMCHS0_REG_BASE + MMCHS_SD_STAT) & 0xffffu)) { // read32(MMCHS0_REG_BASE + MMCHS_SD_STAT)); return 1; } // Set arguments write32(MMCHS0_REG_BASE + MMCHS_SD_ARG, arg); // Set command set32(MMCHS0_REG_BASE + MMCHS_SD_CMD, MMCHS_SD_CMD_MASK, command); // Wait for completion while ((read32(MMCHS0_REG_BASE + MMCHS_SD_STAT) & 0xffffu) == 0x0) { count++; } if (read32(MMCHS0_REG_BASE + MMCHS_SD_STAT) & 0x8000) { // read32(MMCHS0_REG_BASE + MMCHS_SD_STAT)); set32(MMCHS0_REG_BASE + MMCHS_SD_STAT, MMCHS_SD_STAT_ERROR_MASK, 0xffffffffu); // clear errors // We currently only support 2.0 return 1; } if ((command & MMCHS_SD_CMD_RSP_TYPE) == MMCHS_SD_CMD_RSP_TYPE_48B_BUSY) { // Command with busy repsonse *CAN* also set the TC bit if they exit busy while ((read32(MMCHS0_REG_BASE + MMCHS_SD_STAT) & MMCHS_SD_IE_TC_ENABLE_ENABLE) == 0) { count++; } write32(MMCHS0_REG_BASE + MMCHS_SD_STAT, MMCHS_SD_IE_TC_ENABLE_CLEAR); } // clear the cc status write32(MMCHS0_REG_BASE + MMCHS_SD_STAT, MMCHS_SD_IE_CC_ENABLE_CLEAR); return 0; }
int write_single_block(struct sd_card *card, uint32_t blknr, unsigned char * buf) { uint32_t count; uint32_t value; count = 0; set32(base_address + MMCHS_SD_IE, MMCHS_SD_IE_BWR_ENABLE, MMCHS_SD_IE_BWR_ENABLE_ENABLE); //set32(base_address + MMCHS_SD_IE, 0xfff , 0xfff); set32(base_address + MMCHS_SD_BLK, MMCHS_SD_BLK_BLEN, 512); /* Set timeout */ set32(base_address + MMCHS_SD_SYSCTL, MMCHS_SD_SYSCTL_DTO, MMCHS_SD_SYSCTL_DTO_2POW27); if (mmchs_send_cmd(MMCHS_SD_CMD_INDX_CMD(MMC_WRITE_BLOCK_SINGLE) /* write single block */ | MMCHS_SD_CMD_DP_DATA /* Command with data transfer */ | MMCHS_SD_CMD_RSP_TYPE_48B /* type (R1b) */ | MMCHS_SD_CMD_MSBS_SINGLE /* single block */ | MMCHS_SD_CMD_DDIR_WRITE /* write to the card */ , blknr)) { return 1; } /* Wait for the MMCHS_SD_IE_BWR_ENABLE interrupt */ while ((read32(base_address + MMCHS_SD_STAT) & MMCHS_SD_IE_BWR_ENABLE) == 0) { count++; } if (!(read32(base_address + MMCHS_SD_PSTATE) & MMCHS_SD_PSTATE_BWE_EN)) { return 1; /* not ready to write data */ } for (count = 0; count < 512; count += 4) { *((char*) &value) = buf[count]; *((char*) &value + 1) = buf[count + 1]; *((char*) &value + 2) = buf[count + 2]; *((char*) &value + 3) = buf[count + 3]; write32(base_address + MMCHS_SD_DATA, value); } /* Wait for TC */ while ((read32(base_address + MMCHS_SD_STAT) & MMCHS_SD_IE_TC_ENABLE_ENABLE) == 0) { count++; } write32(base_address + MMCHS_SD_STAT, MMCHS_SD_IE_TC_ENABLE_CLEAR); write32(base_address + MMCHS_SD_STAT, MMCHS_SD_IE_CC_ENABLE_CLEAR);/* finished. */ /* clear the bwr interrupt FIXME is this right when writing?*/ write32(base_address + MMCHS_SD_STAT, MMCHS_SD_IE_BWR_ENABLE_CLEAR); set32(base_address + MMCHS_SD_IE, MMCHS_SD_IE_BWR_ENABLE, MMCHS_SD_IE_BWR_ENABLE_DISABLE); return 0; }
int read_single_block(struct sd_card *card, uint32_t blknr, unsigned char * buf) { uint32_t count; uint32_t value; count = 0; set32(base_address + MMCHS_SD_IE, MMCHS_SD_IE_BRR_ENABLE, MMCHS_SD_IE_BRR_ENABLE_ENABLE); set32(base_address + MMCHS_SD_BLK, MMCHS_SD_BLK_BLEN, 512); if (mmchs_send_cmd(MMCHS_SD_CMD_INDX_CMD(MMC_READ_BLOCK_SINGLE) /* read single block */ | MMCHS_SD_CMD_DP_DATA /* Command with data transfer */ | MMCHS_SD_CMD_RSP_TYPE_48B /* type (R1) */ | MMCHS_SD_CMD_MSBS_SINGLE /* single block */ | MMCHS_SD_CMD_DDIR_READ /* read data from card */ , blknr)) { return 1; } while ((read32(base_address + MMCHS_SD_STAT) & MMCHS_SD_IE_BRR_ENABLE_ENABLE) == 0) { count++; } if (!(read32(base_address + MMCHS_SD_PSTATE) & MMCHS_SD_PSTATE_BRE_EN)) { return 1; /* We are not allowed to read data from the data buffer */ } for (count = 0; count < 512; count += 4) { value = read32(base_address + MMCHS_SD_DATA); buf[count] = *((char*) &value); buf[count + 1] = *((char*) &value + 1); buf[count + 2] = *((char*) &value + 2); buf[count + 3] = *((char*) &value + 3); } /* Wait for TC */ while ((read32(base_address + MMCHS_SD_STAT) & MMCHS_SD_IE_TC_ENABLE_ENABLE) == 0) { count++; } write32(base_address + MMCHS_SD_STAT, MMCHS_SD_IE_TC_ENABLE_CLEAR); /* clear and disable the bbr interrupt */ write32(base_address + MMCHS_SD_STAT, MMCHS_SD_IE_BRR_ENABLE_CLEAR); set32(base_address + MMCHS_SD_IE, MMCHS_SD_IE_BRR_ENABLE, MMCHS_SD_IE_BRR_ENABLE_DISABLE); return 0; }
void powerpc_reset(void) { // enable the broadway IPC interrupt write32(HW_PPCIRQMASK, (1<<30)); clear32(HW_RESETS, 0x30); udelay(100); set32(HW_RESETS, 0x20); udelay(100); set32(HW_RESETS, 0x10); udelay(100000); set32(HW_EXICTRL, EXICTRL_ENABLE_EXI); }
void rw_reg_test(UINT32 init_value, UINT32 reg_mask, UINT32 pAddr) { printf("Test register %x! \n",UPACC_BASEADDR+pAddr); upacc_rd(UPACC_BASEADDR+pAddr,init_value ); set32 (UPACC_BASEADDR+pAddr,0x55555555 ); upacc_rd(UPACC_BASEADDR+pAddr,0x55555555®_mask); set32 (UPACC_BASEADDR+pAddr,0xaaaaaaaa ); upacc_rd(UPACC_BASEADDR+pAddr,0xaaaaaaaa®_mask); set32 (UPACC_BASEADDR+pAddr,0xffffffff ); upacc_rd(UPACC_BASEADDR+pAddr,0xffffffff®_mask); set32 (UPACC_BASEADDR+pAddr,init_value ); upacc_rd(UPACC_BASEADDR+pAddr,init_value ); }
void powerpc_reset(void) { gecko_printf("Resetting PPC. End debug output.\n\n"); gecko_enable(0); // enable the broadway IPC interrupt write32(HW_PPCIRQMASK, (1<<30)); clear32(HW_RESETS, 0x30); udelay(100); set32(HW_RESETS, 0x20); udelay(100); set32(HW_RESETS, 0x10); udelay(100000); set32(HW_EXICTRL, EXICTRL_ENABLE_EXI); }
void MIOSHWInit( u32 A, u32 B ) { GetRevision( SP+1, SP ); set32( HW_EXICTRL, 1 ); MIOSDoStuff( SP[1], SP[0] ); MIOSUnkInit(); MIOSEHCIInit( SP[1] ); set32( HW_RESETS, 0x7FDFBCF ); MIOSEHCIInit2(); }
void powerpc_hang(void) { clear32(HW_RESETS, 0x30); udelay(100); set32(HW_RESETS, 0x20); udelay(100); }
void panic2(int mode, ...) { int arg; va_list ap; clear32(HW_GPIO1OUT, HW_GPIO1_SLOT); clear32(HW_GPIO1DIR, HW_GPIO1_SLOT); clear32(HW_GPIO1OWNER, HW_GPIO1_SLOT); while(1) { va_start(ap, mode); while(1) { arg = va_arg(ap, int); if(arg < 0) break; set32(HW_GPIO1OUT, HW_GPIO1_SLOT); udelay(arg * PANIC_ON); clear32(HW_GPIO1OUT, HW_GPIO1_SLOT); udelay(PANIC_OFF); } va_end(ap); udelay(PANIC_INTER); } }
void draw::bop::set32(unsigned char* d, int d_scan, int width, int height, color c1, unsigned char alpha) { if(alpha == 0) return; else if(alpha >= 255) { set32(d, d_scan, width, height, c1); return; } while(height-- > 0) { color* d1 = (color*)d; color* d2 = d1 + width; if(alpha == 128) { while(d1 < d2) { d1->r = (d1->r + c1.r) >> 1; d1->g = (d1->g + c1.g) >> 1; d1->b = (d1->b + c1.b) >> 1; d1++; } } else { while(d1 < d2) { d1->r = (d1->r*(255 - alpha) + c1.r*alpha) >> 8; d1->g = (d1->g*(255 - alpha) + c1.g*alpha) >> 8; d1->b = (d1->b*(255 - alpha) + c1.b*alpha) >> 8; d1++; } } d += d_scan; }
void MemClrNoLog ( UINT32 addr, //Memory Address int total_byte, //Number of Data to clear in Byte UINT32 logaddr, int logbit ) { UINT32 result; int i,j=0; for(i=0;i<total_byte;i=i+4) { set32(addr+(UINT32)i,0x0); result = read32(addr+(UINT32)i); if(result == 0x0) { j++; } else { j=j; } } if(j == total_byte/4) { setbits(logaddr, logbit, logbit, 1); } else { setbits(logaddr, logbit, logbit, 0); } return; }
/************************************************* Function: setbit Description: Set a new value of an indicated bit Calls: Called By: Table Accessed: Table Updated: Input: pAddr: Address indicated BitNum: Bit number of the address BitValue: the value to be set. ONLY 0 or 1 Output: Return: UINT32 Others: *************************************************/ UINT32 setbit(UINT32 pAddr,UINT32 BitNum, UINT32 BitValue) { UINT32 RawData; UINT32 BitMask_temp=0x0; UINT32 BitMask=0x0; UINT32 DataMasked; UINT32 NewData; if((BitValue == 0) | (BitValue == 1)) { RawData = read32(pAddr); //Set bit mask to protect the other bits BitMask_temp = 1 << BitNum; BitMask = ~BitMask_temp; DataMasked = RawData & BitMask ; NewData = DataMasked | (BitValue << BitNum) ; set32(pAddr,NewData); } else { #ifdef _UNIT_DEBUG printk("ERROR: BitValue is not 0 or 1!\n"); #endif return 1; } return 0; }
int mmchs_send_cmd(uint32_t command, uint32_t arg) { int count = 0; /* Read current interrupt status and fail it an interrupt is already asserted */ if ((read32(base_address + MMCHS_SD_STAT) & 0xffffu)) { printf("%s, interrupt already raised stat %08x\n", __FUNCTION__, read32(base_address + MMCHS_SD_STAT)); return 1; } /* Set arguments */ write32(base_address + MMCHS_SD_ARG, arg); /* Set command */ set32(base_address + MMCHS_SD_CMD, MMCHS_SD_CMD_MASK, command); /* Wait for completion */ while ((read32(base_address + MMCHS_SD_STAT) & 0xffffu) == 0x0) { count++; } if (read32(base_address + MMCHS_SD_STAT) & 0x8000) { printf("%s, error stat %08x\n", __FUNCTION__, read32(base_address + MMCHS_SD_STAT)); set32(base_address + MMCHS_SD_STAT, MMCHS_SD_STAT_ERROR_MASK, 0xffffffffu); // clear errors // We currently only support 2.0, not responding to return 1; } if ((command & MMCHS_SD_CMD_RSP_TYPE) == MMCHS_SD_CMD_RSP_TYPE_48B_BUSY) { /* * Command with busy response *CAN* also set the TC bit if they exit busy */ while ((read32(base_address + MMCHS_SD_STAT) & MMCHS_SD_IE_TC_ENABLE_ENABLE) == 0) { count++; } write32(base_address + MMCHS_SD_STAT, MMCHS_SD_IE_TC_ENABLE_CLEAR); } /* clear the cc status */ write32(base_address + MMCHS_SD_STAT, MMCHS_SD_IE_CC_ENABLE_CLEAR); return 0; }
void powerpc_hang(void) { gecko_printf("Hanging PPC. End debug output.\n\n"); gecko_enable(0); clear32(HW_RESETS, 0x30); udelay(100); set32(HW_RESETS, 0x20); udelay(100); }
/* * mpt_issue_ioc_init - issue an IOCInit command to the IOC. */ int mpt_issue_ioc_init(mpt_adap_t *adap) { IOCInit_t *request = (IOCInit_t *)adap->shared->message; IOCInitReply_t *reply = (IOCInitReply_t *)adap->shared->data; time_t limit = time(NULL) + 30; int t; // printf("%s: sending IOCInit\n", adap->name); bzero(request, sizeof(*request)); request->Function = MPI_FUNCTION_IOC_INIT; request->WhoInit = MPI_WHOINIT_HOST_DRIVER; request->MaxDevices = adap->max_targets; request->MaxBuses = 1; request->MsgContext = set32(COMMAND_CONTEXT); request->ReplyFrameSize = set16(128); #if DOS request->HostMfaHighAddr = 0; request->SenseBufferHighAddr = 0; #else request->HostMfaHighAddr = set32((U32)(adap->shared_ba >> 32)); request->SenseBufferHighAddr = set32((U32)(adap->shared_ba >> 32)); #endif request->MsgVersion = set16(MPI_VERSION); request->HeaderVersion = set16(MPI_HEADER_VERSION); if (adap->hrsm_capable == TRUE) { adap->hrsm_value = 0; request->Flags |= MPI_IOCINIT_FLAGS_REPLY_FIFO_HOST_SIGNAL; request->ReplyFifoHostSignalingAddr = (U32)adap->shared_ba + (U32)offsetof(mpt_shared_t, hrsm_value); } logMptCommandReq(adap->port, request, sizeof(*request)); if (!mpt_send_message(adap, sizeof(*request), limit)) { printf("%s: mpt_send_message / IOCInit failed\n", adap->name); return 0; } t = mpt_receive_data(adap, sizeof(*reply), limit); logMptCommandRep(adap->port, request, sizeof(*request), reply, sizeof(*reply), t); if (!t) { printf("%s: mpt_receive_data / IOCInit failed\n", adap->name); return 0; } reply = reply; return 1; }
void panic(u8 v) { while(1) { debug_output(v); set32(HW_GPIO1BOUT, GP_SLOTLED); udelay(500000); debug_output(0); clear32(HW_GPIO1BOUT, GP_SLOTLED); udelay(500000); } }
void intr_assert(int mask) { if (read32(base_address + MMCHS_SD_STAT) & 0x8000) { mmc_log_debug(&log, "%s, error stat %08x\n", __FUNCTION__, read32(base_address + MMCHS_SD_STAT)); set32(base_address + MMCHS_SD_STAT, MMCHS_SD_STAT_ERROR_MASK, 0xffffffffu); } else { write32(base_address + MMCHS_SD_STAT, mask); } }
// // read a SINGLE block // int read_single_block(struct sd_card *card, uint32_t blknr, unsigned char *buf) { uint32_t count; uint32_t value; count= 0; set32(MMCHS0_REG_BASE + MMCHS_SD_IE, MMCHS_SD_IE_BRR_ENABLE, MMCHS_SD_IE_BRR_ENABLE_ENABLE); set32(MMCHS0_REG_BASE + MMCHS_SD_BLK, MMCHS_SD_BLK_BLEN, 512); if (send_cmd(MMCHS_SD_CMD_CMD17 // read single block | MMCHS_SD_CMD_DP_DATA // Command with data transfer | MMCHS_SD_CMD_RSP_TYPE_48B // type (R1) | MMCHS_SD_CMD_MSBS_SINGLE // single block | MMCHS_SD_CMD_DDIR_READ // read data from card , blknr)) { return 1; } while ((read32(MMCHS0_REG_BASE + MMCHS_SD_STAT) & MMCHS_SD_IE_BRR_ENABLE_ENABLE) == 0) { count++; } if (!(read32(MMCHS0_REG_BASE + MMCHS_SD_PSTATE) & MMCHS_SD_PSTATE_BRE_EN)) { return 1; // We are not allowed to read data from the data buffer } for (count= 0; count < 512; count += 4) { value= read32(MMCHS0_REG_BASE + MMCHS_SD_DATA); buf[count]= *((char*) &value); buf[count + 1]= *((char*) &value + 1); buf[count + 2]= *((char*) &value + 2); buf[count + 3]= *((char*) &value + 3); } // Wait for TC while ((read32(MMCHS0_REG_BASE + MMCHS_SD_STAT) & MMCHS_SD_IE_TC_ENABLE_ENABLE) == 0) { count++; } write32(MMCHS0_REG_BASE + MMCHS_SD_STAT, MMCHS_SD_IE_TC_ENABLE_CLEAR); // clear and disable the bbr interrupt write32(MMCHS0_REG_BASE + MMCHS_SD_STAT, MMCHS_SD_IE_BRR_ENABLE_CLEAR); set32(MMCHS0_REG_BASE + MMCHS_SD_IE, MMCHS_SD_IE_BRR_ENABLE, MMCHS_SD_IE_BRR_ENABLE_DISABLE); return 0; }
/* * mpt_set_on_bus_timer - set SCSI port on-bus-timer value. */ int mpt_set_on_bus_timer(mpt_adap_t *adap, int timeout) { SCSIPortPage1_t *scsi_port_1 = (SCSIPortPage1_t *)adap->shared->config; // printf("%s: setting on-bus-timer\n", adap->name); bzero(scsi_port_1, sizeof(*scsi_port_1)); scsi_port_1->Configuration |= set32(adap->host_id); scsi_port_1->Configuration |= set32(1 << (adap->host_id + 16)); /* * Convert from milliseconds to 1.6 microsecond units. */ scsi_port_1->OnBusTimerValue = set32(timeout * 1000*10/16); if (!mpt_set_config_page(adap, MPI_CONFIG_PAGETYPE_SCSI_PORT, 1, 0)) { printf("%s: Failed to set SCSI Port Page 1\n", adap->name); } return 1; }
void Http2Base::PushData(uint32_t id, const void* data, size_t size){ size_t left = size; while(left > remoteframebodylimit){ Http2_header* const header=(Http2_header *)p_move(p_malloc(remoteframebodylimit), -(char)sizeof(Http2_header)); memset(header, 0, sizeof(Http2_header)); set32(header->id, id); set24(header->length, remoteframebodylimit); memcpy(header+1, data, remoteframebodylimit); PushFrame(header); data = (char*)data + remoteframebodylimit; left -= remoteframebodylimit; } Http2_header* const header=(Http2_header *)p_move(p_malloc(left), -(char)sizeof(Http2_header)); memset(header, 0, sizeof(Http2_header)); set32(header->id, id); set24(header->length, left); if(size == 0) { LOGD(DHTTP2, "<guest2> [%d]: set stream end\n", id); header->flags = END_STREAM_F; }else{ memcpy(header+1, data, left); } PushFrame(header); }
/*********************************************************** Function: mem_copy() // 函数名称 Description: 复制指定内存段到另一位置。 Calls: set32 ; set8 ; printf // 被本函数调用的函数清单(建议描述) Called By: // 调用本函数的函数清单(建议描述) Table Accessed: 无// 被访问的表(此项仅对于牵扯到数据库操作的程序) Table Updated: 无// 被修改的表(此项仅对于牵扯到数据库操作的程序) Input: src_addr:源内存地址,32bit des_addr:目的内存地址,32bit num_byte:需要复制的内存的长度,单位byt Output: 无 // 对输出参数的说明。 Return: 无// 函数返回值的说明 Others: // 其它说明 ***********************************************************/ void mem_copy( UINT32 src_addr, /* Memory Source Address*/ UINT32 des_addr, /* Memory Destination Address*/ int num_byte) /* Number of Data in Byte*/ { int cnt1 ; int cnt2 ; UINT32 read_data ; UINT8 read_data_byte ; cnt1 = 0 ; cnt2 = 0 ; /*拷贝操作,超过32bits使用32bits 的数据写函数,不足32bits的memory使用8bits 的数据写函数*/ for (cnt1 = num_byte; cnt1 >0; cnt1 = cnt1 - 0x4) { if(cnt1 >= 0x4) { read_data = read32( src_addr ); set32(des_addr , read_data ); src_addr = src_addr + 0x4 ; des_addr = des_addr + 0x4 ; } else { cnt2 = cnt1; while ( cnt2 ) { read_data_byte = read8 ( src_addr ); set8(des_addr, read_data_byte ); src_addr = src_addr + 0x1 ; des_addr = des_addr + 0x1 ; cnt2 = cnt2 - 0x1 ; } } } #ifdef _UNIT_DEBUG printf("Copy finish!\n"); #endif return; }
void ddr_write (UINT32 data_len) { UINT32 i,j; UINT32 rdata1,rdata2; //UINT32 data_len; j = 0; //data_len = 1000000; for( j = 0; j < data_len; j = j+1 ) { for( i = 0; i < 1000000; i = i+1 ) { set32(MDDR_BASEADDR + 0x1300000 + i*4 ,i); } printf("Write Complete!!\n"); } }
void i2s32(char* buf, ulong* src, uint n, uchar spc) { ulong v; set32(&v, src); buf += n; *buf = 0; while(1) { div32_16(&v, 10); --buf; *buf = "0123456789ABCDEF"[op_div16_mod]; if(--n == 0) return; if(((ushort*)&v)[0] == 0 && ((ushort*)&v)[1] == 0) break; } while(1) { --buf; *buf = spc; if(--n == 0) break; } }
int mmchs_send_cmd(uint32_t command, uint32_t arg) { /* Read current interrupt status and fail it an interrupt is already * asserted */ /* Set arguments */ write32(base_address + MMCHS_SD_ARG, arg); /* Set command */ set32(base_address + MMCHS_SD_CMD, MMCHS_SD_CMD_MASK, command); if (intr_wait(MMCHS_SD_STAT_CC | MMCHS_SD_IE_TC_ENABLE_CLEAR)) { intr_assert(MMCHS_SD_STAT_CC); mmc_log_warn(&log, "Failure waiting for interrupt\n"); return 1; } if ((command & MMCHS_SD_CMD_RSP_TYPE) == MMCHS_SD_CMD_RSP_TYPE_48B_BUSY) { /* * Command with busy response *CAN* also set the TC bit if they exit busy */ if ((read32(base_address + MMCHS_SD_STAT) & MMCHS_SD_IE_TC_ENABLE_ENABLE) == 0) { mmc_log_warn(&log, "TC should be raised\n"); } write32(base_address + MMCHS_SD_STAT, MMCHS_SD_IE_TC_ENABLE_CLEAR); if (intr_wait(MMCHS_SD_STAT_CC | MMCHS_SD_IE_TC_ENABLE_CLEAR)) { intr_assert(MMCHS_SD_STAT_CC); mmc_log_warn(&log, "Failure waiting for clear\n"); return 1; } } intr_assert(MMCHS_SD_STAT_CC); return 0; }
int write_single_block(struct sd_card_regs *card, uint32_t blknr, unsigned char *buf) { struct mmc_command command; set32(base_address + MMCHS_SD_BLK, MMCHS_SD_BLK_BLEN, 512); command.cmd = MMC_WRITE_BLOCK_SINGLE; command.args = blknr; command.resp_type = RESP_LEN_48; command.data = buf; command.data_len = 512; /* write single block */ if (mmc_send_cmd(&command)) { mmc_log_warn(&log, "Write single block command failed\n"); return 1; } return 0; }
/* * mpt_issue_port_facts - issue a PortFacts command to the IOC. */ int mpt_issue_port_facts(mpt_adap_t *adap, int port) { PortFacts_t *request = (PortFacts_t *)adap->shared->message; PortFactsReply_t *reply = (PortFactsReply_t *)adap->shared->data; time_t limit = time(NULL) + 10; int t; // printf("%s: sending PortFacts to port %d\n", adap->name, port); bzero(request, sizeof(*request)); request->Function = MPI_FUNCTION_PORT_FACTS; request->PortNumber = port; request->MsgContext = set32(COMMAND_CONTEXT); logMptCommandReq(adap->port, request, sizeof(*request)); if (!mpt_send_message(adap, sizeof(*request), limit)) { printf("%s: mpt_send_message / PortFacts failed\n", adap->name); return 0; } t = mpt_receive_data(adap, sizeof(*reply), limit); logMptCommandRep(adap->port, request, sizeof(*request), reply, sizeof(*reply), t); if (!t) { printf("%s: mpt_receive_data / PortFacts failed\n", adap->name); return 0; } adap->port_type = reply->PortType; adap->host_id = reply->PortSCSIID; return 1; }
/* * mpt_issue_event_notification - issue an EventNotification command to the IOC. */ int mpt_issue_event_notification(mpt_adap_t *adap) { EventNotification_t *request = (EventNotification_t *)adap->shared->message; EventNotificationReply_t *reply = (EventNotificationReply_t *)adap->shared->data; time_t limit = time(NULL) + 10; int t; // printf("%s: sending EventNotification\n", adap->name); bzero(request, sizeof(*request)); request->Function = MPI_FUNCTION_EVENT_NOTIFICATION; request->Switch = MPI_EVENT_NOTIFICATION_SWITCH_ON; request->MsgContext = set32(COMMAND_CONTEXT); logMptCommandReq(adap->port, request, sizeof(*request)); if (!mpt_send_message(adap, sizeof(*request), limit)) { printf("%s: mpt_send_message / EventNotification failed\n", adap->name); return 0; } t = mpt_receive_data(adap, sizeof(*reply), limit); logMptCommandRep(adap->port, request, sizeof(*request), reply, sizeof(*reply), t); if (!t) { printf("%s: mpt_receive_data / EventNotification failed\n", adap->name); return 0; } reply = reply; return 1; }
/* * mpt_issue_port_enable - issue a PortEnable command to the IOC. */ int mpt_issue_port_enable(mpt_adap_t *adap, int port) { PortEnable_t *request = (PortEnable_t *)adap->shared->message; MPIDefaultReply_t *reply = (MPIDefaultReply_t *)adap->shared->data; time_t limit = time(NULL) + 120; int t; // printf("%s: sending PortEnable to port %d\n", adap->name, port); bzero(request, sizeof(*request)); request->Function = MPI_FUNCTION_PORT_ENABLE; request->PortNumber = port; request->MsgContext = set32(COMMAND_CONTEXT); logMptCommandReq(adap->port, request, sizeof(*request)); if (!mpt_send_message(adap, sizeof(*request), limit)) { printf("%s: mpt_send_message / PortEnable failed\n", adap->name); return 0; } t = mpt_receive_data(adap, sizeof(*reply), limit); logMptCommandRep(adap->port, request, sizeof(*request), reply, sizeof(*reply), t); if (!t) { printf("%s: mpt_receive_data / PortEnable failed\n", adap->name); return 0; } reply = reply; return 1; }
void Gdt::build() { #ifdef __i386__ Size s = BIT_32; bool l = false; #else Size s = BIT_16; bool l = true; #endif gdt[SEL_KERN_CODE >> 3].set32 (CODE_XRA, PAGES, s, l, 0, 0, ~0ul); gdt[SEL_KERN_DATA >> 3].set32 (DATA_RWA, PAGES, s, l, 0, 0, ~0ul); gdt[SEL_USER_CODE >> 3].set32 (CODE_XRA, PAGES, s, l, 3, 0, ~0ul); gdt[SEL_USER_DATA >> 3].set32 (DATA_RWA, PAGES, s, l, 3, 0, ~0ul); gdt[SEL_USER_CODE_L >> 3].set32 (CODE_XRA, PAGES, s, l, 3, 0, ~0ul); #ifdef __i386__ gdt[SEL_TSS_RUN >> 3].set32 (SYS_TSS, BYTES, BIT_16, false, 0, reinterpret_cast<mword>(&Tss::run), SPC_LOCAL_IOP_E - reinterpret_cast<mword>(&Tss::run)); gdt[SEL_TSS_DBF >> 3].set32 (SYS_TSS, BYTES, BIT_16, false, 0, reinterpret_cast<mword>(&Tss::dbf), sizeof (Tss) - 1); #else gdt[SEL_TSS_RUN >> 3].set64 (SYS_TSS, BYTES, BIT_16, false, 0, reinterpret_cast<mword>(&Tss::run), SPC_LOCAL_IOP_E - reinterpret_cast<mword>(&Tss::run)); gdt[SEL_TSS_DBF >> 3].set64 (SYS_TSS, BYTES, BIT_16, false, 0, reinterpret_cast<mword>(&Tss::dbf), sizeof (Tss) - 1); #endif }