uint8_t ati68860_ramdac_in(uint16_t addr, ati68860_ramdac_t *ramdac, svga_t *svga) { uint8_t ret = 0; switch (addr) { case 0: ret = svga_in(0x3c8, svga); break; case 1: ret = svga_in(0x3c9, svga); break; case 2: ret = svga_in(0x3c6, svga); break; case 3: ret = svga_in(0x3c7, svga); break; case 4: case 8: ret = 2; break; case 6: case 0xa: ret = 0x1d; break; case 0xf: ret = 0xd0; break; default: ret = ramdac->regs[addr & 0xf]; break; } // pclog("ati68860_in : addr %04X ret %02X %04X:%04X\n", addr, ret, CS,pc); return ret; }
uint8_t ati68860_ramdac_in(uint16_t addr, ati68860_ramdac_t *ramdac, svga_t *svga) { uint8_t ret = 0; switch (addr) { case 0: ret = svga_in(0x3c8, svga); break; case 1: ret = svga_in(0x3c9, svga); break; case 2: ret = svga_in(0x3c6, svga); break; case 3: ret = svga_in(0x3c7, svga); break; case 4: case 8: ret = 2; break; case 6: case 0xa: ret = 0x1d; break; case 0xf: ret = 0xd0; break; default: ret = ramdac->regs[addr & 0xf]; break; } return ret; }
uint8_t vga_in(uint16_t addr, void *p) { vga_t *vga = (vga_t *)p; svga_t *svga = &vga->svga; uint8_t temp; // if (addr != 0x3da) pclog("vga_in : %04X ", addr); if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) addr ^= 0x60; switch (addr) { case 0x3D4: temp = svga->crtcreg; break; case 0x3D5: temp = svga->crtc[svga->crtcreg]; break; default: temp = svga_in(addr, svga); break; } // if (addr != 0x3da) pclog("%02X %04X:%04X\n", temp, CS,pc); return temp; }
uint8_t tvga_in(uint16_t addr, void *p) { tvga_t *tvga = (tvga_t *)p; svga_t *svga = &tvga->svga; // if (addr != 0x3da) pclog("tvga_in : %04X %04X:%04X\n", addr, CS,pc); if (((addr&0xFFF0) == 0x3D0 || (addr&0xFFF0) == 0x3B0) && !(svga->miscout & 1)) addr ^= 0x60; switch (addr) { case 0x3C5: if ((svga->seqaddr & 0xf) == 0xb) { // printf("Read Trident ID %04X:%04X %04X\n",CS,pc,readmemw(ss,SP)); tvga->oldmode = 0; return 0x33; /*TVGA8900D*/ } if ((svga->seqaddr & 0xf) == 0xc) { // printf("Read Trident Power Up 1 %04X:%04X %04X\n",CS,pc,readmemw(ss,SP)); // return 0x20; /*2 DRAM banks*/ } if ((svga->seqaddr & 0xf) == 0xd) { if (tvga->oldmode) return tvga->oldctrl2; return tvga->newctrl2; } if ((svga->seqaddr & 0xf) == 0xe) { if (tvga->oldmode) return tvga->oldctrl1; } break; case 0x3C6: case 0x3C7: case 0x3C8: case 0x3C9: return tkd8001_ramdac_in(addr, &tvga->ramdac, svga); case 0x3D4: return svga->crtcreg; case 0x3D5: if (svga->crtcreg > 0x18 && svga->crtcreg < 0x1e) return 0xff; return svga->crtc[svga->crtcreg]; case 0x3d8: return tvga->tvga_3d8; case 0x3d9: return tvga->tvga_3d9; } return svga_in(addr, svga); }
uint8_t vga_in(uint16_t addr, void *p) { vga_t *vga = (vga_t *)p; svga_t *svga = &vga->svga; uint8_t temp; if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) addr ^= 0x60; switch (addr) { case 0x3D4: temp = svga->crtcreg; break; case 0x3D5: temp = svga->crtc[svga->crtcreg]; break; default: temp = svga_in(addr, svga); break; } return temp; }