This rep includes four projects about Verilog, the fifth of them is a CPU which can run some simple instructions of MIPS. And the last one is a transplanted LeNet-5 CNN running on FPGA board, which has been accelerated with convolution multiplication. All the projects is built by vivado, which is a tool chain of Xlinx FPGA.

1. counter
2. sequence detector
3. frequency counter
4. UART communication
5. MIPS CPU
6. CNN acceleration