Vec* BUS_get_var_indices(void* vbus, unsigned char var, int t_start, int t_end) { // Local vars Bus* bus = (Bus*)vbus; Vec* indices; int offset = 0; int t; // Checks if (!bus) return NULL; if (t_start < 0) t_start = 0; if (t_end > bus->num_periods-1) t_end = bus->num_periods-1; // Indices indices = VEC_new(BUS_get_num_vars(vbus,var,t_start,t_end)); if ((var & BUS_VAR_VMAG) && (bus->vars & BUS_VAR_VMAG)) { // v mag for (t = t_start; t <= t_end; t++) { VEC_set(indices,offset,bus->index_v_mag[t]); offset++; } } if ((var & BUS_VAR_VANG) && (bus->vars & BUS_VAR_VANG)) { // v ang for (t = t_start; t <= t_end; t++) { VEC_set(indices,offset,bus->index_v_ang[t]); offset++; } } return indices; }
void BUS_get_var_values(Bus* bus, Vec* values, int code) { // Local vars int t; // No bus if (!bus) return; for (t = 0; t < bus->num_periods; t++) { // Voltage magnitude if (bus->vars & BUS_VAR_VMAG) { switch (code) { case UPPER_LIMITS: if (bus->bounded & BUS_VAR_VMAG) VEC_set(values,bus->index_v_mag[t],bus->v_max_norm); else VEC_set(values,bus->index_v_mag[t],BUS_INF_V_MAG); break; case LOWER_LIMITS: if (bus->bounded & BUS_VAR_VMAG) VEC_set(values,bus->index_v_mag[t],bus->v_min_norm); else VEC_set(values,bus->index_v_mag[t],-BUS_INF_V_MAG); break; default: VEC_set(values,bus->index_v_mag[t],bus->v_mag[t]); } } // Voltage angle if (bus->vars & BUS_VAR_VANG) { switch(code) { case UPPER_LIMITS: VEC_set(values,bus->index_v_ang[t],BUS_INF_V_ANG); break; case LOWER_LIMITS: VEC_set(values,bus->index_v_ang[t],-BUS_INF_V_ANG); break; default: VEC_set(values,bus->index_v_ang[t],bus->v_ang[t]); } } } }
void GEN_get_var_values(Gen* gen, Vec* values, int code) { if (!gen) return; if (gen->vars & GEN_VAR_P) { // active power switch(code) { case UPPER_LIMITS: VEC_set(values,gen->index_P,gen->P_max); break; case LOWER_LIMITS: VEC_set(values,gen->index_P,gen->P_min); break; default: VEC_set(values,gen->index_P,gen->P); } } if (gen->vars & GEN_VAR_Q) { // reactive power switch(code) { case UPPER_LIMITS: VEC_set(values,gen->index_Q,gen->Q_max); break; case LOWER_LIMITS: VEC_set(values,gen->index_Q,gen->Q_min); break; default: VEC_set(values,gen->index_Q,gen->Q); } } }
void HEUR_PVPQ_apply_step(Heur* h, Constr* clist, Net* net, Branch* br, int t, Vec* var_values) { // Local variables Vec* f; Mat* A; Vec* b; Bus* bus[2]; Gen* gen; char* bus_counted; Heur_PVPQ_Data* data; char* reg_flag; int bus_index_t[2]; int k; int i; Constr* pf; Constr* fix; REAL v; REAL v_set; REAL Q; REAL Qmax; REAL Qmin; char switch_flag; int j_old; int j_new; REAL b_new; int T; int num_buses; // Num periods T = BRANCH_get_num_periods(br); // Num buses num_buses = NET_get_num_buses(net); // Heur data bus_counted = HEUR_get_bus_counted(h); data = (Heur_PVPQ_Data*)HEUR_get_data(h); reg_flag = data->reg_flag; // Check outage if (BRANCH_is_on_outage(br)) return; // Bus from data bus[0] = BRANCH_get_bus_k(br); bus_index_t[0] = BUS_get_index(bus[0])*T+t; // Bus to data bus[1] = BRANCH_get_bus_m(br); bus_index_t[1] = BUS_get_index(bus[1])*T+t; // Power flow constraints for (pf = clist; pf != NULL; pf = CONSTR_get_next(pf)) { if (strcmp(CONSTR_get_name(pf),"AC power balance") == 0) break; } if (!pf) return; // Fix constraints for (fix = clist; fix != NULL; fix = CONSTR_get_next(fix)) { if (strcmp(CONSTR_get_name(fix),"variable fixing") == 0) break; } if (!fix) return; // Constr data f = CONSTR_get_f(pf); A = CONSTR_get_A(fix); b = CONSTR_get_b(fix); // Buses for (k = 0; k < 2; k++) { if (!bus_counted[bus_index_t[k]] && // not counted !BUS_is_slack(bus[k]) && // not slack BUS_is_regulated_by_gen(bus[k]) && // regulated BUS_has_flags(bus[k],FLAG_VARS,BUS_VAR_VMAG) && // v mag is variable BUS_has_flags(bus[k],FLAG_FIXED,BUS_VAR_VMAG) && // v mag is fixed GEN_has_flags(BUS_get_reg_gen(bus[k]),FLAG_VARS,GEN_VAR_Q)) { // reg gen Q is variable // Voltage magnitude v = VEC_get(var_values,BUS_get_index_v_mag(bus[k],t)); v_set = BUS_get_v_set(bus[k],t); // Regulating generator (first one in list of reg gens) gen = BUS_get_reg_gen(bus[k]); Q = VEC_get(var_values,GEN_get_index_Q(gen,t)); // per unit Qmax = GEN_get_Q_max(gen); // per unit Qmin = GEN_get_Q_min(gen); // per unit // Switch flag switch_flag = FALSE; // Currently regulated if (reg_flag[bus_index_t[k]]) { // Violations if (Q > Qmax) { // Set data j_old = BUS_get_index_v_mag(bus[k],t); j_new = GEN_get_index_Q(gen,t); b_new = Qmax; switch_flag = TRUE; reg_flag[bus_index_t[k]] = FALSE; // Update vector of var values while (gen) { if (GEN_has_flags(gen,FLAG_VARS,GEN_VAR_Q)) VEC_set(var_values,GEN_get_index_Q(gen,t),GEN_get_Q_max(gen)); gen = GEN_get_reg_next(gen); } } else if (Q < Qmin) { // Set data j_old = BUS_get_index_v_mag(bus[k],t); j_new = GEN_get_index_Q(gen,t); b_new = Qmin; switch_flag = TRUE; reg_flag[bus_index_t[k]] = FALSE; // Update vector of var values while (gen) { if (GEN_has_flags(gen,FLAG_VARS,GEN_VAR_Q)) VEC_set(var_values,GEN_get_index_Q(gen,t),GEN_get_Q_min(gen)); gen = GEN_get_reg_next(gen); } } } // Previously regulated else { // Q at Qmin and v < v_set if (fabs(Q-Qmin) < fabs(Q-Qmax) && v < v_set) { Q = Q - VEC_get(f,BUS_get_index_Q(GEN_get_bus(gen))+t*2*num_buses); // per unit (see constr_PF) if (Q >= Qmax) { // Set data j_old = GEN_get_index_Q(gen,t); j_new = GEN_get_index_Q(gen,t); b_new = Qmax; switch_flag = TRUE; // Update vector of var values while (gen) { if (GEN_has_flags(gen,FLAG_VARS,GEN_VAR_Q)) VEC_set(var_values,GEN_get_index_Q(gen,t),GEN_get_Q_max(gen)); gen = GEN_get_reg_next(gen); } } else if (Qmin < Q && Q < Qmax) { // Set data j_old = GEN_get_index_Q(gen,t); j_new = BUS_get_index_v_mag(bus[k],t); b_new = v_set; switch_flag = TRUE; reg_flag[bus_index_t[k]] = TRUE; // Udpate vector of var values VEC_set(var_values,j_new,b_new); } } // Q at Qmax and v > v_set else if (fabs(Q-Qmax) < fabs(Q-Qmin) && v > v_set) { Q = Q - VEC_get(f,BUS_get_index_Q(GEN_get_bus(gen))+t*2*num_buses); // per unit (see constr_PF) if (Q <= Qmin) { // Set data j_old = GEN_get_index_Q(gen,t); j_new = GEN_get_index_Q(gen,t); b_new = Qmin; switch_flag = TRUE; // Update vector of var values while (gen) { if (GEN_has_flags(gen,FLAG_VARS,GEN_VAR_Q)) VEC_set(var_values,GEN_get_index_Q(gen,t),GEN_get_Q_min(gen)); gen = GEN_get_reg_next(gen); } } else if (Qmin < Q && Q < Qmax) { // Set data j_old = GEN_get_index_Q(gen,t); j_new = BUS_get_index_v_mag(bus[k],t); b_new = v_set; switch_flag = TRUE; reg_flag[bus_index_t[k]] = TRUE; // Udpate vector of var values VEC_set(var_values,j_new,b_new); } } } // Update fix constraints if (switch_flag) { for (i = 0; i < MAT_get_nnz(A); i++) { if (MAT_get_j(A,i) == j_old) MAT_set_d(A,i,0.); if (MAT_get_j(A,i) == j_new) { MAT_set_d(A,i,1.); VEC_set(b,MAT_get_i(A,i),b_new); } } } } // Update counted flag bus_counted[bus_index_t[k]] = TRUE; } }
void CONSTR_FIX_analyze_step(Constr* c, Branch* br, int t) { // Local variables Bus* buses[2]; Bus* bus; Gen* gen; Vargen* vargen; Bat* bat; Load* load; Shunt* shunt; int* A_nnz; int* A_row; char* bus_counted; Vec* b; Mat* A; int i; REAL Pc; REAL Pd; int T; // Number of periods T = BRANCH_get_num_periods(br); // Cosntr data b = CONSTR_get_b(c); A = CONSTR_get_A(c); A_nnz = CONSTR_get_A_nnz_ptr(c); A_row = CONSTR_get_A_row_ptr(c); bus_counted = CONSTR_get_bus_counted(c); // Check pointers if (!A_nnz || !A_row || !bus_counted) return; // Check outage if (BRANCH_is_on_outage(br)) return; // Bus data buses[0] = BRANCH_get_bus_k(br); buses[1] = BRANCH_get_bus_m(br); // Tap ratio if (BRANCH_has_flags(br,FLAG_FIXED,BRANCH_VAR_RATIO) && BRANCH_has_flags(br,FLAG_VARS,BRANCH_VAR_RATIO)) { VEC_set(b,*A_row,BRANCH_get_ratio(br,t)); MAT_set_i(A,*A_nnz,*A_row); MAT_set_j(A,*A_nnz,BRANCH_get_index_ratio(br,t)); MAT_set_d(A,*A_nnz,1.); (*A_nnz)++; (*A_row)++; } // Phase shift if (BRANCH_has_flags(br,FLAG_FIXED,BRANCH_VAR_PHASE) && BRANCH_has_flags(br,FLAG_VARS,BRANCH_VAR_PHASE)) { VEC_set(b,*A_row,BRANCH_get_phase(br,t)); MAT_set_i(A,*A_nnz,*A_row); MAT_set_j(A,*A_nnz,BRANCH_get_index_phase(br,t)); MAT_set_d(A,*A_nnz,1.); (*A_nnz)++; (*A_row)++; } // Buses for (i = 0; i < 2; i++) { bus = buses[i]; if (!bus_counted[BUS_get_index(bus)*T+t]) { // Voltage magnitude (V_MAG) if (BUS_has_flags(bus,FLAG_FIXED,BUS_VAR_VMAG) && BUS_has_flags(bus,FLAG_VARS,BUS_VAR_VMAG)) { if (BUS_is_regulated_by_gen(bus)) VEC_set(b,*A_row,BUS_get_v_set(bus,t)); else VEC_set(b,*A_row,BUS_get_v_mag(bus,t)); MAT_set_i(A,*A_nnz,*A_row); MAT_set_j(A,*A_nnz,BUS_get_index_v_mag(bus,t)); MAT_set_d(A,*A_nnz,1.); (*A_nnz)++; // Extra nz for regulating generator (for PV-PQ switching?) if (BUS_is_regulated_by_gen(bus) && GEN_has_flags(BUS_get_reg_gen(bus),FLAG_VARS,GEN_VAR_Q)) { MAT_set_i(A,*A_nnz,*A_row); MAT_set_j(A,*A_nnz,GEN_get_index_Q(BUS_get_reg_gen(bus),t)); MAT_set_d(A,*A_nnz,0.); // placeholder (*A_nnz)++; } (*A_row)++; } // Voltage angle (V_ANG) if (BUS_has_flags(bus,FLAG_FIXED,BUS_VAR_VANG) && BUS_has_flags(bus,FLAG_VARS,BUS_VAR_VANG)) { VEC_set(b,*A_row,BUS_get_v_ang(bus,t)); MAT_set_i(A,*A_nnz,*A_row); MAT_set_j(A,*A_nnz,BUS_get_index_v_ang(bus,t)); MAT_set_d(A,*A_nnz,1.); (*A_nnz)++; (*A_row)++; } // Generators for (gen = BUS_get_gen(bus); gen != NULL; gen = GEN_get_next(gen)) { // Active power (P) if (GEN_has_flags(gen,FLAG_FIXED,GEN_VAR_P) && GEN_has_flags(gen,FLAG_VARS,GEN_VAR_P)) { VEC_set(b,*A_row,GEN_get_P(gen,t)); MAT_set_i(A,*A_nnz,*A_row); MAT_set_j(A,*A_nnz,GEN_get_index_P(gen,t)); MAT_set_d(A,*A_nnz,1.); (*A_nnz)++; (*A_row)++; } // Reactive power (Q) if (GEN_has_flags(gen,FLAG_FIXED,GEN_VAR_Q) && GEN_has_flags(gen,FLAG_VARS,GEN_VAR_Q)) { VEC_set(b,*A_row,GEN_get_Q(gen,t)); MAT_set_i(A,*A_nnz,*A_row); MAT_set_j(A,*A_nnz,GEN_get_index_Q(gen,t)); MAT_set_d(A,*A_nnz,1.); (*A_nnz)++; (*A_row)++; } } // Variable generators for (vargen = BUS_get_vargen(bus); vargen != NULL; vargen = VARGEN_get_next(vargen)) { // Active power (P) if (VARGEN_has_flags(vargen,FLAG_FIXED,VARGEN_VAR_P) && VARGEN_has_flags(vargen,FLAG_VARS,VARGEN_VAR_P)) { VEC_set(b,*A_row,VARGEN_get_P(vargen,t)); MAT_set_i(A,*A_nnz,*A_row); MAT_set_j(A,*A_nnz,VARGEN_get_index_P(vargen,t)); MAT_set_d(A,*A_nnz,1.); (*A_nnz)++; (*A_row)++; } // Reactive power (Q) if (VARGEN_has_flags(vargen,FLAG_FIXED,VARGEN_VAR_Q) && VARGEN_has_flags(vargen,FLAG_VARS,VARGEN_VAR_Q)) { VEC_set(b,*A_row,VARGEN_get_Q(vargen,t)); MAT_set_i(A,*A_nnz,*A_row); MAT_set_j(A,*A_nnz,VARGEN_get_index_Q(vargen,t)); MAT_set_d(A,*A_nnz,1.); (*A_nnz)++; (*A_row)++; } } // Shunts for (shunt = BUS_get_shunt(bus); shunt != NULL; shunt = SHUNT_get_next(shunt)) { // Susceptance (b) if (SHUNT_has_flags(shunt,FLAG_FIXED,SHUNT_VAR_SUSC) && SHUNT_has_flags(shunt,FLAG_VARS,SHUNT_VAR_SUSC)) { VEC_set(b,*A_row,SHUNT_get_b(shunt,t)); MAT_set_i(A,*A_nnz,*A_row); MAT_set_j(A,*A_nnz,SHUNT_get_index_b(shunt,t)); MAT_set_d(A,*A_nnz,1.); (*A_nnz)++; (*A_row)++; } } // Batteries for (bat = BUS_get_bat(bus); bat != NULL; bat = BAT_get_next(bat)) { // Charging/discharging power (P) if (BAT_has_flags(bat,FLAG_FIXED,BAT_VAR_P) && BAT_has_flags(bat,FLAG_VARS,BAT_VAR_P)) { if (BAT_get_P(bat,t) >= 0) { Pc = BAT_get_P(bat,t); Pd = 0.; } else { Pc = 0.; Pd = -BAT_get_P(bat,t); } // Pc VEC_set(b,*A_row,Pc); MAT_set_i(A,*A_nnz,*A_row); MAT_set_j(A,*A_nnz,BAT_get_index_Pc(bat,t)); MAT_set_d(A,*A_nnz,1.); (*A_nnz)++; (*A_row)++; // Pd VEC_set(b,*A_row,Pd); MAT_set_i(A,*A_nnz,*A_row); MAT_set_j(A,*A_nnz,BAT_get_index_Pd(bat,t)); MAT_set_d(A,*A_nnz,1.); (*A_nnz)++; (*A_row)++; } // Energy level (E) if (BAT_has_flags(bat,FLAG_FIXED,BAT_VAR_E) && BAT_has_flags(bat,FLAG_VARS,BAT_VAR_E)) { VEC_set(b,*A_row,BAT_get_E(bat,t)); MAT_set_i(A,*A_nnz,*A_row); MAT_set_j(A,*A_nnz,BAT_get_index_E(bat,t)); MAT_set_d(A,*A_nnz,1.); (*A_nnz)++; (*A_row)++; } } // Loads for (load = BUS_get_load(bus); load != NULL; load = LOAD_get_next(load)) { // Active power (P) if (LOAD_has_flags(load,FLAG_FIXED,LOAD_VAR_P) && LOAD_has_flags(load,FLAG_VARS,LOAD_VAR_P)) { VEC_set(b,*A_row,LOAD_get_P(load,t)); MAT_set_i(A,*A_nnz,*A_row); MAT_set_j(A,*A_nnz,LOAD_get_index_P(load,t)); MAT_set_d(A,*A_nnz,1.); (*A_nnz)++; (*A_row)++; } } } // Update counted flag bus_counted[BUS_get_index(bus)*T+t] = TRUE; } }
void CONSTR_PAR_GEN_Q_analyze_branch(Constr* c, Branch* br) { // Local variables Bus* buses[2]; Bus* bus; Gen* gen1; Gen* gen2; int* Acounter; int* Aconstr_index; char* bus_counted; Vec* b; Mat* A; int i; int j; REAL Qmin1; REAL Qmin2; REAL dQ1; REAL dQ2; // Cosntr data b = CONSTR_get_b(c); A = CONSTR_get_A(c); Acounter = CONSTR_get_Acounter_ptr(c); Aconstr_index = CONSTR_get_Aconstr_index_ptr(c); bus_counted = CONSTR_get_bus_counted(c); if (!Acounter || !Aconstr_index || !bus_counted) return; // Bus data buses[0] = BRANCH_get_bus_from(br); buses[1] = BRANCH_get_bus_to(br); // Buses for (i = 0; i < 2; i++) { bus = buses[i]; if (!bus_counted[BUS_get_index(bus)]) { // Reactive power of regulating generators if (BUS_is_regulated_by_gen(bus)) { gen1 = BUS_get_reg_gen(bus); Qmin1 = GEN_get_Q_min(gen1); dQ1 = GEN_get_Q_max(gen1)-Qmin1; if (dQ1 < CONSTR_PAR_GEN_Q_PARAM) dQ1 = CONSTR_PAR_GEN_Q_PARAM; for (gen2 = GEN_get_reg_next(gen1); gen2 != NULL; gen2 = GEN_get_reg_next(gen2)) { Qmin2 = GEN_get_Q_min(gen2); dQ2 = GEN_get_Q_max(gen2)-Qmin2; if (dQ2 < CONSTR_PAR_GEN_Q_PARAM) dQ2 = CONSTR_PAR_GEN_Q_PARAM; VEC_set(b,*Aconstr_index,Qmin1/dQ1-Qmin2/dQ2); if (GEN_has_flags(gen1,FLAG_VARS,GEN_VAR_Q)) { MAT_set_i(A,*Acounter,*Aconstr_index); MAT_set_j(A,*Acounter,GEN_get_index_Q(gen1)); MAT_set_d(A,*Acounter,1./dQ1); (*Acounter)++; } else VEC_add_to_entry(b,*Aconstr_index,-GEN_get_Q(gen1)/dQ1); if (GEN_has_flags(gen2,FLAG_VARS,GEN_VAR_Q)) { MAT_set_i(A,*Acounter,*Aconstr_index); MAT_set_j(A,*Acounter,GEN_get_index_Q(gen2)); MAT_set_d(A,*Acounter,-1./dQ2); (*Acounter)++; } else VEC_add_to_entry(b,*Aconstr_index,GEN_get_Q(gen2)/dQ2); (*Aconstr_index)++; } } } // Update counted flag bus_counted[BUS_get_index(bus)] = TRUE; } }
void CONSTR_LOAD_PF_analyze_step(Constr* c, Branch* br, int t) { // Local variables Bus* buses[2]; Bus* bus; Load* load; int* A_nnz; int* A_row; char* bus_counted; REAL gamma; REAL factor; Vec* b; Mat* A; int i; int T; // Number of periods T = BRANCH_get_num_periods(br); // Cosntr data b = CONSTR_get_b(c); A = CONSTR_get_A(c); A_nnz = CONSTR_get_A_nnz_ptr(c); A_row = CONSTR_get_A_row_ptr(c); bus_counted = CONSTR_get_bus_counted(c); // Check pointers if (!A_nnz || !A_row || !bus_counted) return; // Check outage if (BRANCH_is_on_outage(br)) return; // Bus data buses[0] = BRANCH_get_bus_k(br); buses[1] = BRANCH_get_bus_m(br); // Buses for (i = 0; i < 2; i++) { bus = buses[i]; if (!bus_counted[BUS_get_index(bus)*T+t]) { // Loads for (load = BUS_get_load(bus); load != NULL; load = LOAD_get_next(load)) { // Variables if (LOAD_has_flags(load,FLAG_VARS,LOAD_VAR_P) && LOAD_has_flags(load,FLAG_VARS,LOAD_VAR_Q)) { gamma = LOAD_get_target_power_factor(load); factor = sqrt((1.-gamma*gamma)/(gamma*gamma)); // A MAT_set_i(A,*A_nnz,*A_row); MAT_set_j(A,*A_nnz,LOAD_get_index_P(load,t)); if (LOAD_get_P(load,t)*LOAD_get_Q(load,t) >= 0) MAT_set_d(A,*A_nnz,-factor); else MAT_set_d(A,*A_nnz,factor); (*A_nnz)++; // A MAT_set_i(A,*A_nnz,*A_row); MAT_set_j(A,*A_nnz,LOAD_get_index_Q(load,t)); MAT_set_d(A,*A_nnz,1.); (*A_nnz)++; // b VEC_set(b,*A_row,0.); (*A_row)++; } } } // Update counted flag bus_counted[BUS_get_index(bus)*T+t] = TRUE; } }
void CONSTR_DC_FLOW_LIM_analyze_branch(Constr* c, Branch* br) { // Local variables Bus* bus[2]; Mat* G; Vec* l; Vec* u; int* Gcounter; REAL b; int index; double rating; // Constr data G = CONSTR_get_G(c); l = CONSTR_get_l(c); u = CONSTR_get_u(c); Gcounter = CONSTR_get_Gcounter_ptr(c); if (!Gcounter) return; bus[0] = BRANCH_get_bus_from(br); bus[1] = BRANCH_get_bus_to(br); b = BRANCH_get_b(br); index = BRANCH_get_index(br); if (BRANCH_get_ratingA(br) > 0) rating = BRANCH_get_ratingA(br); else rating = BRANCH_INF_FLOW; VEC_set(l,index,-rating); // p.u. VEC_set(u,index,rating); // p.u. if (BUS_has_flags(bus[0],FLAG_VARS,BUS_VAR_VANG)) { // wk var // G MAT_set_i(G,*Gcounter,index); MAT_set_j(G,*Gcounter,BUS_get_index_v_ang(bus[0])); // wk MAT_set_d(G,*Gcounter,-b); (*Gcounter)++; } else { // b VEC_add_to_entry(l,index,b*BUS_get_v_ang(bus[0])); VEC_add_to_entry(u,index,b*BUS_get_v_ang(bus[0])); } if (BUS_has_flags(bus[1],FLAG_VARS,BUS_VAR_VANG)) { // wm var // G MAT_set_i(G,*Gcounter,index); MAT_set_j(G,*Gcounter,BUS_get_index_v_ang(bus[1])); // wk MAT_set_d(G,*Gcounter,b); (*Gcounter)++; } else { // b VEC_add_to_entry(l,index,-b*BUS_get_v_ang(bus[1])); VEC_add_to_entry(u,index,-b*BUS_get_v_ang(bus[1])); } if (BRANCH_has_flags(br,FLAG_VARS,BRANCH_VAR_PHASE)) { // phi var // G MAT_set_i(G,*Gcounter,index); MAT_set_j(G,*Gcounter,BRANCH_get_index_phase(br)); // phi MAT_set_d(G,*Gcounter,b); (*Gcounter)++; } else { // b VEC_add_to_entry(l,index,-b*BRANCH_get_phase(br)); VEC_add_to_entry(u,index,-b*BRANCH_get_phase(br)); } }
void CONSTR_PAR_GEN_P_analyze_step(Constr* c, Branch* br, int t) { // Local variables Bus* buses[2]; Bus* bus; Gen* gen1; Gen* gen2; int* A_nnz; int* A_row; char* bus_counted; Vec* b; Mat* A; int i; int T; // Number of periods T = BRANCH_get_num_periods(br); // Cosntr data b = CONSTR_get_b(c); A = CONSTR_get_A(c); A_nnz = CONSTR_get_A_nnz_ptr(c); A_row = CONSTR_get_A_row_ptr(c); bus_counted = CONSTR_get_bus_counted(c); // Check pointers if (!A_nnz || !A_row || !bus_counted) return; // Check outage if (BRANCH_is_on_outage(br)) return; // Bus data buses[0] = BRANCH_get_bus_k(br); buses[1] = BRANCH_get_bus_m(br); // Buses for (i = 0; i < 2; i++) { bus = buses[i]; if (!bus_counted[BUS_get_index(bus)*T+t]) { // Active power of slack generators if (BUS_is_slack(bus)) { gen1 = BUS_get_gen(bus); for (gen2 = GEN_get_next(gen1); gen2 != NULL; gen2 = GEN_get_next(gen2)) { VEC_set(b,*A_row,0.); if (GEN_has_flags(gen1,FLAG_VARS,GEN_VAR_P)) { MAT_set_i(A,*A_nnz,*A_row); MAT_set_j(A,*A_nnz,GEN_get_index_P(gen1,t)); MAT_set_d(A,*A_nnz,1.); (*A_nnz)++; } else VEC_add_to_entry(b,*A_row,-GEN_get_P(gen1,t)); if (GEN_has_flags(gen2,FLAG_VARS,GEN_VAR_P)) { MAT_set_i(A,*A_nnz,*A_row); MAT_set_j(A,*A_nnz,GEN_get_index_P(gen2,t)); MAT_set_d(A,*A_nnz,-1.); (*A_nnz)++; } else VEC_add_to_entry(b,*A_row,GEN_get_P(gen2,t)); (*A_row)++; } } } // Update counted flag bus_counted[BUS_get_index(bus)*T+t] = TRUE; } }