Ejemplo n.º 1
1
void nrf_pwr_mgmt_run(void)
{
#if NRF_PWR_MGMT_CONFIG_FPU_SUPPORT_ENABLED
    /*
     * Clear FPU exceptions.
     * Without this step, the FPU interrupt is marked as pending,
     * preventing system from sleeping.
     */
    uint32_t fpscr = __get_FPSCR();
    __set_FPSCR(fpscr & ~0x9Fu);
    __DMB();
    NVIC_ClearPendingIRQ(FPU_IRQn);

    // Assert if a critical FPU exception is signaled.
    ASSERT((fpscr & 0x03) == 0);
#endif // NRF_PWR_MGMT_CONFIG_FPU_SUPPORT_ENABLED

    SLEEP_LOCK();

#if NRF_PWR_MGMT_CONFIG_CPU_USAGE_MONITOR_ENABLED
    uint32_t sleep_start;
    uint32_t sleep_end;
    uint32_t sleep_duration;

    sleep_start = app_timer_cnt_get();
#endif // NRF_PWR_MGMT_CONFIG_CPU_USAGE_MONITOR_ENABLED

    DEBUG_PIN_SET();

    // Wait for an event.
#ifdef SOFTDEVICE_PRESENT
    ret_code_t ret_code = sd_app_evt_wait();
    if (ret_code == NRF_ERROR_SOFTDEVICE_NOT_ENABLED)
    {
        __WFE();
        __SEV();
        __WFE();
    }
    else
    {
        APP_ERROR_CHECK(ret_code);
    }
#else
    __WFE();
    __SEV();
    __WFE();
#endif // SOFTDEVICE_PRESENT

    DEBUG_PIN_CLEAR();

#if NRF_PWR_MGMT_CONFIG_CPU_USAGE_MONITOR_ENABLED
    sleep_end = app_timer_cnt_get();
    UNUSED_VARIABLE(app_timer_cnt_diff_compute(sleep_end,
                                               sleep_start,
                                               &sleep_duration));
    m_ticks_sleeping += sleep_duration;
#endif // NRF_PWR_MGMT_CONFIG_CPU_USAGE_MONITOR_ENABLED

    SLEEP_RELEASE();
}
Ejemplo n.º 2
0
/**
 * @brief   Write random bytes;
 *
 * @param[in] rngp      pointer to the @p RNGDriver object
 * @param[in] n         size of buf in bytes
 * @param[in] buf       @p buffer location
 *
 * @notapi
 */
msg_t rng_lld_write(RNGDriver *rngp, uint8_t *buf, size_t n,
		    systime_t timeout) {
  size_t i;

  for (i = 0 ; i < n ; i++) {
    /* Wait for byte ready
     * It take about 677µs to generate a new byte, not sure if
     * forcing a context switch will be a benefit
     */
    while (NRF_RNG->EVENTS_VALRDY == 0) {
      /* Sleep and wakeup on ARM event (interrupt) */
      SCB->SCR |= SCB_SCR_SEVONPEND_Msk;
      __SEV();
      __WFE();
      __WFE();
    }

    /* Read byte */
    buf[i] = (char)NRF_RNG->VALUE;

    /* Mark as read */
    NRF_RNG->EVENTS_VALRDY = 0;

    /* Clear interrupt so we can wake up again */
    nvicClearPending(RNG_IRQn);
  }
  return MSG_OK;
}
Ejemplo n.º 3
0
/**
  * @brief  Enter Deep-sleep mode.
  * @note   When exiting Deep-sleep mode, the HSI is selected as the system clock.
  * @note   An additional wakeup delay will be incurred if the LDO operates in
  *         low power mode.
  * @param  PWR_LDO: the LDO state in Deep-sleep mode.
  *   This parameter can be one of the following values:
  *     @arg PWR_LDO_ON: Deep-sleep mode with LDO ON
  *     @arg PWR_LDO_LOWPOWER: Deep-sleep mode with LDO in low power mode
  * @param  PWR_DEEPSLEEPENTRY: WFI or WFE instruction.
  *   This parameter can be one of the following values:
  *     @arg PWR_DEEPSLEEPENTRY_WFI: enter Deep-sleep mode with WFI instruction
  *     @arg PWR_DEEPSLEEPENTRY_WFE: enter Deep-sleep mode with WFE instruction
  * @retval None
  */
void PWR_DEEPSLEEPMode_Entry(uint32_t PWR_LDO, uint8_t PWR_DEEPSLEEPENTRY)
{ 
    uint32_t temp = 0;
    
    /* Select the LDO state in Deep-sleep mode */
    temp = PWR->CTLR;
    
    /* Clear SDBM and LDOLP bits, and select Deep-sleep mode */
    temp &= ~((uint32_t)(PWR_CTLR_SDBM | PWR_CTLR_LDOLP));
    
	/* Set LDOLP bit according to PWR_LDO value, and select the LDO's state */
    temp |= PWR_LDO;
    
    /* Store the new value */
    PWR->CTLR = temp;
    
    /* Set SLEEPDEEP bit of Cortex-M3 System Control Register */
    SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
    
    /* Select WFI or WFE to enter Deep-sleep mode */
    if(PWR_DEEPSLEEPENTRY == PWR_DEEPSLEEPENTRY_WFI)
    {
        __WFI();
    }
    else
    {
        __SEV();
        __WFE();
        __WFE();
    }
    /* Reset SLEEPDEEP bit of Cortex-M3 System Control Register */
    SCB->SCR &= ~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
}
Ejemplo n.º 4
0
/**
  * @brief Enters Stop mode. 
  * @note  In Stop mode, all I/O pins keep the same state as in Run mode.
  * @note  When exiting Stop mode by using an interrupt or a wakeup event,
  *        MSI RC oscillator is selected as system clock.
  * @note  When the voltage regulator operates in low power mode, an additional
  *         startup delay is incurred when waking up from Stop mode. 
  *         By keeping the internal regulator ON during Stop mode, the consumption
  *         is higher although the startup time is reduced.    
  * @param Regulator: Specifies the regulator state in Stop mode.
  *          This parameter can be one of the following values:
  *            @arg PWR_MAINREGULATOR_ON: Stop mode with regulator ON
  *            @arg PWR_LOWPOWERREGULATOR_ON: Stop mode with low power regulator ON
  * @param STOPEntry: Specifies if Stop mode in entered with WFI or WFE instruction.
  *          This parameter can be one of the following values:
  *            @arg PWR_STOPENTRY_WFI: Enter Stop mode with WFI instruction
  *            @arg PWR_STOPENTRY_WFE: Enter Stop mode with WFE instruction   
  * @retval None
  */
void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry)
{
  /* Check the parameters */
  assert_param(IS_PWR_REGULATOR(Regulator));
  assert_param(IS_PWR_STOP_ENTRY(STOPEntry));

  /* Select the regulator state in Stop mode: Set PDDS and LPSDSR bit according to PWR_Regulator value */
  MODIFY_REG(PWR->CR, (PWR_CR_PDDS | PWR_CR_LPSDSR), Regulator);

  /* Set SLEEPDEEP bit of Cortex System Control Register */
  SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));

  /* Select Stop mode entry --------------------------------------------------*/
  if(STOPEntry == PWR_STOPENTRY_WFI)
  {
    /* Request Wait For Interrupt */
    __WFI();
  }
  else
  {
    /* Request Wait For Event */
    __SEV();
    __WFE();
    __WFE();
  }
  /* Reset SLEEPDEEP bit of Cortex System Control Register */
  CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
}
Ejemplo n.º 5
0
/**
 * @brief Function for main application entry.
 */
int main(void)
{
    LEDS_CONFIGURE(BSP_LED_0_MASK);
    LEDS_OFF(BSP_LED_0_MASK);

    adc_config();
    UNUSED_RETURN_VALUE(NRF_LOG_INIT());

    NRF_LOG_PRINTF("ADC example\r\n");

    while (true)
    {
        APP_ERROR_CHECK(nrf_drv_adc_buffer_convert(adc_buffer,ADC_BUFFER_SIZE));
        uint32_t i;
        for (i = 0; i < ADC_BUFFER_SIZE; i++)
        {
            // manually trigger ADC conversion
            nrf_drv_adc_sample();
            // enter into sleep mode
            __SEV();
            __WFE();
            __WFE();

            nrf_delay_ms(100);
            LEDS_INVERT(BSP_LED_0_MASK);
        }
    }
}
Ejemplo n.º 6
0
/** 
 * @UART uart wfe deepsleep wakeup demo 
 * @param none
 * @return none
 */
void UartWFEDeepSleepWuDemo(void)
{
    UINT8 i, recbuf[3];
	Memset(recbuf,0x0,3);

	IomUARTRXWuEn();	   
    IomUARTRXWuLevHi();  
	printf("Uart WFE deep sleep enter!!!\r\n");
	ScuWakeCoreEvent(); 
	__SEV();
    SCB->SCR |= 0x04;        
    __WFE();
    __WFE();
	UartReceive(recbuf, 1);
	printf("\r\n");
	if(SCU->WKSR0 &0x40)
    {
		ScuWkSrcUartClr();
		printf("Uart WFE  Deep sleep Wakeup!\r\n");
    }
    for(i = 0; i < 1; i++)
    {
         printf("recbuf[%d]=0x%x\r\n",i,recbuf[i]);	  
    }
} 
Ejemplo n.º 7
0
/**
  * @brief Enter Stop 0 mode.
  * @note  In Stop 0 mode, main and low voltage regulators are ON.
  * @note  In Stop 0 mode, all I/O pins keep the same state as in Run mode.
  * @note  All clocks in the VCORE domain are stopped; the PLL, the MSI, 
  *        the HSI and the HSE oscillators are disabled. Some peripherals with the wakeup capability 
  *        (I2Cx, USARTx and LPUART) can switch on the HSI to receive a frame, and switch off the HSI 
  *        after receiving the frame if it is not a wakeup frame. In this case, the HSI clock is propagated 
  *        only to the peripheral requesting it.
  *        SRAM1, SRAM2 and register contents are preserved.
  *        The BOR is available.
  * @note  When exiting Stop 0 mode by issuing an interrupt or a wakeup event,
  *         the HSI RC oscillator is selected as system clock if STOPWUCK bit in RCC_CFGR register
  *         is set; the MSI oscillator is selected if STOPWUCK is cleared.  
  * @note  By keeping the internal regulator ON during Stop 0 mode, the consumption
  *         is higher although the startup time is reduced.
  * @param STOPEntry  specifies if Stop mode in entered with WFI or WFE instruction.
  *          This parameter can be one of the following values:
  *            @arg @ref PWR_STOPENTRY_WFI  Enter Stop mode with WFI instruction
  *            @arg @ref PWR_STOPENTRY_WFE  Enter Stop mode with WFE instruction
  * @retval None
  */
void HAL_PWREx_EnterSTOP0Mode(uint8_t STOPEntry)
{
  /* Check the parameters */
  assert_param(IS_PWR_STOP_ENTRY(STOPEntry));
    
  /* Stop 0 mode with Main Regulator */
  MODIFY_REG(PWR->CR1, PWR_CR1_LPMS, PWR_CR1_LPMS_STOP0);

  /* Set SLEEPDEEP bit of Cortex System Control Register */
  SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));

  /* Select Stop mode entry --------------------------------------------------*/
  if(STOPEntry == PWR_STOPENTRY_WFI)
  {
    /* Request Wait For Interrupt */
    __WFI();
  }
  else
  {
    /* Request Wait For Event */
    __SEV();
    __WFE();
    __WFE();
  }

  /* Reset SLEEPDEEP bit of Cortex System Control Register */
  CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
}
Ejemplo n.º 8
0
void net_base_run(void) {
	struct net_packet_broadcast pkg;

	// every 1s
	RTC_set_irq(net_base_rtc_callback);

	while(true) {
		if (net_base_is_sending) {
			while (radio_has_packets_to_sent()){
				__WFE();
			}

			Radio_setMode(Radio_Mode_RX, false);
			Radio_enable(true);
			net_base_is_sending = false;
		}
		if(Radio_available() > 0) {
			Radio_recive((uint8_t *) &pkg, sizeof(struct net_packet_broadcast));
			pkg.time = 1;
		}
		if(Radio_available() == 0 && !net_base_is_sending) {
			__WFE();
		}
	}

	// stop callback
	RTC_set_irq(NULL);
}
Ejemplo n.º 9
0
/**
  * @brief Enters Sleep mode.
  *
  * @note In Sleep mode, all I/O pins keep the same state as in Run mode.
  *
  * @note In Sleep mode, the systick is stopped to avoid exit from this mode with
  *       systick interrupt when used as time base for Timeout
  *
  * @param Regulator Specifies the regulator state in SLEEP mode.
  *            This parameter can be one of the following values:
  *            @arg PWR_MAINREGULATOR_ON: SLEEP mode with regulator ON
  *            @arg PWR_LOWPOWERREGULATOR_ON: SLEEP mode with low power regulator ON
  * @note This parameter is not used for the STM32F7 family and is kept as parameter
  *       just to maintain compatibility with the lower power families.
  * @param SLEEPEntry Specifies if SLEEP mode in entered with WFI or WFE instruction.
  *          This parameter can be one of the following values:
  *            @arg PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
  *            @arg PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
  * @retval None
  */
void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry)
{
  /* Check the parameters */
  assert_param(IS_PWR_REGULATOR(Regulator));
  assert_param(IS_PWR_SLEEP_ENTRY(SLEEPEntry));

  /* Clear SLEEPDEEP bit of Cortex System Control Register */
  CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));

  /* Ensure that all instructions done before entering SLEEP mode */
  __DSB();
  __ISB();

  /* Select SLEEP mode entry -------------------------------------------------*/
  if(SLEEPEntry == PWR_SLEEPENTRY_WFI)
  {
    /* Request Wait For Interrupt */
    __WFI();
  }
  else
  {
    /* Request Wait For Event */
    __SEV();
    __WFE();
    __WFE();
  }
}
Ejemplo n.º 10
0
/**
  * @brief Enters Sleep mode.
  * @note In Sleep mode, all I/O pins keep the same state as in Run mode.
  * @param Regulator: Specifies the regulator state in SLEEP mode.
  *          This parameter can be one of the following values:
  *            @arg PWR_MAINREGULATOR_ON: SLEEP mode with regulator ON
  *            @arg PWR_LOWPOWERREGULATOR_ON: SLEEP mode with low power regulator ON
  * @param SLEEPEntry: Specifies if SLEEP mode is entered with WFI or WFE instruction.
  *           When WFI entry is used, tick interrupt have to be disabled if not desired as 
  *           the interrupt wake up source.
  *           This parameter can be one of the following values:
  *            @arg PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
  *            @arg PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
  * @retval None
  */
void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry)
{
   uint32_t tmpreg = 0;
  /* Check the parameters */
  assert_param(IS_PWR_REGULATOR(Regulator));
  assert_param(IS_PWR_SLEEP_ENTRY(SLEEPEntry));

   /* Select the regulator state in Sleep mode ---------------------------------*/
  tmpreg = PWR->CR;
  /* Clear PDDS and LPDS bits */
  tmpreg &= (uint32_t)~(PWR_CR_PDDS | PWR_CR_LPSDSR);

 /* Set LPSDSR bit according to PWR_Regulator value */
  tmpreg |= Regulator;

  /* Store the new value */
  PWR->CR = tmpreg;
  
  /* Clear SLEEPDEEP bit of Cortex System Control Register */
  SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);

  /* Select SLEEP mode entry -------------------------------------------------*/
  if(SLEEPEntry == PWR_SLEEPENTRY_WFI)
  {
    /* Request Wait For Interrupt */
    __WFI();
  }
  else
  {
    /* Request Wait For Event */
    __SEV();
    __WFE();
    __WFE();
  }
}
Ejemplo n.º 11
0
/**@brief Function for the Power Management.
 */
static void power_manage(void)
{
    // Use directly __WFE and __SEV macros since the SoftDevice is not available.
    
    // Wait for event.
    __WFE();

    // Clear Event Register.
    __SEV();
    __WFE();
}
Ejemplo n.º 12
0
void pmc_sleep(int sleep_mode)
{
	switch (sleep_mode) {
	case SAM_PM_SMODE_SLEEP_WFI:
	case SAM_PM_SMODE_SLEEP_WFE:
#if (SAM4S || SAM4E)
		SCB->SCR &= (uint32_t)~SCR_SLEEPDEEP;
		cpu_irq_enable();
		__WFI();
		break;
#else
		PMC->PMC_FSMR &= (uint32_t)~PMC_FSMR_LPM;
		SCB->SCR &= (uint32_t)~SCR_SLEEPDEEP;
		cpu_irq_enable();
		if (sleep_mode == SAM_PM_SMODE_SLEEP_WFI)
			__WFI();
		else
			__WFE();
		break;
#endif
	case SAM_PM_SMODE_WAIT: {
		uint32_t mor, pllr0, pllr1, mckr;
		cpu_irq_disable();
		b_is_fastrc_used = true;
		pmc_save_clock_settings(&mor, &pllr0, &pllr1, &mckr);

		/* Enter wait mode */
		cpu_irq_enable();
		pmc_enable_waitmode();

		cpu_irq_disable();
		pmc_restore_clock_setting(mor, pllr0, pllr1, mckr);
		b_is_fastrc_used = false;
		if (callback_clocks_restored) {
			callback_clocks_restored();
			callback_clocks_restored = NULL;
		}
		cpu_irq_enable();
		break;
	}

	case SAM_PM_SMODE_BACKUP:
		SCB->SCR |= SCR_SLEEPDEEP;
#if (SAM4S || SAM4E)
		SUPC->SUPC_CR = SUPC_CR_KEY(0xA5u) | SUPC_CR_VROFF_STOP_VREG;
		cpu_irq_enable();
		__WFI() ;
#else
		cpu_irq_enable();
		__WFE() ;
#endif
		break;
	}
}
Ejemplo n.º 13
0
/**
  * @brief  Enter the system to STOP mode.
  * @note   In System Stop mode, all I/O pins keep the same state as in Run mode.
  * @note   When exiting System Stop mode by issuing an interrupt or a wakeup event,
  *         the HSI RC oscillator is selected as default system wakeup clock.
  * @note   In System STOP mode, when the voltage regulator operates in low power mode,
  *         an additional startup delay is incurred when the system is waking up.
  *         By keeping the internal regulator ON during Stop mode, the consumption
  *         is higher although the startup time is reduced.
  * @param  Regulator: Specifies the regulator state in Stop mode.
  *          This parameter can be one of the following values:
  *            @arg PWR_MAINREGULATOR_ON: Stop mode with regulator ON
  *            @arg PWR_LOWPOWERREGULATOR_ON: Stop mode with low power regulator ON
  * @param  STOPEntry: Specifies if Stop mode in entered with WFI or WFE instruction.
  *          This parameter can be one of the following values:
  *            @arg PWR_STOPENTRY_WFI: Enter Stop mode with WFI instruction
  *            @arg PWR_STOPENTRY_WFE: Enter Stop mode with WFE instruction
  * @retval None
  */
void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry)
{
  uint32_t tmpreg = 0;

  /* Check the parameters */
  assert_param(IS_PWR_REGULATOR(Regulator));
  assert_param(IS_PWR_STOP_ENTRY(STOPEntry));

  /* Select the regulator state in Stop mode */
  tmpreg = PWR->CR1;
  /* Clear PDDS and LPDS bits */
  tmpreg &= (uint32_t)~(PWR_CR1_LPDS);

  /* Set LPDS bit according to Regulator value */
  tmpreg |= Regulator;

  /* Store the new value */
  PWR->CR1 = tmpreg;

  /* Keep DSTOP mode when D1 domain enters Deepsleep */
  CLEAR_BIT(PWR->CPUCR, PWR_CPUCR_PDDS_D1);

  /* Keep DSTOP mode when D2 domain enters Deepsleep */
  CLEAR_BIT(PWR->CPUCR, PWR_CPUCR_PDDS_D2);

  /* Keep DSTOP mode when D3 domain enters Deepsleep */
  CLEAR_BIT(PWR->CPUCR, PWR_CPUCR_PDDS_D3);

  /* Set SLEEPDEEP bit of Cortex System Control Register */
  SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;

  /* Ensure that all instructions done before entering STOP mode */
  __DSB();
  __ISB();

  /* Select Stop mode entry */
  if(STOPEntry == PWR_STOPENTRY_WFI)
  {
    /* Request Wait For Interrupt */
    __WFI();
  }
  else
  {
    /* Request Wait For Event */
    __SEV();
    __WFE();
    __WFE();
  }
  /* Reset SLEEPDEEP bit of Cortex System Control Register */
  SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
}
Ejemplo n.º 14
0
static int entropy_nrf5_get_entropy_isr(struct device *dev, u8_t *buf, u16_t len,
					u32_t flags)
{
	u16_t cnt = len;

	/* Check if this API is called on correct driver instance. */
	__ASSERT_NO_MSG(&entropy_nrf5_data == DEV_DATA(dev));

	if (likely((flags & ENTROPY_BUSYWAIT) == 0)) {
		return rng_pool_get((struct rng_pool *)(entropy_nrf5_data.isr),
				    buf, len);
	}

	if (len) {
		unsigned int key;
		int irq_enabled;

		key = irq_lock();
		irq_enabled = irq_is_enabled(RNG_IRQn);
		irq_disable(RNG_IRQn);
		irq_unlock(key);

		nrf_rng_event_clear(NRF_RNG_EVENT_VALRDY);
		nrf_rng_task_trigger(NRF_RNG_TASK_START);

		do {
			int byte;

			while (!nrf_rng_event_get(NRF_RNG_EVENT_VALRDY)) {
				__WFE();
				__SEV();
				__WFE();
			}

			byte = random_byte_get();
			NVIC_ClearPendingIRQ(RNG_IRQn);

			if (byte < 0) {
				continue;
			}

			buf[--len] = byte;
		} while (len);

		if (irq_enabled) {
			irq_enable(RNG_IRQn);
		}
	}

	return cnt;
}
Ejemplo n.º 15
0
/**
 * @brief Function for application main entry.
 */
int main(void)
{
    leds_config();

    lfclk_config();

    rtc_config();

    while (true)
    {
        __SEV();
        __WFE();
        __WFE();
    }
}
Ejemplo n.º 16
0
static inline u8_t entropy_nrf5_get_u8(void)
{
	while (!nrf_rng_event_get(NRF_RNG_EVENT_VALRDY)) {
		__WFE();
		__SEV();
		__WFE();
	}
	nrf_rng_event_clear(NRF_RNG_EVENT_VALRDY);

	/* Clear the Pending status of the RNG interrupt so that it could
	 * wake up the core when the VALRDY event occurs again. */
	NVIC_ClearPendingIRQ(RNG_IRQn);

	return nrf_rng_random_value_get();
}
Ejemplo n.º 17
0
/**
 * @brief Function for application main entry.
 */
int main(void)
{
    uint32_t err_code;

    clock_init();

    // Start APP_TIMER to generate timeouts.
    APP_TIMER_INIT(APP_TIMER_PRESCALER, APP_TIMER_OP_QUEUE_SIZE, NULL);

    leds_init();

    err_code = bsp_init(BSP_INIT_BUTTONS,
                        APP_TIMER_TICKS(100, APP_TIMER_PRESCALER),
                        bsp_evt_handler);
    APP_ERROR_CHECK(err_code);

    nfc_init();

    m_active_led_mask = BSP_LED_0_MASK;
    err_code = led_softblink_start(m_active_led_mask);
    APP_ERROR_CHECK(err_code);

    while (true)
    {
        __WFE();
        softblink_led_update();
    }
}
Ejemplo n.º 18
0
BOOL uart_tx(uint8_t data)
{
	/* wait for buffer */
	while(g_uart_buffer_count==CONFIG_UART_BUFFER)
		__WFE();

	/* temporarily disable IRQs ... */
	__disable_irq();

	/* ...and push data */
	if(g_uart_buffer_count)
	{
		g_uart_buffer[g_uart_buffer_head++] = data;
		if(g_uart_buffer_head == CONFIG_UART_BUFFER)
			g_uart_buffer_head = 0;
	}
	else
	{
		/* enable UART for sending out first byte */
#if !CONFIG_UART_FORCE_POWERED
		NRF_UART0->ENABLE = (UART_ENABLE_ENABLE_Enabled << UART_ENABLE_ENABLE_Pos);
#endif/*CONFIG_UART_FORCE_POWERED*/
		NRF_UART0->TASKS_STARTTX = 1;
		NRF_UART0->TXD = data;
	}
	g_uart_buffer_count++;

	/* enable IRQs again */
	__enable_irq();

	return TRUE;
}
Ejemplo n.º 19
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/**
  * @brief  Enters STOP mode.
  * @param  PWR_Regulator: specifies the regulator state in STOP mode.
  *   This parameter can be one of the following values:
  *     @arg PWR_Regulator_ON: STOP mode with regulator ON
  *     @arg PWR_Regulator_LowPower: STOP mode with regulator in low power mode
  * @param  PWR_STOPEntry: specifies if STOP mode in entered with WFI or WFE instruction.
  *   This parameter can be one of the following values:
  *     @arg PWR_STOPEntry_WFI: enter STOP mode with WFI instruction
  *     @arg PWR_STOPEntry_WFE: enter STOP mode with WFE instruction
  * @retval None
  */
void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry)
{
  uint32_t tmpreg = 0;
  /* Check the parameters */
  assert_param(IS_PWR_REGULATOR(PWR_Regulator));
  assert_param(IS_PWR_STOP_ENTRY(PWR_STOPEntry));
  
  /* Select the regulator state in STOP mode ---------------------------------*/
  tmpreg = PWR->CR;
  /* Clear PDDS and LPDS bits */
  tmpreg &= CR_DS_Mask;
  /* Set LPDS bit according to PWR_Regulator value */
  tmpreg |= PWR_Regulator;
  /* Store the new value */
  PWR->CR = tmpreg;
  /* Set SLEEPDEEP bit of Cortex System Control Register */
  *(__IO uint32_t *) SCB_SysCtrl |= SysCtrl_SLEEPDEEP_Set;
  
  /* Select STOP mode entry --------------------------------------------------*/
  if(PWR_STOPEntry == PWR_STOPEntry_WFI)
  {   
    /* Request Wait For Interrupt */
    __WFI();
  }
  else
  {
    /* Request Wait For Event */
    __WFE();
  }
}
Ejemplo n.º 20
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/**
  * @brief  Enters in Under-Drive STOP mode.
  * 
  * @note    This mode can be selected only when the Under-Drive is already active 
  *   
  * @note    This mode is enabled only with STOP low power mode.
  *          In this mode, the 1.2V domain is preserved in reduced leakage mode. This 
  *          mode is only available when the main regulator or the low power regulator 
  *          is in low voltage mode
  *        
  * @note   If the Under-drive mode was enabled, it is automatically disabled after 
  *         exiting Stop mode. 
  *         When the voltage regulator operates in Under-drive mode, an additional  
  *         startup delay is induced when waking up from Stop mode.
  *                    
  * @note   In Stop mode, all I/O pins keep the same state as in Run mode.
  *   
  * @note   When exiting Stop mode by issuing an interrupt or a wakeup event, 
  *         the HSI RC oscillator is selected as system clock.
  *           
  * @note   When the voltage regulator operates in low power mode, an additional 
  *         startup delay is incurred when waking up from Stop mode. 
  *         By keeping the internal regulator ON during Stop mode, the consumption 
  *         is higher although the startup time is reduced.
  *     
  * @param  Regulator: specifies the regulator state in STOP mode.
  *          This parameter can be one of the following values:
  *            @arg PWR_MAINREGULATOR_UNDERDRIVE_ON:  Main Regulator in under-drive mode 
  *                 and Flash memory in power-down when the device is in Stop under-drive mode
  *            @arg PWR_LOWPOWERREGULATOR_UNDERDRIVE_ON:  Low Power Regulator in under-drive mode 
  *                and Flash memory in power-down when the device is in Stop under-drive mode
  * @param  STOPEntry: specifies if STOP mode in entered with WFI or WFE instruction.
  *          This parameter can be one of the following values:
  *            @arg PWR_SLEEPENTRY_WFI: enter STOP mode with WFI instruction
  *            @arg PWR_SLEEPENTRY_WFE: enter STOP mode with WFE instruction
  * @retval None
  */
HAL_StatusTypeDef HAL_PWREx_EnterUnderDriveSTOPMode(uint32_t Regulator, uint8_t STOPEntry)
{
  uint32_t tempreg = 0;
  uint32_t tickstart = 0;
  
  /* Check the parameters */
  assert_param(IS_PWR_REGULATOR_UNDERDRIVE(Regulator));
  assert_param(IS_PWR_STOP_ENTRY(STOPEntry));
  
  /* Enable Power ctrl clock */
  __HAL_RCC_PWR_CLK_ENABLE();
  /* Enable the Under-drive Mode ---------------------------------------------*/
  /* Clear Under-drive flag */
  __HAL_PWR_CLEAR_ODRUDR_FLAG();
  
  /* Enable the Under-drive */ 
  __HAL_PWR_UNDERDRIVE_ENABLE();

  /* Get tick */
  tickstart = HAL_GetTick();

  /* Wait for UnderDrive mode is ready */
  while(__HAL_PWR_GET_FLAG(PWR_FLAG_UDRDY))
  {
    if((HAL_GetTick() - tickstart ) > PWR_UDERDRIVE_TIMEOUT_VALUE)
    {
      return HAL_TIMEOUT;
    }
  }
  
  /* Select the regulator state in STOP mode ---------------------------------*/
  tempreg = PWR->CR1;
  /* Clear PDDS, LPDS, MRLUDS and LPLUDS bits */
  tempreg &= (uint32_t)~(PWR_CR1_PDDS | PWR_CR1_LPDS | PWR_CR1_LPUDS | PWR_CR1_MRUDS);
  
  /* Set LPDS, MRLUDS and LPLUDS bits according to PWR_Regulator value */
  tempreg |= Regulator;
  
  /* Store the new value */
  PWR->CR1 = tempreg;
  
  /* Set SLEEPDEEP bit of Cortex System Control Register */
  SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
  
  /* Select STOP mode entry --------------------------------------------------*/
  if(STOPEntry == PWR_SLEEPENTRY_WFI)
  {   
    /* Request Wait For Interrupt */
    __WFI();
  }
  else
  {
    /* Request Wait For Event */
    __WFE();
  }
  /* Reset SLEEPDEEP bit of Cortex System Control Register */
  SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);

  return HAL_OK;  
}
Ejemplo n.º 21
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/**
 * @brief Function for application main entry.
 */
int main(void) {

    // setup
    gpio_config();
    lfclk_config();
    rtc_config();

    // loop
    while (true) {
            // Enter System ON sleep mode
            __WFE();
            // Make sure any pending events are cleared
            __SEV();
            __WFE();
    }
}
Ejemplo n.º 22
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__RAMFUNC EnterSLEEPModeRAM(void)
{
  uint32_t tmpreg = 0;
   
  RAM_FLASH_RUNPowerDownCmd(ENABLE);
  RAM_PWR_LowPowerRunModeCmd(ENABLE);
  
  /* Select the regulator state in Sleep mode ---------------------------------*/
  tmpreg = PWR->CR;

  /* Clear PDDS and LPDSR bits */
  tmpreg &= CR_DS_MASK;
  
  /* Set LPDSR bit according to PWR_Regulator value */
  tmpreg |= PWR_Regulator_LowPower;
  
  /* Store the new value */
  PWR->CR = tmpreg;
  
   /* Clear SLEEPDEEP bit of Cortex System Control Register */
  SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP);

  
  /* Request Wait For Event */
   __WFE();
  
  RAM_FLASH_RUNPowerDownCmd(DISABLE);
  RAM_PWR_LowPowerRunModeCmd(DISABLE);
}
Ejemplo n.º 23
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void AllCLK_DiS_sleep_test()
{
	unsigned int i,j;
	GPIO_InitTypeDef GPIO_InitStructure;//定义GPIO初始化结构体变量
	RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
	//SCB->SCR = 0x0;
	//Gpio_Exti_init();
	GpioC7init();
	
	for(j=0;j<3;j++)
	{
		GPIO_ResetBits(GPIOC, GPIO_Pin_7);	   //Pc7输出低电平,点亮ARMLED	 
		for(i=0;i<300000;i++)
		
		{}
		GPIO_SetBits(GPIOC, GPIO_Pin_7);       //Pc7输出High电平,熄灭ARMLED
		//for(i=0;i<10;i++)
		for(i=0;i<300000;i++)
		{}
	}
		AllClk_Disable();
	

	//__WFI();
	__WFE();
	

}
Ejemplo n.º 24
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/*====================================================================================================*/
void SPI_RW( nrf_drv_kspi_t *SPIx, uint8_t *writeData, uint8_t writeLens, uint8_t *readData, uint8_t readLens )
{
  SPIx->flag = false;
  nrf_drv_spi_transfer(&(SPIx->instance), writeData, writeLens, readData, readLens);
  while(!SPIx->flag)
    __WFE();
}
Ejemplo n.º 25
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/**
 * \brief Enable Backup Mode. Enter condition: WFE/(VROFF bit = 1) +
 * (SLEEPDEEP bit = 1)
 */
void pmc_enable_backupmode(void)
{
#if (SAM4C || SAM4CM || SAM4CP)
	uint32_t tmp = SUPC->SUPC_MR & ~(SUPC_MR_BUPPOREN | SUPC_MR_KEY_Msk);
	SUPC->SUPC_MR = tmp | SUPC_MR_KEY_PASSWD;
	while (SUPC->SUPC_SR & SUPC_SR_BUPPORS);
#endif
	SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
#if (SAM4S || SAM4E || SAM4N || SAM4C || SAM4CM || SAM4CP || SAMG55 || SAMV71 || SAMV70 || SAME70 || SAMS70)
	SUPC->SUPC_CR = SUPC_CR_KEY_PASSWD | SUPC_CR_VROFF_STOP_VREG;
	__WFE();
	__WFI();
#else
	__WFE();
#endif
}
Ejemplo n.º 26
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int main(void) {
#if 0
	/* Configure LEDs and make sure they're off to start */
	LPC_SCU->SFSP4_1  = (1 << 4) | 0;	/* GPIO2[1] */
	LPC_SCU->SFSP4_2  = (1 << 4) | 0;	/* GPIO2[2] */
	LPC_SCU->SFSP6_12 = (1 << 4) | 0;	/* GPIO2[8] */
	LPC_GPIO->CLR[2] = (1 << 8) | (1 << 2) | (1 << 1);
	LPC_GPIO->DIR[2] = (1 << 8) | (1 << 2) | (1 << 1);

	/* Indicate M4 is working */
	LPC_GPIO->SET[2] = (1 << 1);
#endif
	configure_spifi();

	/* NOTE: MEMMAP registers are ORed with the shadow address to create the
	 * actual address.
	 */
	LPC_CREG->M0APPMEMMAP = LPC_SPIFI_DATA_CACHED_BASE + 0x20000;

	/* Change M0APP_RST to 0 */
	LPC_RGU->RESET_CTRL[1] = 0;

	while(1) {
		__WFE();
	}
}
Ejemplo n.º 27
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void pwrOff()
{
  GPIO_ResetBits(PWR_GPIO, PWR_GPIO_PIN_ON);

  // disable interrupts
 __disable_irq();

  while(1) {
    wdt_reset();
#if defined(REV9E)
    // 9E needs watchdog reset because CPU is still running while 
    // the power key is held pressed by the user.
    // The power key should be released by now, but we must make sure
    if (!pwrPressed()) {
      // Put the CPU into sleep to reduce the consumption,
      // it might help with the RTC reset issue
      PWR->CR |= PWR_CR_CWUF;
      /* Select STANDBY mode */
      PWR->CR |= PWR_CR_PDDS;
      /* Set SLEEPDEEP bit of Cortex System Control Register */
      SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
      /* Request Wait For Event */
      __WFE();
    }
#endif
  }
  //this function must not return!
}
Ejemplo n.º 28
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void main ()
{
    vBSPACMledConfigure();
    vBSPACMuptimeStart();

    printf("\n" __DATE__ " " __TIME__ "\n");
    printf("System clock %lu Hz\n", SystemCoreClock);

    unsigned int uptime = tick_state.uptime_s;
    int rc = iBSPACMuptimeAlarmSet(1, BSPACM_UPTIME_Hz, &tick_state.alarm);
    printf("Alarm config: %d\n", rc);
    while (1) {
        unsigned int new_uptime = tick_state.uptime_s;

        while (new_uptime == uptime) {
            __WFE();
            new_uptime = tick_state.uptime_s;
            vBSPACMledSet(3, -1);
        }
        vBSPACMledSet(1, -1);
        unsigned int now = uiBSPACMuptime();
        uptime = new_uptime;
        printf("Uptime %u counter %x counts %u\n", uptime, now, now / BSPACM_UPTIME_Hz);
    }

    fflush(stdout);
    ioctl(1, BSPACM_IOCTL_FLUSH, O_WRONLY);
    BSPACM_CORE_DEEP_SLEEP();
}
Ejemplo n.º 29
0
/*******************************************************************************
* 函数名称: PWR_EnterSTOPMode
* 功能描述: 进入STOP模式.
* 输入参数: PWR_Regulator:STOP模式的校准状态。
*                    这个参数可以是下面的值之一:
*                       - PWR_Regulator_ON: 校准器开启的STOP模式
*                       - PWR_Regulator_LowPower: 在低功耗模式下带有校准器的STOP模式。
*                  - PWR_STOPEntry: 这个参数定义了STOP进入模式.
*                    这个参数可以是下面的值之一:
*                       - PWR_STOPEntry_WFI: 进入有WFI指令的STOP模式
*                       - PWR_STOPEntry_WFE: 进入有WFE指令的STOP模式
* 输出参数: 无
* 返回参数: 无
*******************************************************************************/
void PWR_EnterSTOPMode(u32 PWR_Regulator, u8 PWR_STOPEntry)
{
  u32 tmpreg = 0;

  /* Check the parameters [检查参数]*/
  assert_param(IS_PWR_REGULATOR(PWR_Regulator));
  assert_param(IS_PWR_STOP_ENTRY(PWR_STOPEntry));
  
  /* Select the regulator state in STOP mode [在停止模式选择校准状态]*/
  tmpreg = PWR->CR;

  /* Clear PDDS and LPDS bits [清PDDS和LPDS位]*/
  tmpreg &= CR_DS_Mask;

  /* Set LPDS bit according to PWR_Regulator value [依照PWR_Regulator值置位LPDS]*/
  tmpreg |= PWR_Regulator;

  /* Store the new value [保存新的值]*/
  PWR->CR = tmpreg;

  /* Set SLEEPDEEP bit of Cortex System Control Register [置位Cortex系统的控制寄存器SLEEPDEEP位]*/
  *(vu32 *) SCB_SysCtrl |= SysCtrl_SLEEPDEEP_Set;
  
  /* Select STOP mode entry [选择停止模式进入]*/
  if(PWR_STOPEntry == PWR_STOPEntry_WFI)
  {   
    /* Request Wait For Interrupt [请求等待中断]*/
    __WFI();
  }
  else
  {
    /* Request Wait For Event [请求等待事件]*/
    __WFE();
  }
}
Ejemplo n.º 30
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/**
  * @brief  Enters STOP mode.
  * @param  POWER_Regulator_state: specifies the regulator state in STOP mode.
  *   This parameter can be: ENABLE or DISABLE.
  *     @arg ENABLE: STOP mode with regulator ON
  *     @arg DISABLE: STOP mode with regulator in low power mode
  * @param  POWER_STOPentry: specifies if STOP mode in entered with WFI or WFE instruction.
  *   This parameter can be one of the following values:
  *     @arg POWER_STOPentry_WFI: enter STOP mode with WFI instruction
  *     @arg POWER_STOPentry_WFE: enter STOP mode with WFE instruction
  * @retval None
  */
void POWER_EnterSTOPMode(FunctionalState POWER_Regulator_state, uint8_t POWER_STOPentry)
{
	/* Check the parameters */
	assert_param(IS_FUNCTIONAL_STATE(POWER_Regulator_state));
	assert_param(IS_POWER_STOP_ENTRY(POWER_STOPentry));

	/* Set UDcc stanby status */
	/* Set SLEEPDEEP bit of Cortex System Control Register */
	*(__IO uint32_t *) SCB ->SCR |= SCB_SCR_SLEEPDEEP_Msk;

	if (POWER_Regulator_state == ENABLE) {
		MDR_BKP ->REG_0F &= ~BKP_REG_0F_STANDBY;
	}
	else {
		MDR_BKP ->REG_0F |= BKP_REG_0F_STANDBY;
	}
	/* Select STOP mode entry --------------------------------------------------*/
	if (POWER_STOPentry == POWER_STOPentry_WFI ) {
		/* Request Wait For Interrupt */
		__WFI();
	}
	else {
		/* Request Wait For Event */
		__WFE();
	}
}