void clockintr(Ureg *ur) { Clock0link *lp; /* PIT was set to reload automatically */ puttsr(~0); m->ticks++; if(up) up->pc = ur->pc; if(archclocktick != nil) archclocktick(); checkalarms(); if(m->machno == 0) { if(kproftick != nil) (*kproftick)(ur->pc); lock(&clock0lock); for(lp = clock0link; lp; lp = lp->link) lp->clock(); unlock(&clock0lock); } if(up && up->state == Running){ if(cflag && up->type == Interp && tready(nil)) ur->cr |= 1; /* set flag in condition register for ../../interp/comp-power.c:/^schedcheck */ if(anyready()) sched(); } }
/* * yield the processor and drop our priority */ void yield(void) { if(anyready()){ /* pretend we just used 1/2 tick */ up->lastupdate -= Scaling/2; sched(); } }
/* * yield the processor and drop our priority */ void yield(void) { Mach *m = machp(); if(anyready()){ /* pretend we just used 1/2 tick */ m->externup->lastupdate -= Scaling/2; sched(); } }
int preemption(int tick) { if(up != nil && up->state == Running && !up->preempted && (anyhigher() || tick && anyready())){ up->preempted = 1; sched(); splhi(); up->preempted = 0; return 1; } return 0; }
/* * here once per clock tick to see if we should resched */ void hzsched(void) { /* once a second, rebalance will reprioritize ready procs */ if(m->machno == 0) rebalance(); /* unless preempted, get to run for at least 100ms */ if(anyhigher() || (!up->fixedpri && m->ticks > m->schedticks && anyready())){ m->readied = nil; /* avoid cooperative scheduling */ up->delaysched++; } }
/* * power-saving wait for interrupt when nothing ready. * ../port/proc.c should really call this splhi itself * to avoid the race avoided here by the call to anyready */ void idlehands(void) { int s, oldbits; /* we only use one processor, no matter what */ // if (conf.nmach > 1) // return; s = splhi(); if(!anyready()) { oldbits = lightstate(Ledidle); putmsr(getmsr() | MSR_WE | MSR_EE | MSR_CE); /* MSR_DE too? */ lightstate(oldbits); } splx(s); }
void hzsched(void) { Proc *up = externup(); /* once a second, rebalance will reprioritize ready procs */ if(machp()->machno == 0) rebalance(); /* with <= 4 cores, we use SMP and core 0 does not set qexpired for us */ //if(sys->nmach <= AMPmincores) if(machp()->ticks - machp()->qstart >= HZ/100) machp()->qexpired = 1; /* unless preempted, get to run */ if(machp()->qexpired && anyready()) up->delaysched++; }