/** * @brief Reset an I2C bus. * * Reset is accomplished by clocking out pulses until any hung slaves * release SDA and SCL, then generating a START condition, then a STOP * condition. * * @param dev I2C device */ void i2c_bus_reset(i2c_dev *dev) { //unsigned clock_count; //unsigned stretch_count; i2c_deinit(dev); /* Release both lines */ i2c_master_release_bus(dev); /* * Make sure the bus is free by clocking it until any slaves release the * bus. */ while (!gpio_read_bit(dev->gpio_port, dev->sda_pin)) { /* Wait for any clock stretching to finish */ while (!gpio_read_bit(dev->gpio_port, dev->scl_pin)) ; delay_us(10); /* Pull low */ gpio_write_bit(dev->gpio_port, dev->scl_pin, 0); delay_us(10); /* Release high again */ gpio_write_bit(dev->gpio_port, dev->scl_pin, 1); delay_us(10); } /* Generate start then stop condition */ gpio_write_bit(dev->gpio_port, dev->sda_pin, 0); delay_us(10); gpio_write_bit(dev->gpio_port, dev->scl_pin, 0); delay_us(10); gpio_write_bit(dev->gpio_port, dev->scl_pin, 1); delay_us(10); gpio_write_bit(dev->gpio_port, dev->sda_pin, 1); i2c_init(dev, 0, I2C_400KHz_SPEED); }
//---------------------------------------------------------------------------------- void s_transstart(void) //---------------------------------------------------------------------------------- // generates a transmission start // _____ ________ // DATA: |_______| // ___ ___ // SCK : ___| |___| |______ { SDA_OUT(1); SCL_OUT(0); //Initial state delay_us(2); SCL_OUT(1); delay_us(2); SDA_OUT(0); delay_us(2); SCL_OUT(0); delay_us(6); SCL_OUT(1); delay_us(2); SDA_OUT(1); delay_us(2); SCL_OUT(0); }
void lcd_send_data(const char data) { if (lcd_mode_data == LCD_MODE_DATA_4) { LCD_PORT |= (1<<LCD_RS); LCD_PORT &= ~(1<<LCD_RW); LCD_DDR |= 0xf0; LCD_PORT = ( LCD_PORT & 0x0f) | (data & 0xf0); LCD_PORT |= (1<<LCD_EN); delay_us(20); LCD_PORT &= ~(1<<LCD_EN); delay_us(20); LCD_PORT = ( LCD_PORT & 0x0f) | ((data<<4));// & 0xf0); LCD_PORT |= (1<<LCD_EN); delay_us(20); LCD_PORT &= ~(1<<LCD_EN); delay_us(100); } else if (lcd_mode_data == LCD_MODE_DATA_8) { LCD_CPORT |= (1<<LCD_RS); LCD_CPORT &= ~(1<<LCD_RW); LCD_DDDR |= 0xff; LCD_DPORT = data; LCD_CPORT |= (1<<LCD_EN); delay_us(20); LCD_CPORT &= ~(1<<LCD_EN); delay_us(100); } }
void ds18b20_write_bit(uint8_t bit) { if(bit) { /*Write bit 1*/ output_high(); delay_us(1);//1us output_low(); delay_us(5); output_high(); delay_us(45); } else { /*Write bit 0*/ output_high(); delay_us(1);//1us output_low(); delay_us(45); output_high(); delay_us(10); } }
void one_byte_w(uint8_t cmd, uint8_t msb) { TWCR = 0x00; TWBR = 64; //TWSR = (1 << TWPS1); cbi(TWCR, TWEA); sbi(TWCR, TWEN); delay_us(10); //Send start condition i2cSendStart(); i2cWaitForComplete(); delay_us(10); printf("TWSR is: %x\n", (TWSR & 0xFC)); // send slave device address with write i2cSendByte(SLA_W); i2cWaitForComplete(); delay_us(10); printf("TWSR is: %x\n", (TWSR & 0xFC)); TWDR = cmd; TWCR = (1<<TWINT)|(1<<TWEN); i2cWaitForComplete(); delay_us(10); TWDR = msb; TWCR = (1<<TWINT)|(1<<TWEN); i2cWaitForComplete(); delay_us(10); delay_us(10); i2cSendStop(); }
void display(char tipo,char dado) { char temp; if(tipo == true) { temp=(dado & 0xf0) | set_bit1; PORTB = temp; PORTB |= set_bit0; delay_us(5); PORTB &= clear_bit0; // delay_us(50); temp=(dado << 4) | set_bit1; PORTB = temp; PORTB |= set_bit0; delay_us(5); PORTB &= clear_bit0; delay_us(50); } else { temp=(dado & 0xf0); PORTB = temp; PORTB |= set_bit0; delay_us(5); PORTB &= clear_bit0; // delay_us(50); temp=(dado << 4); PORTB = temp; PORTB |= set_bit0; delay_us(5); PORTB &= clear_bit0; delay_us(50); } }
int main(void) { volatile int16_t* samples; unsigned int i; DISABLE_GLOBAL_INT(); /* stop watchdog timer */ WDTCTL = WDTPW +WDTHOLD; /* SET CPU to 5MHz */ /* max DCO MCLK = DCOCLK SMCLK = DCOCLK ACLK = 8KHz */ DCOCTL = DCO0 + DCO1 + DCO2; BCSCTL1 = RSEL0 + RSEL1 + RSEL2 + XT2OFF; BCSCTL2 = 0x00; delay_us(10000); /* activate Active Mode */ __bic_SR_register(LPM4_bits); /* set LEDs when loaded */ P5SEL = 0x00; P5DIR = 0x70; LED_RED_ON(); LED_GREEN_OFF(); LED_BLUE_OFF(); check_for_clock(); init_usb_serial(); #ifdef USE_DMA init_dma(&g_sample_flag); #endif #ifdef TX init_adc(&g_sample_flag); #else init_dac(); #endif init_rf(RF_CHANNEL, PAN_ID, NODE_ADDR, &g_sample_flag); debug_print("Successfully booted.\n"); /* set LEDS to signalize finished initilizing */ LED_RED_OFF(); ENABLE_GLOBAL_INT(); #ifdef TX /* TX */ while(1) { if(g_sample_flag == 1) { g_sample_flag = 0; #ifdef USE_DMA /* get samples */ samples = get_samples_dma(); #else /* get samples */ samples = get_samples(); #endif /* send oder radio, 2*num_words */ send_rf_data(RF_RX_ADDR, (uint8_t*) samples, NUM_SAMPLES*2); } /* reset WDT */ WDTCTL = WDTPW + WDTCNTCL; } #else /* RX */ while(1) { if(g_sample_flag == 1) { g_sample_flag = 0; samples = get_samples_rf(); #if 0 uint8_t err = 0; for(i = 0; i < NUM_SAMPLES; ++i) { //samples[i] = 4095-7*i; usb_printf("%d\n", samples[i]); //if( ((uint16_t) samples[i]) > 4095) { // usb_printf("i=%u\n", i); // ++err; //} } usb_printf("#error: %u\n", err); usb_printf("\n\n"); #endif set_dma_data(samples, NUM_SAMPLES); } /* reset WDT */ WDTCTL = WDTPW + WDTCNTCL; } #endif return 0; }
void refresh_outputs (void) { unsigned int output_sequence_buffer; unsigned char mask = 0; unsigned char i = 0; #ifndef T3_8IN16OUT unsigned char mux0, mux1, mux2; //signed int output_buffer; // if we are in digital mode, statement is false thus we skip the following part if(!digital_mode) { //disable the input MUX MUX_OFF1 = 1; // Save the current MUX channel. mux0 = CARDA0; mux1 = CARDA1; mux2 = CARDA2; // Set the channel for the output MUX CARDA0 = output_channel & 0x01; CARDA1 = output_channel & 0x02; CARDA2 = output_channel & 0x04; MUX_OFF2 = 0; delay_us(500); MUX_OFF2 = 1; // Disable the Output MUX //Restore the MUX channel and enable the input MUX CARDA0 = mux0; CARDA1 = mux1; CARDA2 = mux2; MUX_OFF1 = 0; } #else bit led_drive1_buf, led_drive2_buf, led_drive3_buf, led_drive4_buf; unsigned char output_state[2], P0_buffer; #endif // output_channel ++ ; // if(output_channel== MAX_OUTPUT_CHANNELS ) output_channel = 0 ; //Switch to the next channel output_channel = (output_channel+1)%MAX_OUTPUT_CHANNELS ; //increment the output_channel // Set the PWM for the testing sequence case if(output_sequence == 0) // july 22 Ron { if(digital_mode) { // August Ron // testing sequence when in digital mode if(Enable_set_output) { // set modbus.registers one channel at a time to test one output at a time if (output_sequence_count == 12) { // set a different channel each time we get into this if statemen output_sequence_channel = (output_sequence_channel+1)%MAX_OUTPUT_CHANNELS; Enable_set_output = 0; // stop setting outputs, wait till reading is done Enable_read_input = 1; // given output is stopped, can now start reading inputs if(incrementing) { // in this case set output to a high modbus.registers[output_sequence_channel] = 1000; // once we have reached a full cycle, start setting output to low if(output_sequence_channel==7) incrementing = 0; // reset counter output_sequence_count = 0; // turn LEDs off and now start testing SOP if ( startup_flag != 0) startup_flag--; } else { // in this case set output to a low modbus.registers[output_sequence_channel] = 0; // once we have reached a ful cycle, start settign output to high if(output_sequence_channel==7) incrementing = 1; // reset counter output_sequence_count = 0; // turn LEDs off and now start testing SOP if ( startup_flag != 0) startup_flag--; } } output_sequence_count++; } } else if (Enable_set_output) // in SOP mode and do nothing if reading inputs { // testing the analog mode // add a buffer value so that adjacent switches do not have same value // at every even switch add 500mV // august 9 Ron if ( output_channel%2 ) output_sequence_buffer = 1000 - testing_increment_init; else output_sequence_buffer = testing_increment_init; // set PWM to be sent to channel modbus.registers[7-output_channel] = output_sequence_buffer; // once have set 8 channels for four full cycle, pause and wait for inputs // we do this multiple times in order to ensure that the signal is settled if (output_sequence_count == 32) { Enable_set_output = 0; // stop setting outputs, wait till reading is done Enable_read_input = 1; // given output is stopped, can now start reading inputs // increment/decrement testing signal and make sure it is between the range if (incrementing) { testing_increment_init = testing_increment_init + TESTING_INCREMENT_VALUE; if (testing_increment_init == 1000) incrementing = 0; } else { testing_increment_init = testing_increment_init - TESTING_INCREMENT_VALUE; if (testing_increment_init == 0) incrementing = 1; } // reset counter output_sequence_count = 0; // turn LEDs off and now start testing SOP if ( startup_flag != 0) startup_flag--; } // each cycle only sets one channel at a time output_sequence_count++; } } //07/01/KR #if defined (T3_8IN13OUT) if (digital_mode) { switch(output_channel) { case 8: if (switch_state[output_channel] == 0 && output_sequence && !switch_to_auto) { //if (reverse_logic_output) RELAY9 = 0; // else // RELAY9 = 1; } else if (switch_state[output_channel] == 1 && output_sequence && !switch_to_auto ) {// if (reverse_logic_output) RELAY9 = 1; // else // RELAY9 = 0; } else { if (modbus.registers[output_channel] > threshold) { //if (reverse_logic_output) RELAY9 = 1; //else // RELAY9 = 0; } else {// if (reverse_logic_output) RELAY9 = 0; //else // RELAY9 = 1; } #if defined T3_8IN13OUT //MHF 20010_07 COMBINE TWO IFDEFS LightOutput(8); #endif } break; case 9: if (switch_state[output_channel] == 0 && output_sequence && !switch_to_auto ) { //if (reverse_logic_output) RELAY10 = 0; //else // RELAY10 = 1; } else if (switch_state[output_channel] == 1 && output_sequence && !switch_to_auto ) { //if (reverse_logic_output) RELAY10 = 1; // else // RELAY10 = 0; } else { if (modbus.registers[output_channel] > threshold) { //if (reverse_logic_output) RELAY10 = 1; // else // RELAY10 = 0; } else { //if (reverse_logic_output) RELAY10 = 0; // else // RELAY10 = 1; } #if defined T3_8IN13OUT //MHF 20010_07 COMBINE TWO IFDEFS LightOutput(9); #endif } break; case 10: if (switch_state[output_channel] == 0 && output_sequence && !switch_to_auto ) {// if (reverse_logic_output) RELAY11 = 0; // else // RELAY11 = 1; } else if (switch_state[output_channel] == 1 && output_sequence && !switch_to_auto ) { //if (reverse_logic_output) RELAY11 = 1; // else // RELAY11 = 0; } else { if (modbus.registers[output_channel] > threshold) { //if (reverse_logic_output) RELAY11 = 1; //else // RELAY11 = 0; } else {// if (reverse_logic_output) RELAY11 = 0; //else // RELAY11 = 1; } #if defined T3_8IN13OUT //MHF 20010_07 COMBINE TWO IFDEFS LightOutput(10); #endif } break; case 11: if (switch_state[output_channel] == 0 && output_sequence && !switch_to_auto) { //if (reverse_logic_output) RELAY12 = 0; //else // RELAY12 = 1; } else if (switch_state[output_channel] == 1 && output_sequence && !switch_to_auto) { //if (reverse_logic_output) RELAY12 = 1; // else // RELAY12 = 0; } else { if (modbus.registers[output_channel] > threshold) { //if (reverse_logic_output) RELAY12 = 1; //else // RELAY12 = 0; } else { //if (reverse_logic_output) RELAY12 = 0; // else // RELAY12 = 1; } #if defined T3_8IN13OUT //MHF 20010_07 COMBINE TWO IFDEFS LightOutput(11); #endif } break; case 12: if (switch_state[output_channel] == 0 && output_sequence && !switch_to_auto) {// if (reverse_logic_output) RELAY13 = 0; //else // RELAY13 = 1; } else if (switch_state[output_channel] == 1 && output_sequence && !switch_to_auto) {// if (reverse_logic_output) RELAY13 = 1; // else // RELAY13 = 0; } else { if (modbus.registers[output_channel] > threshold) { //if (reverse_logic_output) RELAY13 = 1; //else // RELAY13 = 0; } else { //if (reverse_logic_output) RELAY13 = 0; // else // RELAY13 = 1; } #if defined T3_8IN13OUT LightOutput(12); #endif } break; //4051 4052 34063 813 232 485 } } #endif #if defined (T3_8IN16OUT) // --- evaluate the first set of output ----------------------------------------- for (i = 0; i < 8; i++) { if (switch_state[i] == 2 && modbus.registers[i+16] > threshold) // auto mode output_state[1] = (output_state[1] >> 1) | 0x80; else if (switch_state[i] == 1) // hand mode output_state[1] = (output_state[1] >> 1) | 0x80; else // off mode
void refresh_outputs (void) { unsigned int output_sequence_buffer; unsigned char mask = 0; unsigned char i = 0; unsigned char mux0, mux1, mux2; signed int output_buffer; //disable the input MUX MUX_OFF1 = 1; // Save the current MUX channel. mux0 = CARDA0; mux1 = CARDA1; mux2 = CARDA2; // Set the channel for the output MUX CARDA0 = output_channel & 0x01; CARDA1 = output_channel & 0x02; CARDA2 = output_channel & 0x04; // Enable the Output MUX MUX_OFF2 = 0; delay_us(500); // Disable the Output MUX MUX_OFF2 = 1; //Restore the MUX channel and enable the input MUX CARDA0 = mux0; CARDA1 = mux1; CARDA2 = mux2; MUX_OFF1 = 0; // Switch to the next channel output_channel = (output_channel+1)%MAX_OUTPUT_CHANNELS ; //increment the output_channel // Set the PWM for the testing sequence case if(output_sequence == 0) // july 22 Ron { if (Enable_set_output) // in SOP mode and do nothing if reading inputs { // testing the analog mode // add a buffer value so that adjacent switches do not have same value // at every even switch add 500mV // august 9 Ron if ( output_channel%2 ) output_sequence_buffer = 1000 - testing_increment_init; else output_sequence_buffer = testing_increment_init; // set PWM to be sent to channel modbus.registers[7-output_channel] = output_sequence_buffer; // once have set 8 channels for four full cycle, pause and wait for inputs // we do this multiple times in order to ensure that the signal is settled if (output_sequence_count == 32) { Enable_set_output = 0; // stop setting outputs, wait till reading is done Enable_read_input = 1; // given output is stopped, can now start reading inputs // increment/decrement testing signal and make sure it is between the range if (incrementing) { testing_increment_init = testing_increment_init + TESTING_INCREMENT_VALUE; if (testing_increment_init == 1000) incrementing = 0; } else { testing_increment_init = testing_increment_init - TESTING_INCREMENT_VALUE; if (testing_increment_init == 0) incrementing = 1; } // reset counter output_sequence_count = 0; // turn LEDs off and now start testing SOP if ( startup_flag != 0) startup_flag--; } // each cycle only sets one channel at a time output_sequence_count++; } } // analog mode output output_buffer = modbus.registers[EEP_OUTPUT1 + output_channel]+output_calibration-CALIBRATION_OFFSET; // rectify reading through calibration if( LUT_present ) output_buffer = rectify_reading( EEP_OUTPUT1 + output_channel, output_buffer); if (output_buffer < 0) output_buffer = 0; PWMD3 = look_up_table(output_buffer); }
void LED_linkedSend() { // Check if we've updated all the ISSI chips for this frame if ( LED_chipSend >= ISSI_Chips_define ) { // Now ready to update the frame buffer Pixel_FrameState = FrameState_Update; // Finished sending the buffer, exit linked send return; } // Update ISSI Frame State Pixel_FrameState = FrameState_Sending; // Lookup bus number uint8_t bus = LED_ChannelMapping[ LED_chipSend ].bus; /* // Debug dbug_msg("Linked Send: chip("); printHex( LED_chipSend ); print(")addr("); printHex( LED_pageBuffer[ LED_chipSend ].i2c_addr ); print(")reg("); printHex( LED_pageBuffer[ LED_chipSend ].reg_addr ); print(")len("); printHex( sizeof( LED_Buffer ) / 2 ); print(")data[]("); //for ( uint8_t c = 0; c < 9; c++ ) for ( uint8_t c = 0; c < sizeof( LED_Buffer ) / 2 - 2; c++ ) { printHex( LED_pageBuffer[ LED_chipSend ].buffer[c] ); print(" "); } print("..)" NL); */ // Artificial delay to assist i2c bus const uint32_t delay_tm = ISSI_SendDelay; //delay_us( delay_tm ); // Send, and recursively call this function when finished while ( i2c_send_sequence( bus, #if ISSI_Chip_31FL3731_define == 1 /* Brightness emulation */ (uint16_t*)&LED_pageBuffer_brightness[ LED_chipSend ], #else (uint16_t*)&LED_pageBuffer[ LED_chipSend ], #endif sizeof( LED_Buffer ) / 2, 0, LED_linkedSend, 0 ) == -1 ) delay_us( delay_tm ); // Increment chip position LED_chipSend++; }
void main(void) { const unsigned char *mas="\r\n---------------MASTER DEVICE-----------------\r\n"; const unsigned char * arr1 = "\r\nTaking in the text \r\n"; const unsigned char *arr2="\r\nEnter your choice \r\n 1.Slave 1(Address:0xAA\r\n2.Slave 2(Address:0xBB)\r\n3.Slave 3(Address:0xCC\r\n"; const unsigned char *arr3= "You have entered:\r\n"; const unsigned char *arr4= "\r\nUART Initialised\r\n"; const unsigned char *arr5= "\r\nI2C initialised:\r\n"; const unsigned char *msg1="\r\nSending to Slave 1 (Address 0xAA)\r\n"; const unsigned char *msg2="\r\nSending to Slave 2 (Address 0xBB)\r\n"; const unsigned char *msg3="\r\nSending to Slave 3 (Address 0xCC)\r\n"; const unsigned char *msg4="\r\nAddress sent\r\n"; const unsigned char *msg5="\r\nData sent\r\n"; const unsigned char *err="\r\nNo message will be sent since no slave no entered\r\n"; const unsigned char *fin="\r\nClosing Communication!\r\n"; const unsigned char *msgm="\r\nYou have entered choice number:\r\n"; unsigned char choice; OSCCONbits.IRCF = 0x07; // Configure Internal OSC for 8MHz Clock while(!OSCCONbits.HTS); // Wait Until Internal Osc is Stable INTCON=0; // purpose of disabling the interrupts. UART_Init(baud_rate); UART_Write_Text(mas); UART_Write_Text(arr4); delay_ms(500); I2C_init(); UART_Write_Text(arr5); //Initialisation done while(1) { UART_Write_Text(arr1); i2c_idle(); //receive the characters until ENTER is pressed (ASCII for ENTER = 13) is=UART_Read_Text(); UART_Write_Text(arr3); UART_Write_Text(is); UART_Write_Text(arr2); choice=UART_Read(); UART_Write_Text(msgm); UART_Write(choice); switch(choice) { case 0x31: { UART_Write_Text(msg1); I2C_Start(); if(I2C_address_send())//device address { delay_us(20);//clock settle and then send I2C_Write_Text(is); } else break; I2C_Stop(); break; } case 0x32: { UART_Write_Text(msg2); I2C_Start(); if(I2C_address_send1())//device address { delay_us(20);//clock settle and then send I2C_Write_Text(is); } else break; I2C_Stop(); break; } case 0x33: { UART_Write_Text(msg3); I2C_Start(); if(I2C_address_send2())//device address { delay_us(20);//clock settle and then send I2C_Write_Text(is); } else break; I2C_Stop(); break; } default: UART_Write_Text(err); break; } //Choice entered data sent respectively to slaves now stop //i2c_SendAcknowledge(I2C_LAST); PIR1bits.SSPIF = 0; UART_Write_Text(fin); } }
static __u32 set_serial_clk(__u32 mmu_flag) { __u32 src_freq = 0; __u32 p2clk = 0; volatile unsigned int *reg = (volatile unsigned int *)(0); __ccmu_reg_list_t *ccu_reg = (__ccmu_reg_list_t *)(0); __u32 port = 0; __u32 i = 0; ccu_reg = (__ccmu_reg_list_t *)mem_get_ba(); //check uart clk src is ok or not. //the uart clk src need to be pll6 & clk freq == 600M? //so the baudrate == p2clk/(16*div) switch(ccu_reg->Apb1_Cfg.bits.apb1_clk_src_sel){ case 0: src_freq = 24000000; //24M break; case 1: src_freq = 960000000; //FIXME: need confirm the freq! break; default: break; } //calculate p2clk. p2clk = src_freq/((ccu_reg->Apb1_Cfg.bits.clk_rat_m + 1) * (1<<(ccu_reg->Apb1_Cfg.bits.clk_rat_n))); /*notice: ** not all the p2clk is able to create the specified baudrate. ** unproper p2clk may result in unacceptable baudrate, just because ** the uartdiv is not proper and the baudrate err exceed the acceptable range. */ if(mmu_flag){ //backup apb2 gating; backup_ccu_uart = *(volatile unsigned int *)(IO_ADDRESS(AW_CCU_UART_PA)); //backup uart reset backup_ccu_uart_reset = *(volatile unsigned int *)(IO_ADDRESS(AW_CCU_UART_RESET_PA)); //config uart clk: apb2 gating. reg = (volatile unsigned int *)(IO_ADDRESS(AW_CCU_UART_PA)); *reg &= ~(1 << (16 + port)); for( i = 0; i < 100; i++ ); *reg |= (1 << (16 + port)); change_runtime_env(); delay_us(1); //de-assert uart reset reg = (volatile unsigned int *)(IO_ADDRESS(AW_CCU_UART_RESET_PA)); *reg &= ~(1 << (16 + port)); for( i = 0; i < 100; i++ ); *reg |= (1 << (16 + port)); }else{ //config uart clk reg = (volatile unsigned int *)(AW_CCU_UART_PA); *reg &= ~(1 << (16 + port)); for( i = 0; i < 100; i++ ); *reg |= (1 << (16 + port)); change_runtime_env(); delay_us(1); //de-assert uart reset reg = (volatile unsigned int *)(AW_CCU_UART_RESET_PA); *reg &= ~(1 << (16 + port)); for( i = 0; i < 100; i++ ); *reg |= (1 << (16 + port)); } return p2clk; }
/** * \brief pio_capture Application entry point. * * \return Unused (ANSI-C compatibility). * */ int main(void) { uint8_t uc_i; uint32_t ul_length; uint32_t ul_mode; uint8_t uc_key; static uint8_t uc_rx_even_only; static uint8_t uc_tx_without_en; /* Initialize the SAM system. */ sysclk_init(); board_init(); /* Configure UART for debug message output. */ configure_console(); /* Configure PIOA clock. */ pmc_enable_periph_clk(ID_PIOA); pmc_enable_periph_clk(ID_PIOC); /* Configure PIO Capture handler */ pio_capture_handler_set(capture_handler); /* Output example information. */ puts(STRING_HEADER); printf("Frequency: %d MHz.\r\n", (uint8_t) (sysclk_get_cpu_hz() / 1000000)); printf("Press r to Receive data on PIO Parallel Capture.\r\n"); printf("Press s to Send data on PIO Parallel Capture.\r\n"); uc_key = 0; while ((uc_key != 'r') && (uc_key != 's')) { uart_read(CONSOLE_UART, &uc_key); } if (uc_key == 'r') { printf("** RECEIVE mode **\r\n"); /* Initialize PIO capture mode value. */ ul_mode = 0; /* Set up the parallel capture mode data size as 8 bits. */ ul_mode |= 0 << PIO_PCMR_DSIZE_Pos; printf("Press y to sample the data when both data enable pins are enabled.\r\n"); printf("Press n to sample the data, don't care the status of the data enable pins.\r\n"); uc_key = 0; while ((uc_key != 'y') && (uc_key != 'n')) { uart_read(CONSOLE_UART, &uc_key); } if (uc_key == 'y') { /* Sample the data when both data enable pins are enabled. */ ul_mode &= ~PIO_PCMR_ALWYS; printf("Receive data when both data enable pins are enabled.\r\n"); } else { /* Sample the data, don't care the status of the data enable pins. */ ul_mode |= PIO_PCMR_ALWYS; printf("Receive data, don't care the status of the data enable pins.\r\n"); } printf("Press y to sample all the data\r\n"); printf("Press n to sample the data only one out of two.\r\n"); uc_key = 0; while ((uc_key != 'y') && (uc_key != 'n')) { uart_read(CONSOLE_UART, &uc_key); } if (uc_key == 'y') { /* Sample all the data. */ ul_mode &= ~PIO_PCMR_HALFS; printf("All data are sampled.\r\n"); } else { /* Sample the data only one out of two. */ ul_mode |= PIO_PCMR_HALFS; /* Only if half-Sampling is set, data with an even index are sampled. */ ul_mode &= ~PIO_PCMR_FRSTS; printf("Only one out of two data is sampled, with an even index.\r\n"); } /* Initialize PIO Parallel Capture function. */ pio_capture_set_mode(PIOA, ul_mode); pio_capture_enable(PIOA); /* Disable all PIOA I/O line interrupt. */ pio_disable_interrupt(PIOA, 0xFFFFFFFF); /* Configure and enable interrupt of PIO. */ NVIC_DisableIRQ(PIOA_IRQn); NVIC_ClearPendingIRQ(PIOA_IRQn); NVIC_SetPriority(PIOA_IRQn, PIO_IRQ_PRI); NVIC_EnableIRQ(PIOA_IRQn); while (1) { g_uc_cbk_received = 0; /* Clear Receive buffer. */ for (uc_i = 0; uc_i < SIZE_BUFF_RECEPT; uc_i++) { pio_rx_buffer[uc_i] = 0; } /* Set up PDC receive buffer, waiting for 64 bytes. */ packet_t.ul_addr = (uint32_t) pio_rx_buffer; packet_t.ul_size = SIZE_BUFF_RECEPT; p_pdc = pio_capture_get_pdc_base(PIOA); pdc_rx_init(p_pdc, &packet_t, NULL); /* Enable PDC transfer. */ pdc_enable_transfer(p_pdc, PERIPH_PTCR_RXTEN); /* Configure the PIO capture interrupt mask. */ pio_capture_enable_interrupt(PIOA, (PIO_PCIER_ENDRX | PIO_PCIER_RXBUFF)); printf("Waiting...\r\n"); while (g_uc_cbk_received == 0) { } } } else if (uc_key == 's') { printf("** SEND mode **\r\n"); printf("This is for debug purpose only !\r\n"); printf("Frequency of PIO controller clock must be strictly superior"); printf("to 2 times the frequency of the clock of the device which"); printf(" generates the parallel data.\r\n"); printf("\r\nPlease connect the second board, "); printf("and put it in receive mode.\r\n"); /* Configure PIO pins which simulate as a sensor. */ pio_configure_pin_group(PIOA, PIO_CAPTURE_CONTROL_PIN_MSK, PIO_CAPTURE_OUTPUT_PIN_FLAGS); pio_configure_pin_group(PIOC, PIO_CAPTURE_DATA_PINS_MASK, PIO_CAPTURE_OUTPUT_PIN_FLAGS); pio_set_pin_low(PIO_CAPTURE_EN1_IDX); pio_set_pin_low(PIO_CAPTURE_EN2_IDX); pio_set_pin_low(PIO_CAPTURE_CCLK_IDX); /* Enable sync. output data. */ pio_enable_output_write(PIOC, PIO_CAPTURE_DATA_PINS_MASK); /* Initialize the capture data line. */ pio_sync_output_write(PIOC, 0); printf("Press y to send data with data enable pins.\r\n"); printf("Press n to send data without data enable pins.\r\n"); uc_key = 0; while ((uc_key != 'y') && (uc_key != 'n')) { uart_read(CONSOLE_UART, &uc_key); } if (uc_key == 'y') { uc_tx_without_en = 0; printf("Send data with both data enable pins enabled.\r\n"); } else { uc_tx_without_en = 1; printf("Send data without enabling the data enable pins.\r\n"); } printf("Press y to indicate that receiver samples all data.\r\n"); printf("Press n to indicate that receiver samples data with an even index.\r\n"); uc_key = 0; while ((uc_key != 'y') && (uc_key != 'n')) { uart_read(CONSOLE_UART, &uc_key); } if (uc_key == 'y') { uc_rx_even_only = 0; printf("Receiver samples all data.\r\n"); } else { uc_rx_even_only = 1; printf("Receiver samples data with an even index.\r\n"); } ul_length = SIZE_BUFF_RECEPT * (1 + uc_rx_even_only); while (1) { if (uc_tx_without_en) { printf("\r\nSend data without enabling the data enable pins.\r\n"); } else { printf("\r\nSend data with both data enable pins enabled.\r\n"); } if (!uc_tx_without_en) { /* Set enable pins. */ pio_set_pin_high(PIO_CAPTURE_EN1_IDX); pio_set_pin_high(PIO_CAPTURE_EN2_IDX); } for (uc_i = 0; uc_i < ul_length;) { /* Send data. */ pio_sync_output_write(PIOC, (uc_i << PIO_CAPTURE_DATA_POS)); /* Set clock. */ pio_set_pin_high(PIO_CAPTURE_CCLK_IDX); delay_us(20); /* Clear clock. */ pio_set_pin_low(PIO_CAPTURE_CCLK_IDX); delay_us(20); uc_i++; } if (!uc_tx_without_en) { /* Clear enable pins. */ pio_set_pin_low(PIO_CAPTURE_EN1_IDX); pio_set_pin_low(PIO_CAPTURE_EN2_IDX); } printf("Press a key.\r\n"); while (uart_read(CONSOLE_UART, &uc_key)) { } } } return 0; }
/** * wartet 100 us */ static void mouse_sens_wait(void) { delay_us(100); }
//Displays current alarm time //Brightness level is an amount of time the LEDs will be in - 200us is pretty dim but visible. //Amount of time during display is around : [ BRIGHT_LEVEL(us) * 5 + 10ms ] * 10 //Roughly 11ms * 10 = 110ms //Time on is in (ms) void display_alarm_time(uint16_t time_on) { uint16_t bright_level = 50; //time_on /= 11; //Take the time_on and adjust it for the time it takes to run the display loop below for(uint16_t j = 0 ; j < time_on ; j++) { amMark2++; //Display normal hh:mm time if(hours_alarm > 9) { display_number(hours_alarm / 10, 1); //Post to digit 1 delay_us(bright_level); } display_number(hours_alarm % 10, 2); //Post to digit 2 delay_us(bright_level); display_number(minutes_alarm / 10, 3); //Post to digit 3 delay_us(bright_level); display_number(minutes_alarm % 10, 4); //Post to digit 4 delay_us(bright_level); //During debug, display mm:ss /*display_number(minutes_alarm / 10, 1); delay_us(bright_level); display_number(minutes_alarm % 10, 2); delay_us(bright_level); display_number(seconds_alarm / 10, 3); delay_us(bright_level); display_number(seconds_alarm % 10, 4); delay_us(bright_level); display_number(10, 5); //Display colon delay_us(bright_level);*/ //Flash colon for each second if(flip == 1) { display_number(10, 5); //Post to digit COL delay_us(bright_level); } //Check whether it is AM or PM and turn on dot if((ampm_alarm == AM)&&(amMark2 >= 10)) { amMark2 = 0; display_number(12, 6); //Turn on dot on apostrophe delay_us(bright_level); } clear_display(); delay_ms(1); } }
//Displays current time //Brightness level is an amount of time the LEDs will be in - 200us is pretty dim but visible. //Amount of time during display is around : [ BRIGHT_LEVEL(us) * 5 + 10ms ] * 10 //Roughly 11ms * 10 = 110ms //Time on is in (ms) void display_time(uint16_t time_on) { //uint16_t bright_level = 1000; uint16_t bright_level = 50; //uint16_t bright_level = 100; //time_on /= 11; //Take the time_on and adjust it for the time it takes to run the display loop below for(uint16_t j = 0 ; j < time_on ; j++) { amMark++; #ifdef NORMAL_TIME //Display normal hh:mm time if(hours > 9) { display_number(hours / 10, 1); //Post to digit 1 delay_us(bright_level); } display_number(hours % 10, 2); //Post to digit 2 delay_us(bright_level); display_number(minutes / 10, 3); //Post to digit 3 delay_us(bright_level); display_number(minutes % 10, 4); //Post to digit 4 delay_us(bright_level); #else //During debug, display mm:ss display_number(minutes / 10, 1); delay_us(bright_level); display_number(minutes % 10, 2); delay_us(bright_level); display_number(seconds / 10, 3); delay_us(bright_level); display_number(seconds % 10, 4); delay_us(bright_level); #endif //Flash colon for each second if(flip == 1) { display_number(10, 5); //Post to digit COL delay_us(bright_level); } //Indicate wether the alarm is on or off if( (PINB & (1<<BUT_ALARM)) != 0) { display_number(11, 4); //Turn on dot on digit 4 delay_us(bright_level); //If the alarm slide is on, and alarm_going is true, make noise! if(alarm_going == TRUE && flip_alarm == 1) { clear_display(); siren(500); flip_alarm = 0; } } else { snooze = FALSE; //If the alarm switch is turned off, this resets the ~9 minute addtional snooze timer hours_alarm_snooze = 88; //Set these values high, so that normal time cannot hit the snooze time accidentally minutes_alarm_snooze = 88; seconds_alarm_snooze = 88; } //Check whether it is AM or PM and turn on dot if((ampm == AM)&&(amMark>=5)) { amMark = 0; // This variable is used to help dim the am/pm dot display_number(12, 6); //Turn on dot on apostrophe delay_us(bright_level); } clear_display(); delay_us(bright_level); } }
void delay_ms(int count) { delay_us(count*1000); }
uint8_t txChar(int data, int channel) { uint8_t x; uint8_t parity_bit = 0; uint16_t tx_timeout; /* * Clear errors from previous transmissions. */ tx_parity_error = FALSE; /* * Let neighbor know you want to talk to it. * Then wait for an acknowledgement. Timeout * if necessary. */ //these 3 lines take about 7 us setDataLine(channel, 1); //to avoid capacitive noise from clock line setClockLine(channel, 0); releaseDataLine(channel); // allow neighbor to respond tx_timeout = (TX_WAIT_FOR_NEIGHBOR_RELOAD + handshake_retry_addition); while(pollDataLine(channel)) { tx_timeout--; if(tx_timeout == 0) { // Communication timed out... no one listening on this channel. // This counts as an unsuccessful transmission. releaseClockLine(channel); // Set clock line back to an input. return FALSE; } } /* * Once acknowledged, wait for the receiving neighbor to * relinquish control of the data line, then assert control * over both clock and data. */ tx_timeout = TX_TIMEOUT_RELOAD; while(!pollDataLine(channel)) { tx_timeout--; if(tx_timeout == 0) { // Communication timed out... no one listening on this channel. // This counts as an unsuccessful transmission. releaseClockLine(channel); // Set clock line back to an input. //if (goodChannels & (0x01 << (channel - 1))) { // if the current channel is good, then... //blinkGreen(1); // meme //blinkRed(1); //} // debugLog(RECEIVER_DIDNT_RELEASE_CLOCK_LINE); return FALSE; } } setClockLine(channel, 1); setDataLine(channel, 1); sei(); /* * Both parties are agreed on who is sending and who is receiving, * so start transmission of the byte, bit by bit. */ for(x = 0; x < 8; x++) { /* * Send out the LSB. */ setDataLine(channel, (data & 0x01)); setClockLine(channel, 0); /* * Give the receiver time to process the outgoing bit. */ delay_us(BIT_LOW_TIME); /* * Modify the parity bit to reflect the bit just sent and * prepare the data to send the next bit. */ parity_bit ^= (data & 0x01); data >>= 1; /* * Return communication channel to idle state to let * the receiver know that a new bit is coming. */ setClockLine(channel, 1); setDataLine(channel, 1); delay_us(BIT_HIGH_TIME); } /* * Send parity bit for error detection. */ setDataLine(channel, parity_bit); setClockLine(channel, 0); delay_us(BIT_LOW_TIME); releaseDataLine(channel); //just testing here... //trying to drive the line high so it doesn't get accidentally driven low after release //under normal operations, the receiver doesn't try to control this line until 8-10 us after it's released. //delay_us(4); releaseClockLine(channel); /* * Wait for the receiver to acknowledge receipt of the byte just sent. * Timeout if necessary, indicating a bad transmission. * waiting for receiver to indicate that parity bit was received properly. */ tx_timeout = TX_TIMEOUT_RELOAD; while(pollDataLine(channel)) { //avr samples about 9 times here, at 5 us intervals tx_timeout--; if(tx_timeout == 0) { //if (goodChannels & (0x01 << (channel - 1))) { // if the current channel is good, then... //blinkGreen(1); // meme //blinkRed(1); //} debugLog(NO_BYTE_TX_RECEIPT); //RECEIVER DIDN'T ACKNOWLEDGE PARTIY BIT return FALSE; } } /* * Check if the byte was correctly received. * clock line should be high. if it's low, there * was a parity error. */ tx_parity_error = !pollClockLine(channel); /* * Wait for receiver to finish acknowledging receipt of the byte just * sent. Timeout if necessary, indicating a bad transmission. * waiting for receiver to release the data line so that normal * transmissions can continue. */ tx_timeout = TX_TIMEOUT_RELOAD; while(!pollDataLine(channel)) { tx_timeout--; if(tx_timeout == 0) { //if (goodChannels & (0x01 << (channel - 1))) { // if the current channel is good, then... //blinkGreen(1); // meme //blinkRed(1); //} debugLog(TX_PARITY_ERROR_TIMEOUT); //receiver didn't release data line after parity bit return FALSE; } } debugLog(SUCCESSFUL_TX); good_channels |= _BV(channel - 1); // Mark this channel as good. return TRUE; }
uint8_t rxChar(uint8_t channel) { uint8_t x; uint8_t parity_bit = 0; uint8_t rx_parity_bit = 0; uint8_t data = 0x00; uint8_t bitplace = 0x1; /* * Check for a handshake initialization. Timeout if necessary. */ rx_timeout = RX_TIMEOUT_RELOAD; while(pollClockLine(channel)) { if(rx_timeout-- == 0) { failed_to_rx = TRUE; return 0; } } //topobo tried to receive a msg from another active that was connected debugLog(INIT_RX); /* * Return the handshake and give the transmitter time to respond. */ setDataLine(channel, 0); delay_us(BIT_LOW_TIME); /* * Relinquish control of the data line by setting it as an input. */ releaseDataLine(channel); /* * Look for the first bit. Timeout if necessary. */ rx_timeout = RX_TIMEOUT_RELOAD; while(! pollClockLine(channel)) { if(rx_timeout-- == 0) { failed_to_rx = TRUE; debugLog(NO_FIRST_BIT); return 0; } } //uart_putchar('h'); for(x = 0; x < 8; x++) { //uart_putchar('0'+x); /* * Watch the clock line for a sign that a bit is ready * to be read. Timeout if necessary. */ rx_timeout = RX_TIMEOUT_RELOAD; while(pollClockLine(channel)) { if(rx_timeout-- == 0) { failed_to_rx = TRUE; debugLog(NO_START_OF_BIT); return 0; } } /* * Once the bit is ready, read it. */ if(pollDataLine(channel)) { data |= bitplace; parity_bit ^= 0x01; } bitplace <<= 1; /* * Once a bit has been received, wait for the * the transmitter to declare the end of the bit. * Timeout if necessary. */ rx_timeout = RX_TIMEOUT_RELOAD; // meme : something is happening here. while(! pollClockLine(channel)) { if(rx_timeout-- == 0) { failed_to_rx = TRUE; debugLog(NO_END_OF_BIT); return 0; } } } /* * Read in the parity bit. */ rx_timeout = RX_TIMEOUT_RELOAD; while(pollClockLine(channel)) { // Wait until bit is ready to read. if(rx_timeout-- == 0) { failed_to_rx = TRUE; debugLog(NO_PARITY_BIT); return 0; } } // Read the bit and store it. (initially = 0) if(pollDataLine(channel)) { rx_parity_bit = 1; } rx_timeout = RX_TIMEOUT_RELOAD; while(!pollClockLine(channel)) { // Wait for transmitter to finish. if(rx_timeout-- == 0) { failed_to_rx = TRUE; debugLog(NO_END_OF_MESSAGE); return 0; } } rx_parity_error = (rx_parity_bit != parity_bit); // Check if the parity bits match. /* * Acknowledge receipt of the byte just received and * indicate whether the byte had a parity error or not. */ setClockLine(channel, 1); //to avoid capacitive noise from data_line if (rx_parity_error) { rx_parity_errors++; setClockLine(channel, 0); debugLog(PARITY_ERROR); } setDataLine(channel, 0); //using data line to clock the parity error delay_us(BIT_LOW_TIME); /* * Relinquish control of the comm lines by setting them as an input. */ releaseDataLine(channel); releaseClockLine(channel); // update the debug log to acknowledge a successful tx debugLog(SUCCESSFUL_RX); /* * Correctly received a byte, now return it. */ failed_to_rx = FALSE; return data; }
void Lcd_Init(void) { LCD_REST_1; delay_us(5); LCD_REST_0; delay_us(5); LCD_REST_1; LCD_CS_1; LCD_RD_1; LCD_WR_1; delay_us(5); LCD_CS_0; //打开片选使能 Lcd_Write_Com_Data(0x00,0x0000); Lcd_Write_Com_Data(0x00,0x0000); Lcd_Write_Com_Data(0x00,0x0000); Lcd_Write_Com_Data(0x00,0x0001); Lcd_Write_Com_Data(0xA4,0x0001); delay_us(10); Lcd_Write_Com_Data(0x60,0x2700); Lcd_Write_Com_Data(0x08,0x0808); Lcd_Write_Com_Data(0x30,0x0214); Lcd_Write_Com_Data(0x31,0x3715); Lcd_Write_Com_Data(0x32,0x0604); Lcd_Write_Com_Data(0x33,0x0E16); Lcd_Write_Com_Data(0x34,0x2211); Lcd_Write_Com_Data(0x35,0x1500); Lcd_Write_Com_Data(0x36,0x8507); Lcd_Write_Com_Data(0x37,0x1407); Lcd_Write_Com_Data(0x38,0x1403); Lcd_Write_Com_Data(0x39,0x0020); Lcd_Write_Com_Data(0x90,0x0015); Lcd_Write_Com_Data(0x10,0x0410); Lcd_Write_Com_Data(0x11,0x0237); Lcd_Write_Com_Data(0x29,0x0046); Lcd_Write_Com_Data(0x2A,0x0046); Lcd_Write_Com_Data(0x07,0x0000); Lcd_Write_Com_Data(0x12,0x0189); Lcd_Write_Com_Data(0x13,0x1100); delay_us(150); Lcd_Write_Com_Data(0x12,0x01B9); Lcd_Write_Com_Data(0x01,0x0100); Lcd_Write_Com_Data(0x02,0x0200); Lcd_Write_Com_Data(0x03,0x1030); Lcd_Write_Com_Data(0x09,0x0001); Lcd_Write_Com_Data(0x0A,0x0000); Lcd_Write_Com_Data(0x0D,0x0000); Lcd_Write_Com_Data(0x0E,0x0030); Lcd_Write_Com_Data(0x50,0x0000); Lcd_Write_Com_Data(0x51,0x00EF); Lcd_Write_Com_Data(0x52,0x0000); Lcd_Write_Com_Data(0x53,0x013F); Lcd_Write_Com_Data(0x61,0x0001); Lcd_Write_Com_Data(0x6A,0x0000); Lcd_Write_Com_Data(0x80,0x0000); Lcd_Write_Com_Data(0x81,0x0000); Lcd_Write_Com_Data(0x82,0x005F); Lcd_Write_Com_Data(0x92,0x0100); Lcd_Write_Com_Data(0x93,0x0701); delay_us(80); Lcd_Write_Com_Data(0x07,0x0100); Lcd_Write_Com_Data(0x20,0x0000); Lcd_Write_Com_Data(0x21,0x0000); Lcd_Write_Com(0x0022); LCD_CS_1; //关闭片选使能 }
static void wait_reset(void) { delay_us(RESET_DELAY); nvic_sys_reset(); }
/** * \brief Test GLOC Logic module with 4 Inputs XOR. * * This tests check the capabilty of the Glue Logic driver to handle 4 * inputs XOR operation. * * \param test Current test case. */ static void run_gloc_4inputs_xor_test(const struct test_case *test) { bool out; /* Configure pins for changing GLOC input */ ioport_set_pin_dir(CONF_TEST_GLOC_IN0, IOPORT_DIR_OUTPUT); ioport_set_pin_dir(CONF_TEST_GLOC_IN1, IOPORT_DIR_OUTPUT); ioport_set_pin_dir(CONF_TEST_GLOC_IN2, IOPORT_DIR_OUTPUT); ioport_set_pin_dir(CONF_TEST_GLOC_IN3, IOPORT_DIR_OUTPUT); /* Set the 4 inputs XOR truth table value in LUT0. */ gloc_lut_get_config_defaults(&lut_config); lut_config.truth_table_value = XOR_TRUTH_TABLE_FOUR_INPUT; gloc_lut_set_config(&dev_inst, 0, &lut_config); /* Test GLOC with different input */ ioport_set_pin_level(CONF_TEST_GLOC_IN0, LOW); ioport_set_pin_level(CONF_TEST_GLOC_IN1, LOW); ioport_set_pin_level(CONF_TEST_GLOC_IN2, LOW); ioport_set_pin_level(CONF_TEST_GLOC_IN3, LOW); /** Ensure a minimum propagation delay to read the port pin. */ delay_us(50); out = ioport_get_pin_level(CONF_TEST_GLOC_OUT0); test_assert_true(test, out == false, "4 inputs XOR failed at 1"); ioport_set_pin_level(CONF_TEST_GLOC_IN0, HIGH); ioport_set_pin_level(CONF_TEST_GLOC_IN1, LOW); ioport_set_pin_level(CONF_TEST_GLOC_IN2, LOW); ioport_set_pin_level(CONF_TEST_GLOC_IN3, LOW); /* Ensure a minimum propagation delay to read the port pin. */ delay_us(50); out = ioport_get_pin_level(CONF_TEST_GLOC_OUT0); test_assert_true(test, out == true, "4 inputs XOR failed at 2"); ioport_set_pin_level(CONF_TEST_GLOC_IN0, LOW); ioport_set_pin_level(CONF_TEST_GLOC_IN1, HIGH); ioport_set_pin_level(CONF_TEST_GLOC_IN2, LOW); ioport_set_pin_level(CONF_TEST_GLOC_IN3, LOW); /* Ensure a minimum propagation delay to read the port pin. */ delay_us(50); out = ioport_get_pin_level(CONF_TEST_GLOC_OUT0); test_assert_true(test, out == true, "4 inputs XOR failed at 3"); ioport_set_pin_level(CONF_TEST_GLOC_IN0, HIGH); ioport_set_pin_level(CONF_TEST_GLOC_IN1, HIGH); ioport_set_pin_level(CONF_TEST_GLOC_IN2, LOW); ioport_set_pin_level(CONF_TEST_GLOC_IN3, LOW); /* Ensure a minimum propagation delay to read the port pin. */ delay_us(50); out = ioport_get_pin_level(CONF_TEST_GLOC_OUT0); test_assert_true(test, out == false, "4 inputs XOR failed at 4"); ioport_set_pin_level(CONF_TEST_GLOC_IN0, LOW); ioport_set_pin_level(CONF_TEST_GLOC_IN1, LOW); ioport_set_pin_level(CONF_TEST_GLOC_IN2, HIGH); ioport_set_pin_level(CONF_TEST_GLOC_IN3, LOW); /* Ensure a minimum propagation delay to read the port pin. */ delay_us(50); out = ioport_get_pin_level(CONF_TEST_GLOC_OUT0); test_assert_true(test, out == true, "4 inputs XOR failed at 5"); ioport_set_pin_level(CONF_TEST_GLOC_IN0, HIGH); ioport_set_pin_level(CONF_TEST_GLOC_IN1, LOW); ioport_set_pin_level(CONF_TEST_GLOC_IN2, HIGH); ioport_set_pin_level(CONF_TEST_GLOC_IN3, LOW); /* Ensure a minimum propagation delay to read the port pin. */ delay_us(50); out = ioport_get_pin_level(CONF_TEST_GLOC_OUT0); test_assert_true(test, out == false, "4 inputs XOR failed at 6"); ioport_set_pin_level(CONF_TEST_GLOC_IN0, LOW); ioport_set_pin_level(CONF_TEST_GLOC_IN1, HIGH); ioport_set_pin_level(CONF_TEST_GLOC_IN2, HIGH); ioport_set_pin_level(CONF_TEST_GLOC_IN3, LOW); /* Ensure a minimum propagation delay to read the port pin. */ delay_us(50); out = ioport_get_pin_level(CONF_TEST_GLOC_OUT0); test_assert_true(test, out == false, "4 inputs XOR failed at 7"); ioport_set_pin_level(CONF_TEST_GLOC_IN0, HIGH); ioport_set_pin_level(CONF_TEST_GLOC_IN1, HIGH); ioport_set_pin_level(CONF_TEST_GLOC_IN2, HIGH); ioport_set_pin_level(CONF_TEST_GLOC_IN3, LOW); /* Ensure a minimum propagation delay to read the port pin. */ delay_us(50); out = ioport_get_pin_level(CONF_TEST_GLOC_OUT0); test_assert_true(test, out == true, "4 inputs XOR failed at 8"); ioport_set_pin_level(CONF_TEST_GLOC_IN0, LOW); ioport_set_pin_level(CONF_TEST_GLOC_IN1, LOW); ioport_set_pin_level(CONF_TEST_GLOC_IN2, LOW); ioport_set_pin_level(CONF_TEST_GLOC_IN3, HIGH); /* Ensure a minimum propagation delay to read the port pin. */ delay_us(50); out = ioport_get_pin_level(CONF_TEST_GLOC_OUT0); test_assert_true(test, out == true, "4 inputs XOR failed at 9"); ioport_set_pin_level(CONF_TEST_GLOC_IN0, HIGH); ioport_set_pin_level(CONF_TEST_GLOC_IN1, LOW); ioport_set_pin_level(CONF_TEST_GLOC_IN2, LOW); ioport_set_pin_level(CONF_TEST_GLOC_IN3, HIGH); /* Ensure a minimum propagation delay to read the port pin. */ delay_us(50); out = ioport_get_pin_level(CONF_TEST_GLOC_OUT0); test_assert_true(test, out == false, "4 inputs XOR failed at 10"); ioport_set_pin_level(CONF_TEST_GLOC_IN0, LOW); ioport_set_pin_level(CONF_TEST_GLOC_IN1, HIGH); ioport_set_pin_level(CONF_TEST_GLOC_IN2, LOW); ioport_set_pin_level(CONF_TEST_GLOC_IN3, HIGH); /* Ensure a minimum propagation delay to read the port pin. */ delay_us(50); out = ioport_get_pin_level(CONF_TEST_GLOC_OUT0); test_assert_true(test, out == false, "4 inputs XOR failed at 11"); ioport_set_pin_level(CONF_TEST_GLOC_IN0, HIGH); ioport_set_pin_level(CONF_TEST_GLOC_IN1, HIGH); ioport_set_pin_level(CONF_TEST_GLOC_IN2, LOW); ioport_set_pin_level(CONF_TEST_GLOC_IN3, HIGH); /* Ensure a minimum propagation delay to read the port pin. */ delay_us(50); out = ioport_get_pin_level(CONF_TEST_GLOC_OUT0); test_assert_true(test, out == true, "4 inputs XOR failed at 12"); ioport_set_pin_level(CONF_TEST_GLOC_IN0, LOW); ioport_set_pin_level(CONF_TEST_GLOC_IN1, LOW); ioport_set_pin_level(CONF_TEST_GLOC_IN2, HIGH); ioport_set_pin_level(CONF_TEST_GLOC_IN3, HIGH); /* Ensure a minimum propagation delay to read the port pin. */ delay_us(50); out = ioport_get_pin_level(CONF_TEST_GLOC_OUT0); test_assert_true(test, out == false, "4 inputs XOR failed at 13"); ioport_set_pin_level(CONF_TEST_GLOC_IN0, HIGH); ioport_set_pin_level(CONF_TEST_GLOC_IN1, LOW); ioport_set_pin_level(CONF_TEST_GLOC_IN2, HIGH); ioport_set_pin_level(CONF_TEST_GLOC_IN3, HIGH); /* Ensure a minimum propagation delay to read the port pin. */ delay_us(50); out = ioport_get_pin_level(CONF_TEST_GLOC_OUT0); test_assert_true(test, out == true, "4 inputs XOR failed at 14"); ioport_set_pin_level(CONF_TEST_GLOC_IN0, LOW); ioport_set_pin_level(CONF_TEST_GLOC_IN1, HIGH); ioport_set_pin_level(CONF_TEST_GLOC_IN2, HIGH); ioport_set_pin_level(CONF_TEST_GLOC_IN3, HIGH); /* Ensure a minimum propagation delay to read the port pin. */ delay_us(50); out = ioport_get_pin_level(CONF_TEST_GLOC_OUT0); test_assert_true(test, out == true, "4 inputs XOR failed at 15"); ioport_set_pin_level(CONF_TEST_GLOC_IN0, HIGH); ioport_set_pin_level(CONF_TEST_GLOC_IN1, HIGH); ioport_set_pin_level(CONF_TEST_GLOC_IN2, HIGH); ioport_set_pin_level(CONF_TEST_GLOC_IN3, HIGH); /* Ensure a minimum propagation delay to read the port pin. */ delay_us(50); out = ioport_get_pin_level(CONF_TEST_GLOC_OUT0); test_assert_true(test, out == false, "4 inputs XOR failed at 16"); }
static void toggle_clock() { delay_us(BIT_TIME_US); gpio_write(CLK, 0); delay_us(BIT_TIME_US); gpio_write(CLK, 1); }
void updateStepper(long step_desired) { //initializes some variables to zero long step_start = step_current; long accel_distance = 0; long accel_sign = 0; //initially the acceleration is neither forward nor backward long distance_from_start = 0; long velocity_sign = 0; long current_velocity = start_velocity; long steps_to_max_velocity = 0; long adder_var = 0; long flipped_accel_flag = 1; playFlute(HIGH); //Gives velocity and acceleration signs if (step_desired > step_current) { accel_sign = 1; velocity_sign = 1; digitalWritePortD(direction_pin, HIGH); adder_var = 1; } else if (step_desired < step_current) { accel_sign = -1; velocity_sign = -1; digitalWritePortD(direction_pin, LOW); adder_var = -1; } else { //if your current step = the desired step return; } while (step_current != step_desired) { if (adder_var != 0) //If the motor is not at the desired step, write step pin high then low for a single pulse { digitalWritePortD(step_pin, HIGH); digitalWritePortD(step_pin, LOW); } // increment current position step_current += adder_var; delay_us(current_velocity); if (velocity_sign == accel_sign) { current_velocity = current_velocity / accel_multiplier; } else { current_velocity = current_velocity * accel_multiplier; } if (current_velocity < max_velocity) { current_velocity = max_velocity; } if ((current_velocity != max_velocity) && (accel_sign == velocity_sign) && (steps_to_max_velocity < abs(step_current - step_desired))) { steps_to_max_velocity++; } else if ((steps_to_max_velocity > abs(step_current - step_desired)) & (flipped_accel_flag != 0)){ accel_sign = -accel_sign; flipped_accel_flag = 0; } } return; }
//notice: sun8iw8 use uart2, this interface need support this. static __u32 set_serial_clk(__u32 mmu_flag) { __u32 src_freq = 0; __u32 p2clk = 0; volatile unsigned int *reg = (volatile unsigned int *)(0); __ccmu_reg_list_t *ccu_reg = (__ccmu_reg_list_t *)(0); __ccmu_apb2_ratio_reg0058_t apb2_reg; __u32 port = 0; __u32 i = 0; ccu_reg = (__ccmu_reg_list_t *)mem_get_ba(); apb2_reg.dwval = ccu_reg->Apb2Div.dwval; //check uart clk src is ok or not. //the uart clk src need to be pll6 & clk freq == 600M? //so the baudrate == p2clk/(16*div) switch(apb2_reg.bits.ClkSrc){ case 0: src_freq = 32000; //32k break; case 1: src_freq = 24000000; //24M break; case 2: #ifdef CONFIG_ARCH_SUN8IW6P1 src_freq = 1200000000; //1200M #else src_freq = 600000000; //600M #endif break; default: break; } //calculate p2clk. p2clk = src_freq/((apb2_reg.bits.DivM + 1) * (1<<(apb2_reg.bits.DivN))); /*notice: ** not all the p2clk is able to create the specified baudrate. ** unproper p2clk may result in unacceptable baudrate, just because ** the uartdiv is not proper and the baudrate err exceed the acceptable range. */ if(mmu_flag){ //backup apb2 gating; backup_ccu_uart = *(volatile unsigned int *)(IO_ADDRESS(AW_CCU_UART_PA)); //backup uart reset backup_ccu_uart_reset = *(volatile unsigned int *)(IO_ADDRESS(AW_CCU_UART_RESET_PA)); //de-assert uart reset reg = (volatile unsigned int *)(IO_ADDRESS(AW_CCU_UART_RESET_PA)); *reg &= ~(1 << (16 + port)); for( i = 0; i < 100; i++ ); *reg |= (1 << (16 + port)); change_runtime_env(); delay_us(1); //config uart clk: apb2 gating. reg = (volatile unsigned int *)(IO_ADDRESS(AW_CCU_UART_PA)); *reg &= ~(1 << (16 + port)); for( i = 0; i < 100; i++ ); *reg |= (1 << (16 + port)); }else{ //de-assert uart reset reg = (volatile unsigned int *)(AW_CCU_UART_RESET_PA); *reg &= ~(1 << (16 + port)); for( i = 0; i < 100; i++ ); *reg |= (1 << (16 + port)); change_runtime_env(); delay_us(1); //config uart clk reg = (volatile unsigned int *)(AW_CCU_UART_PA); *reg &= ~(1 << (16 + port)); for( i = 0; i < 100; i++ ); *reg |= (1 << (16 + port)); } return p2clk; }
void refresh_outputs (void) { unsigned int output_sequence_buffer; unsigned char mask = 0; unsigned char i = 0; unsigned char mux0, mux1, mux2; signed int output_buffer; // if we are in digital mode, if statemet is false thus we skip the following part if(!digital_mode) { //disable the input MUX MUX_OFF1 = 1; // Save the current MUX channel. mux0 = CARDA0; mux1 = CARDA1; mux2 = CARDA2; // Set the channel for the output MUX CARDA0 = output_channel & 0x01; CARDA1 = output_channel & 0x02; CARDA2 = output_channel & 0x04; // Enable the Output MUX MUX_OFF2 = 0; delay_us(500); // Disable the Output MUX MUX_OFF2 = 1; //Restore the MUX channel and enable the input MUX CARDA0 = mux0; CARDA1 = mux1; CARDA2 = mux2; MUX_OFF1 = 0; } // Switch to the next channel output_channel = (output_channel+1)%MAX_OUTPUT_CHANNELS ; //increment the output_channel // Set the PWM for the testing sequence case if(output_sequence == 0) // july 22 Ron { if(digital_mode) { // August Ron // testing sequence when in digital mode if(Enable_set_output) { // set modbus.registers one channel at a time to test one output at a time if (output_sequence_count == 12) { // set a different channel each time we get into this if statemen output_sequence_channel = (output_sequence_channel+1)%MAX_OUTPUT_CHANNELS; Enable_set_output = 0; // stop setting outputs, wait till reading is done Enable_read_input = 1; // given output is stopped, can now start reading inputs if(incrementing) { // in this case set output to a high modbus.registers[output_sequence_channel] = 1000; // once we have reached a full cycle, start setting output to low if(output_sequence_channel==7) incrementing = 0; // reset counter output_sequence_count = 0; // turn LEDs off and now start testing SOP if ( startup_flag != 0) startup_flag--; } else { // in this case set output to a low modbus.registers[output_sequence_channel] = 0; // once we have reached a ful cycle, start settign output to high if(output_sequence_channel==7) incrementing = 1; // reset counter output_sequence_count = 0; // turn LEDs off and now start testing SOP if ( startup_flag != 0) startup_flag--; } } output_sequence_count++; } } else if (Enable_set_output) // in SOP mode and do nothing if reading inputs { // testing the analog mode // add a buffer value so that adjacent switches do not have same value // at every even switch add 500mV // august 9 Ron if ( output_channel%2 ) output_sequence_buffer = 1000 - testing_increment_init; else output_sequence_buffer = testing_increment_init; // set PWM to be sent to channel modbus.registers[7-output_channel] = output_sequence_buffer; // once have set 8 channels for four full cycle, pause and wait for inputs // we do this multiple times in order to ensure that the signal is settled if (output_sequence_count == 32) { Enable_set_output = 0; // stop setting outputs, wait till reading is done Enable_read_input = 1; // given output is stopped, can now start reading inputs // increment/decrement testing signal and make sure it is between the range if (incrementing) { testing_increment_init = testing_increment_init + TESTING_INCREMENT_VALUE; if (testing_increment_init == 1000) incrementing = 0; } else { testing_increment_init = testing_increment_init - TESTING_INCREMENT_VALUE; if (testing_increment_init == 0) incrementing = 1; } // reset counter output_sequence_count = 0; // turn LEDs off and now start testing SOP if ( startup_flag != 0) startup_flag--; } // each cycle only sets one channel at a time output_sequence_count++; } } if (digital_mode) { switch(output_channel) { case 0: if (switch_state[output_channel] == 0 && output_sequence ) { if (reverse_logic_output) RELAY1 = 0; else RELAY1 = 1; } else if (switch_state[output_channel] == 1 && output_sequence ) { if (reverse_logic_output) RELAY1 = 1; else RELAY1 = 0; } else { if (modbus.registers[output_channel+8] <= 512) RELAY1 = 1; else RELAY1 = 0; } break; case 1: if (switch_state[output_channel] == 0 && output_sequence ) { if (reverse_logic_output) RELAY2 = 0; else RELAY2 = 1; } else if (switch_state[output_channel] == 1 && output_sequence ) { if (reverse_logic_output) RELAY2 = 1; else RELAY2 = 0; } else { if (modbus.registers[output_channel+8] <= 512) RELAY2 = 1; else RELAY2 = 0; } break; case 2: if (switch_state[output_channel] == 0 && output_sequence ) { if (reverse_logic_output) RELAY3 = 0; else RELAY3 = 1; } else if (switch_state[output_channel] == 1 && output_sequence ) { if (reverse_logic_output) RELAY3 = 1; else RELAY3 = 0; } else { if (out3) RELAY3 = 1; else RELAY3 = 0; } break; case 3: if (switch_state[output_channel] == 0 && output_sequence ) { if (reverse_logic_output) RELAY4 = 0; else RELAY4 = 1; } else if (switch_state[output_channel] == 1 && output_sequence ) { if (reverse_logic_output) RELAY4 = 1; else RELAY4 = 0; } else { if (modbus.registers[output_channel+8] <= 512) RELAY4 = 1; else RELAY4 = 0; } break; case 4: if (switch_state[output_channel] == 0 && output_sequence ) { if (reverse_logic_output) RELAY5 = 0; else RELAY5 = 1; } else if (switch_state[output_channel] == 1 && output_sequence ) { if (reverse_logic_output) RELAY5 = 1; else RELAY5 = 0; } else { if (modbus.registers[output_channel+8] <= 512) RELAY5 = 1; else RELAY5 = 0; } break; case 5: if (switch_state[output_channel] == 0 && output_sequence) { if (reverse_logic_output) RELAY6 = 0; else RELAY6 = 1; } else if (switch_state[output_channel] == 1 && output_sequence ) { if (reverse_logic_output) RELAY6 = 1; else RELAY6 = 0; } else { if (modbus.registers[output_channel+8] <= 512) RELAY6 = 1; else RELAY6 = 0; } break; case 6: if (switch_state[output_channel] == 0 && output_sequence ) { if (reverse_logic_output) RELAY7 = 0; else RELAY7 = 1; } else if (switch_state[output_channel] == 1 && output_sequence ) { if (reverse_logic_output) RELAY7 = 1; else RELAY7 = 0; } else { if (modbus.registers[output_channel+8] <= 512) RELAY7 = 1; else RELAY7 = 0; } break; case 7: if (switch_state[output_channel] == 0 && output_sequence ) { if (reverse_logic_output) RELAY8 = 0; else RELAY8 = 1; } else if (switch_state[output_channel] == 1 && output_sequence ) { if (reverse_logic_output) RELAY8 = 1; else RELAY8 = 0; } else { if (modbus.registers[output_channel+8] <= 512) RELAY8 = 1; else RELAY8 = 0; } break; } } }
void usbWaitReset(void) { delay_us(RESET_DELAY); systemHardReset(); }
// Setup inline void LED_setup() { // Register Scan CLI dictionary CLI_registerDictionary( ledCLIDict, ledCLIDictName ); #if Storage_Enable_define == 1 Storage_registerModule(&LedStorage); #endif // Zero out FPS time LED_timePrev = Time_now(); // Initialize framerate LED_framerate = ISSI_FrameRate_ms_define; // Global brightness setting LED_brightness = ISSI_Global_Brightness_define; // Initialize I2C error counters i2c_initial(); // Initialize I2C i2c_setup(); // Setup LED_pageBuffer addresses and brightness section LED_pageBuffer[0].i2c_addr = LED_MapCh1_Addr_define; LED_pageBuffer[0].reg_addr = ISSI_LEDPwmRegStart; #if ISSI_Chips_define >= 2 LED_pageBuffer[1].i2c_addr = LED_MapCh2_Addr_define; LED_pageBuffer[1].reg_addr = ISSI_LEDPwmRegStart; #endif #if ISSI_Chips_define >= 3 LED_pageBuffer[2].i2c_addr = LED_MapCh3_Addr_define; LED_pageBuffer[2].reg_addr = ISSI_LEDPwmRegStart; #endif #if ISSI_Chips_define >= 4 LED_pageBuffer[3].i2c_addr = LED_MapCh4_Addr_define; LED_pageBuffer[3].reg_addr = ISSI_LEDPwmRegStart; #endif // Brightness emulation #if ISSI_Chip_31FL3731_define // Setup LED_pageBuffer addresses and brightness section LED_pageBuffer_brightness[0].i2c_addr = LED_MapCh1_Addr_define; LED_pageBuffer_brightness[0].reg_addr = ISSI_LEDPwmRegStart; #if ISSI_Chips_define >= 2 LED_pageBuffer_brightness[1].i2c_addr = LED_MapCh2_Addr_define; LED_pageBuffer_brightness[1].reg_addr = ISSI_LEDPwmRegStart; #endif #if ISSI_Chips_define >= 3 LED_pageBuffer_brightness[2].i2c_addr = LED_MapCh3_Addr_define; LED_pageBuffer_brightness[2].reg_addr = ISSI_LEDPwmRegStart; #endif #if ISSI_Chips_define >= 4 LED_pageBuffer_brightness[3].i2c_addr = LED_MapCh4_Addr_define; LED_pageBuffer_brightness[3].reg_addr = ISSI_LEDPwmRegStart; #endif #endif // LED default setting LED_enable = ISSI_Enable_define; LED_enable_current = ISSI_Enable_define; // Needs a default setting, almost always unset immediately // Enable Hardware shutdown (pull low) GPIO_Ctrl( hardware_shutdown_pin, GPIO_Type_DriveSetup, GPIO_Config_Pullup ); GPIO_Ctrl( hardware_shutdown_pin, GPIO_Type_DriveLow, GPIO_Config_Pullup ); #if ISSI_Chip_31FL3733_define == 1 || ISSI_Chip_31FL3736_define == 1 // Reset I2C bus (pull high, then low) // NOTE: This GPIO may be shared with the debug LED GPIO_Ctrl( iirst_pin, GPIO_Type_DriveSetup, GPIO_Config_Pullup ); GPIO_Ctrl( iirst_pin, GPIO_Type_DriveHigh, GPIO_Config_Pullup ); delay_us(50); GPIO_Ctrl( iirst_pin, GPIO_Type_DriveLow, GPIO_Config_Pullup ); #endif // Zero out Frame Registers // This needs to be done before disabling the hardware shutdown (or the leds will do undefined things) LED_zeroControlPages(); // Disable Hardware shutdown of ISSI chips (pull high) if ( LED_enable && LED_enable_current ) { GPIO_Ctrl( hardware_shutdown_pin, GPIO_Type_DriveHigh, GPIO_Config_Pullup ); } // Reset LED sequencing LED_reset(); // Allocate latency resource ledLatencyResource = Latency_add_resource("ISSILed", LatencyOption_Ticks); }
void rgb_sensor_init() { #ifdef AUDIO_DROPLET uint8_t power_on_sequence[8] = {0x80, 0x01, // Write 0x01 to ENABLE register, activating the device's oscillator. 0x8F, 0x01, // Write 0x01 to CONTROL register, setting the gain to x4. 0x81, 0xD5, // Write 0xD5 to ATIME register, setting the integration time to 2.4ms*(256-ATIME) 0x80, 0x03}; // Write 0x03 to ENABLE register, activating the ADC (and leaving the oscillator on); uint8_t result = TWI_MasterWrite(RGB_SENSE_ADDR, &(power_on_sequence[0]), 2); if(!result) printf_P(RGB_SENSE_POWERON_FAILURE,1); delay_ms(5); result = TWI_MasterWrite(RGB_SENSE_ADDR, &(power_on_sequence[2]), 2); if(!result) printf_P(RGB_SENSE_POWERON_FAILURE,2); delay_ms(5); result = TWI_MasterWrite(RGB_SENSE_ADDR, &(power_on_sequence[4]), 2); if(!result) printf_P(RGB_SENSE_POWERON_FAILURE,3); delay_ms(5); result = TWI_MasterWrite(RGB_SENSE_ADDR, &(power_on_sequence[6]), 2); if(!result) printf_P(RGB_SENSE_POWERON_FAILURE,4); delay_ms(5); #else RGB_SENSOR_PORT.DIRCLR = RGB_SENSOR_R_PIN_bm | RGB_SENSOR_G_PIN_bm | RGB_SENSOR_B_PIN_bm; ADCA.REFCTRL = ADC_REFSEL_AREFA_gc; ADCA.CTRLB = ADC_RESOLUTION_LEFT12BIT_gc | ADC_CONMODE_bm; ADCA.PRESCALER = ADC_PRESCALER_DIV256_gc; /* When differential input is used, signed mode must be used. (sec. 28.6 of Manual) */ ADCA.CH0.CTRL = ADC_CH_INPUTMODE_DIFFWGAIN_gc | ADC_CH_GAIN_1X_gc; //Probably should turn the gain back up to 4X when we put the shells on. ADCA.CH1.CTRL = ADC_CH_INPUTMODE_DIFFWGAIN_gc | ADC_CH_GAIN_1X_gc; //Probably should turn the gain back up to 4X when we put the shells on. ADCA.CH2.CTRL = ADC_CH_INPUTMODE_DIFFWGAIN_gc | ADC_CH_GAIN_2X_gc; //Probably should turn the gain back up to 4X when we put the shells on. ADCA.CH0.MUXCTRL = ADC_CH_MUXPOS_PIN5_gc | ADC_CH_MUXNEG_INTGND_MODE4_gc; // Red sensor on ADC A channel 0 ADCA.CH1.MUXCTRL = ADC_CH_MUXPOS_PIN6_gc | ADC_CH_MUXNEG_INTGND_MODE4_gc; // Green sensor on ADC A channel 1 ADCA.CH2.MUXCTRL = ADC_CH_MUXPOS_PIN7_gc | ADC_CH_MUXNEG_INTGND_MODE4_gc; // Blue sensor on ADC A channel 2 ADCA.CALL = PRODSIGNATURES_ADCACAL0; ADCA.CALH = PRODSIGNATURES_ADCACAL1; ADCA.CTRLA = ADC_ENABLE_bm; //read_color_settings(); delay_us(50); const int8_t num_samples = 3; get_red_sensor(); get_blue_sensor(); get_green_sensor(); delay_ms(10); int16_t r_avg=0, g_avg=0, b_avg=0; for(uint8_t i=0; i<num_samples; i++) { r_avg+=get_red_sensor(); g_avg+=get_green_sensor(); b_avg+=get_blue_sensor(); delay_ms(10); //printf("\r\n"); } r_baseline= r_avg/num_samples; g_baseline= g_avg/num_samples; b_baseline= b_avg/num_samples; //printf("Baselines:\r\n%3d %3d %3d\r\n", r_baseline, g_baseline, b_baseline); r_baseline = 0; g_baseline = 0; b_baseline = 0; #endif }
void delayMicroseconds(uint32 us) { delay_us(us); }