static int samsung_gpiolib_4bit2_output(struct gpio_chip *chip, unsigned int offset, int value) { struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip); void __iomem *base = ourchip->base; void __iomem *regcon = base; unsigned long con; unsigned long dat; unsigned con_offset = offset; if (con_offset > 7) con_offset -= 8; else regcon -= 4; con = __raw_readl(regcon); con &= ~(0xf << con_4bit_shift(con_offset)); con |= 0x1 << con_4bit_shift(con_offset); dat = __raw_readl(base + GPIODAT_OFF); if (value) dat |= 1 << offset; else dat &= ~(1 << offset); __raw_writel(dat, base + GPIODAT_OFF); __raw_writel(con, regcon); __raw_writel(dat, base + GPIODAT_OFF); gpio_dbg("%s: %p: CON %08lx, DAT %08lx\n", __func__, base, con, dat); return 0; }
static int s5p64xx_gpiolib_rbank_4bit2_input(struct gpio_chip *chip, unsigned offset) { struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip); void __iomem *base = ourchip->base; void __iomem *regcon = base; unsigned long con; switch(offset) { case 6: offset += 1; case 0: case 1: case 2: case 3: case 4: case 5: regcon -= 4; break; default: offset -= 7; break; } con = __raw_readl(regcon); con &= ~(0xf << con_4bit_shift(offset)); __raw_writel(con, regcon); gpio_dbg("%s: %p: CON %08lx\n", __func__, base, con); return 0; }
static int s5p64xx_gpiolib_4bit_output(struct gpio_chip *chip, unsigned offset, int value) { struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip); void __iomem *base = ourchip->base; unsigned long con; unsigned long dat; con = __raw_readl(base + OFF_GPCON); con &= ~(0xf << con_4bit_shift(offset)); con |= 0x1 << con_4bit_shift(offset); dat = __raw_readl(base + OFF_GPDAT); if (value) dat |= 1 << offset; else dat &= ~(1 << offset); __raw_writel(dat, base + OFF_GPDAT); __raw_writel(con, base + OFF_GPCON); __raw_writel(dat, base + OFF_GPDAT); gpio_dbg("%s: %p: CON %08lx, DAT %08lx\n", __func__, base, con, dat); return 0; }
static int s3c64xx_gpiolib_4bit2_input(struct gpio_chip *chip, unsigned offset) { struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip); void __iomem *base = ourchip->base; void __iomem *regcon = base; unsigned long con; unsigned long flags; local_irq_save(flags); if (offset > 7) offset -= 8; else regcon -= 4; con = __raw_readl(regcon); con &= ~(0xf << con_4bit_shift(offset)); __raw_writel(con, regcon); local_irq_restore(flags); gpio_dbg("%s: %p: CON %08lx\n", __func__, base, con); return 0; }
static int s5p64xx_gpiolib_4bit_input(struct gpio_chip *chip, unsigned offset) { struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip); void __iomem *base = ourchip->base; unsigned long con; con = __raw_readl(base + OFF_GPCON); con &= ~(0xf << con_4bit_shift(offset)); __raw_writel(con, base + OFF_GPCON); gpio_dbg("%s: %p: CON now %08lx\n", __func__, base, con); return 0; }
static int s5pv2xx_gpiolib_input(struct gpio_chip *chip, unsigned offset) { struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip); void __iomem *base = ourchip->base; unsigned long con; #if defined(CONFIG_CPU_S5PV210_EVT0) unsigned long tmp; #endif con = __raw_readl(base + OFF_GPCON); con &= ~(0xf << con_4bit_shift(offset)); __raw_writel(con, base + OFF_GPCON); #if defined(CONFIG_CPU_S5PV210_EVT0) tmp = __raw_readl(base + OFF_GPCON); #endif gpio_dbg("%s: %p: CON now %08lx\n", __func__, base, con); return 0; }
static int s5p64xx_gpiolib_rbank_4bit2_output(struct gpio_chip *chip, unsigned offset, int value) { struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip); void __iomem *base = ourchip->base; void __iomem *regcon = base; unsigned long con; unsigned long dat; unsigned con_offset = offset; switch(con_offset) { case 6: con_offset += 1; case 0: case 1: case 2: case 3: case 4: case 5: regcon -= 4; break; default: con_offset -= 7; break; } con = __raw_readl(regcon); con &= ~(0xf << con_4bit_shift(con_offset)); con |= 0x1 << con_4bit_shift(con_offset); dat = __raw_readl(base + OFF_GPDAT); if (value) dat |= 1 << offset; else dat &= ~(1 << offset); __raw_writel(dat, base + OFF_GPDAT); __raw_writel(con, regcon); __raw_writel(dat, base + OFF_GPDAT); gpio_dbg("%s: %p: CON %08lx, DAT %08lx\n", __func__, base, con, dat); return 0; }
static int s3c64xx_gpiolib_4bit2_output(struct gpio_chip *chip, unsigned offset, int value) { struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip); void __iomem *base = ourchip->base; void __iomem *regcon = base; unsigned long con; unsigned long dat; unsigned con_offset = offset; unsigned long flags; local_irq_save(flags); if (offset > 7) con_offset = offset - 8; else regcon -= 4; con = __raw_readl(regcon); con &= ~(0xf << con_4bit_shift(con_offset)); con |= 0x1 << con_4bit_shift(con_offset); dat = __raw_readl(base + OFF_GPDAT); if (value) dat |= 1 << offset; else dat &= ~(1 << offset); __raw_writel(dat, base + OFF_GPDAT); __raw_writel(con, regcon); __raw_writel(dat, base + OFF_GPDAT); local_irq_restore(flags); gpio_dbg("%s: %p: CON %08lx, DAT %08lx\n", __func__, base, con, dat); return 0; }