//! \brief Reset and initialize USB OTG peripheral to specified speed mode
static void main_otg_init(void)
{
otg_disable();
delay_ms(10);
otg_enable();
otg_disable_id_pin();
otg_force_device_mode();
otg_enable_pad();
otg_enable();
switch (speed) {
// LS speed
case 0:
udd_low_speed_enable();
udd_high_speed_disable();
break;
// FS speed
case 1:
udd_low_speed_disable();
udd_high_speed_disable();
break;
// HS speed
case 2:
udd_low_speed_disable();
udd_high_speed_enable();
break;
default:
Assert(false);
break;
}
otg_unfreeze_clock();
(void)Is_otg_clock_frozen();
}
void udd_disable(void)
{
irqflags_t flags;
#ifdef UHD_ENABLE
# ifdef USB_ID
if (Is_otg_id_host()) {
return; // Host mode running, ignore UDD disable
}
# else
if (Is_otg_host_mode_forced()) {
return; // Host mode running, ignore UDD disable
}
# endif
#endif
flags = cpu_irq_save();
otg_unfreeze_clock();
udd_detach();
#ifndef UDD_NO_SLEEP_MGR
sleepmgr_unlock_mode(USBB_SLEEP_MODE_USB_SUSPEND);
#endif
#ifndef UHD_ENABLE
otg_disable();
otg_disable_pad();
sysclk_disable_usb();
// Else the USB clock disable is done by UHC which manage USB dual role
#endif
cpu_irq_restore(flags);
}
void udd_disable(void)
{
irqflags_t flags;
flags = cpu_irq_save();
// Disable USB pad
otg_disable();
otg_disable_pad();
sysclk_disable_usb();
udd_sleep_mode(false);
#ifndef UDD_NO_SLEEP_MGR
sleepmgr_unlock_mode(USBB_SLEEP_MODE_USB_SUSPEND);
#endif
cpu_irq_restore(flags);
}
void udd_disable(void)
{
irqflags_t flags;
#ifdef UHD_ENABLE
# if OTG_ID_IO
if (Is_otg_id_host()) {
// Freeze clock to switch mode
otg_freeze_clock();
udd_detach();
otg_disable();
return; // Host mode running, ignore UDD disable
}
# else
if (Is_otg_host_mode_forced()) {
return; // Host mode running, ignore UDD disable
}
# endif
#endif
flags = cpu_irq_save();
otg_unfreeze_clock();
udd_detach();
#ifndef UDD_NO_SLEEP_MGR
if (udd_b_sleep_initialized) {
udd_b_sleep_initialized = false;
sleepmgr_unlock_mode(UHDP_SLEEP_MODE_USB_SUSPEND);
}
#endif
#ifndef UHD_ENABLE
otg_disable();
sysclk_disable_usb();
pmc_disable_periph_clk(ID_UOTGHS);
#endif
cpu_irq_restore(flags);
}
void udd_enable(void)
{
irqflags_t flags;
sysclk_enable_usb();
flags = cpu_irq_save();
//** Enable USB hardware
otg_disable();
(void)Is_otg_enabled();
#ifdef OTG
// Check UID pin state before enter in USB device mode
if (!Is_otg_id_device())
return FALSE;
#else
// Here, only the Device mode is possible, then link USBB interrupt to UDD interrupt
irq_register_handler(udd_interrupt, AVR32_USBB_IRQ, UDD_USB_INT_LEVEL);
otg_force_device_mode();
#endif
otg_disable_pad();
otg_enable_pad();
otg_enable();
otg_unfreeze_clock();
(void)Is_otg_clock_frozen();
#if UC3A3
// For parts with high speed feature, the "USABLE" clock is the UTMI clock,
// and the UTMI clock is disabled in suspend mode. Thereby, the utmi clock
// can't be checked when USB line is not attached or in suspend mode
#else
// Check USB clock
while( !Is_clock_usable() );
#endif
// Reset internal variables
#if (0!=USB_DEVICE_MAX_EP)
udd_ep_job_table_reset();
#endif
// Set the USB speed requested by configuration file
#ifdef USB_DEVICE_LOW_SPEED
udd_low_speed_enable();
#else
udd_low_speed_disable();
# ifdef USB_DEVICE_HS_SUPPORT
udd_high_speed_enable();
# else
udd_high_speed_disable();
# endif
#endif
udd_enable_vbus_interrupt();
otg_freeze_clock();
// Always authorize asynchrone USB interrupts to exit of sleep mode
AVR32_PM.AWEN.usb_waken = 1;
#ifndef UDD_NO_SLEEP_MGR
// Initialize the sleep mode authorized for the USB suspend mode
udd_b_idle = false;
sleepmgr_lock_mode(USBB_SLEEP_MODE_USB_SUSPEND);
#endif
cpu_irq_restore(flags);
}
void HardFault_HandlerC(unsigned long *sp, unsigned long lr, unsigned long cause) {
static const char* causestr[] = {
"NMI","Hard","Mem","Bus","Usage","Debug","WDT","RSTC"
};
UnwindFrame btf;
// Dump report to the Programming port (interrupts are DISABLED)
TXBegin();
TX("\n\n## Software Fault detected ##\n");
TX("Cause: "); TX(causestr[cause]); TX('\n');
TX("R0 : "); TXHex(((unsigned long)sp[0])); TX('\n');
TX("R1 : "); TXHex(((unsigned long)sp[1])); TX('\n');
TX("R2 : "); TXHex(((unsigned long)sp[2])); TX('\n');
TX("R3 : "); TXHex(((unsigned long)sp[3])); TX('\n');
TX("R12 : "); TXHex(((unsigned long)sp[4])); TX('\n');
TX("LR : "); TXHex(((unsigned long)sp[5])); TX('\n');
TX("PC : "); TXHex(((unsigned long)sp[6])); TX('\n');
TX("PSR : "); TXHex(((unsigned long)sp[7])); TX('\n');
// Configurable Fault Status Register
// Consists of MMSR, BFSR and UFSR
TX("CFSR : "); TXHex((*((volatile unsigned long *)(0xE000ED28)))); TX('\n');
// Hard Fault Status Register
TX("HFSR : "); TXHex((*((volatile unsigned long *)(0xE000ED2C)))); TX('\n');
// Debug Fault Status Register
TX("DFSR : "); TXHex((*((volatile unsigned long *)(0xE000ED30)))); TX('\n');
// Auxiliary Fault Status Register
TX("AFSR : "); TXHex((*((volatile unsigned long *)(0xE000ED3C)))); TX('\n');
// Read the Fault Address Registers. These may not contain valid values.
// Check BFARVALID/MMARVALID to see if they are valid values
// MemManage Fault Address Register
TX("MMAR : "); TXHex((*((volatile unsigned long *)(0xE000ED34)))); TX('\n');
// Bus Fault Address Register
TX("BFAR : "); TXHex((*((volatile unsigned long *)(0xE000ED38)))); TX('\n');
TX("ExcLR: "); TXHex(lr); TX('\n');
TX("ExcSP: "); TXHex((unsigned long)sp); TX('\n');
btf.sp = ((unsigned long)sp) + 8*4; // The original stack pointer
btf.fp = btf.sp;
btf.lr = ((unsigned long)sp[5]);
btf.pc = ((unsigned long)sp[6]) | 1; // Force Thumb, as CORTEX only support it
// Perform a backtrace
TX("\nBacktrace:\n\n");
int ctr = 0;
UnwindStart(&btf, &UnwCallbacks, &ctr);
// Disable all NVIC interrupts
NVIC->ICER[0] = 0xFFFFFFFF;
NVIC->ICER[1] = 0xFFFFFFFF;
// Relocate VTOR table to default position
SCB->VTOR = 0;
// Disable USB
otg_disable();
// Restart watchdog
WDT_Restart(WDT);
// Reset controller
NVIC_SystemReset();
while(1) { WDT_Restart(WDT); }
}
void udd_enable(void)
{
irqflags_t flags;
sysclk_enable_usb();
flags = cpu_irq_save();
//** Enable USB hardware
otg_disable();
(void)Is_otg_enabled();
#ifdef OTG
// Check UID pin state before enter in USB device mode
if (!Is_otg_id_device())
#warning returning bool but the function is void
return FALSE;
#else
// Here, only the Device mode is possible, then link USBC interrupt to UDD interrupt
irq_register_handler(udd_interrupt, AVR32_USBC_IRQ, UDD_USB_INT_LEVEL);
otg_force_device_mode();
#endif
otg_disable_pad();
otg_enable_pad();
otg_enable();
otg_unfreeze_clock();
(void)Is_otg_clock_frozen();
#if 0
// For parts with high speed feature, the "USABLE" clock is the UTMI clock,
// and the UTMI clock is disabled in suspend mode. Thereby, the utmi clock
// can't be checked when USB line is not attached or in suspend mode
#else
// Check USB clock
while( !Is_clock_usable() );
#endif
memset((uint8_t *) udd_g_ep_table, 0, sizeof(udd_g_ep_table));
Usb_set_desc_tab_addr_reg(udd_g_ep_table);
// Reset internal variables
#if (0!=USB_DEVICE_MAX_EP)
{
uint8_t i;
for (i = 0; i < USB_DEVICE_MAX_EP; i++) {
udd_ep_job[i].busy = false;
}
}
#endif
// Set the USB speed requested by configuration file
#ifdef USB_DEVICE_LOW_SPEED
udd_low_speed_enable();
#else
udd_low_speed_disable();
#endif
# ifdef USB_DEVICE_HS_SUPPORT
udd_high_speed_enable();
# else
udd_high_speed_disable();
# endif
udd_enable_vbus_interrupt();
otg_freeze_clock();
// Always authorize asynchronous USB interrupts to exit from sleep mode
#if(!defined AVR32_PM_WITHOUT_AWEN)
AVR32_PM.awen |= AVR32_PM_AWEN_USBCWEN_MASK;
#endif
#ifndef UDD_NO_SLEEP_MGR
// Initialize the sleep mode authorized for the USB suspend mode
udd_b_idle = false;
sleepmgr_lock_mode(USBC_SLEEP_MODE_USB_SUSPEND);
#endif
cpu_irq_restore(flags);
}