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Hardware interface for USB controller on DE2 FPGA Platform

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ISP1362 VHDL interface for DE2 v1.0

Mikhail Zakhaov m.zakhao@gmail.com September, 2012

What it is

A standalone (NIOS II free) interface in VHDL to the ISP1362 USB device for Altera DE2 Development board.

The interface is designed to enable simple, fast, and reliable communication with DE2 board and replace UART interfaces and NIOS II based designs typically used for this task.

Design is written using techniques from Gaisler Method for writing VHDL

Table of Contents

1. Hardware
2. Software
3. Misc
  1. HARDWARE

Design is written using techniques from Gaisler Method for writing VHDL

  • I/O Interface: For demonstration, the I/O interface is placed in loopback mode - incoming data from Host is echoed back, with the following line inside usb.vhd:

     drv_i.io <= drv_o.io;  --drv_x.io is of record type, with .RDy and .SData fields
     --when io.SData is ready, io.RDy will pulse for one clock cycle.
    

Directory structure:

  • src/ - source files for usb interface

    • usb.vhd - top entity
    • drv.vhd - usb driver
    • hal.vhd - low level interface with ISP1362
    • devreq.vhd - handles usb device requests
    • isp_inc.vhd - ISP1362 register constants and bitfields
    • usb_inc.vhd - usb descriptors and configuration.
  • quartus/ - quartus project files. Quartus 11 and 12 were tested with this project

    • usb.qpf - Quartus project file
  • sim/ - ModelSim and Active HDL testbenches and simulation files

  1. SOFTWARE

The software has been tested under Windows 7 SP1 x64.

On the Host PC side, The libusb-win32 (http://www.libusb.org/wiki/libusb-win32) provides the Windows USB driver

  • support/driver/ - libusb-win32 driver

    • Files:
      • README - installation instructions
      • DE2_ISP1362.inf - Windows driver, generated by the inf-wizard.exe, provided by the libusb-win32 project
  • support/winusb/ - User application based on libusb-win32 API implementing basic loop-back upload/download

    • Files:
      • usb2/usb2.vcxproj - Visual Studio C++ 2010 project file
      • usb2/loopback_test.cpp - sends and receives bytes
  1. MISC

  • support/DE2_NIOS_DEVICE_LED/ - implementation of whats in vhdl, but in C and on nios II processor - for reference

  • support/datasheets/ - Datasheets and programming guides for ISP1362

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  • Verilog 44.8%
  • C 35.8%
  • Perl 6.2%
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  • VHDL 3.2%
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