Example #1
0
static int
cyg_hal_plf_serial_isr(void *__ch_data, int* __ctrlc, 
                       CYG_ADDRWORD __vector, CYG_ADDRWORD __data)
{
    int res = 0;
    channel_data_t* chan = (channel_data_t*)__ch_data;
    cyg_uint32 c;
    cyg_uint8 ch;
    cyg_uint32 stat;
    CYGARC_HAL_SAVE_GP();

    *__ctrlc = 0;
    HAL_READ_UINT32(chan->base+E7T_UART_STAT, stat);
    if ( (stat & E7T_UART_STAT_RDR) != 0 ) {

        HAL_READ_UINT32(chan->base+E7T_UART_RXBUF, c);
        ch = (cyg_uint8)(c & 0xff);
        if( cyg_hal_is_break( &ch , 1 ) )
            *__ctrlc = 1;

        res = CYG_ISR_HANDLED;
    }

    HAL_INTERRUPT_ACKNOWLEDGE(chan->isr_vector_rx);

    CYGARC_HAL_RESTORE_GP();
    return res;
}
Example #2
0
void
cyg_hal_plf_serial_putc(void* __ch_data, cyg_uint8 __ch)
{
    CYG_ADDRWORD port;
    cyg_uint8 _lsr;

    // Some of the diagnostic print code calls through here with no idea what the ch_data is.
    // Go ahead and assume it is channels[0].
    if (__ch_data == 0)
      __ch_data = (void*)&channels[0];

    port = ((channel_data_t*)__ch_data)->base;

    CYGARC_HAL_SAVE_GP();

    do {
        HAL_READ_UINT32(port+SER_16550_LSR, _lsr);
    } while ((_lsr & SIO_LSR_THRE) == 0);

    // Now, the transmit buffer is empty
    HAL_WRITE_UINT32(port+SER_16550_THR, __ch);


    CYGARC_HAL_RESTORE_GP();
}
Example #3
0
cyg_bool
cyg_hal_plf_serial_getc_timeout(void* __ch_data, cyg_uint8* ch)
{
    int delay_count;
    channel_data_t* chan;
    cyg_bool res;
    CYGARC_HAL_SAVE_GP();

    // Some of the diagnostic print code calls through here with no idea what the ch_data is.
    // Go ahead and assume it is channels[0].
    if (__ch_data == 0)
      __ch_data = (void*)&channels[0];

    chan = (channel_data_t*)__ch_data;

    delay_count = chan->msec_timeout * 10; // delay in .1 ms steps

    for(;;) {
        res = cyg_hal_plf_serial_getc_nonblock(__ch_data, ch);
        if (res || 0 == delay_count--)
            break;
        CYGACC_CALL_IF_DELAY_US(100);
    }

    CYGARC_HAL_RESTORE_GP();
    return res;
}
Example #4
0
static int
cyg_hal_plf_scif_isr(void *__ch_data, int* __ctrlc, 
                     CYG_ADDRWORD __vector, CYG_ADDRWORD __data)
{
    cyg_uint8 c;
    cyg_uint16 fdr, sr;
    cyg_uint8* base = ((channel_data_t*)__ch_data)->base;
    int res = 0;
    CYGARC_HAL_SAVE_GP();

    *__ctrlc = 0;
    HAL_READ_UINT16(base+_REG_SCFDR, fdr);
    if ((fdr & CYGARC_REG_SCIF_SCFDR_RCOUNT_MASK) != 0) {
        HAL_READ_UINT8(base+_REG_SCFRDR, c);

        // Clear buffer full flag (read back first).
        HAL_READ_UINT16(base+_REG_SCSSR, sr);
        HAL_WRITE_UINT16(base+_REG_SCSSR, 
                         CYGARC_REG_SCIF_SCSSR_CLEARMASK & ~CYGARC_REG_SCIF_SCSSR_RDF);

        if( cyg_hal_is_break( &c , 1 ) )
            *__ctrlc = 1;

        res = CYG_ISR_HANDLED;
    }

    CYGARC_HAL_RESTORE_GP();
    return res;
}
Example #5
0
void
cyg_hal_plf_scif_putc(void* __ch_data, cyg_uint8 c)
{
    cyg_uint8* base = ((channel_data_t*)__ch_data)->base;
    cyg_uint16 fdr, sr;
    CYGARC_HAL_SAVE_GP();

    do {
        HAL_READ_UINT16(base+_REG_SCFDR, fdr);
    } while (((fdr & CYGARC_REG_SCIF_SCFDR_TCOUNT_MASK) >> CYGARC_REG_SCIF_SCFDR_TCOUNT_shift) == 16);

    HAL_WRITE_UINT8(base+_REG_SCFTDR, c);

    // Clear FIFO-empty/transmit end flags (read back SR first)
    HAL_READ_UINT16(base+_REG_SCSSR, sr);
    HAL_WRITE_UINT16(base+_REG_SCSSR, CYGARC_REG_SCIF_SCSSR_CLEARMASK   
                     & ~(CYGARC_REG_SCIF_SCSSR_TDFE | CYGARC_REG_SCIF_SCSSR_TEND ));

    // Hang around until the character has been safely sent.
    do {
        HAL_READ_UINT16(base+_REG_SCFDR, fdr);
    } while ((fdr & CYGARC_REG_SCIF_SCFDR_TCOUNT_MASK) != 0);

    CYGARC_HAL_RESTORE_GP();
}
Example #6
0
static int
cyg_hal_plf_serial_isr(void *__ch_data, int* __ctrlc, 
                       CYG_ADDRWORD __vector, CYG_ADDRWORD __data)
{
    int res = 0;
    channel_data_t* chan = (channel_data_t*)__ch_data;
    char c;
    cyg_uint32 status;
    CYGARC_HAL_SAVE_GP();

    cyg_drv_interrupt_acknowledge(chan->isr_vector);

    *__ctrlc = 0;
    status = GET_STATUS(chan->base);

    if ( RX_DATA(status) ) {
        c = GET_CHAR(chan->base);

        if( cyg_hal_is_break( &c , 1 ) )
            *__ctrlc = 1;

        res = CYG_ISR_HANDLED;
    }

    CYGARC_HAL_RESTORE_GP();
    return res;
}
Example #7
0
static int
cyg_hal_plf_serial_isr(void *__ch_data, int* __ctrlc, 
                       CYG_ADDRWORD __vector, CYG_ADDRWORD __data)
{
    int res = 0;
    
    cyg_uint16 status;
    cyg_uint16 control;

    cyg_uint16 * base = ((channel_data_t *)__ch_data)->base;
    
    CYGARC_HAL_SAVE_GP();

    *__ctrlc = 0;

    HAL_READ_UINT16(base+CYG_DEV_SERIAL_RS232_SCSR, status);
    HAL_READ_UINT16(base+CYG_DEV_SERIAL_RS232_SCCR1, control);

    if((status & SCSR_RDRF) && (control & SCCR1_RIE))
    {   // Only if the interrupt was caused by the channel
        cyg_uint8 c;
        c = cyg_hal_plf_serial_getc(__ch_data);
	
        if(cyg_hal_is_break(&c, 1))
	    *__ctrlc = 1;
	
        HAL_INTERRUPT_ACKNOWLEDGE(((channel_data_t *)__ch_data)->imb3_vector);
        res = CYG_ISR_HANDLED;
    }

    CYGARC_HAL_RESTORE_GP();
    return res;
}
Example #8
0
static int
cyg_hal_plf_serial_isr(void *__ch_data, int* __ctrlc,
                       CYG_ADDRWORD __vector, CYG_ADDRWORD __data)
{
    int res = 0;
    channel_data_t* chan = (channel_data_t*)__ch_data;
    char c;
    cyg_uint8 lsr;
    CYGARC_HAL_SAVE_GP();

    cyg_drv_interrupt_acknowledge(chan->isr_vector);

    *__ctrlc = 0;
    HAL_READ_UINT8(chan->base+CYG_DEV_LSR, lsr);
    if ( (lsr & SIO_LSR_DR) != 0 ) {

        HAL_READ_UINT8(chan->base+CYG_DEV_RBR, c);
        if( cyg_hal_is_break( &c , 1 ) )
            *__ctrlc = 1;

        res = CYG_ISR_HANDLED;
    }

    CYGARC_HAL_RESTORE_GP();
    return res;
}
Example #9
0
static int
set_debug_comm(int __comm_id)
{
    static int __selected_id = CYGNUM_CALL_IF_SET_COMM_ID_EMPTY;
    hal_virtual_comm_table_t* __chan;
    int interrupt_state = 0;
    int res = 1, update = 0;
    CYGARC_HAL_SAVE_GP();

    CYG_ASSERT(__comm_id >= CYGNUM_CALL_IF_SET_COMM_ID_MANGLER
               && __comm_id < CYGNUM_HAL_VIRTUAL_VECTOR_NUM_CHANNELS,
               "Invalid channel");

    switch (__comm_id) {
    case CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT:
        if (__selected_id > 0)
            res = __selected_id-1;
        else if (__selected_id == 0)
            res = CYGNUM_CALL_IF_SET_COMM_ID_MANGLER;
        else 
            res = __selected_id;
        break;

    case CYGNUM_CALL_IF_SET_COMM_ID_EMPTY:
        CYGACC_CALL_IF_DEBUG_PROCS_SET(0);
        __selected_id = __comm_id;
        break;

    case CYGNUM_CALL_IF_SET_COMM_ID_MANGLER:
        __comm_id = 0;
        update = 1;
        break;

    default:
        __comm_id++;                    // skip mangler entry
        update = 1;
        break;
    }

    if (update) {
        // Find the interrupt state of the channel.
        __chan = CYGACC_CALL_IF_DEBUG_PROCS();
        if (__chan)
            interrupt_state = CYGACC_COMM_IF_CONTROL(*__chan, __COMMCTL_IRQ_DISABLE);

        __selected_id = __comm_id;
        CYGACC_CALL_IF_DEBUG_PROCS_SET(comm_channels[__comm_id]);

        // Set interrupt state on the new channel.
        __chan = CYGACC_CALL_IF_DEBUG_PROCS();
        if (interrupt_state)
            CYGACC_COMM_IF_CONTROL(*__chan, __COMMCTL_IRQ_ENABLE);
        else
            CYGACC_COMM_IF_CONTROL(*__chan, __COMMCTL_IRQ_DISABLE);
    }

    CYGARC_HAL_RESTORE_GP();
    return res;
}
Example #10
0
static int
cyg_hal_plf_serial_control(void *__ch_data, __comm_control_cmd_t __func, ...)
{
    static int irq_state = 0;
    channel_data_t* chan = (channel_data_t*)__ch_data;
    
    int ret = 0;
    CYGARC_HAL_SAVE_GP();

    switch (__func) {
    case __COMMCTL_GETBAUD:
        ret = chan->baud_rate;
        break;
    case __COMMCTL_SETBAUD:
	{
	va_list ap;
	va_start(ap, __func);
	
	ret = chan->baud_rate;
	chan->baud_rate = va_arg(ap, cyg_int32);
	init_serial_channel(chan);
	
	va_end(ap);
	}
	break;
    case __COMMCTL_IRQ_ENABLE:
        HAL_INTERRUPT_SET_LEVEL(chan->imb3_vector, chan->level);
	HAL_INTERRUPT_UNMASK(chan->imb3_vector);
        HAL_INTERRUPT_UNMASK(chan->siu_vector);
        irq_state = 1;
        break;
    case __COMMCTL_IRQ_DISABLE:
        ret = irq_state;
        irq_state = 0;
        HAL_INTERRUPT_MASK(chan->imb3_vector);
	HAL_INTERRUPT_MASK(chan->siu_vector);
        break;
    case __COMMCTL_DBG_ISR_VECTOR:
        ret = chan->siu_vector;
        break;
    case __COMMCTL_SET_TIMEOUT:
        {
        va_list ap;
        va_start(ap, __func);

        ret = chan->msec_timeout;
        chan->msec_timeout = va_arg(ap, cyg_uint32);

        va_end(ap);
        }        
	break;
    default:
        break;
    }
    CYGARC_HAL_RESTORE_GP();
    return ret;
}
Example #11
0
static void cyg_hal_plf_serial_write(void* __ch_data, const cyg_uint8* __buf, cyg_uint32 __len)
{
  CYGARC_HAL_SAVE_GP();

  while(__len-- > 0)
      cyg_hal_plf_serial_putc(__ch_data, *__buf++);

  CYGARC_HAL_RESTORE_GP();
}
Example #12
0
static void cyg_hal_plf_serial_read(void* __ch_data, cyg_uint8* __buf, cyg_uint32 __len)
{
  CYGARC_HAL_SAVE_GP();

  while(__len-- > 0)
    *__buf++ = cyg_hal_plf_serial_getc(__ch_data);

  CYGARC_HAL_RESTORE_GP();
}
Example #13
0
static int
cyg_hal_plf_serial_control(void *__ch_data, __comm_control_cmd_t __func, ...)
{
    static int irq_state = 0;
    channel_data_t* chan = (channel_data_t*)__ch_data;
    
    int ret = 0;
    CYGARC_HAL_SAVE_GP();

    switch (__func) {
    case __COMMCTL_GETBAUD:
        ret = chan->baud_rate;
        break;
    case __COMMCTL_SETBAUD:
        {
        va_list ap;
        va_start(ap, __func);
	
        ret = chan->baud_rate;
        chan->baud_rate = va_arg(ap, cyg_int32);
        init_serial_channel(chan);
	
        va_end(ap);
        }
        break;
    case __COMMCTL_IRQ_ENABLE:
	    // Just enable the interrupt on the IMB3. The debugged application is
        // must make sure that the interrupt is properly decoded
        HAL_INTERRUPT_UNMASK(chan->imb3_vector);
        irq_state = 1;
        break;
    case __COMMCTL_IRQ_DISABLE:
		// Same remark as above
        ret = irq_state;
        irq_state = 0;
        HAL_INTERRUPT_MASK(chan->imb3_vector);
        break;
    case __COMMCTL_DBG_ISR_VECTOR:
        ret = chan->imb3_vector;
        break;
    case __COMMCTL_SET_TIMEOUT:
        {
        va_list ap;
        va_start(ap, __func);

        ret = chan->msec_timeout;
        chan->msec_timeout = va_arg(ap, cyg_uint32);

        va_end(ap);
        }        
        break;
    default:
        break;
    }
    CYGARC_HAL_RESTORE_GP();
    return ret;
}
Example #14
0
static int
cyg_hal_plf_serial_control(void *__ch_data, __comm_control_cmd_t __func, ...)
{
    static int irq_state = 0;
    channel_data_t* chan = (channel_data_t*)__ch_data;
    cyg_uint8* base = ((channel_data_t*)__ch_data)->base;
    cyg_uint16 ser_port_reg;
    int ret = 0;
    va_list ap;

    CYGARC_HAL_SAVE_GP();
    va_start(ap, __func);

    switch (__func) {
    case __COMMCTL_GETBAUD:
        ret = chan->baud_rate;
        break;
    case __COMMCTL_SETBAUD:
        chan->baud_rate = va_arg(ap, cyg_int32);
        // Should we verify this value here?
        cyg_hal_plf_serial_init_channel(chan);
        ret = 0;
        break;
    case __COMMCTL_IRQ_ENABLE:
        irq_state = 1;
        HAL_INTERRUPT_ACKNOWLEDGE(chan->isr_vector);
        HAL_INTERRUPT_UNMASK(chan->isr_vector);

        HAL_READ_UINT16(FREESCALE_ESCI_CR12(base), ser_port_reg);
        ser_port_reg |= FREESCALE_ESCI_CR12_RIE;
        HAL_WRITE_UINT16(FREESCALE_ESCI_CR12(base), ser_port_reg);

        break;
    case __COMMCTL_IRQ_DISABLE:
        ret = irq_state;
        irq_state = 0;
        HAL_INTERRUPT_MASK(chan->isr_vector);

        HAL_READ_UINT16(FREESCALE_ESCI_CR12(base), ser_port_reg);
        ser_port_reg &= ~(cyg_uint16)FREESCALE_ESCI_CR12_RIE;
        HAL_WRITE_UINT16(FREESCALE_ESCI_CR12(base), ser_port_reg);
        break;
    case __COMMCTL_DBG_ISR_VECTOR:
        ret = chan->isr_vector;
        break;
    case __COMMCTL_SET_TIMEOUT:
        ret = chan->msec_timeout;
        chan->msec_timeout = va_arg(ap, cyg_uint32);
    default:
        break;
    }

    va_end(ap);
    CYGARC_HAL_RESTORE_GP();
    return ret;
}
Example #15
0
static int 
cyg_hal_plf_serial_control(void* __ch_data, __comm_control_cmd_t __func, ...)
{
  static int            irq_state     = 0;
  channel_data_t*       chan          = (channel_data_t*)__ch_data;
  volatile cyg_uint32*  pulBase       = chan->pulBase;
  int                   ret           = 0;
  cyg_uint8             status;

  CYGARC_HAL_SAVE_GP();

  switch (__func) 
  {
  case __COMMCTL_IRQ_ENABLE:
    irq_state = 1;
    // Ensure that only Receive ints are generated.
    status = pulBase[REL_Adr_uartcr / sizeof(cyg_uint8)];

    status |= (MSK_uartcr_RTIE | MSK_uartcr_RIE);
    pulBase[REL_Adr_uartcr / sizeof(cyg_uint8)] = status;

    HAL_INTERRUPT_UNMASK(chan->isr_vector);
    break;

  case __COMMCTL_IRQ_DISABLE:
    ret = irq_state;
    irq_state = 0;

    status = pulBase[REL_Adr_uartcr / sizeof(cyg_uint8)];
    status &= ~(MSK_uartcr_RTIE | MSK_uartcr_TIE | MSK_uartcr_RIE | MSK_uartcr_MSIE);
    pulBase[REL_Adr_uartcr / sizeof(cyg_uint8)] = status;

    HAL_INTERRUPT_MASK(chan->isr_vector);
    break;

  case __COMMCTL_DBG_ISR_VECTOR:
    ret = chan->isr_vector;
    break;

  case __COMMCTL_SET_TIMEOUT:
  {
    va_list ap;

    va_start(ap, __func);

    ret = chan->msec_timeout;
    chan->msec_timeout = va_arg(ap, cyg_uint32);

    va_end(ap);
  }
  default:
      break;
  }
  CYGARC_HAL_RESTORE_GP();
  return ret;
}
Example #16
0
//===========================================================================
// Read single character blocking
//===========================================================================
cyg_uint8 cyg_hal_plf_serial_getc(void* __ch_data)
{
    cyg_uint8 ch;
    CYGARC_HAL_SAVE_GP();

    while(!cyg_hal_plf_serial_getc_nonblock(__ch_data, &ch));

    CYGARC_HAL_RESTORE_GP();
    return ch;
}
Example #17
0
static void CYGOPT_HAL_KINETIS_DIAG_FLASH_SECTION_ATTR
cyg_hal_plf_serial_read(void* __ch_data, cyg_uint8* __buf, cyg_uint32 __len)
{
    CYGARC_HAL_SAVE_GP();

    while(__len-- > 0)
        *__buf++ = cyg_hal_plf_serial_getc(__ch_data);

    CYGARC_HAL_RESTORE_GP();
}
Example #18
0
// This is the system's default kill signal routine. Unless overridden
// by the application, it will cause a board reset when GDB quits the
// connection. (The user can avoid the reset by using the GDB 'detach'
// command instead of 'kill' or 'quit').
static int
kill_by_reset(int __irq_nr, void* __regs)
{
    CYGARC_HAL_SAVE_GP();

    reset();

    CYGARC_HAL_RESTORE_GP();
    return 0;
}
Example #19
0
static int CYGOPT_HAL_KINETIS_DIAG_FLASH_SECTION_ATTR
cyg_hal_plf_serial_control(void *__ch_data, __comm_control_cmd_t __func, ...)
{
    channel_data_t* chan = (channel_data_t*)__ch_data;
    CYG_ADDRESS uart_p = ((channel_data_t*)__ch_data)->base;
    cyg_uint8 ser_port_reg;
    int ret = 0;
    va_list ap;

    CYGARC_HAL_SAVE_GP();
    va_start(ap, __func);

    switch (__func) {
    case __COMMCTL_IRQ_ENABLE:
        chan->irq_state = 1;
        HAL_INTERRUPT_ACKNOWLEDGE(chan->isr_vector);
        HAL_INTERRUPT_UNMASK(chan->isr_vector);

        HAL_READ_UINT8(uart_p + CYGHWR_DEV_FREESCALE_UART_C2, ser_port_reg);
        ser_port_reg |= CYGHWR_DEV_FREESCALE_UART_C2_RIE;
        HAL_WRITE_UINT8(uart_p + CYGHWR_DEV_FREESCALE_UART_C2, ser_port_reg);

        break;
    case __COMMCTL_IRQ_DISABLE:
        ret = chan->irq_state;
        chan->irq_state = 0;
        HAL_INTERRUPT_MASK(chan->isr_vector);

        HAL_READ_UINT8(uart_p + CYGHWR_DEV_FREESCALE_UART_C2, ser_port_reg);
        ser_port_reg &= ~(cyg_uint8)CYGHWR_DEV_FREESCALE_UART_C2_RIE;
        HAL_WRITE_UINT8(uart_p + CYGHWR_DEV_FREESCALE_UART_C2, ser_port_reg);
        break;
    case __COMMCTL_DBG_ISR_VECTOR:
        ret = chan->isr_vector;
        break;
    case __COMMCTL_SET_TIMEOUT:
        ret = chan->msec_timeout;
        chan->msec_timeout = va_arg(ap, cyg_uint32);
    case __COMMCTL_GETBAUD:
        ret = chan->baud_rate;
        break;
    case __COMMCTL_SETBAUD:
        chan->baud_rate = va_arg(ap, cyg_int32);
        // Should we verify this value here?
        cyg_hal_plf_serial_init_channel(chan);
        ret = 0;
        break;
    default:
        break;
    }

    va_end(ap);
    CYGARC_HAL_RESTORE_GP();
    return ret;
}
Example #20
0
void
cyg_hal_plf_screen_putc(void *__ch_data, char ch)
{
    CYGARC_HAL_SAVE_GP();

	switch( ch )
	{
	case '\n':
		NewLine();
		return;

	case '\r':
		XPos = 0;
		MoveCursor();
		return;

	case '\b':
		if( XPos == 0 ) return;
		XPos--;
		MoveCursor();
		return;

	case '\t':
		do
		{
			DisplayChar(' ');
		} while( (XPos % 8) != 0 );
		return;

	case 0x0c:
		ClearScreen();
		XPos = YPos = 0;
		MoveCursor();
		return;		

	case 1:
		ScrollUp(1);
		XPos = 0;
		YPos = ScreenLength-1;
		return;

	case 2:
		ScrollDown(1);
		XPos = 0;
		YPos = 0;
		return;
	
		
	default:
		DisplayChar(ch);
		return;
	}

    CYGARC_HAL_RESTORE_GP();
}
Example #21
0
static int
net_io_control(void *__ch_data, __comm_control_cmd_t __func, ...)
{
    static int vector = 0;
    int ret = 0;
    static int irq_state = 0;

    CYGARC_HAL_SAVE_GP();

    switch (__func) {
    case __COMMCTL_IRQ_ENABLE:
        irq_state = 1;
        if (vector == 0) {
            vector = eth_drv_int_vector();
        }
        HAL_INTERRUPT_UNMASK(vector); 
        break;
    case __COMMCTL_IRQ_DISABLE:
        ret = irq_state;
        irq_state = 0;
        if (vector == 0) {
            vector = eth_drv_int_vector();
        }
        HAL_INTERRUPT_MASK(vector);
        break;
    case __COMMCTL_DBG_ISR_VECTOR:
        ret = vector;
        break;
    case __COMMCTL_SET_TIMEOUT:
    {
        va_list ap;

        va_start(ap, __func);

        ret = _timeout;
        _timeout = va_arg(ap, cyg_uint32);

        va_end(ap);
        break;
    }
    case __COMMCTL_FLUSH_OUTPUT:
        net_io_flush();
        break;
    case __COMMCTL_ENABLE_LINE_FLUSH:
	flush_output_lines = true;
	break;
    case __COMMCTL_DISABLE_LINE_FLUSH:
	flush_output_lines = false;
	break;
    default:
        break;
    }
    CYGARC_HAL_RESTORE_GP();
    return ret;
}
Example #22
0
//
// This function is called from the hardware driver when an output operation
// has completed - i.e. the packet has been sent.
//
static void
eth_drv_tx_done(struct eth_drv_sc *sc, CYG_ADDRWORD key, int status)
{
#if 0	
  struct pbuf *p = (struct pbuf *)key;
  struct netif *netif = &sc->sc_arpcom.ac_if;

  CYGARC_HAL_SAVE_GP();
  CYGARC_HAL_RESTORE_GP();
#endif  
}
Example #23
0
static void
flush_dcache(void *__p, int __nbytes)
{
    CYGARC_HAL_SAVE_GP();
#ifdef HAL_DCACHE_FLUSH
    HAL_DCACHE_FLUSH( __p , __nbytes );
#elif defined(HAL_DCACHE_INVALIDATE)
    HAL_DCACHE_INVALIDATE();
#endif
    CYGARC_HAL_RESTORE_GP();
}
Example #24
0
static void CYGOPT_HAL_KINETIS_DIAG_FLASH_SECTION_ATTR
cyg_hal_plf_serial_write(void* __ch_data, const cyg_uint8* __buf,
                         cyg_uint32 __len)
{
    CYGARC_HAL_SAVE_GP();

    while(__len-- > 0)
        cyg_hal_plf_serial_putc(__ch_data, *__buf++);

    CYGARC_HAL_RESTORE_GP();
}
Example #25
0
cyg_uint8 CYGOPT_HAL_KINETIS_DIAG_FLASH_SECTION_ATTR
cyg_hal_plf_serial_getc(void* __ch_data)
{
    cyg_uint8 ch;
    CYGARC_HAL_SAVE_GP();

    while(!cyg_hal_plf_serial_getc_nonblock(__ch_data, &ch));

    CYGARC_HAL_RESTORE_GP();
    return ch;
}
Example #26
0
static int
cyg_hal_plf_serial_control(void *__ch_data, __comm_control_cmd_t __func, ...)
{
    static int irq_state = 0;
    channel_data_t* chan = (channel_data_t*)__ch_data;
    int ret = 0;
    CYGARC_HAL_SAVE_GP();

    switch (__func) {
    case __COMMCTL_IRQ_ENABLE:
        irq_state = 1;

	HAL_WRITE_UINT8(chan->base+CYG_DEV_IER, SIO_IER_RCV);
        HAL_INTERRUPT_UNMASK(chan->isr_vector);
        break;
    case __COMMCTL_IRQ_DISABLE:
        ret = irq_state;
        irq_state = 0;

	HAL_WRITE_UINT8(chan->base+CYG_DEV_IER, 0);
        HAL_INTERRUPT_MASK(chan->isr_vector);
        break;
    case __COMMCTL_DBG_ISR_VECTOR:
        ret = chan->isr_vector;
        break;
    case __COMMCTL_SET_TIMEOUT:
    {
        va_list ap;

        va_start(ap, __func);

        ret = chan->msec_timeout;
        chan->msec_timeout = va_arg(ap, cyg_uint32);

        va_end(ap);
    }        
    case __COMMCTL_GETBAUD:
        ret = chan->baud_rate;
        break;
    case __COMMCTL_SETBAUD:
    {
        va_list ap;
        va_start(ap, __func);
        chan->baud_rate = va_arg(ap, cyg_int32);
        va_end(ap);
        ret = set_baud(chan);
        break;
    }
    default:
        break;
    }
    CYGARC_HAL_RESTORE_GP();
    return ret;
}
Example #27
0
static void
cyg_hal_diag_mangler_gdb_read(void* __ch_data, 
                              cyg_uint8* __buf, cyg_uint32 __len)
{
    CYGARC_HAL_SAVE_GP();

    while(__len-- > 0)
        *__buf++ = cyg_hal_diag_mangler_gdb_getc(__ch_data);

    CYGARC_HAL_RESTORE_GP();
}
Example #28
0
static void
cyg_hal_diag_mangler_null_putc(void* __ch_data, cyg_uint8 c)
{
    hal_virtual_comm_table_t* __chan = CYGACC_CALL_IF_DEBUG_PROCS();

    CYGARC_HAL_SAVE_GP();

    CYGACC_COMM_IF_PUTC(*__chan, c);

    CYGARC_HAL_RESTORE_GP();
}
Example #29
0
static void
delay_us(cyg_int32 usecs)
{
    CYGARC_HAL_SAVE_GP();
#ifdef CYGPKG_KERNEL
    {
        cyg_int32 start, elapsed;
        cyg_int32 usec_ticks, slice;

        // How many ticks total we should wait for.
        usec_ticks = usecs*CYGNUM_KERNEL_COUNTERS_RTC_PERIOD;
        usec_ticks /= CYGNUM_HAL_RTC_NUMERATOR/CYGNUM_HAL_RTC_DENOMINATOR/1000;

        do {
            // Spin in slices of 1/2 the RTC period. Allows interrupts
            // time to run without messing up the algorithm. If we spun
            // for 1 period (or more) of the RTC, there'd be also problems
            // figuring out when the timer wrapped.  We may lose a tick or
            // two for each cycle but it shouldn't matter much.
            slice = usec_ticks % (CYGNUM_KERNEL_COUNTERS_RTC_PERIOD / 2);
    
            HAL_CLOCK_READ(&start);
            do {
                HAL_CLOCK_READ(&elapsed);
                elapsed = (elapsed - start); // counts up!
                if (elapsed < 0)
                    elapsed += CYGNUM_KERNEL_COUNTERS_RTC_PERIOD;
            } while (elapsed < slice);
            
            // Adjust by elapsed, not slice, since an interrupt may have
            // been stalling us for some time.
            usec_ticks -= elapsed;
        } while (usec_ticks > 0);
    }
#else // CYGPKG_KERNEL
#ifdef HAL_DELAY_US
    // Use a HAL feature if defined
    HAL_DELAY_US(usecs);
#else
    // If no accurate delay mechanism, just spin for a while. Having
    // an inaccurate delay is much better than no delay at all. The
    // count of 10 should mean the loop takes something resembling
    // 1us on most CPUs running between 30-100MHz [depends on how many
    // instructions this compiles to, how many dispatch units can be
    // used for the simple loop, actual CPU frequency, etc]
    while (usecs-- > 0) {
        int i;
        for (i = 0; i < 10; i++);
    }
#endif // HAL_DELAY_US
#endif // CYGPKG_KERNEL
    CYGARC_HAL_RESTORE_GP();
}
Example #30
0
static int
cyg_hal_diag_mangler_gdb_control(void *__ch_data, 
                                 __comm_control_cmd_t __func, ...)
{
    CYGARC_HAL_SAVE_GP();

    if (__func == __COMMCTL_FLUSH_OUTPUT)
	cyg_hal_diag_mangler_gdb_flush(__ch_data);

    CYGARC_HAL_RESTORE_GP();
    return 0;
}