/* Set up and initialize hardware prior to call to main */ void Chip_SetupIrcClocking(void) { /* IRC should be powered up */ Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_IRC_PD); Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_IRCOUT_PD); /* Set system PLL input to main oscillator */ Chip_Clock_SetSystemPLLSource(SYSCTL_PLLCLKSRC_IRC); /* Power down PLL to change the PLL divider ratio */ Chip_SYSCTL_PowerDown(SYSCTL_POWERDOWN_SYSPLL_PD); /* Setup PLL for main oscillator rate (FCLKIN = 12MHz) * 6 = 72MHz MSEL = 5 (this is pre-decremented), PSEL = 1 (for P = 2) FCLKOUT = FCLKIN * (MSEL + 1) = 12MHz * 6 = 72MHz FCCO = FCLKOUT * 2 * P = 72MHz * 2 * 2 = 288MHz (within FCCO range) */ Chip_Clock_SetupSystemPLL(5, 1); /* Powerup system PLL */ Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_SYSPLL_PD); /* Wait for PLL to lock */ while (!Chip_Clock_IsSystemPLLLocked()) {} /* Set system clock divider to 1 */ Chip_Clock_SetSysClockDiv(1); /* Setup FLASH access to 3 clocks */ Chip_FMC_SetFLASHAccess(FLASHTIM_72MHZ_CPU); /* Set main clock source to the system PLL. This will drive 48MHz for the main clock and 48MHz for the system clock */ Chip_Clock_SetMainClockSource(SYSCTL_MAINCLKSRC_PLLOUT); }
void Chip_USB_Init(void) { /* Set USB PLL input to main oscillator */ Chip_Clock_SetUSBPLLSource(SYSCTL_PLLCLKSRC_MAINOSC); /* Setup USB PLL (FCLKIN = 12MHz) * 4 = 48MHz MSEL = 3 (this is pre-decremented), PSEL = 1 (for P = 2) FCLKOUT = FCLKIN * (MSEL + 1) = 12MHz * 4 = 48MHz FCCO = FCLKOUT * 2 * P = 48MHz * 2 * 2 = 192MHz (within FCCO range) */ Chip_Clock_SetupUSBPLL(3, 1); /* Powerup USB PLL */ Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_USBPLL_PD); /* Wait for PLL to lock */ while (!Chip_Clock_IsUSBPLLLocked()) {} /* enable USB main clock */ Chip_Clock_SetUSBClockSource(SYSCTL_USBCLKSRC_PLLOUT, 1); /* Enable AHB clock to the USB block. */ Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_USB); /* power UP USB Phy */ Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_USBPHY_PD); /* Reset USB block */ Chip_SYSCTL_PeriphReset(RESET_USB); }
/** * @brief main routine for CLKOUT example * @return Function should not exit. */ int main(void) { CHIP_SYSCTL_CLKOUTSRC_T clkoutClks; SystemCoreClockUpdate(); Board_Init(); Board_LED_Set(0, false); /* Enable and setup SysTick Timer at a 100Hz rate */ SysTick_Config(Chip_Clock_GetSysTickClockRate() / 100); /* Enable the power to the WDT */ Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_WDTOSC_PD); /* Setup SCT PLL */ Chip_SYSCTL_PowerDown(SYSCTL_POWERDOWN_SCTPLL_PD); Chip_Clock_SetSCTPLLSource(SYSCTL_PLLCLKSRC_MAINOSC); Chip_Clock_SetupSCTPLL(5, 2); Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_SCTPLL_PD); /* Wait for PLL to lock */ while (!Chip_Clock_IsSCTPLLLocked()) {} /* Enable RTC Oscillator */ Chip_Clock_EnableRTCOsc(); /* Enable SWM clocking prior to switch matrix operations */ Chip_SWM_Init(); Chip_GPIO_Init(LPC_GPIO); /* Setup pin as CLKOUT */ Chip_SWM_MovablePortPinAssign(SWM_CLK_OUT_O, CLKOUT_PORT, CLKOUT_PIN); /* Configure as a digital pin with no pullups/pulldowns */ Chip_IOCON_PinMuxSet(LPC_IOCON, CLKOUT_PORT, CLKOUT_PIN, (IOCON_MODE_INACT | IOCON_DIGMODE_EN)); /* Cycle through all clock sources for the CLKOUT pin */ while (1) { for (clkoutClks = SYSCTL_CLKOUTSRC_IRC; clkoutClks <= SYSCTL_CLKOUTSRC_RTC32K; clkoutClks++) { /* Setup CLKOUT pin for specific clock with a divider of 1 */ Chip_Clock_SetCLKOUTSource(clkoutClks, 1); /* Wait 5 seconds */ ticks100 = 0; while (ticks100 < 500) { __WFI(); } } } /* Disable CLKOUT pin by setting divider to 0 */ Chip_Clock_SetCLKOUTSource(SYSCTL_CLKOUTSRC_MAINSYSCLK, 0); return 0; }
/* Setup system clocking */ STATIC void SystemSetupClocking(void) { volatile int i; /* Powerup main oscillator */ Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_SYSOSC_PD); /* Wait 200us for OSC to be stablized, no status indication, dummy wait. */ for (i = 0; i < 0x100; i++) {} /* Set system PLL input to main oscillator */ Chip_Clock_SetSystemPLLSource(SYSCTL_PLLCLKSRC_MAINOSC); /* Power down PLL to change the PLL divider ratio */ Chip_SYSCTL_PowerDown(SYSCTL_POWERDOWN_SYSPLL_PD); /* Setup PLL for main oscillator rate (FCLKIN = 12MHz) * 4 = 48MHz MSEL = 3 (this is pre-decremented), PSEL = 1 (for P = 2) FCLKOUT = FCLKIN * (MSEL + 1) = 12MHz * 4 = 48MHz FCCO = FCLKOUT * 2 * P = 48MHz * 2 * 2 = 192MHz (within FCCO range) */ Chip_Clock_SetupSystemPLL(3, 1); /* Powerup system PLL */ Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_SYSPLL_PD); /* Wait for PLL to lock */ while (!Chip_Clock_IsSystemPLLLocked()) {} /* Set system clock divider to 1 */ Chip_Clock_SetSysClockDiv(1); /* Setup FLASH access to 3 clocks */ Chip_FMC_SetFLASHAccess(FLASHTIM_50MHZ_CPU); /* Set main clock source to the system PLL. This will drive 48MHz for the main clock and 48MHz for the system clock */ Chip_Clock_SetMainClockSource(SYSCTL_MAINCLKSRC_PLLOUT); /* Set USB PLL input to main oscillator */ Chip_Clock_SetUSBPLLSource(SYSCTL_PLLCLKSRC_MAINOSC); /* Setup USB PLL (FCLKIN = 12MHz) * 4 = 48MHz MSEL = 3 (this is pre-decremented), PSEL = 1 (for P = 2) FCLKOUT = FCLKIN * (MSEL + 1) = 12MHz * 4 = 48MHz FCCO = FCLKOUT * 2 * P = 48MHz * 2 * 2 = 192MHz (within FCCO range) */ Chip_Clock_SetupUSBPLL(3, 1); /* Powerup USB PLL */ Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_USBPLL_PD); /* Wait for PLL to lock */ while (!Chip_Clock_IsUSBPLLLocked()) {} }
/* Clock and PLL initialization based on the external oscillator */ void Chip_SetupXtalClocking(void) { volatile int i; #if defined(USE_ROM_API) uint32_t cmd[4], resp[2]; #endif /* Powerup main oscillator */ Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_SYSOSC_PD); /* Wait for at least 580uS for osc to stabilize */ for (i = 0; i < 2500; i++) {} /* Set system PLL input to main oscillator */ Chip_Clock_SetSystemPLLSource(SYSCTL_PLLCLKSRC_MAINOSC); /* Setup FLASH access to 2 clocks */ Chip_FMC_SetFLASHAccess(FLASHTIM_2CLK_CPU); #if defined(USE_ROM_API) /* Use ROM API for setting up PLL */ cmd[0] = Chip_Clock_GetMainOscRate() / 1000; /* in KHz */ cmd[1] = 48000000 / 1000; /* 48MHz system clock rate */ cmd[2] = CPU_FREQ_EQU; cmd[3] = 48000000 / 10000; /* Timeout */ LPC_PWRD_API->set_pll(cmd, resp); /* Dead loop on fail */ while (resp[0] != PLL_CMD_SUCCESS) {} #else /* Power down PLL to change the PLL divider ratio */ Chip_SYSCTL_PowerDown(SYSCTL_POWERDOWN_SYSPLL_PD); /* Setup PLL for main oscillator rate (FCLKIN = 12MHz) * 4 = 48MHz MSEL = 3 (this is pre-decremented), PSEL = 1 (for P = 2) FCLKOUT = FCLKIN * (MSEL + 1) = 12MHz * 4 = 48MHz FCCO = FCLKOUT * 2 * P = 48MHz * 2 * 2 = 192MHz (within FCCO range) */ Chip_Clock_SetupSystemPLL(3, 1); /* Powerup system PLL */ Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_SYSPLL_PD); /* Wait for PLL to lock */ while (!Chip_Clock_IsSystemPLLLocked()) {} /* Set system clock divider to 1 */ Chip_Clock_SetSysClockDiv(1); /* Set main clock source to the system PLL. This will drive 48MHz for the main clock and 48MHz for the system clock */ Chip_Clock_SetMainClockSource(SYSCTL_MAINCLKSRC_PLLOUT); #endif }
/* Set up and initialize hardware prior to call to main */ void Chip_SystemInit(void) { #ifdef SUPPORT_NXP_MAIN_OSC volatile uint32_t i; Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_SYSOSC_PD); Chip_Clock_SetPLLBypass(0, 0); for (i = 0; i < 200; i++) __NOP(); Chip_Clock_SetSystemPLLSource(SYSCTL_PLLCLKSRC_MAINOSC); #else /* IRC should be powered up */ Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_IRC_PD); Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_IRCOUT_PD); /* Set system PLL input to main oscillator */ Chip_Clock_SetSystemPLLSource(SYSCTL_PLLCLKSRC_IRC); #endif /* Power down PLL to change the PLL divider ratio */ Chip_SYSCTL_PowerDown(SYSCTL_POWERDOWN_SYSPLL_PD); #ifdef SUPPORT_NXP_MAIN_OSC Chip_Clock_SetupSystemPLL(3, 2); #else /* Setup PLL for main oscillator rate (FCLKIN = 12MHz) * 4 = 48MHz MSEL = 3 (this is pre-decremented), PSEL = 1 (for P = 2) FCLKOUT = FCLKIN * (MSEL + 1) = 12MHz * 4 = 48MHz FCCO = FCLKOUT * 2 * P = 48MHz * 2 * 2 = 192MHz (within FCCO range) */ Chip_Clock_SetupSystemPLL(3, 1); #endif /* Powerup system PLL */ Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_SYSPLL_PD); /* Wait for PLL to lock */ while (!Chip_Clock_IsSystemPLLLocked()) {} /* Set system clock divider to 1 */ Chip_Clock_SetSysClockDiv(1); /* Setup FLASH access to 3 clocks */ Chip_FMC_SetFLASHAccess(FLASHTIM_50MHZ_CPU); /* Set main clock source to the system PLL. This will drive 48MHz for the main clock and 48MHz for the system clock */ Chip_Clock_SetMainClockSource(SYSCTL_MAINCLKSRC_PLLOUT); /* Enable IOCON clock */ Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_IOCON); }
/* Clock and PLL initialization based on the internal oscillator */ void Chip_SetupIrcClocking(void) { #if defined(USE_ROM_API) uint32_t cmd[4], resp[2]; #endif /* Turn on the IRC by clearing the power down bit */ Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_IRC_PD); /* Select the PLL input in the IRC */ Chip_Clock_SetSystemPLLSource(SYSCTL_PLLCLKSRC_IRC); /* Setup FLASH access */ Chip_FMC_SetFLASHAccess(FLASHTIM_2CLK_CPU); #if defined(USE_ROM_API) /* Use ROM API for setting up PLL */ cmd[0] = Chip_Clock_GetIntOscRate() / 1000; /* in KHz */ cmd[1] = 48000000 / 1000; /* 48MHz system clock rate */ cmd[2] = CPU_FREQ_EQU; cmd[3] = 48000000 / 10000; /* Timeout */ LPC_PWRD_API->set_pll(cmd, resp); /* Dead loop on fail */ while (resp[0] != PLL_CMD_SUCCESS) {} #else /* Power down PLL to change the PLL divider ratio */ Chip_SYSCTL_PowerDown(SYSCTL_POWERDOWN_SYSPLL_PD); /* Configure the PLL M and P dividers */ /* Setup PLL for main oscillator rate (FCLKIN = 12MHz) * 4 = 48MHz MSEL = 3 (this is pre-decremented), PSEL = 1 (for P = 2) FCLKOUT = FCLKIN * (MSEL + 1) = 12MHz * 4 = 48MHz FCCO = FCLKOUT * 2 * P = 48MHz * 2 * 2 = 192MHz (within FCCO range) */ Chip_Clock_SetupSystemPLL(3, 1); /* Turn on the PLL by clearing the power down bit */ Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_SYSPLL_PD); /* Wait for PLL to lock */ while (!Chip_Clock_IsSystemPLLLocked()) {} /* Set system clock divider to 1 */ Chip_Clock_SetSysClockDiv(1); /* Set main clock source to the system PLL. This will drive 24MHz for the main clock and 24MHz for the system clock */ Chip_Clock_SetMainClockSource(SYSCTL_MAINCLKSRC_PLLOUT); #endif }
void WDTInit( void ) { uint32_t i; //uint32_t wdtFreq; /* Initialize WWDT (also enables WWDT clock) */ Chip_WWDT_Init(LPC_WWDT); /* Prior to initializing the watchdog driver, the clocking for the watchdog must be enabled. This example uses the watchdog oscillator set at a 50KHz (1Mhz / 20) clock rate. */ Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_WDTOSC_PD); Chip_Clock_SetWDTOSC(WDTLFO_OSC_1_05, 20); /* The WDT divides the input frequency into it by 4 */ //wdtFreq = Chip_Clock_GetWDTOSCRate() / 4; /* LPC1102/4, LPC11XXLV, and LPC11CXX devices select the watchdog clock source from the SYSCLK block, while LPC11AXX, LPC11EXX, and LPC11UXX devices select the clock as part of the watchdog block. */ /* Select watchdog oscillator for WDT clock source */ Chip_WWDT_SelClockSource(LPC_WWDT, WWDT_CLKSRC_WATCHDOG_WDOSC); Chip_WWDT_SetTimeOut(LPC_WWDT, 0x7FFF); Chip_WWDT_SetOption(LPC_WWDT, (WWDT_WDMOD_WDEN|WWDT_WDMOD_WDRESET)); Chip_WWDT_Feed(LPC_WWDT); /* Make sure feed sequence executed properly */ for (i = 0; i < 0x80; i++); return; }
/** * This brings up enough clocks to allow the processor to run quickly while initialising memory. * Other platform specific clock init can be done in init_platform() or init_architecture() */ WEAK void init_clocks( void ){ /** This brings up enough clocks to allow the processor to run quickly while initialising memory. * Other platform specific clock init can be done in init_platform() or init_architecture() */ //LPC54xx clock initialized in SystemInit(). #ifdef BOOTLOADER LPC_SYSCTL->SYSAHBCLKCTRL[0] |= 0x00000018; // Magicoe #if defined(__FPU_PRESENT) && __FPU_PRESENT == 1 fpuInit(); #endif #if defined(NO_BOARD_LIB) /* Chip specific SystemInit */ Chip_SystemInit(); #else /* Enable RAM 2 clock */ Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_SRAM2); /* Board specific SystemInit */ Board_SystemInit(); //init pin muxing and clock. #endif LPC_SYSCTL->SYSAHBCLKCTRL[0] |= 0x00000018; // Magicoe Chip_SYSCTL_PowerUp(PDRUNCFG_PD_IRC_OSC_EN|PDRUNCFG_PD_IRC_EN); /* Configure PIN0.21 as CLKOUT with pull-up, monitor the MAINCLK on scope */ Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 21, IOCON_MODE_PULLUP | IOCON_FUNC1 | IOCON_DIGITAL_EN | IOCON_INPFILT_OFF); Chip_Clock_SetCLKOUTSource(SYSCTL_CLKOUTSRC_RTC, 1); Chip_Clock_EnableRTCOsc(); Chip_RTC_Init(LPC_RTC); Chip_RTC_Enable1KHZ(LPC_RTC); Chip_RTC_Enable(LPC_RTC); #endif }
void platform_early_init(void) { /* set up clocking for a board with an external oscillator */ Chip_SetupXtalClocking(); /* Set USB PLL input to main oscillator */ Chip_Clock_SetUSBPLLSource(SYSCTL_PLLCLKSRC_MAINOSC); /* Setup USB PLL (FCLKIN = 12MHz) * 4 = 48MHz MSEL = 3 (this is pre-decremented), PSEL = 1 (for P = 2) FCLKOUT = FCLKIN * (MSEL + 1) = 12MHz * 4 = 48MHz FCCO = FCLKOUT * 2 * P = 48MHz * 2 * 2 = 192MHz (within FCCO range) */ Chip_Clock_SetupUSBPLL(3, 1); /* Powerup USB PLL */ Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_USBPLL_PD); /* Wait for PLL to lock */ while (!Chip_Clock_IsUSBPLLLocked()) {} /* Set default system tick divder to 1 */ Chip_Clock_SetSysTickClockDiv(1); /* start the generic systick driver */ arm_cm_systick_init(Chip_Clock_GetMainClockRate()); lpc_debug_early_init(); }
/* Initialize pin and clocks for USB0/USB1 port */ static void usb_pin_clk_init(void) { /* enable USB main clock */ Chip_Clock_SetUSBClockSource(SYSCTL_USBCLKSRC_PLLOUT, 1); /* Enable AHB clock to the USB block and USB RAM. */ Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_USB); Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_USBRAM); /* power UP USB Phy */ Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_USBPAD_PD); }
/* Initializes the ACMP */ void Chip_ACMP_Init(LPC_CMP_T *pACMP) { /* Enable the power to the analog comparator */ Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_ACOMP_PD); /* Enable ACMP clock */ Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_ACOMP); IP_ACMP_Init(pACMP); }
/* Initializes the ACMP */ void Chip_ACMP_Init(LPC_CMP_T *pACMP) { /* Enable the power to the analog comparator */ Chip_SYSCTL_PowerUp(SYSCTL_SLPWAKE_ACMP_PD); /* Enable the clock to the register interface */ Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_ACOMP); IP_ACMP_Init(pACMP); }
/* Initialize the ADC peripheral */ void Chip_ADC_Init(LPC_ADC_T *pADC, uint32_t flags) { /* Power up ADC and enable ADC base clock */ if (pADC == LPC_ADC0) { Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_ADC0_PD); Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_ADC0); Chip_SYSCTL_PeriphReset(RESET_ADC0); } else { Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_ADC1_PD); Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_ADC1); Chip_SYSCTL_PeriphReset(RESET_ADC1); } /* Disable ADC interrupts */ pADC->INTEN = 0; /* Set ADC control options */ pADC->CTRL = flags; }
/* Initialize the ADC peripheral */ void Chip_ADC_Init(LPC_ADC_T *pADC, uint32_t flags) { /* Power up ADC and enable ADC base clock */ Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_ADC_PD); Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_ADC); /* Disable ADC interrupts */ pADC->INTEN = 0; /* Set ADC control options */ pADC->CTRL = flags; }
/* Setup system clocking */ STATIC void Board_SetupXtalClocking(void) { #if USE_CLKIN_IN uint32_t i; #endif /* A library"pmu_library.lib) has been created to facilitate the power management operation. The user needs to enter the desired frequency the application wants to run, the set_voltage() will set the internal voltage regulators automatically. */ set_voltage( SYSCTL_IRC_FREQ * PLL_MULTIPLIER ); /* Select the PLL input in the IRC */ #if USE_CLKIN_IN /* IOCON clock left on, this is needed is CLKIN is used. */ Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_IOCON); Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 22, IOCON_MODE_PULLUP | IOCON_FUNC1 | IOCON_DIGITAL_EN | IOCON_INPFILT_OFF); /* Delay to wait until CLKIN stablized */ for ( i = 0; i < 500; i++ ) {} Chip_Clock_SetSystemPLLSource(SYSCTL_PLLCLKSRC_CLKIN); /* Wait State setting TBD */ /* Setup FLASH access to 2 clocks (up to 20MHz) */ Chip_FMC_SetFLASHAccess(FLASHTIM_72MHZ_CPU); #else Chip_Clock_SetSystemPLLSource(SYSCTL_PLLCLKSRC_IRC); /* Wait State setting TBD */ /* Setup FLASH access to 5 clocks (up to 72MHz) */ Chip_FMC_SetFLASHAccess(FLASHTIM_72MHZ_CPU); #endif /* Power down PLL to change the PLL divider ratio */ Chip_SYSCTL_PowerDown(PDRUNCFG_PD_SYS_PLL0); /* First parameter is the multiplier, the second parameter is the input frequency in MHz */ #if USE_CLKIN_IN Chip_Clock_SetupSystemPLL(PLL_MULTIPLIER, ExtRateIn); #else Chip_Clock_SetupSystemPLL(PLL_MULTIPLIER, SYSCTL_IRC_FREQ); #endif /* Turn on the PLL by clearing the power down bit */ Chip_SYSCTL_PowerUp(PDRUNCFG_PD_SYS_PLL0); /* Wait for PLL to lock */ while (!Chip_Clock_IsSystemPLLLocked()) {} /* Set system clock divider to 1 */ Chip_Clock_SetSysClockDiv(1); /* Set main clock source to the system PLL. This will drive 24MHz for the main clock and 24MHz for the system clock */ Chip_Clock_SetMainClockSource(SYSCTL_MAINCLKSRC_PLLOUT); }
static void usb_pin_clk_init(void) { /* enable USB main clock */ Chip_Clock_SetUSBClockSource(SYSCTL_USBCLKSRC_PLLOUT, 1); /* Enable AHB clock to the USB block and USB RAM. */ Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_USB); Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_USBRAM); /* power UP USB Phy */ Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_USBPAD_PD); /* Enable IOCON clock */ Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_IOCON); Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 3, (IOCON_FUNC1 | IOCON_MODE_INACT)); /* PIO0_3 used for USB_VBUS */ Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 6, (IOCON_FUNC1 | IOCON_MODE_INACT)); /* PIO0_6 used for USB_CONNECT */ }
/* Initialize the ADC peripheral */ void Chip_ADC_Init(LPC_ADC_T *pADC, uint32_t flags) { /* Power up ADC and enable ADC base clock */ Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_ADC_PD); Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_ADC); /* FIXME - LPC1125 UM describes ADC reset, but no ADC reset bit in SYSCTL. It will be easier to init if ADC reset is there. */ #if 0 /* Reset ADC */ Chip_SYSCTL_PeriphReset(RESET_ADC0); #else /* Disable ADC interrupts */ pADC->INTEN = 0; #endif /* Set ADC control options */ pADC->CTRL = flags; }
/* Set up and initialize clocking prior to call to main */ void Board_SetupClocking(void) { /* The IRC is always the first clock source even if CLK_IN is used later. Once CLK_IN is selected as the clock source. We can turned off the IRC later. Turn on the IRC by clearing the power down bit */ Chip_SYSCTL_PowerUp(PDRUNCFG_PD_IRC_OSC_EN | PDRUNCFG_PD_IRC_EN); //Board_SetupXtalClocking(); Board_SetupIRCClocking(); /* Select the CLKOUT clocking source */ Chip_Clock_SetCLKOUTSource(SYSCTL_CLKOUTSRC_MAINSYSCLK, 1); /* ASYSNC SYSCON needs to be on or all serial peripheral won't work. Be careful if PLL is used or not, ASYNC_SYSCON source needs to be selected carefully. */ Chip_SYSCTL_Enable_ASYNC_Syscon(true); Chip_Clock_SetAsyncSysconClockDiv(1); Chip_Clock_SetAsyncSysconClockSource(ASYNC_SYSCTL_CLOCK_IRC); }
/* Initialize the ADC peripheral and the ADC setup structure to default value */ void Chip_ADC_Init(LPC_ADC_T *pADC, ADC_CLOCK_SETUP_T *ADCSetup) { uint8_t div; uint32_t cr = 0; uint32_t clk; Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_ADC_PD); Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_ADC); pADC->INTEN = 0; /* Disable all interrupts */ cr |= ADC_CR_PDN; ADCSetup->adcRate = ADC_MAX_SAMPLE_RATE; ADCSetup->bitsAccuracy = ADC_10BITS; clk = 11; ADCSetup->burstMode = false; div = getClkDiv(pADC, false, ADCSetup->adcRate, clk); cr |= ADC_CR_CLKDIV(div); cr |= ADC_CR_BITACC(ADCSetup->bitsAccuracy); pADC->CR = cr; }
/** * @brief Main routine for WWDT example * @return Nothing */ int main(void) { uint32_t wdtFreq; /* Board Setup */ Board_Init(); /* Initialize WWDT (also enables WWDT clock) */ Chip_WWDT_Init(LPC_WWDT); /* Prior to initializing the watchdog driver, the clocking for the watchdog must be enabled. This example uses the watchdog oscillator set at a 50KHz (1Mhz / 20) clock rate. */ Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_WDTOSC_PD); Chip_Clock_SetWDTOSC(WDTLFO_OSC_1_05, 20); /* The WDT divides the input frequency into it by 4 */ wdtFreq = Chip_Clock_GetWDTOSCRate() / 4; /* LPC1102/4, LPC11XXLV, and LPC11CXX devices select the watchdog clock source from the SYSCLK block, while LPC11AXX, LPC11EXX, and LPC11UXX devices select the clock as part of the watchdog block. */ /* Select watchdog oscillator for WDT clock source */ #if defined(CHIP_LPC110X) || defined(CHIP_LPC11XXLV) || defined(CHIP_LPC11CXX) || defined(CHIP_LPC11EXX) Chip_Clock_SetWDTClockSource(SYSCTL_WDTCLKSRC_WDTOSC, 1); #else Chip_WWDT_SelClockSource(LPC_WWDT, WWDT_CLKSRC_WATCHDOG_WDOSC); #endif Board_LED_Set(0, false); /* Set watchdog feed time constant to approximately 2s Set watchdog warning time to 512 ticks after feed time constant Set watchdog window time to 3s */ Chip_WWDT_SetTimeOut(LPC_WWDT, wdtFreq * 2); #if !defined(CHIP_LPC11CXX) Chip_WWDT_SetWarning(LPC_WWDT, 512); Chip_WWDT_SetWindow(LPC_WWDT, wdtFreq * 3); #endif #if !defined(CHIP_LPC11CXX) /* Configure WWDT to reset on timeout */ Chip_WWDT_SetOption(LPC_WWDT, WWDT_WDMOD_WDRESET); #endif /* Setup Systick to feed the watchdog timer. This needs to be done * at a rate faster than the WDT warning. */ SysTick_Config(Chip_Clock_GetSystemClockRate() / 50); /* Clear watchdog warning and timeout interrupts */ #if !defined(CHIP_LPC11CXX) Chip_WWDT_ClearStatusFlag(LPC_WWDT, WWDT_WDMOD_WDTOF | WWDT_WDMOD_WDINT); #else Chip_WWDT_ClearStatusFlag(LPC_WWDT, WWDT_WDMOD_WDTOF); #endif /* Clear and enable watchdog interrupt */ NVIC_ClearPendingIRQ(WDT_IRQn); NVIC_EnableIRQ(WDT_IRQn); /* Start watchdog */ Chip_WWDT_Start(LPC_WWDT); /* Idle while waiting */ while (1) { __WFI(); } }
/** * @brief main routine for ADC example * @return Function should not exit */ int main(void) { SystemCoreClockUpdate(); Board_Init(); DEBUGSTR("ADC ROM sequencer demo\r\n"); /* Power up, enable clock and reset ADC0 */ Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_ADC0_PD); Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_ADC0); Chip_SYSCTL_PeriphReset(RESET_ADC0); /* Power up, enable clock and reset ADC1 */ Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_ADC1_PD); Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_ADC1); Chip_SYSCTL_PeriphReset(RESET_ADC1); /* Power up the internal temperature sensor */ Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_TS_PD); #if defined(BOARD_NXP_LPCXPRESSO_1549) /* Disables pullups/pulldowns and disable digital mode */ Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 9, (IOCON_MODE_INACT | IOCON_ADMODE_EN)); /* Assign ADC1_1 to PIO0_9 via SWM (fixed pin) */ Chip_SWM_EnableFixedPin(SWM_FIXED_ADC1_1); #else #warning "No ADC setup for this example" #endif /* Initialize ROM API base address for ADC */ pAdcApi = LPC_ADCD_API; size_in_bytes = pAdcApi->adc_get_mem_size(); if (size_in_bytes / 4 > RAMBLOCK_H) { /* Adjust RAMBLOCK size in this case */ return 1; } /* ADC Handle Setup*/ adc_handle[0] = pAdcApi->adc_setup(LPC_ADC0_BASE, (uint8_t *) start_of_ram_block[0]); adc_handle[1] = pAdcApi->adc_setup(LPC_ADC1_BASE, (uint8_t *) start_of_ram_block[1]); /* ADC0 Config */ adc_cfg[0].system_clock = SystemCoreClock; /* System clock */ adc_cfg[0].adc_clock = 500000; /* ADC clock set to 500KHz for calibration*/ /* ADC1 Config */ adc_cfg[1].system_clock = SystemCoreClock; /* System clock */ adc_cfg[1].adc_clock = 500000; /* ADC clock set to 500KHz for calibration*/ pAdcApi->adc_calibration(adc_handle[0], &adc_cfg[0]); pAdcApi->adc_calibration(adc_handle[1], &adc_cfg[1]); /* ADC0 Config for Init */ adc_cfg[0].system_clock = SystemCoreClock; /* System clock */ adc_cfg[0].adc_clock = ADC_CLOCK_RATE; /* ADC clock */ adc_cfg[0].async_mode = 0; /* Synchronous mode */ adc_cfg[0].tenbit_mode = 0; /* 12 Bit ADC mode */ adc_cfg[0].lpwr_mode = 0; /* Disable low power mode */ adc_cfg[0].input_sel = ADC_INSEL_TS; adc_cfg[0].seqa_ctrl = (ADC_SEQ_CTRL_CHANSEL(0) | ADC_SEQ_CTRL_MODE_EOS); adc_cfg[0].channel_num = 1; /* Channel number is one higher than the maximum channel number used */ /* ADC1 Config for Init */ adc_cfg[1].system_clock = SystemCoreClock; /* System clock */ adc_cfg[1].adc_clock = ADC_CLOCK_RATE; /* ADC clock */ adc_cfg[1].async_mode = 0; /* Synchronous mode */ adc_cfg[1].tenbit_mode = 0; /* 12 Bit ADC mode */ adc_cfg[1].lpwr_mode = 0; /* Disable low power mode */ adc_cfg[1].seqa_ctrl = (ADC_SEQ_CTRL_CHANSEL(BOARD_ADC_CH) | ADC_SEQ_CTRL_MODE_EOS); adc_cfg[1].thrsel = 0; adc_cfg[1].thr0_low = ((1 * 0xFFF) / 4) << 4; adc_cfg[1].thr0_high = ((3 * 0xFFF) / 4) << 4; adc_cfg[1].thcmp_en = ADC_INTEN_CMP_ENABLE(ADC_INTEN_CMP_CROSSTH, BOARD_ADC_CH); adc_cfg[1].channel_num = BOARD_ADC_CH + 1; /* Channel number is one higher than the maximum channel number used */ pAdcApi->adc_init(adc_handle[0], &adc_cfg[0]); pAdcApi->adc_init(adc_handle[1], &adc_cfg[1]); /* When using ADC ROM API's lower the priority of ADC Sequence completion interrupt when compared to the threshold interrupt*/ NVIC_SetPriority(ADC1_SEQA_IRQn, 1); /* Enable related ADC NVIC interrupts */ NVIC_EnableIRQ(ADC0_SEQA_IRQn); NVIC_EnableIRQ(ADC1_SEQA_IRQn); NVIC_EnableIRQ(ADC1_THCMP); /* This example uses the periodic sysTick to manually trigger the ADC, but a periodic timer can be used in a match configuration to start an ADC sequence without software intervention. */ SysTick_Config(Chip_Clock_GetSysTickClockRate() / TICKRATE_HZ); /* Endless loop */ while (1) { /* Sleep until something happens */ __WFI(); if (threshold1Crossed) { threshold1Crossed = false; DEBUGSTR("********ADC1 threshold event********\r\n"); } /* Is a conversion sequence complete? */ if (sequence0Complete) { sequence0Complete = false; showValudeADC(LPC_ADC0); } if (sequence1Complete) { sequence1Complete = false; showValudeADC(LPC_ADC1); } } /* Should not run to here */ return 0; }
/** * @brief Main program body * @return int */ int main(void) { int stateCounter = 0; /* Setup SystemCoreClock and any needed board code */ SystemCoreClockUpdate(); Board_Init(); Board_LED_Set(0, false); /* Turn on the RTC 32K Oscillator by clearing the power down bit */ if ( !Is_Chip_SYSCTL_PowerUp(PDRUNCFG_PD_32K_OSC) ) { Chip_SYSCTL_PowerUp(PDRUNCFG_PD_32K_OSC); } /* Enable the RTC oscillator, oscillator rate can be determined by calling Chip_Clock_GetRTCOscRate() */ Chip_Clock_EnableRTCOsc(); /* Initialize RTC driver (enables RTC clocking) */ Chip_RTC_Init(LPC_RTC); /* Enable RTC as a peripheral wakeup event */ Chip_SYSCTL_EnableWakeup(STARTERP0_RTC); /* RTC reset */ Chip_RTC_Reset(LPC_RTC); /* Start RTC at a count of 0 when RTC is disabled. If the RTC is enabled, you need to disable it before setting the initial RTC count. */ Chip_RTC_Disable(LPC_RTC); Chip_RTC_SetCount(LPC_RTC, 0); /* Set a long alarm time so the interrupt won't trigger */ Chip_RTC_SetAlarm(LPC_RTC, 1000); /* Enable RTC and high resolution timer - this can be done in a single call with Chip_RTC_EnableOptions(LPC_RTC, (RTC_CTRL_RTC1KHZ_EN | RTC_CTRL_RTC_EN)); */ Chip_RTC_Enable1KHZ(LPC_RTC); Chip_RTC_Enable(LPC_RTC); /* Clear latched RTC interrupt statuses */ Chip_RTC_ClearStatus(LPC_RTC, (RTC_CTRL_OFD | RTC_CTRL_ALARM1HZ | RTC_CTRL_WAKE1KHZ)); /* Enable RTC interrupt */ NVIC_EnableIRQ(RTC_IRQn); /* Enable RTC alarm interrupt */ Chip_RTC_EnableWakeup(LPC_RTC, (RTC_CTRL_ALARMDPD_EN | RTC_CTRL_WAKEDPD_EN)); /* Sleep and do all the work in the RTC interrupt handler */ while (1) { DEBUGOUT("Tick number: %d, 1KHZ int:%d, alarm int:%d\r\n", stateCounter, rtcWake, rtcAlarm); rtcWake = rtcAlarm = false; /* 10 high resolution ticks that get slower each tick */ if (stateCounter < 10) { /* Wakeup in 300, 400, 500, etc. milliSeconds */ Chip_RTC_SetWake(LPC_RTC, (300 + (stateCounter * 100))); stateCounter++; } else { DEBUGOUT("Setting alarm to wake up in 4s\r\n"); /* Set alarm to wakeup in 4 seconds */ Chip_RTC_SetAlarm(LPC_RTC, Chip_RTC_GetCount(LPC_RTC) + 4); stateCounter = 0; } // FIXME - Use ROM API's to put chip to power down modes /* LPC_PWRD_API->power_mode_configure(PMU_DEEP_POWERDOWN, PDRUNCFG_PD_32K_OSC, 1); */ __WFI(); } return 0; }
/* Initialize the DAC peripheral */ void Chip_DAC_Init(LPC_DAC_T *pDAC) { Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_DAC_PD); Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_DAC); }