void imx_udc_init_ep(struct imx_udc_struct *imx_usb)
{
	int i, max, temp;
	struct imx_ep_struct *imx_ep;
	for (i = 0; i < IMX_USB_NB_EP; i++) {
		imx_ep = &imx_usb->imx_ep[i];
		switch (imx_ep->fifosize) {
		case 8:
			max = 0;
			break;
		case 16:
			max = 1;
			break;
		case 32:
			max = 2;
			break;
		case 64:
			max = 3;
			break;
		default:
			max = 1;
			break;
		}
		temp = (EP_DIR(imx_ep) << 7) | (max << 5)
			| (imx_ep->bmAttributes << 3);
		__raw_writel(temp, imx_usb->base + USB_EP_STAT(i));
		__raw_writel(temp | EPSTAT_FLUSH,
						imx_usb->base + USB_EP_STAT(i));
		D_INI(imx_usb->dev, "<%s> ep%d_stat %08x\n", __func__, i,
			__raw_readl(imx_usb->base + USB_EP_STAT(i)));
	}
}
void imx_udc_config(struct imx_udc_struct *imx_usb)
{
	u8 ep_conf[5];
	u8 i, j, cfg;
	struct imx_ep_struct *imx_ep;

	/*                        */
	do {} while (!(__raw_readl(imx_usb->base + USB_DADR) & DADR_CFG));

	/*                                              */
	for (j = 0; j < 5; j++) {
		i = (j == 2 ? imx_usb->imx_ep[0].fifosize : 0x00);
		__raw_writeb(i, imx_usb->base + USB_DDAT);
		do {} while (__raw_readl(imx_usb->base + USB_DADR) & DADR_BSY);
	}

	/*                                                 
                                                
  */
	for (cfg = 1; cfg < 3; cfg++) {
		for (i = 1; i < IMX_USB_NB_EP; i++) {
			imx_ep = &imx_usb->imx_ep[i];
			/*                   */
			ep_conf[0] = (i << 4) | (cfg << 2);
			/*                  */
			ep_conf[1] = (imx_ep->bmAttributes << 3) |
					(EP_DIR(imx_ep) << 2);
			/*                 */
			ep_conf[2] = imx_ep->fifosize;
			/*        */
			ep_conf[3] = 0xC0;
			/*         */
			ep_conf[4] = i;

			D_INI(imx_usb->dev,
				"<%s> ep%d_conf[%d]:"
				"[%02x-%02x-%02x-%02x-%02x]\n",
				__func__, i, cfg,
				ep_conf[0], ep_conf[1], ep_conf[2],
				ep_conf[3], ep_conf[4]);

			for (j = 0; j < 5; j++) {
				__raw_writeb(ep_conf[j],
					imx_usb->base + USB_DDAT);
				do {} while (__raw_readl(imx_usb->base
								+ USB_DADR)
					& DADR_BSY);
			}
		}
	}

	/*                       */
	do {} while (__raw_readl(imx_usb->base + USB_DADR) & DADR_CFG);
}
void imx_udc_init_fifo(struct imx_udc_struct *imx_usb)
{
	int i, temp;
	struct imx_ep_struct *imx_ep;
	for (i = 0; i < IMX_USB_NB_EP; i++) {
		imx_ep = &imx_usb->imx_ep[i];

		/*              */
		temp = EP_DIR(imx_ep) ? 0x0B000000 : 0x0F000000;
		__raw_writel(temp, imx_usb->base + USB_EP_FCTRL(i));
		D_INI(imx_usb->dev, "<%s> ep%d_fctrl %08x\n", __func__, i,
			__raw_readl(imx_usb->base + USB_EP_FCTRL(i)));

		/*            */
		temp = (i ? imx_ep->fifosize / 2 : 0);
		__raw_writel(temp, imx_usb->base + USB_EP_FALRM(i));
		D_INI(imx_usb->dev, "<%s> ep%d_falrm %08x\n", __func__, i,
			__raw_readl(imx_usb->base + USB_EP_FALRM(i)));
	}
}
void imx_udc_config(struct imx_udc_struct *imx_usb)
{
	u8 ep_conf[5];
	u8 i, j, cfg;
	struct imx_ep_struct *imx_ep;

	/* wait CFG bit to assert */
	do {} while (!(__raw_readl(imx_usb->base + USB_DADR) & DADR_CFG));

	/* Download the endpoint buffer for endpoint 0. */
	for (j = 0; j < 5; j++) {
		i = (j == 2 ? imx_usb->imx_ep[0].fifosize : 0x00);
		__raw_writeb(i, imx_usb->base + USB_DDAT);
		do {} while (__raw_readl(imx_usb->base + USB_DADR) & DADR_BSY);
	}

	/* Download the endpoint buffers for endpoints 1-5.
	 * We specify two configurations, one interface
	 */
	for (cfg = 1; cfg < 3; cfg++) {
		for (i = 1; i < IMX_USB_NB_EP; i++) {
			imx_ep = &imx_usb->imx_ep[i];
			/* EP no | Config no */
			ep_conf[0] = (i << 4) | (cfg << 2);
			/* Type | Direction */
			ep_conf[1] = (imx_ep->bmAttributes << 3) |
					(EP_DIR(imx_ep) << 2);
			/* Max packet size */
			ep_conf[2] = imx_ep->fifosize;
			/* TRXTYP */
			ep_conf[3] = 0xC0;
			/* FIFO no */
			ep_conf[4] = i;

			D_INI(imx_usb->dev,
				"<%s> ep%d_conf[%d]:"
				"[%02x-%02x-%02x-%02x-%02x]\n",
				__func__, i, cfg,
				ep_conf[0], ep_conf[1], ep_conf[2],
				ep_conf[3], ep_conf[4]);

			for (j = 0; j < 5; j++) {
				__raw_writeb(ep_conf[j],
					imx_usb->base + USB_DDAT);
				do {} while (__raw_readl(imx_usb->base
								+ USB_DADR)
					& DADR_BSY);
			}
		}
	}

	/* wait CFG bit to clear */
	do {} while (__raw_readl(imx_usb->base + USB_DADR) & DADR_CFG);
}