VOID NICInitRT3070RFRegisters(IN PRTMP_ADAPTER pAd)
{
INT i;
UCHAR RFValue;
/*
Driver must read EEPROM to get RfIcType before initial RF registers
Initialize RF register to default value
*/
if (IS_RT3070(pAd) || IS_RT3071(pAd))
{
/*
Init RF calibration
Driver should toggle RF R30 bit7 before init RF registers
*/
UINT8 RfReg = 0;
UINT32 data;
RT30xxReadRFRegister(pAd, RF_R30, (PUCHAR)&RfReg);
RfReg |= 0x80;
RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg);
RTMPusecDelay(1000);
RfReg &= 0x7F;
RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg);
/* Initialize RF register to default value */
for (i = 0; i < NUM_RF_3020_REG_PARMS; i++)
{
RT30xxWriteRFRegister(pAd, RT3020_RFRegTable[i].Register, RT3020_RFRegTable[i].Value);
}
RT30xxWriteRFRegister(pAd, RF_R31, 0x14);
/* add by johnli */
if (IS_RT3070(pAd))
{
/*
The DAC issue(LDO_CFG0) has been fixed in RT3070(F).
The voltage raising patch is no longer needed for RT3070(F)
*/
if ((pAd->MACVersion & 0xffff) < 0x0201)
{
/* Update MAC 0x05D4 from 01xxxxxx to 0Dxxxxxx (voltage 1.2V to 1.35V) for RT3070 to improve yield rate */
RTUSBReadMACRegister(pAd, LDO_CFG0, &data);
data = ((data & 0xF0FFFFFF) | 0x0D000000);
RTUSBWriteMACRegister(pAd, LDO_CFG0, data);
}
}
else if (IS_RT3071(pAd))
{
/* Driver should set RF R6 bit6 on before init RF registers */
RT30xxReadRFRegister(pAd, RF_R06, (PUCHAR)&RfReg);
RfReg |= 0x40;
RT30xxWriteRFRegister(pAd, RF_R06, (UCHAR)RfReg);
/* RT3071 version E has fixed this issue */
if ((pAd->NicConfig2.field.DACTestBit == 1) && ((pAd->MACVersion & 0xffff) < 0x0211))
{
/* patch tx EVM issue temporarily */
RTUSBReadMACRegister(pAd, LDO_CFG0, &data);
data = ((data & 0xE0FFFFFF) | 0x0D000000);
RTUSBWriteMACRegister(pAd, LDO_CFG0, data);
}
else
{
RTMP_IO_READ32(pAd, LDO_CFG0, &data);
data = ((data & 0xE0FFFFFF) | 0x01000000);
RTMP_IO_WRITE32(pAd, LDO_CFG0, data);
}
/* patch LNA_PE_G1 failed issue */
RTUSBReadMACRegister(pAd, GPIO_SWITCH, &data);
data &= ~(0x20);
RTUSBWriteMACRegister(pAd, GPIO_SWITCH, data);
}
/* For RF filter Calibration */
RTMPFilterCalibration(pAd);
/*
Initialize RF R27 register, set RF R27 must be behind RTMPFilterCalibration()
TX to RX IQ glitch(RF_R27) has been fixed in RT3070(F).
Raising RF voltage is no longer needed for RT3070(F)
*/
if ((IS_RT3070(pAd)) && ((pAd->MACVersion & 0xffff) < 0x0201))
{
RT30xxWriteRFRegister(pAd, RF_R27, 0x3);
}
else if ((IS_RT3071(pAd)) && ((pAd->MACVersion & 0xffff) < 0x0211))
{
RT30xxWriteRFRegister(pAd, RF_R27, 0x3);
}
/* set led open drain enable */
RTUSBReadMACRegister(pAd, OPT_14, &data);
data |= 0x01;
RTUSBWriteMACRegister(pAd, OPT_14, data);
if (IS_RT3071(pAd))
{
/* RF power sequence setup, load RF normal operation-mode setup */
RT30xxLoadRFNormalModeSetup(pAd);
}
else if (IS_RT3070(pAd))
{
/* TX_LO1_en, RF R17 register Bit 3 to 0 */
RT30xxReadRFRegister(pAd, RF_R17, &RFValue);
RFValue &= (~0x08);
/* to fix rx long range issue */
if (pAd->NicConfig2.field.ExternalLNAForG == 0)
{
if ((IS_RT3071(pAd) && ((pAd->MACVersion & 0xffff) >= 0x0211)) || IS_RT3070(pAd))
{
RFValue |= 0x20;
}
}
/* set RF_R17_bit[2:0] equal to EEPROM setting at 0x48h */
if (pAd->TxMixerGain24G >= 1)
{
RFValue &= (~0x7); /* clean bit [2:0] */
RFValue |= pAd->TxMixerGain24G;
}
RT30xxWriteRFRegister(pAd, RF_R17, RFValue);
/* add by johnli, reset RF_R27 when interface down & up to fix throughput problem */
/* LDORF_VC, RF R27 register Bit 2 to 0 */
RT30xxReadRFRegister(pAd, RF_R27, &RFValue);
/*
TX to RX IQ glitch(RF_R27) has been fixed in RT3070(F).
Raising RF voltage is no longer needed for RT3070(F)
*/
if ((pAd->MACVersion & 0xffff) < 0x0201)
RFValue = (RFValue & (~0x77)) | 0x3;
else
RFValue = (RFValue & (~0x77));
RT30xxWriteRFRegister(pAd, RF_R27, RFValue);
/* end johnli */
}
}
}
/*
==========================================================================
Description:
Reverse RF sleep-mode setup
==========================================================================
*/
VOID RT30xxReverseRFSleepModeSetup(
IN PRTMP_ADAPTER pAd,
IN BOOLEAN FlgIsInitState)
{
UCHAR RFValue;
UINT32 MACValue;
if(!IS_RT3572(pAd))
{
{
/* RF_BLOCK_en, RF R1 register Bit 0 to 1*/
RT30xxReadRFRegister(pAd, RF_R01, &RFValue);
RFValue |= 0x01;
RT30xxWriteRFRegister(pAd, RF_R01, RFValue);
/* VCO_IC, RF R7 register Bit 4 & Bit 5 to 1*/
RT30xxReadRFRegister(pAd, RF_R07, &RFValue);
RFValue |= 0x20;
RT30xxWriteRFRegister(pAd, RF_R07, RFValue);
/* Idoh, RF R9 register Bit 1, Bit 2 & Bit 3 to 1*/
RT30xxReadRFRegister(pAd, RF_R09, &RFValue);
RFValue |= 0x0E;
RT30xxWriteRFRegister(pAd, RF_R09, RFValue);
/* RX_CTB_en, RF R21 register Bit 7 to 1*/
RT30xxReadRFRegister(pAd, RF_R21, &RFValue);
RFValue |= 0x80;
RT30xxWriteRFRegister(pAd, RF_R21, RFValue);
}
}
if (IS_RT3090(pAd) || /* IS_RT3090 including RT309x and RT3071/72*/
IS_RT3572(pAd) ||
IS_RT3390(pAd) ||
IS_RT3593(pAd) ||
(IS_RT3070(pAd) && ((pAd->MACVersion & 0xffff) < 0x0201)))
{
if ((!IS_RT3572(pAd)) && (!IS_RT3593(pAd)))
{
RT30xxReadRFRegister(pAd, RF_R27, &RFValue);
if ((pAd->MACVersion & 0xffff) < 0x0211)
RFValue = (RFValue & (~0x77)) | 0x3;
else
RFValue = (RFValue & (~0x77));
RT30xxWriteRFRegister(pAd, RF_R27, RFValue);
}
/* RT3071 version E has fixed this issue*/
if ((pAd->NicConfig2.field.DACTestBit == 1) && ((pAd->MACVersion & 0xffff) < 0x0211))
{
/* patch tx EVM issue temporarily*/
RTMP_IO_READ32(pAd, LDO_CFG0, &MACValue);
MACValue = ((MACValue & 0xE0FFFFFF) | 0x0D000000);
RTMP_IO_WRITE32(pAd, LDO_CFG0, MACValue);
}
else if ((!IS_RT3090(pAd) && !IS_RT3593(pAd)))
{
RTMP_IO_READ32(pAd, LDO_CFG0, &MACValue);
MACValue = ((MACValue & 0xE0FFFFFF) | 0x01000000);
RTMP_IO_WRITE32(pAd, LDO_CFG0, MACValue);
}
}
if(IS_RT3572(pAd))
RT30xxWriteRFRegister(pAd, RF_R08, 0x80);
}
VOID RT30xx_ChipSwitchChannel(
IN PRTMP_ADAPTER pAd,
IN UCHAR Channel,
IN BOOLEAN bScan)
{
CHAR TxPwer = 0, TxPwer2 = DEFAULT_RF_TX_POWER; /*Bbp94 = BBPR94_DEFAULT, TxPwer2 = DEFAULT_RF_TX_POWER;*/
UCHAR index;
UINT32 Value = 0; /*BbpReg, Value;*/
UCHAR RFValue;
UINT32 i = 0;
//UCHAR Tx0FinePowerCtrl = 0, Tx1FinePowerCtrl = 0;
//BBP_R109_STRUC BbpR109 = {{0}};
i = i; /* avoid compile warning */
RFValue = 0;
/* Search Tx power value*/
/*
We can't use ChannelList to search channel, since some central channl's txpowr doesn't list
in ChannelList, so use TxPower array instead.
*/
for (index = 0; index < MAX_NUM_OF_CHANNELS; index++)
{
if (Channel == pAd->TxPower[index].Channel)
{
TxPwer = pAd->TxPower[index].Power;
TxPwer2 = pAd->TxPower[index].Power2;
#ifdef RT33xx
#endif /* RT33xx */
break;
}
}
if (index == MAX_NUM_OF_CHANNELS)
{
DBGPRINT(RT_DEBUG_ERROR, ("AsicSwitchChannel: Can't find the Channel#%d \n", Channel));
}
#ifdef RT30xx
/* The RF programming sequence is difference between 3xxx and 2xxx*/
if ((IS_RT30xx(pAd)) &&
((pAd->RfIcType == RFIC_3020) || (pAd->RfIcType == RFIC_2020) ||
(pAd->RfIcType == RFIC_3021) || (pAd->RfIcType == RFIC_3022) || (pAd->RfIcType == RFIC_3320)))
{
/* modify by WY for Read RF Reg. error */
UCHAR calRFValue;
for (index = 0; index < NUM_OF_3020_CHNL; index++)
{
if (Channel == FreqItems3020[index].Channel)
{
/* Programming channel parameters*/
RT30xxWriteRFRegister(pAd, RF_R02, FreqItems3020[index].N);
/*
RT3370/RT3390 RF version is 0x3320 RF_R3 [7:4] is not reserved bits
RF_R3[6:4] (pa1_bc_cck) : PA1 Bias CCK
RF_R3[7] (pa2_cc_cck) : PA2 Cascode Bias CCK
*/
RT30xxReadRFRegister(pAd, RF_R03, (PUCHAR)(&RFValue));
RFValue = (RFValue & 0xF0) | (FreqItems3020[index].K & ~0xF0); /* <bit 3:0>:K<bit 3:0>*/
RT30xxWriteRFRegister(pAd, RF_R03, RFValue);
RT30xxReadRFRegister(pAd, RF_R06, &RFValue);
RFValue = (RFValue & 0xFC) | FreqItems3020[index].R;
RT30xxWriteRFRegister(pAd, RF_R06, RFValue);
/* Set Tx0 Power*/
RT30xxReadRFRegister(pAd, RF_R12, &RFValue);
RFValue = (RFValue & 0xE0) | TxPwer;
RT30xxWriteRFRegister(pAd, RF_R12, RFValue);
/*Set Tx1 Power*/
RT30xxReadRFRegister(pAd, RF_R13, &RFValue);
RFValue = (RFValue & 0xE0) | TxPwer2;
RT30xxWriteRFRegister(pAd, RF_R13, RFValue);
#ifdef RT33xx
#endif /* RT33xx */
/* Tx/Rx Stream setting*/
RT30xxReadRFRegister(pAd, RF_R01, &RFValue);
RFValue &= 0x03; /*clear bit[7~2]*/
if (pAd->Antenna.field.TxPath == 1)
RFValue |= 0xA0;
else if (pAd->Antenna.field.TxPath == 2)
RFValue |= 0x80;
if (pAd->Antenna.field.RxPath == 1)
RFValue |= 0x50;
else if (pAd->Antenna.field.RxPath == 2)
RFValue |= 0x40;
RT30xxWriteRFRegister(pAd, RF_R01, RFValue);
RT30xxReadRFRegister(pAd, RF_R30, (PUCHAR)&RFValue);
RFValue |= 0x80;
RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RFValue);
RTMPusecDelay(1000);
RFValue &= 0x7F;
RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RFValue);
/* Set RF offset*/
RT30xxReadRFRegister(pAd, RF_R23, &RFValue);
RFValue = (RFValue & 0x80) | pAd->RfFreqOffset;
RT30xxWriteRFRegister(pAd, RF_R23, RFValue);
/* Set BW*/
if (!bScan && (pAd->CommonCfg.BBPCurrentBW == BW_40))
{
calRFValue = pAd->Mlme.CaliBW40RfR24;
}
else
{
calRFValue = pAd->Mlme.CaliBW20RfR24;
}
/*
RT3370/RT3390 RF version is 0x3320 RF_R24 [7:6] is not reserved bits
RF_R24[6] (BB_Rx1_out_en) : enable baseband output and ADC input
RF_R24[7] (BB_Tx1_out_en) : enable DAC output or baseband input
*/
RT30xxReadRFRegister(pAd, RF_R24, (PUCHAR)(&RFValue));
calRFValue = (RFValue & 0xC0) | (calRFValue & ~0xC0); /* <bit 5>:tx_h20M<bit 5> and <bit 4:0>:tx_agc_fc<bit 4:0>*/
RT30xxWriteRFRegister(pAd, RF_R24, calRFValue);
/*
RT3370/RT3390 RF version is 0x3320 RF_R31 [7:6] is not reserved bits
RF_R31[4:0] (rx_agc_fc) : capacitor control in baseband filter
RF_R31[5] (rx_ h20M) : rx_ h20M: 0=10 MHz and 1=20MHz
RF_R31[7:6] (drv_bc_cck) : Driver Bias CCK
*/
/* Set BW*/
if (IS_RT3390(pAd)) /* RT3390 has different AGC for Tx and Rx*/
{
if (!bScan && (pAd->CommonCfg.BBPCurrentBW == BW_40))
{
calRFValue = pAd->Mlme.CaliBW40RfR31;
}
else
{
calRFValue = pAd->Mlme.CaliBW20RfR31;
}
}
RT30xxReadRFRegister(pAd, RF_R31, (PUCHAR)(&RFValue));
calRFValue = (RFValue & 0xC0) | (calRFValue & ~0xC0); /* <bit 5>:rx_h20M<bit 5> and <bit 4:0>:rx_agc_fc<bit 4:0>*/
RT30xxWriteRFRegister(pAd, RF_R31, calRFValue);
/* Enable RF tuning*/
RT30xxReadRFRegister(pAd, RF_R07, &RFValue);
RFValue = RFValue | 0x1;
RT30xxWriteRFRegister(pAd, RF_R07, RFValue);
RT30xxReadRFRegister(pAd, RF_R30, (PUCHAR)&RFValue);
RFValue |= 0x80;
RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RFValue);
RTMPusecDelay(1000);
RFValue &= 0x7F;
RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RFValue);
/* latch channel for future usage.*/
pAd->LatchRfRegs.Channel = Channel;
DBGPRINT(RT_DEBUG_TRACE, ("SwitchChannel#%d(RF=%d, Pwr0=%d, Pwr1=%d, %dT), N=0x%02X, K=0x%02X, R=0x%02X\n",
Channel,
pAd->RfIcType,
TxPwer,
TxPwer2,
pAd->Antenna.field.TxPath,
FreqItems3020[index].N,
FreqItems3020[index].K,
FreqItems3020[index].R));
break;
}
}
}
else
#endif /* RT30xx */
{
switch (pAd->RfIcType)
{
default:
DBGPRINT(RT_DEBUG_TRACE, ("SwitchChannel#%d : unknown RFIC=%d\n",
Channel, pAd->RfIcType));
break;
}
}
/* Change BBP setting during siwtch from a->g, g->a*/
if (Channel <= 14)
{
ULONG TxPinCfg = 0x00050F0A;/*Gary 2007/08/09 0x050A0A*/
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R62, (0x37 - GET_LNA_GAIN(pAd)));
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R63, (0x37 - GET_LNA_GAIN(pAd)));
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R64, (0x37 - GET_LNA_GAIN(pAd)));
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R86, 0);/*(0x44 - GET_LNA_GAIN(pAd))); According the Rory's suggestion to solve the middle range issue.*/
/* Rx High power VGA offset for LNA select*/
{
if (pAd->NicConfig2.field.ExternalLNAForG)
{
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R82, 0x62);
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R75, 0x46);
}
else
{
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R82, 0x84);
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R75, 0x50);
}
}
/* 5G band selection PIN, bit1 and bit2 are complement*/
RTMP_IO_READ32(pAd, TX_BAND_CFG, &Value);
Value &= (~0x6);
Value |= (0x04);
RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Value);
{
/* Turn off unused PA or LNA when only 1T or 1R*/
if (pAd->Antenna.field.TxPath == 1)
{
TxPinCfg &= 0xFFFFFFF3;
}
if (pAd->Antenna.field.RxPath == 1)
{
TxPinCfg &= 0xFFFFF3FF;
}
}
RTMP_IO_WRITE32(pAd, TX_PIN_CFG, TxPinCfg);
}
else
{
ULONG TxPinCfg = 0x00050F05;/*Gary 2007/8/9 0x050505*/
UINT8 bbpValue;
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R62, (0x37 - GET_LNA_GAIN(pAd)));
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R63, (0x37 - GET_LNA_GAIN(pAd)));
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R64, (0x37 - GET_LNA_GAIN(pAd)));
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R86, 0);/*(0x44 - GET_LNA_GAIN(pAd))); According the Rory's suggestion to solve the middle range issue.*/
/* Set the BBP_R82 value here */
bbpValue = 0xF2;
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R82, bbpValue);
/* Rx High power VGA offset for LNA select*/
if (pAd->NicConfig2.field.ExternalLNAForA)
{
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R75, 0x46);
}
else
{
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R75, 0x50);
}
/* 5G band selection PIN, bit1 and bit2 are complement*/
RTMP_IO_READ32(pAd, TX_BAND_CFG, &Value);
Value &= (~0x6);
Value |= (0x02);
RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Value);
/* Turn off unused PA or LNA when only 1T or 1R*/
{
/* Turn off unused PA or LNA when only 1T or 1R*/
if (pAd->Antenna.field.TxPath == 1)
{
TxPinCfg &= 0xFFFFFFF3;
}
if (pAd->Antenna.field.RxPath == 1)
{
TxPinCfg &= 0xFFFFF3FF;
}
}
RTMP_IO_WRITE32(pAd, TX_PIN_CFG, TxPinCfg);
}
/* R66 should be set according to Channel and use 20MHz when scanning*/
if (bScan)
RTMPSetAGCInitValue(pAd, BW_20);
else
RTMPSetAGCInitValue(pAd, pAd->CommonCfg.BBPCurrentBW);
/*
On 11A, We should delay and wait RF/BBP to be stable
and the appropriate time should be 1000 micro seconds
2005/06/05 - On 11G, We also need this delay time. Otherwise it's difficult to pass the WHQL.
*/
RTMPusecDelay(1000);
}
unsigned int SetHWAntennaDivsersity(
IN PRTMP_ADAPTER pAd,
IN unsigned char Enable)
{
if (Enable == TRUE)
{
unsigned char BBPValue = 0, RFValue = 0;
unsigned short value;
// RF_R29 bit7:6
RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_GAIN, value);
RT30xxReadRFRegister(pAd, RF_R29, &RFValue);
RFValue &= 0x3f; // clear bit7:6
RFValue |= (value << 6);
RT30xxWriteRFRegister(pAd, RF_R29, RFValue);
// BBP_R47 bit7=1
RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R47, &BBPValue);
BBPValue |= 0x80;
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R47, BBPValue);
BBPValue = 0xbe;
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R150, BBPValue);
BBPValue = 0xb0;
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R151, BBPValue);
BBPValue = 0x23;
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R152, BBPValue);
BBPValue = 0x3a;
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R153, BBPValue);
BBPValue = 0x10;
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R154, BBPValue);
BBPValue = 0x3b;
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R155, BBPValue);
BBPValue = 0x04;
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R253, BBPValue);
DBGPRINT(RT_DEBUG_TRACE, ("HwAnDi> Enable!\n"));
}
else
{
unsigned char BBPValue = 0;
/*
main antenna: BBP_R152 bit7=1
aux antenna: BBP_R152 bit7=0
*/
if (pAd->FixDefaultAntenna == 0)
{
/* fix to main antenna */
/* do not care BBP R153, R155, R253 */
BBPValue = 0x3e;
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R150, BBPValue);
BBPValue = 0x30;
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R151, BBPValue);
BBPValue = 0x23;
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R152, BBPValue);
BBPValue = 0x00;
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R154, BBPValue);
}
else
{
/* fix to aux antenna */
/* do not care BBP R153, R155, R253 */
BBPValue = 0x3e;
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R150, BBPValue);
BBPValue = 0x30;
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R151, BBPValue);
BBPValue = 0xa3;
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R152, BBPValue);
BBPValue = 0x00;
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R154, BBPValue);
}
DBGPRINT(RT_DEBUG_TRACE, ("HwAnDi> Disable!\n"));
}
return 0;
}
/*
========================================================================
Routine Description:
For RF filter calibration purpose
Arguments:
pAd Pointer to our adapter
Return Value:
None
IRQL = PASSIVE_LEVEL
========================================================================
*/
VOID RTMPFilterCalibration(
IN PRTMP_ADAPTER pAd)
{
UCHAR R55x = 0, value, FilterTarget = 0x1E, BBPValue=0;
UINT loop = 0, count = 0, loopcnt = 0, ReTry = 0;
UCHAR RF_R24_Value = 0;
/* Give bbp filter initial value */
pAd->CaliBW20RfR24 = 0x1F;
pAd->CaliBW40RfR24 = 0x2F; /* Bit[5] must be 1 for BW 40 */
do
{
if (loop == 1) /*BandWidth = 40 MHz*/
{
/* Write 0x27 to RF_R24 to program filter*/
RT30xxReadRFRegister(pAd, RF_R24, (PUCHAR)(&RF_R24_Value));
RF_R24_Value = (RF_R24_Value & 0xC0) | 0x27; /* <bit 5>:tx_h20M<bit 5> and <bit 4:0>:tx_agc_fc<bit 4:0>*/
RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
if (IS_RT3071(pAd) || IS_RT3572(pAd))
FilterTarget = 0x15;
else
FilterTarget = 0x19;
/* when calibrate BW40, BBP mask must set to BW40.*/
RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue);
BBPValue&= (~0x18);
BBPValue|= (0x10);
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue);
/* set to BW40*/
RT30xxReadRFRegister(pAd, RF_R31, &value);
value |= 0x20;
RT30xxWriteRFRegister(pAd, RF_R31, value);
}
else /*BandWidth = 20 MHz*/
{
/* Write 0x07 to RF_R24 to program filter*/
RT30xxReadRFRegister(pAd, RF_R24, (PUCHAR)(&RF_R24_Value));
RF_R24_Value = (RF_R24_Value & 0xC0) | 0x07; /* <bit 5>:tx_h20M<bit 5> and <bit 4:0>:tx_agc_fc<bit 4:0>*/
RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
if (IS_RT3071(pAd) || IS_RT3572(pAd))
FilterTarget = 0x13;
else
FilterTarget = 0x16;
/*set to BW20*/
RT30xxReadRFRegister(pAd, RF_R31, &value);
value &= (~0x20);
RT30xxWriteRFRegister(pAd, RF_R31, value);
}
/* Write 0x01 to RF_R22 to enable baseband loopback mode*/
RT30xxReadRFRegister(pAd, RF_R22, &value);
value |= 0x01;
RT30xxWriteRFRegister(pAd, RF_R22, value);
/* Write 0x00 to BBP_R24 to set power & frequency of passband test tone*/
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0);
do
{
/* Write 0x90 to BBP_R25 to transmit test tone*/
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R25, 0x90);
RTMPusecDelay(1000);
/* Read BBP_R55[6:0] for received power, set R55x = BBP_R55[6:0]*/
RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R55, &value);
R55x = value & 0xFF;
} while ((ReTry++ < 100) && (R55x == 0));
/* Write 0x06 to BBP_R24 to set power & frequency of stopband test tone*/
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0x06);
while(TRUE)
{
/* Write 0x90 to BBP_R25 to transmit test tone*/
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R25, 0x90);
/*We need to wait for calibration*/
RTMPusecDelay(1000);
RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R55, &value);
value &= 0xFF;
if ((R55x - value) < FilterTarget)
{
RF_R24_Value ++;
}
else if ((R55x - value) == FilterTarget)
{
RF_R24_Value ++;
count ++;
}
else
{
break;
}
/* prevent infinite loop cause driver hang.*/
if (loopcnt++ > 100)
{
DBGPRINT(RT_DEBUG_ERROR, "RTMPFilterCalibration - can't find a valid value, loopcnt=%d stop calibrating", loopcnt);
break;
}
/*Write RF_R24 to program filter*/
RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
}
if (count > 0)
{
RF_R24_Value = RF_R24_Value - ((count) ? (1) : (0));
}
/* Store for future usage*/
if (loopcnt < 100)
{
if (loop++ == 0)
{
/*BandWidth = 20 MHz*/
pAd->CaliBW20RfR24 = (UCHAR)RF_R24_Value;
}
else
{
/*BandWidth = 40 MHz*/
pAd->CaliBW40RfR24 = (UCHAR)RF_R24_Value;
break;
}
}
else
break;
RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
/* reset count*/
count = 0;
} while(TRUE);
/* Set back to initial state*/
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0);
RT30xxReadRFRegister(pAd, RF_R22, &value);
value &= ~(0x01);
RT30xxWriteRFRegister(pAd, RF_R22, value);
/* set BBP back to BW20*/
RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue);
BBPValue&= (~0x18);
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue);
DBGPRINT(RT_DEBUG_TRACE, "RTMPFilterCalibration - CaliBW20RfR24=0x%x, CaliBW40RfR24=0x%x\n", pAd->CaliBW20RfR24, pAd->CaliBW40RfR24);
}
VOID NICInitRT3390RFRegisters(IN PRTMP_ADAPTER pAd)
{
INT i;
UINT8 RfReg = 0;
UINT32 data;
/*CHAR bbpreg;*/
// Driver must read EEPROM to get RfIcType before initial RF registers
// Initialize RF register to default value
// Init RF calibration
// Driver should toggle RF R30 bit7 before init RF registers
RT30xxReadRFRegister(pAd, RF_R30, (PUCHAR)&RfReg);
RfReg |= 0x80;
RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg);
RTMPusecDelay(1000);
RfReg &= 0x7F;
RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg);
// init R24, R31
// RT30xxWriteRFRegister(pAd, RF_R24, 0x0F);
// RT30xxWriteRFRegister(pAd, RF_R31, 0x0F);
if ((pAd->NicConfig2.field.DACTestBit == 1) && ((pAd->MACVersion & 0xffff) < 0x0211))
{
RTMP_IO_READ32(pAd, LDO_CFG0, &data);
data = ((data & 0xE0FFFFFF) | 0x0D000000);
RTMP_IO_WRITE32(pAd, LDO_CFG0, data);
}
else
{
RTMP_IO_READ32(pAd, LDO_CFG0, &data);
data = ((data & 0xE0FFFFFF) | 0x0D000000);
RTMP_IO_WRITE32(pAd, LDO_CFG0, data);
RTMPusecDelay(1000);
data = ((data & 0xE0FFFFFF) | 0x01000000);
RTMP_IO_WRITE32(pAd, LDO_CFG0, data);
}
if (IS_RT3071(pAd) || IS_RT3390(pAd))
{
RTMP_IO_READ32(pAd, GPIO_SWITCH, &data);
data &= ~(0x20);
RTMP_IO_WRITE32(pAd, GPIO_SWITCH, data);
// RF registers initialization
for (i = 0; i < NUM_RF_3320_REG_PARMS; i++)
{
RT30xxWriteRFRegister(pAd, RF3320_RFRegTable[i].Register, RF3320_RFRegTable[i].Value);
}
// Driver should set RF R6 bit6 on before calibration
RT30xxReadRFRegister(pAd, RF_R06, (PUCHAR)&RfReg);
RfReg |= 0x40;
RT30xxWriteRFRegister(pAd, RF_R06, (UCHAR)RfReg);
if (IS_RT3390(pAd)) // Disable RF filter calibration
{
// Disable RF filter calibration
pAd->Mlme.CaliBW20RfR24 = BW20RFR24;
pAd->Mlme.CaliBW40RfR24 = BW40RFR24;
pAd->Mlme.CaliBW20RfR31 = BW20RFR31;
pAd->Mlme.CaliBW40RfR31 = BW40RFR31;
}
else
{
//For RF filter Calibration
//RT33xxFilterCalibration(pAd);
}
// Initialize RF R27 register, set RF R27 must be behind RTMPFilterCalibration()
if ((pAd->MACVersion & 0xffff) < 0x0211)
RT30xxWriteRFRegister(pAd, RF_R27, 0x3);
// set led open drain enable
RTMP_IO_READ32(pAd, OPT_14, &data);
data |= 0x01;
RTMP_IO_WRITE32(pAd, OPT_14, data);
// Initialize RT3090 serial MAc registers which is different from RT2860 serial
RTMP_IO_WRITE32(pAd, TX_SW_CFG1, 0);
// RT3071 version E has fixed this issue
if ((pAd->MACVersion & 0xffff) < 0x0211)
{
if (pAd->NicConfig2.field.DACTestBit == 1)
{
RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x1F); // To fix throughput drop drastically
}
else
{
RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x0F); // To fix throughput drop drastically
}
}
else
{
RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x0);
}
// set default antenna as main
if (pAd->RfIcType == RFIC_3320)
AsicSetRxAnt(pAd, pAd->RxAnt.Pair1PrimaryRxAnt);
/*
From RT3071 Power Sequence v1.1 document, the Normal Operation Setting Registers as follow :
BBP_R138 / RF_R1 / RF_R15 / RF_R17 / RF_R20 / RF_R21.
*/
// RF power sequence setup, load RF normal operation-mode setup
RT33xxLoadRFNormalModeSetup(pAd);
}
}
UINT32 SetHWAntennaDivsersity(
IN PRTMP_ADAPTER pAd,
IN BOOLEAN Enable)
{
if (Enable == TRUE)
{
UINT8 BBPValue = 0, RFValue = 0;
USHORT value;
// RF_R29 bit7:6
RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_GAIN, value);
RT30xxReadRFRegister(pAd, RF_R29, &RFValue);
RFValue &= 0x3f; // clear bit7:6
RFValue |= (value << 6);
RT30xxWriteRFRegister(pAd, RF_R29, RFValue);
// BBP_R47 bit7=1
RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R47, &BBPValue);
BBPValue |= 0x80;
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R47, BBPValue);
BBPValue = 0xbe;
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R150, BBPValue);
BBPValue = 0xb0;
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R151, BBPValue);
BBPValue = 0x23;
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R152, BBPValue);
BBPValue = 0x3a;
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R153, BBPValue);
BBPValue = 0x10;
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R154, BBPValue);
BBPValue = 0x3b;
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R155, BBPValue);
BBPValue = 0x04;
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R253, BBPValue);
MTWF_LOG(DBG_CAT_ALL, DBG_SUBCAT_ALL, DBG_LVL_TRACE, ("HwAnDi> Enable!\n"));
}
else
{
UINT8 BBPValue = 0;
/*
main antenna: BBP_R152 bit7=1
aux antenna: BBP_R152 bit7=0
*/
if (pAd->FixDefaultAntenna == 0)
{
/* fix to main antenna */
/* do not care BBP R153, R155, R253 */
BBPValue = 0x3e;
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R150, BBPValue);
BBPValue = 0x30;
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R151, BBPValue);
BBPValue = 0x23;
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R152, BBPValue);
BBPValue = 0x00;
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R154, BBPValue);
}
else
{
/* fix to aux antenna */
/* do not care BBP R153, R155, R253 */
BBPValue = 0x3e;
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R150, BBPValue);
BBPValue = 0x30;
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R151, BBPValue);
BBPValue = 0xa3;
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R152, BBPValue);
BBPValue = 0x00;
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R154, BBPValue);
}
MTWF_LOG(DBG_CAT_ALL, DBG_SUBCAT_ALL, DBG_LVL_TRACE, ("HwAnDi> Disable!\n"));
}
return 0;
}
/*
==========================================================================
Description:
Load RF normal operation-mode setup
==========================================================================
*/
VOID RT30xxLoadRFNormalModeSetup(
IN PRTMP_ADAPTER pAd)
{
UCHAR RFValue, bbpreg = 0;
#ifdef RT3593
if (IS_RT3593(pAd))
{
// improve power consumption
RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R138, &bbpreg);
if (pAd->Antenna.field.TxPath == 1)
{
// turn off tx DAC_1 & DAC_2
bbpreg = (bbpreg | 0x60);
}
else if (pAd->Antenna.field.TxPath == 2)
{
// turn off tx DAC_2
bbpreg = (bbpreg | 0x40);
}
if (pAd->Antenna.field.RxPath == 1)
{
// turn off rx ADC_1 & ADC_2
bbpreg &= (~0x6);
}
else if (pAd->Antenna.field.RxPath == 2)
{
// turn off rx ADC_2
bbpreg &= (~0x4);
}
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R138, bbpreg);
}
else
#endif // RT3593 //
{
// improve power consumption
RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R138, &bbpreg);
if (pAd->Antenna.field.TxPath == 1)
{
// turn off tx DAC_1
bbpreg = (bbpreg | 0x20);
}
if (pAd->Antenna.field.RxPath == 1)
{
// turn off tx ADC_1
bbpreg &= (~0x2);
}
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R138, bbpreg);
}
// RX0_PD & TX0_PD, RF R1 register Bit 2 & Bit 3 to 0 and RF_BLOCK_en,RX1_PD & TX1_PD, Bit0, Bit 4 & Bit5 to 1
RT30xxReadRFRegister(pAd, RF_R01, &RFValue);
RFValue = (RFValue & (~0x0C)) | 0x31;
RT30xxWriteRFRegister(pAd, RF_R01, RFValue);
// TX_LO2_en, RF R15 register Bit 3 to 0
RT30xxReadRFRegister(pAd, RF_R15, &RFValue);
RFValue &= (~0x08);
RT30xxWriteRFRegister(pAd, RF_R15, RFValue);
// TX_LO1_en, RF R17 register Bit 3 to 0
RT30xxReadRFRegister(pAd, RF_R17, &RFValue);
RFValue &= (~0x08);
// to fix rx long range issue
if (((pAd->MACVersion & 0xffff) >= 0x0211) && (pAd->NicConfig2.field.ExternalLNAForG == 0))
{
RFValue |= 0x20;
}
// set RF_R17_bit[2:0] equal to EEPROM setting at 0x48h
if (pAd->TxMixerGain24G >= 2)
{
RFValue &= (~0x7); // clean bit [2:0]
RFValue |= pAd->TxMixerGain24G;
}
RT30xxWriteRFRegister(pAd, RF_R17, RFValue);
// RX_LO1_en, RF R20 register Bit 3 to 0
RT30xxReadRFRegister(pAd, RF_R20, &RFValue);
RFValue &= (~0x08);
RT30xxWriteRFRegister(pAd, RF_R20, RFValue);
// RX_LO2_en, RF R21 register Bit 3 to 0
RT30xxReadRFRegister(pAd, RF_R21, &RFValue);
RFValue &= (~0x08);
RT30xxWriteRFRegister(pAd, RF_R21, RFValue);
}
/*
==========================================================================
Description:
Load RF sleep-mode setup
==========================================================================
*/
VOID RT30xxLoadRFSleepModeSetup(
IN PRTMP_ADAPTER pAd)
{
UCHAR RFValue;
UINT32 MACValue;
if(!IS_RT3572(pAd))
{
#ifdef RT3593
if (IS_RT3593(pAd))
{
UCHAR rfreg;
RT30xxReadRFRegister(pAd, RF_R01, &rfreg);
rfreg = ((rfreg & ~0x01) | 0x00); // vco_en
RT30xxWriteRFRegister(pAd, RF_R01, rfreg);
RT30xxReadRFRegister(pAd, RF_R06, &rfreg);
rfreg &= (~0x40); // vco_ic (VCO bias current control, 00: off)
RT30xxWriteRFRegister(pAd, RF_R06, rfreg);
RT30xxReadRFRegister(pAd, RF_R22, &rfreg);
rfreg = ((rfreg & ~0xE0) | 0x00); // cp_ic (reference current control, 000: 0.25 mA)
RT30xxWriteRFRegister(pAd, RF_R22, rfreg);
RT30xxReadRFRegister(pAd, RF_R46, &rfreg);
rfreg &= (~0x20); // rx_ctb_en
RT30xxWriteRFRegister(pAd, RF_R46, rfreg);
RT30xxReadRFRegister(pAd, RF_R20, &rfreg);
rfreg |= 0xEE; // ldo_pll_vc and ldo_rf_vc (111: -0.15)
RT30xxWriteRFRegister(pAd, RF_R20, rfreg);
}
else
#endif // RT3593 //
{
// RF_BLOCK_en. RF R1 register Bit 0 to 0
RT30xxReadRFRegister(pAd, RF_R01, &RFValue);
RFValue &= (~0x01);
RT30xxWriteRFRegister(pAd, RF_R01, RFValue);
// VCO_IC, RF R7 register Bit 4 & Bit 5 to 0
RT30xxReadRFRegister(pAd, RF_R07, &RFValue);
RFValue &= (~0x30);
RT30xxWriteRFRegister(pAd, RF_R07, RFValue);
// Idoh, RF R9 register Bit 1, Bit 2 & Bit 3 to 0
RT30xxReadRFRegister(pAd, RF_R09, &RFValue);
RFValue &= (~0x0E);
RT30xxWriteRFRegister(pAd, RF_R09, RFValue);
// RX_CTB_en, RF R21 register Bit 7 to 0
RT30xxReadRFRegister(pAd, RF_R21, &RFValue);
RFValue &= (~0x80);
RT30xxWriteRFRegister(pAd, RF_R21, RFValue);
}
}
// Don't touch LDO_CFG0 for 3090F & 3593, possibly the board is single power scheme
if (IS_RT3090(pAd) || // IS_RT3090 including RT309x and RT3071/72
IS_RT3572(pAd) ||
(IS_RT3070(pAd) && ((pAd->MACVersion & 0xffff) < 0x0201)))
{
if (!IS_RT3572(pAd))
{
RT30xxReadRFRegister(pAd, RF_R27, &RFValue);
RFValue |= 0x77;
RT30xxWriteRFRegister(pAd, RF_R27, RFValue);
}
RTMP_IO_READ32(pAd, LDO_CFG0, &MACValue);
MACValue |= 0x1D000000;
RTMP_IO_WRITE32(pAd, LDO_CFG0, MACValue);
}
}
/*
*************************************************************************
* Ralink Tech Inc.
* 5F., No.36, Taiyuan St., Jhubei City,
* Hsinchu County 302,
* Taiwan, R.O.C.
*
* (c) Copyright 2002-2010, Ralink Technology, Inc.
*
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
* *
*************************************************************************/
#ifdef RT3090
#include "rt_config.h"
#ifndef RTMP_RF_RW_SUPPORT
#error "You Should Enable compile flag RTMP_RF_RW_SUPPORT for this chip"
#endif /* RTMP_RF_RW_SUPPORT */
#ifdef RTMP_FLASH_SUPPORT
UCHAR RT3090_EeBuffer[EEPROM_SIZE] = {
0x92, 0x30, 0x02, 0x01, 0x00, 0x0c, 0x43, 0x30, 0x92, 0x00, 0x92, 0x30, 0x14, 0x18, 0x01, 0x80,
0x00, 0x00, 0x92, 0x30, 0x14, 0x18, 0x00, 0x00, 0x01, 0x00, 0x6a, 0xff, 0x13, 0x02, 0xff, 0xff,
0xff, 0xff, 0xc1, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0x8e, 0x75, 0x01, 0x43, 0x22, 0x08, 0x27, 0x00, 0xff, 0xff, 0x16, 0x01, 0xff, 0xff, 0xd9, 0xfa,
0xcc, 0x88, 0xff, 0xff, 0x0a, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff,
0xff, 0xff, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05,
0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x1d, 0x1a,
0x15, 0x11, 0x0f, 0x0d, 0x0a, 0x07, 0x04, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x88, 0x88,
0xcc, 0xcc, 0xaa, 0x88, 0xcc, 0xcc, 0xaa, 0x88, 0xcc, 0xcc, 0xaa, 0x88, 0xcc, 0xcc, 0xaa, 0x88,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, };
#endif /* RTMP_FLASH_SUPPORT */
VOID NICInitRT3090RFRegisters(IN PRTMP_ADAPTER pAd)
{
INT i;
/*
Driver must read EEPROM to get RfIcType before initial RF registers
Initialize RF register to default value
*/
if (IS_RT3090(pAd))
{
/*
Init RF calibration
Driver should toggle RF R30 bit7 before init RF registers
*/
UINT8 RfReg = 0, data;
RT30xxReadRFRegister(pAd, RF_R30, (PUCHAR)&RfReg);
RfReg |= 0x80;
RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg);
RTMPusecDelay(1000);
RfReg &= 0x7F;
RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg);
/* init R24, R31 */
/* RT30xxWriteRFRegister(pAd, RF_R24, 0x0F); */
/* RT30xxWriteRFRegister(pAd, RF_R31, 0x0F); */
/* RT309x version E has fixed this issue */
if ((pAd->NicConfig2.field.DACTestBit == 1) && ((pAd->MACVersion & 0xffff) < 0x0211))
{
/* patch tx EVM issue temporarily */
RTMP_IO_READ32(pAd, LDO_CFG0, &data);
data = ((data & 0xE0FFFFFF) | 0x0D000000);
RTMP_IO_WRITE32(pAd, LDO_CFG0, data);
}
else
{
RTMP_IO_READ32(pAd, LDO_CFG0, &data);
data = ((data & 0xE0FFFFFF) | 0x01000000);
RTMP_IO_WRITE32(pAd, LDO_CFG0, data);
}
/* patch LNA_PE_G1 failed issue */
RTMP_IO_READ32(pAd, GPIO_SWITCH, &data);
data &= ~(0x20);
RTMP_IO_WRITE32(pAd, GPIO_SWITCH, data);
/* Initialize RF register to default value */
for (i = 0; i < NUM_RF_3020_REG_PARMS; i++)
{
RT30xxWriteRFRegister(pAd, RT3020_RFRegTable[i].Register, RT3020_RFRegTable[i].Value);
}
RT30xxWriteRFRegister(pAd, RF_R31, 0x14);
/* Driver should set RF R6 bit6 on before calibration */
RT30xxReadRFRegister(pAd, RF_R06, (PUCHAR)&RfReg);
RfReg |= 0x40;
RT30xxWriteRFRegister(pAd, RF_R06, (UCHAR)RfReg);
/* For RF filter Calibration */
RTMPFilterCalibration(pAd);
/* Initialize RF R27 register, set RF R27 must be behind RTMPFilterCalibration() */
if ((pAd->MACVersion & 0xffff) < 0x0211)
RT30xxWriteRFRegister(pAd, RF_R27, 0x3);
/* set led open drain enable */
RTMP_IO_READ32(pAd, OPT_14, &data);
data |= 0x01;
RTMP_IO_WRITE32(pAd, OPT_14, data);
/* set default antenna as main */
if (pAd->RfIcType == RFIC_3020)
AsicSetRxAnt(pAd, pAd->RxAnt.Pair1PrimaryRxAnt);
/*
From RT3071 Power Sequence v1.1 document, the Normal Operation Setting Registers as follow :
BBP_R138 / RF_R1 / RF_R15 / RF_R17 / RF_R20 / RF_R21.
add by johnli, RF power sequence setup, load RF normal operation-mode setup
*/
RT30xxLoadRFNormalModeSetup(pAd);
}
}
VOID FrequencyCalibration(
IN PRTMP_ADAPTER pAd)
{
BOOLEAN bUpdateRFR = FALSE;
UCHAR RFValue = 0;
UCHAR PreRFValue = 0;
CHAR HighFreqTriggerPoint = 0, LowFreqTriggerPoint = 0;
CHAR DecreaseFreqOffset = 0, IncreaseFreqOffset = 0;
/* Frequency calibration period: */
/* a) 10 seconds: Check the reported frequency offset*/
/* b) 500 ms: Update the RF frequency if possible*/
if ((pAd->FreqCalibrationCtrl.bEnableFrequencyCalibration == TRUE) &&
(((pAd->FreqCalibrationCtrl.bApproachFrequency == FALSE) && ((pAd->Mlme.PeriodicRound % FREQUENCY_CALIBRATION_PERIOD) == 0)) ||
((pAd->FreqCalibrationCtrl.bApproachFrequency == TRUE) && ((pAd->Mlme.PeriodicRound % (FREQUENCY_CALIBRATION_PERIOD / 20)) == 0))))
{
DBGPRINT(RT_DEBUG_TRACE, ("---> %s\n", __FUNCTION__));
if (pAd->FreqCalibrationCtrl.bSkipFirstFrequencyCalibration == TRUE)
{
pAd->FreqCalibrationCtrl.bSkipFirstFrequencyCalibration = FALSE;
DBGPRINT(RT_DEBUG_TRACE, ("%s: Skip cuurent frequency calibration (avoid calibrating frequency at the time the STA is just link-up)\n", __FUNCTION__));
}
else
{
if (pAd->FreqCalibrationCtrl.LatestFreqOffsetOverBeacon != INVALID_FREQUENCY_OFFSET)
{
/* Sync the thresholds*/
if (pAd->FreqCalibrationCtrl.BeaconPhyMode == MODE_CCK) /* CCK*/
{
HighFreqTriggerPoint = HIGH_FREQUENCY_TRIGGER_POINT_CCK;
LowFreqTriggerPoint = LOW_FREQUENCY_TRIGGER_POINT_CCK;
DecreaseFreqOffset = DECREASE_FREQUENCY_OFFSET_CCK;
IncreaseFreqOffset = INCREASE_FREQUENCY_OFFSET_CCK;
}
else /* OFDM*/
{
HighFreqTriggerPoint = HIGH_FREQUENCY_TRIGGER_POINT_OFDM;
LowFreqTriggerPoint = LOW_FREQUENCY_TRIGGER_POINT_OFDM;
DecreaseFreqOffset = DECREASE_FREQUENCY_OFFSET_OFDM;
IncreaseFreqOffset = INCREASE_FREQUENCY_OFFSET_OFDM;
}
if ((pAd->FreqCalibrationCtrl.LatestFreqOffsetOverBeacon >= HighFreqTriggerPoint) ||
(pAd->FreqCalibrationCtrl.LatestFreqOffsetOverBeacon <= LowFreqTriggerPoint))
{
pAd->FreqCalibrationCtrl.bApproachFrequency = TRUE;
}
if (pAd->FreqCalibrationCtrl.bApproachFrequency == TRUE)
{
if ((pAd->FreqCalibrationCtrl.LatestFreqOffsetOverBeacon <= DecreaseFreqOffset) &&
(pAd->FreqCalibrationCtrl.LatestFreqOffsetOverBeacon >= IncreaseFreqOffset))
{
pAd->FreqCalibrationCtrl.bApproachFrequency = FALSE; /* Stop approaching frquency if -10 < reported frequency offset < 10*/
}
else if (pAd->FreqCalibrationCtrl.LatestFreqOffsetOverBeacon > DecreaseFreqOffset)
{
pAd->FreqCalibrationCtrl.AdaptiveFreqOffset--;
if (IS_RT3390(pAd))
{
RT30xxReadRFRegister(pAd, RF_R23, (PUCHAR)(&RFValue));
RFValue = ((RFValue & ~0x7F) | (pAd->FreqCalibrationCtrl.AdaptiveFreqOffset & 0x7F));
RFValue = min(RFValue, ((UCHAR)0x5F));// warning!! by sw
pAd->FreqCalibrationCtrl.AdaptiveFreqOffset = RFValue; /* Keep modified RF R23 value */
RT30xxWriteRFRegister(pAd, RF_R23, (UCHAR)RFValue);
RT30xxReadRFRegister(pAd, RF_R07, (PUCHAR)(&RFValue));
RFValue = ((RFValue & ~0x01) | 0x01); /* Tune_en (initiate VCO calibration (reset after completion)) */
RT30xxWriteRFRegister(pAd, RF_R07, (UCHAR)RFValue);
}
else if (IS_RT5390(pAd))
{
RT30xxReadRFRegister(pAd, RF_R17, (PUCHAR)(&RFValue));
PreRFValue = RFValue;
RFValue = ((RFValue & ~0x7F) | (pAd->FreqCalibrationCtrl.AdaptiveFreqOffset & 0x7F));
RFValue = min(RFValue, ((UCHAR)0x5F));// warning!! by sw
pAd->FreqCalibrationCtrl.AdaptiveFreqOffset = RFValue; /* Keep modified RF R17 value */
if (PreRFValue != RFValue)
{
AsicSendCommandToMcu(pAd, 0x74, 0xff, RFValue, PreRFValue);
}
RT30xxReadRFRegister(pAd, RF_R03, (PUCHAR)&RFValue);
RFValue = ((RFValue & ~0x80) | 0x80); /* vcocal_en (initiate VCO calibration (reset after completion)) - It should be at the end of RF configuration. */
RT30xxWriteRFRegister(pAd, RF_R03, (UCHAR)RFValue);
}
else if (IS_RT3593(pAd))
{
RT30xxReadRFRegister(pAd, RF_R17, (PUCHAR)(&RFValue));
RFValue = ((RFValue & ~0x7F) | (pAd->FreqCalibrationCtrl.AdaptiveFreqOffset & 0x7F));
RFValue = min(RFValue, ((UCHAR)0x5F));// warning!! by sw
pAd->FreqCalibrationCtrl.AdaptiveFreqOffset = RFValue; // Keep modified RF R17 value
RT30xxWriteRFRegister(pAd, RF_R17, (UCHAR)RFValue);
RT30xxReadRFRegister(pAd, RF_R03, (PUCHAR)&RFValue);
RFValue = ((RFValue & ~0x80) | 0x80); /* vcocal_en (initiate VCO calibration (reset after completion)) - It should be at the end of RF configuration. */
RT30xxWriteRFRegister(pAd, RF_R03, (UCHAR)RFValue);
}
else
{
DBGPRINT(RT_DEBUG_ERROR, ("%s: Not support IC type (MACVersion = 0x%X)\n", __FUNCTION__, pAd->MACVersion));
}
DBGPRINT(RT_DEBUG_TRACE, ("%s: -- frequency offset = 0x%X\n", __FUNCTION__, pAd->FreqCalibrationCtrl.AdaptiveFreqOffset));
}
else if (pAd->FreqCalibrationCtrl.LatestFreqOffsetOverBeacon < IncreaseFreqOffset)
{
pAd->FreqCalibrationCtrl.AdaptiveFreqOffset++;
if (IS_RT3390(pAd))
{
RT30xxReadRFRegister(pAd, RF_R23, (PUCHAR)(&RFValue));
RFValue = ((RFValue & ~0x7F) | (pAd->FreqCalibrationCtrl.AdaptiveFreqOffset & 0x7F));
RFValue = min(RFValue, ((UCHAR)0x5F));// warning!! by sw
pAd->FreqCalibrationCtrl.AdaptiveFreqOffset = RFValue; /* Keep modified RF R23 value */
RT30xxWriteRFRegister(pAd, RF_R23, (UCHAR)RFValue);
RT30xxReadRFRegister(pAd, RF_R07, (PUCHAR)(&RFValue));
RFValue = ((RFValue & ~0x01) | 0x01); /* Tune_en (initiate VCO calibration (reset after completion)) */
RT30xxWriteRFRegister(pAd, RF_R07, (UCHAR)RFValue);
}
else if (IS_RT5390(pAd))
{
RT30xxReadRFRegister(pAd, RF_R17, (PUCHAR)(&RFValue));
PreRFValue = RFValue;
RFValue = ((RFValue & ~0x7F) | (pAd->FreqCalibrationCtrl.AdaptiveFreqOffset & 0x7F));
RFValue = min(RFValue, ((UCHAR)0x5F));// warning!! by sw
pAd->FreqCalibrationCtrl.AdaptiveFreqOffset = RFValue; /* Keep modified RF R17 value */
if (PreRFValue != RFValue)
{
AsicSendCommandToMcu(pAd, 0x74, 0xff, RFValue, PreRFValue);
}
RT30xxReadRFRegister(pAd, RF_R03, (PUCHAR)&RFValue);
RFValue = ((RFValue & ~0x80) | 0x80); /* vcocal_en (initiate VCO calibration (reset after completion)) - It should be at the end of RF configuration.*/
RT30xxWriteRFRegister(pAd, RF_R03, (UCHAR)RFValue);
}
else if (IS_RT3593(pAd))
{
RT30xxReadRFRegister(pAd, RF_R17, (PUCHAR)(&RFValue));
RFValue = ((RFValue & ~0x7F) | (pAd->FreqCalibrationCtrl.AdaptiveFreqOffset & 0x7F));
RFValue = min(RFValue, ((UCHAR)0x5F));// warning!! by sw
pAd->FreqCalibrationCtrl.AdaptiveFreqOffset = RFValue; /* Keep modified RF R17 value */
RT30xxWriteRFRegister(pAd, RF_R17, (UCHAR)RFValue);
RT30xxReadRFRegister(pAd, RF_R03, (PUCHAR)&RFValue);
RFValue = ((RFValue & ~0x80) | 0x80); /* vcocal_en (initiate VCO calibration (reset after completion)) - It should be at the end of RF configuration. */
RT30xxWriteRFRegister(pAd, RF_R03, (UCHAR)RFValue);
}
else
{
DBGPRINT(RT_DEBUG_ERROR, ("%s: Not support IC type (MACVersion = 0x%X)\n", __FUNCTION__, pAd->MACVersion));
}
DBGPRINT(RT_DEBUG_TRACE, ("%s: ++ frequency offset = 0x%X\n", __FUNCTION__, pAd->FreqCalibrationCtrl.AdaptiveFreqOffset));
}
}
DBGPRINT(RT_DEBUG_TRACE, ("%s: AdaptiveFreqOffset = %d, LatestFreqOffsetOverBeacon = %d, bApproachFrequency = %d\n",
__FUNCTION__,
pAd->FreqCalibrationCtrl.AdaptiveFreqOffset,
pAd->FreqCalibrationCtrl.LatestFreqOffsetOverBeacon,
pAd->FreqCalibrationCtrl.bApproachFrequency));
}
}
DBGPRINT(RT_DEBUG_TRACE, ("<--- %s\n", __FUNCTION__));
}
}
int rt28xx_init(
IN VOID *pAdSrc,
IN PSTRING pDefaultMac,
IN PSTRING pHostName)
{
PRTMP_ADAPTER pAd = (PRTMP_ADAPTER)pAdSrc;
UINT index;
UCHAR TmpPhy;
NDIS_STATUS Status;
if (pAd == NULL)
return FALSE;
#ifdef RT3290
DBGPRINT(RT_DEBUG_OFF, ("MACVersion=0x%x\n", pAd->MACVersion));
if (IS_RT3290(pAd))
{
UINT32 MacRegValue;
OSCCTL_STRUC osCtrl = {.word = 0};
CMB_CTRL_STRUC cmbCtrl = {.word = 0};
WLAN_FUN_CTRL_STRUC WlanFunCtrl = {.word = 0};
RTMPEnableWlan(pAd, TRUE, TRUE);
//
// Too much time for reading efuse(enter/exit L1), and our device will hang up
// Disable L1
//
RTMP_IO_READ32(pAd, WLAN_FUN_CTRL, &WlanFunCtrl.word);
if (WlanFunCtrl.field.WLAN_EN == TRUE)
{
WlanFunCtrl.field.PCIE_APP0_CLK_REQ = TRUE;
RTMP_IO_WRITE32(pAd, WLAN_FUN_CTRL, WlanFunCtrl.word);
}
//Enable ROSC_EN first then CAL_REQ
RTMP_IO_READ32(pAd, OSCCTL, &osCtrl.word);
osCtrl.field.ROSC_EN = TRUE; //HW force
RTMP_IO_WRITE32(pAd, OSCCTL, osCtrl.word);
osCtrl.field.ROSC_EN = TRUE; //HW force
osCtrl.field.CAL_REQ = TRUE;
osCtrl.field.REF_CYCLE = 0x27;
RTMP_IO_WRITE32(pAd, OSCCTL, osCtrl.word);
RTMP_IO_READ32(pAd, CMB_CTRL, &cmbCtrl.word);
pAd->CmbCtrl.word = cmbCtrl.word;
// Overwrite default Coex Parameter
RTMP_IO_READ32(pAd, COEXCFG0, &MacRegValue);
MacRegValue &= ~(0xFF000000);
MacRegValue |= 0x5E000000;
RTMP_IO_WRITE32(pAd, COEXCFG0, MacRegValue);
}
if (IS_RT3290LE(pAd))
{
PLL_CTRL_STRUC PllCtrl;
RTMP_IO_READ32(pAd, PLL_CTRL, &PllCtrl.word);
PllCtrl.field.VCO_FIXED_CURRENT_CONTROL = 0x1;
RTMP_IO_WRITE32(pAd, PLL_CTRL, PllCtrl.word);
}
#endif /* RT3290 */
#ifdef CONFIG_STA_SUPPORT
#ifdef PCIE_PS_SUPPORT
IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
{
/* If dirver doesn't wake up firmware here,*/
/* NICLoadFirmware will hang forever when interface is up again.*/
if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_DOZE) &&
OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_ADVANCE_POWER_SAVE_PCIE_DEVICE))
{
AUTO_WAKEUP_STRUC AutoWakeupCfg;
AsicForceWakeup(pAd, TRUE);
AutoWakeupCfg.word = 0;
RTMP_IO_WRITE32(pAd, AUTO_WAKEUP_CFG, AutoWakeupCfg.word);
OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_DOZE);
}
}
#endif /* PCIE_PS_SUPPORT */
#endif /* CONFIG_STA_SUPPORT */
/* reset Adapter flags*/
RTMP_CLEAR_FLAGS(pAd);
/* Init BssTab & ChannelInfo tabbles for auto channel select.*/
#ifdef DOT11_N_SUPPORT
/* Allocate BA Reordering memory*/
if (ba_reordering_resource_init(pAd, MAX_REORDERING_MPDU_NUM) != TRUE)
goto err1;
#endif /* DOT11_N_SUPPORT */
/* Make sure MAC gets ready.*/
index = 0;
if (WaitForAsicReady(pAd) != TRUE)
goto err1;
DBGPRINT(RT_DEBUG_TRACE, ("MAC[Ver:Rev=0x%08x]\n", pAd->MACVersion));
if (MAX_LEN_OF_MAC_TABLE > MAX_AVAILABLE_CLIENT_WCID(pAd))
{
DBGPRINT(RT_DEBUG_ERROR, ("MAX_LEN_OF_MAC_TABLE can not be larger than MAX_AVAILABLE_CLIENT_WCID!!!!\n"));
goto err1;
}
/* Disable DMA*/
RT28XXDMADisable(pAd);
/* Load 8051 firmware*/
Status = NICLoadFirmware(pAd);
if (Status != NDIS_STATUS_SUCCESS)
{
DBGPRINT_ERR(("NICLoadFirmware failed, Status[=0x%08x]\n", Status));
goto err1;
}
NICLoadRateSwitchingParams(pAd);
/* Disable interrupts here which is as soon as possible*/
/* This statement should never be true. We might consider to remove it later*/
#ifdef RESOURCE_PRE_ALLOC
Status = RTMPInitTxRxRingMemory(pAd);
#else
Status = RTMPAllocTxRxRingMemory(pAd);
#endif /* RESOURCE_PRE_ALLOC */
if (Status != NDIS_STATUS_SUCCESS)
{
DBGPRINT_ERR(("RTMPAllocTxRxMemory failed, Status[=0x%08x]\n", Status));
goto err2;
}
RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE);
/* initialize MLME*/
Status = RtmpMgmtTaskInit(pAd);
if (Status != NDIS_STATUS_SUCCESS)
goto err3;
Status = MlmeInit(pAd);
if (Status != NDIS_STATUS_SUCCESS)
{
DBGPRINT_ERR(("MlmeInit failed, Status[=0x%08x]\n", Status));
goto err4;
}
#ifdef RMTP_RBUS_SUPPORT
#ifdef VIDEO_TURBINE_SUPPORT
VideoConfigInit(pAd);
#endif /* VIDEO_TURBINE_SUPPORT */
#endif /* RMTP_RBUS_SUPPORT */
/* Initialize pAd->StaCfg, pAd->ApCfg, pAd->CommonCfg to manufacture default*/
UserCfgInit(pAd);
Status = RtmpNetTaskInit(pAd);
if (Status != NDIS_STATUS_SUCCESS)
goto err5;
/* COPY_MAC_ADDR(pAd->ApCfg.MBSSID[apidx].Bssid, netif->hwaddr);*/
/* pAd->bForcePrintTX = TRUE;*/
CfgInitHook(pAd);
#ifdef BLOCK_NET_IF
initblockQueueTab(pAd);
#endif /* BLOCK_NET_IF */
Status = MeasureReqTabInit(pAd);
if (Status != NDIS_STATUS_SUCCESS)
{
DBGPRINT_ERR(("MeasureReqTabInit failed, Status[=0x%08x]\n",Status));
goto err6;
}
Status = TpcReqTabInit(pAd);
if (Status != NDIS_STATUS_SUCCESS)
{
DBGPRINT_ERR(("TpcReqTabInit failed, Status[=0x%08x]\n",Status));
goto err6;
}
/* Init the hardware, we need to init asic before read registry, otherwise mac register will be reset*/
Status = NICInitializeAdapter(pAd, TRUE);
if (Status != NDIS_STATUS_SUCCESS)
{
DBGPRINT_ERR(("NICInitializeAdapter failed, Status[=0x%08x]\n", Status));
if (Status != NDIS_STATUS_SUCCESS)
goto err6;
}
/* Read parameters from Config File */
/* unknown, it will be updated in NICReadEEPROMParameters */
pAd->RfIcType = RFIC_UNKNOWN;
Status = RTMPReadParametersHook(pAd);
#ifdef CONFIG_STA_SUPPORT
#ifdef CREDENTIAL_STORE
RecoverConnectInfo(pAd);
#endif /* CREDENTIAL_STORE */
#endif /* CONFIG_STA_SUPPORT */
DBGPRINT(RT_DEBUG_OFF, ("1. Phy Mode = %d\n", pAd->CommonCfg.PhyMode));
if (Status != NDIS_STATUS_SUCCESS)
{
DBGPRINT_ERR(("RTMPReadParametersHook failed, Status[=0x%08x]\n",Status));
goto err6;
}
#ifdef RTMP_MAC_USB
pAd->CommonCfg.bMultipleIRP = FALSE;
if (pAd->CommonCfg.bMultipleIRP)
pAd->CommonCfg.NumOfBulkInIRP = RX_RING_SIZE;
else
pAd->CommonCfg.NumOfBulkInIRP = 1;
#endif /* RTMP_MAC_USB */
#ifdef DOT11_N_SUPPORT
/*Init Ba Capability parameters.*/
/* RT28XX_BA_INIT(pAd);*/
pAd->CommonCfg.DesiredHtPhy.MpduDensity = (UCHAR)pAd->CommonCfg.BACapability.field.MpduDensity;
pAd->CommonCfg.DesiredHtPhy.AmsduEnable = (USHORT)pAd->CommonCfg.BACapability.field.AmsduEnable;
pAd->CommonCfg.DesiredHtPhy.AmsduSize = (USHORT)pAd->CommonCfg.BACapability.field.AmsduSize;
pAd->CommonCfg.DesiredHtPhy.MimoPs = (USHORT)pAd->CommonCfg.BACapability.field.MMPSmode;
/* UPdata to HT IE*/
pAd->CommonCfg.HtCapability.HtCapInfo.MimoPs = (USHORT)pAd->CommonCfg.BACapability.field.MMPSmode;
pAd->CommonCfg.HtCapability.HtCapInfo.AMsduSize = (USHORT)pAd->CommonCfg.BACapability.field.AmsduSize;
pAd->CommonCfg.HtCapability.HtCapParm.MpduDensity = (UCHAR)pAd->CommonCfg.BACapability.field.MpduDensity;
#endif /* DOT11_N_SUPPORT */
/* after reading Registry, we now know if in AP mode or STA mode*/
/* Load 8051 firmware; crash when FW image not existent*/
/* Status = NICLoadFirmware(pAd);*/
/* if (Status != NDIS_STATUS_SUCCESS)*/
/* break;*/
DBGPRINT(RT_DEBUG_OFF, ("2. Phy Mode = %d\n", pAd->CommonCfg.PhyMode));
/* We should read EEPROM for all cases. rt2860b*/
NICReadEEPROMParameters(pAd, (PSTRING)pDefaultMac);
#ifdef CONFIG_STA_SUPPORT
#endif /* CONFIG_STA_SUPPORT */
DBGPRINT(RT_DEBUG_OFF, ("3. Phy Mode = %d\n", pAd->CommonCfg.PhyMode));
#ifdef LED_CONTROL_SUPPORT
/* Send LED Setting to MCU */
RTMPInitLEDMode(pAd);
#else
//turn off LED if we dont have LED support
MyRTMPTurnOffLED(pAd);
#endif /* LED_CONTROL_SUPPORT */
NICInitAsicFromEEPROM(pAd); /* rt2860b */
#ifdef RTMP_FREQ_CALIBRATION_SUPPORT
#ifdef CONFIG_STA_SUPPORT
/* Initialize the frequency calibration*/
if (pAd->chipCap.FreqCalibrationSupport)
FrequencyCalibration(pAd);
#endif /* CONFIG_STA_SUPPORT */
#endif /* RTMP_FREQ_CALIBRATION_SUPPORT */
#ifdef RTMP_INTERNAL_TX_ALC
/* Initialize the desired TSSI table*/
RTMP_CHIP_ASIC_TSSI_TABLE_INIT(pAd);
#endif /* RTMP_INTERNAL_TX_ALC */
#ifdef RTMP_TEMPERATURE_COMPENSATION
/* Temperature compensation, initialize the lookup table */
DBGPRINT(RT_DEBUG_OFF, ("bAutoTxAgcG = %d\n", pAd->bAutoTxAgcG));
if (pAd->chipCap.bTempCompTxALC && pAd->bAutoTxAgcG)
InitLookupTable(pAd);
#endif /* RTMP_TEMPERATURE_COMPENSATION */
#ifdef RTMP_FREQ_CALIBRATION_SUPPORT
#ifdef CONFIG_STA_SUPPORT
if (pAd->chipCap.FreqCalibrationSupport)
InitFrequencyCalibration(pAd);
#endif /* CONFIG_STA_SUPPORT */
#endif /* RTMP_FREQ_CALIBRATION_SUPPORT */
/* Set PHY to appropriate mode*/
TmpPhy = pAd->CommonCfg.PhyMode;
pAd->CommonCfg.PhyMode = 0xff;
RTMPSetPhyMode(pAd, TmpPhy);
#ifdef DOT11_N_SUPPORT
SetCommonHT(pAd);
#endif /* DOT11_N_SUPPORT */
/* No valid channels.*/
if (pAd->ChannelListNum == 0)
{
DBGPRINT(RT_DEBUG_ERROR, ("Wrong configuration. No valid channel found. Check \"ContryCode\" and \"ChannelGeography\" setting.\n"));
goto err6;
}
#ifdef DOT11_N_SUPPORT
DBGPRINT(RT_DEBUG_OFF, ("MCS Set = %02x %02x %02x %02x %02x\n", pAd->CommonCfg.HtCapability.MCSSet[0],
pAd->CommonCfg.HtCapability.MCSSet[1], pAd->CommonCfg.HtCapability.MCSSet[2],
pAd->CommonCfg.HtCapability.MCSSet[3], pAd->CommonCfg.HtCapability.MCSSet[4]));
#endif /* DOT11_N_SUPPORT */
/* APInitialize(pAd);*/
#ifdef IKANOS_VX_1X0
VR_IKANOS_FP_Init(pAd->ApCfg.BssidNum, pAd->PermanentAddress);
#endif /* IKANOS_VX_1X0 */
#ifdef RTMP_MAC_USB
AsicSendCommandToMcu(pAd, 0x31, 0xff, 0x00, 0x02, FALSE);
RTMPusecDelay(10000);
#endif /* RTMP_MAC_USB */
/*
Some modules init must be called before APStartUp().
Or APStartUp() will make up beacon content and call
other modules API to get some information to fill.
*/
#ifdef CONFIG_TSO_SUPPORT
if (RTMP_TEST_MORE_FLAG(pAd, fRTMP_ADAPTER_TSO_SUPPORT))
RTMPTsoEnable(pAd);
#endif /* CONFIG_TSO_SUPPORT */
if (pAd && (Status != NDIS_STATUS_SUCCESS))
{
/* Undo everything if it failed*/
if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE))
{
/* NdisMDeregisterInterrupt(&pAd->Interrupt);*/
RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE);
}
/* RTMPFreeAdapter(pAd); we will free it in disconnect()*/
}
else if (pAd)
{
/* Microsoft HCT require driver send a disconnect event after driver initialization.*/
OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED);
OPSTATUS_CLEAR_FLAG(pAd, fOP_AP_STATUS_MEDIA_STATE_CONNECTED);
RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_MEDIA_STATE_CHANGE);
DBGPRINT(RT_DEBUG_TRACE, ("NDIS_STATUS_MEDIA_DISCONNECT Event B!\n"));
#ifdef RTMP_MAC_USB
RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_RESET_IN_PROGRESS);
RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_REMOVE_IN_PROGRESS);
/* Support multiple BulkIn IRP,*/
/* the value on pAd->CommonCfg.NumOfBulkInIRP may be large than 1.*/
for(index=0; index<pAd->CommonCfg.NumOfBulkInIRP; index++)
{
RTUSBBulkReceive(pAd);
DBGPRINT(RT_DEBUG_TRACE, ("RTUSBBulkReceive!\n" ));
}
#endif /* RTMP_MAC_USB */
}/* end of else*/
/* Set up the Mac address*/
#ifdef CONFIG_STA_SUPPORT
RtmpOSNetDevAddrSet(pAd->OpMode, pAd->net_dev, &pAd->CurrentAddress[0], (PUCHAR)(pAd->StaCfg.dev_name));
#endif /* CONFIG_STA_SUPPORT */
/* Various AP function init*/
#ifdef UAPSD_SUPPORT
UAPSD_Init(pAd);
#endif /* UAPSD_SUPPORT */
/* assign function pointers*/
#ifdef CONFIG_STA_SUPPORT
IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
{
#ifdef WPA_SUPPLICANT_SUPPORT
#ifndef NATIVE_WPA_SUPPLICANT_SUPPORT
/* send wireless event to wpa_supplicant for infroming interface up.*/
RtmpOSWrielessEventSend(pAd->net_dev, RT_WLAN_EVENT_CUSTOM, RT_INTERFACE_UP, NULL, NULL, 0);
#endif /* NATIVE_WPA_SUPPLICANT_SUPPORT */
#endif /* WPA_SUPPLICANT_SUPPORT */
}
#endif /* CONFIG_STA_SUPPORT */
/* auto-fall back settings */
#ifdef RANGE_EXTEND
RTMP_IO_WRITE32(pAd, HT_FBK_CFG1, 0xedcba980);
#endif // RANGE_EXTEND //
#ifdef DOT11N_SS3_SUPPORT
if (pAd->CommonCfg.TxStream >= 3)
{
RTMP_IO_WRITE32(pAd, TX_FBK_CFG_3S_0, 0x12111008);
RTMP_IO_WRITE32(pAd, TX_FBK_CFG_3S_1, 0x16151413);
}
#endif /* DOT11N_SS3_SUPPORT */
#ifdef STREAM_MODE_SUPPORT
RtmpStreamModeInit(pAd);
#endif /* STREAM_MODE_SUPPORT */
#ifdef DOT11_N_SUPPORT
#endif /* DOT11_N_SUPPORT */
#ifdef RT3290
if (IS_RT3290(pAd))
{
WLAN_FUN_CTRL_STRUC WlanFunCtrl = {.word = 0};
RTMP_MAC_PWRSV_EN(pAd, TRUE, TRUE);
//
// Too much time for reading efuse(enter/exit L1), and our device will hang up
// Enable L1
//
RTMP_IO_READ32(pAd, WLAN_FUN_CTRL, &WlanFunCtrl.word);
if (WlanFunCtrl.field.WLAN_EN == TRUE)
{
WlanFunCtrl.field.PCIE_APP0_CLK_REQ = FALSE;
RTMP_IO_WRITE32(pAd, WLAN_FUN_CTRL, WlanFunCtrl.word);
}
}
#endif /* RT3290 */
DBGPRINT_S(Status, ("<==== rt28xx_init, Status=%x\n", Status));
return TRUE;
/*err7:
APStop(pAd);*/
err6:
#ifdef IGMP_SNOOP_SUPPORT
MultiCastFilterTableReset(&pAd->pMulticastFilterTable);
#endif /* IGMP_SNOOP_SUPPORT */
MeasureReqTabExit(pAd);
TpcReqTabExit(pAd);
err5:
RtmpNetTaskExit(pAd);
UserCfgExit(pAd);
err4:
MlmeHalt(pAd);
RTMP_TimerListRelease(pAd);
err3:
RtmpMgmtTaskExit(pAd);
#ifdef RTMP_TIMER_TASK_SUPPORT
NdisFreeSpinLock(&pAd->TimerQLock);
#endif /* RTMP_TIMER_TASK_SUPPORT */
err2:
#ifdef RESOURCE_PRE_ALLOC
RTMPResetTxRxRingMemory(pAd);
#else
RTMPFreeTxRxRingMemory(pAd);
#endif /* RESOURCE_PRE_ALLOC */
err1:
#ifdef RT3290
if (IS_RT3290(pAd))
RTMPEnableWlan(pAd, FALSE, FALSE);
#endif /* RT3290 */
#ifdef DOT11_N_SUPPORT
if(pAd->mpdu_blk_pool.mem)
os_free_mem(pAd, pAd->mpdu_blk_pool.mem); /* free BA pool*/
#endif /* DOT11_N_SUPPORT */
/* shall not set priv to NULL here because the priv didn't been free yet.*/
/*net_dev->priv = 0;*/
#ifdef INF_AMAZON_SE
err0:
#endif /* INF_AMAZON_SE */
#ifdef ST
err0:
#endif /* ST */
DBGPRINT(RT_DEBUG_ERROR, ("!!! rt28xx Initialized fail !!!\n"));
return FALSE;
}
VOID RTMPDrvOpen(
IN VOID *pAdSrc)
{
PRTMP_ADAPTER pAd = (PRTMP_ADAPTER)pAdSrc;
#ifdef CONFIG_STA_SUPPORT
#endif /* CONFIG_STA_SUPPORT */
/* Enable Interrupt*/
RTMP_IRQ_ENABLE(pAd);
/* Now Enable RxTx*/
RTMPEnableRxTx(pAd);
RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_START_UP);
{
UINT32 reg = 0;
RTMP_IO_READ32(pAd, 0x1300, ®); /* clear garbage interrupts*/
printk("0x1300 = %08x\n", reg);
}
{
/* u32 reg;*/
/* UINT8 byte;*/
/* u16 tmp;*/
/* RTMP_IO_READ32(pAd, XIFS_TIME_CFG, ®);*/
/* tmp = 0x0805;*/
/* reg = (reg & 0xffff0000) | tmp;*/
/* RTMP_IO_WRITE32(pAd, XIFS_TIME_CFG, reg);*/
}
#ifdef CONFIG_STA_SUPPORT
#ifdef PCIE_PS_SUPPORT
IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
RTMPInitPCIeLinkCtrlValue(pAd);
#endif /* PCIE_PS_SUPPORT */
#endif /* CONFIG_STA_SUPPORT */
#ifdef CONFIG_STA_SUPPORT
/*
To reduce connection time,
do auto reconnect here instead of waiting STAMlmePeriodicExec to do auto reconnect.
*/
if (pAd->OpMode == OPMODE_STA)
MlmeAutoReconnectLastSSID(pAd);
#endif /* CONFIG_STA_SUPPORT */
#ifdef CONFIG_STA_SUPPORT
#endif /* CONFIG_STA_SUPPORT */
#ifdef CONFIG_MULTI_CHANNEL
MultiChannelThreadInit(pAd);
#endif /* CONFIG_MULTI_CHANNEL */
}
VOID RTMPDrvClose(
IN VOID *pAdSrc,
IN VOID *net_dev)
{
PRTMP_ADAPTER pAd = (PRTMP_ADAPTER)pAdSrc;
BOOLEAN Cancelled;
UINT32 i = 0;
Cancelled = FALSE;
#ifdef CONFIG_STA_SUPPORT
#ifdef CREDENTIAL_STORE
if (pAd->IndicateMediaState == NdisMediaStateConnected)
{
StoreConnectInfo(pAd);
}
else
{
RTMP_SEM_LOCK(&pAd->StaCtIf.Lock);
pAd->StaCtIf.Changeable = FALSE;
RTMP_SEM_UNLOCK(&pAd->StaCtIf.Lock);
}
#endif /* CREDENTIAL_STORE */
#endif /* CONFIG_STA_SUPPORT */
#ifdef CONFIG_STA_SUPPORT
IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
{
#ifdef PCIE_PS_SUPPORT
RTMPPCIeLinkCtrlValueRestore(pAd, RESTORE_CLOSE);
#endif /* PCIE_PS_SUPPORT */
/* If dirver doesn't wake up firmware here,*/
/* NICLoadFirmware will hang forever when interface is up again.*/
if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_DOZE))
{
AsicForceWakeup(pAd, TRUE);
}
#ifdef RTMP_MAC_USB
RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_REMOVE_IN_PROGRESS);
#endif /* RTMP_MAC_USB */
}
#endif /* CONFIG_STA_SUPPORT */
RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS);
#ifdef EXT_BUILD_CHANNEL_LIST
if (pAd->CommonCfg.pChDesp != NULL)
os_free_mem(NULL, pAd->CommonCfg.pChDesp);
pAd->CommonCfg.pChDesp = NULL;
pAd->CommonCfg.DfsType = MAX_RD_REGION;
pAd->CommonCfg.bCountryFlag = 0;
#endif /* EXT_BUILD_CHANNEL_LIST */
#ifdef WDS_SUPPORT
WdsDown(pAd);
#endif /* WDS_SUPPORT */
for (i = 0 ; i < NUM_OF_TX_RING; i++)
{
while (pAd->DeQueueRunning[i] == TRUE)
{
DBGPRINT(RT_DEBUG_TRACE, ("Waiting for TxQueue[%d] done..........\n", i));
RTMPusecDelay(1000);
}
}
#ifdef RTMP_MAC_USB
RtmpOsUsbEmptyUrbCheck(&pAd->wait, &pAd->BulkInLock, &pAd->PendingRx);
#endif /* RTMP_MAC_USB */
/* Stop Mlme state machine*/
MlmeHalt(pAd);
/* Close net tasklets*/
RtmpNetTaskExit(pAd);
#ifdef CONFIG_STA_SUPPORT
IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
{
MacTableReset(pAd);
#if defined(WOW_SUPPORT) && defined(RTMP_MAC_USB) && defined(WOW_IFDOWN_SUPPORT)
if (pAd->WOW_Cfg.bEnable == TRUE)
RT28xxUsbAsicWOWEnable(pAd);
else
#endif /* WOW_SUPPORT */
MlmeRadioOff(pAd);
}
#endif /* CONFIG_STA_SUPPORT */
MeasureReqTabExit(pAd);
TpcReqTabExit(pAd);
#ifdef LED_CONTROL_SUPPORT
RTMPExitLEDMode(pAd);
#endif // LED_CONTROL_SUPPORT
/* Close kernel threads*/
RtmpMgmtTaskExit(pAd);
/* Free IRQ*/
if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE))
{
RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE);
}
/* Free Ring or USB buffers*/
#ifdef RESOURCE_PRE_ALLOC
RTMPResetTxRxRingMemory(pAd);
#else
/* Free Ring or USB buffers*/
RTMPFreeTxRxRingMemory(pAd);
#endif /* RESOURCE_PRE_ALLOC */
RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS);
#ifdef DOT11_N_SUPPORT
/* Free BA reorder resource*/
ba_reordering_resource_release(pAd);
#endif /* DOT11_N_SUPPORT */
UserCfgExit(pAd); /* must after ba_reordering_resource_release */
#ifdef CONFIG_STA_SUPPORT
#endif /* CONFIG_STA_SUPPORT */
RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_START_UP);
/*+++Modify by woody to solve the bulk fail+++*/
#ifdef CONFIG_STA_SUPPORT
IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
{
#ifdef RT35xx
if (IS_RT3572(pAd))
{
RT30xxWriteRFRegister(pAd, RF_R08, 0x00);
AsicSendCommandToMcu(pAd, 0x30, 0xff, 0xff, 0x02, FALSE);
}
#endif /* RT35xx */
}
#endif /* CONFIG_STA_SUPPORT */
/* clear MAC table */
/* TODO: do not clear spin lock, such as fLastChangeAccordingMfbLock */
NdisZeroMemory(&pAd->MacTab, sizeof(MAC_TABLE));
/* release all timers */
RTMPusecDelay(2000);
RTMP_TimerListRelease(pAd);
#ifdef CONFIG_MULTI_CHANNEL
MultiChannelThreadExit(pAd);
#endif /* CONFIG_MULTI_CHANNEL */
#ifdef RTMP_TIMER_TASK_SUPPORT
NdisFreeSpinLock(&pAd->TimerQLock);
#endif /* RTMP_TIMER_TASK_SUPPORT */
}
VOID RTMPInfClose(
IN VOID *pAdSrc)
{
PRTMP_ADAPTER pAd = (PRTMP_ADAPTER)pAdSrc;
#ifdef CONFIG_STA_SUPPORT
IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
{
#ifdef PROFILE_STORE
WriteDatThread(pAd);
RTMPusecDelay(1000);
#endif /* PROFILE_STORE */
#ifdef QOS_DLS_SUPPORT
/* send DLS-TEAR_DOWN message, */
if (pAd->CommonCfg.bDLSCapable)
{
UCHAR i;
/* tear down local dls table entry*/
for (i=0; i<MAX_NUM_OF_INIT_DLS_ENTRY; i++)
{
if (pAd->StaCfg.DLSEntry[i].Valid && (pAd->StaCfg.DLSEntry[i].Status == DLS_FINISH))
{
RTMPSendDLSTearDownFrame(pAd, pAd->StaCfg.DLSEntry[i].MacAddr);
pAd->StaCfg.DLSEntry[i].Status = DLS_NONE;
pAd->StaCfg.DLSEntry[i].Valid = FALSE;
}
}
/* tear down peer dls table entry*/
for (i=MAX_NUM_OF_INIT_DLS_ENTRY; i<MAX_NUM_OF_DLS_ENTRY; i++)
{
if (pAd->StaCfg.DLSEntry[i].Valid && (pAd->StaCfg.DLSEntry[i].Status == DLS_FINISH))
{
RTMPSendDLSTearDownFrame(pAd, pAd->StaCfg.DLSEntry[i].MacAddr);
pAd->StaCfg.DLSEntry[i].Status = DLS_NONE;
pAd->StaCfg.DLSEntry[i].Valid = FALSE;
}
}
RTMP_MLME_HANDLER(pAd);
}
#endif /* QOS_DLS_SUPPORT */
if (INFRA_ON(pAd) &&
#if defined(WOW_SUPPORT) && defined(RTMP_MAC_USB) && defined(WOW_IFDOWN_SUPPORT) /* In WOW state, can't issue disassociation reqeust */
pAd->WOW_Cfg.bEnable == FALSE &&
#endif /* WOW_SUPPORT */
(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)))
{
MLME_DISASSOC_REQ_STRUCT DisReq;
MLME_QUEUE_ELEM *MsgElem;/* = (MLME_QUEUE_ELEM *) kmalloc(sizeof(MLME_QUEUE_ELEM), MEM_ALLOC_FLAG);*/
os_alloc_mem(NULL, (UCHAR **)&MsgElem, sizeof(MLME_QUEUE_ELEM));
if (MsgElem)
{
COPY_MAC_ADDR(DisReq.Addr, pAd->CommonCfg.Bssid);
DisReq.Reason = REASON_DEAUTH_STA_LEAVING;
MsgElem->Machine = ASSOC_STATE_MACHINE;
MsgElem->MsgType = MT2_MLME_DISASSOC_REQ;
MsgElem->MsgLen = sizeof(MLME_DISASSOC_REQ_STRUCT);
NdisMoveMemory(MsgElem->Msg, &DisReq, sizeof(MLME_DISASSOC_REQ_STRUCT));
/* Prevent to connect AP again in STAMlmePeriodicExec*/
pAd->MlmeAux.AutoReconnectSsidLen= 32;
NdisZeroMemory(pAd->MlmeAux.AutoReconnectSsid, pAd->MlmeAux.AutoReconnectSsidLen);
pAd->Mlme.CntlMachine.CurrState = CNTL_WAIT_OID_DISASSOC;
MlmeDisassocReqAction(pAd, MsgElem);
/* kfree(MsgElem);*/
os_free_mem(NULL, MsgElem);
}
RTMPusecDelay(1000);
}
#ifdef WPA_SUPPLICANT_SUPPORT
#ifndef NATIVE_WPA_SUPPLICANT_SUPPORT
/* send wireless event to wpa_supplicant for infroming interface down.*/
RtmpOSWrielessEventSend(pAd->net_dev, RT_WLAN_EVENT_CUSTOM, RT_INTERFACE_DOWN, NULL, NULL, 0);
#endif /* NATIVE_WPA_SUPPLICANT_SUPPORT */
if (pAd->StaCfg.pWpsProbeReqIe)
{
/* kfree(pAd->StaCfg.pWpsProbeReqIe);*/
os_free_mem(NULL, pAd->StaCfg.pWpsProbeReqIe);
pAd->StaCfg.pWpsProbeReqIe = NULL;
pAd->StaCfg.WpsProbeReqIeLen = 0;
}
if (pAd->StaCfg.pWpaAssocIe)
{
/* kfree(pAd->StaCfg.pWpaAssocIe);*/
os_free_mem(NULL, pAd->StaCfg.pWpaAssocIe);
pAd->StaCfg.pWpaAssocIe = NULL;
pAd->StaCfg.WpaAssocIeLen = 0;
}
#endif /* WPA_SUPPLICANT_SUPPORT */
}
#endif /* CONFIG_STA_SUPPORT */
}
PNET_DEV RtmpPhyNetDevMainCreate(
IN VOID *pAdSrc)
{
PRTMP_ADAPTER pAd = (PRTMP_ADAPTER)pAdSrc;
PNET_DEV pDevNew;
UINT32 MC_RowID = 0, IoctlIF = 0;
pAd = pAd;
#ifdef MULTIPLE_CARD_SUPPORT
MC_RowID = pAd->MC_RowID;
#endif /* MULTIPLE_CARD_SUPPORT */
#ifdef HOSTAPD_SUPPORT
IoctlIF = pAd->IoctlIF;
#endif /* HOSTAPD_SUPPORT */
pDevNew = RtmpOSNetDevCreate((INT32)MC_RowID, (UINT32 *)&IoctlIF,
INT_MAIN, 0, sizeof(PRTMP_ADAPTER), INF_MAIN_DEV_NAME);
#ifdef HOSTAPD_SUPPORT
pAd->IoctlIF = IoctlIF;
#endif /* HOSTAPD_SUPPORT */
return pDevNew;
}
/*
==========================================================================
Description:
Load RF normal operation-mode setup
==========================================================================
*/
VOID RT30xxLoadRFNormalModeSetup(
IN PRTMP_ADAPTER pAd)
{
UCHAR RFValue, bbpreg = 0;
{
// improve power consumption
RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R138, &bbpreg);
if (pAd->Antenna.field.TxPath == 1)
{
// turn off tx DAC_1
bbpreg = (bbpreg | 0x20);
}
if (pAd->Antenna.field.RxPath == 1)
{
// turn off tx ADC_1
bbpreg &= (~0x2);
}
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R138, bbpreg);
}
#ifdef RT53xx
if (IS_RT5390(pAd))
{
RT30xxReadRFRegister(pAd, RF_R38, (PUCHAR)&RFValue);
RFValue = ((RFValue & ~0x20) | 0x00); // rx_lo1_en (enable RX LO1, 0: LO1 follows TR switch)
RT30xxWriteRFRegister(pAd, RF_R38, (UCHAR)RFValue);
RT30xxReadRFRegister(pAd, RF_R39, (PUCHAR)&RFValue);
RFValue = ((RFValue & ~0x80) | 0x00); // rx_lo2_en (enable RX LO2, 0: LO2 follows TR switch)
RT30xxWriteRFRegister(pAd, RF_R39, (UCHAR)RFValue);
//
// Avoid data lost and CRC error
//
RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &bbpreg);
bbpreg = ((bbpreg & ~0x40) | 0x40); // MAC interface control (MAC_IF_80M, 1: 80 MHz)
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, bbpreg);
RT30xxReadRFRegister(pAd, RF_R30, (PUCHAR)&RFValue);
RFValue = ((RFValue & ~0x18) | 0x10); // rxvcm (Rx BB filter VCM)
RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RFValue);
}
else
#endif //RT53xx //
{
// RX0_PD & TX0_PD, RF R1 register Bit 2 & Bit 3 to 0 and RF_BLOCK_en,RX1_PD & TX1_PD, Bit0, Bit 4 & Bit5 to 1
RT30xxReadRFRegister(pAd, RF_R01, &RFValue);
RFValue = (RFValue & (~0x0C)) | 0x31;
RT30xxWriteRFRegister(pAd, RF_R01, RFValue);
// TX_LO2_en, RF R15 register Bit 3 to 0
RT30xxReadRFRegister(pAd, RF_R15, &RFValue);
RFValue &= (~0x08);
RT30xxWriteRFRegister(pAd, RF_R15, RFValue);
// TX_LO1_en, RF R17 register Bit 3 to 0
RT30xxReadRFRegister(pAd, RF_R17, &RFValue);
RFValue &= (~0x08);
// to fix rx long range issue
if (((pAd->MACVersion & 0xffff) >= 0x0211) && (pAd->NicConfig2.field.ExternalLNAForG == 0))
{
RFValue |= 0x20;
}
// set RF_R17_bit[2:0] equal to EEPROM setting at 0x48h
if (pAd->TxMixerGain24G >= 2)
{
RFValue &= (~0x7); // clean bit [2:0]
RFValue |= pAd->TxMixerGain24G;
}
RT30xxWriteRFRegister(pAd, RF_R17, RFValue);
// RX_LO1_en, RF R20 register Bit 3 to 0
RT30xxReadRFRegister(pAd, RF_R20, &RFValue);
RFValue &= (~0x08);
RT30xxWriteRFRegister(pAd, RF_R20, RFValue);
// RX_LO2_en, RF R21 register Bit 3 to 0
RT30xxReadRFRegister(pAd, RF_R21, &RFValue);
RFValue &= (~0x08);
RT30xxWriteRFRegister(pAd, RF_R21, RFValue);
}
}
/*
========================================================================
Routine Description:
For RF filter calibration purpose
Arguments:
pAd Pointer to our adapter
Return Value:
None
IRQL = PASSIVE_LEVEL
========================================================================
*/
VOID RTMPFilterCalibration(
IN PRTMP_ADAPTER pAd)
{
UCHAR R55x = 0, value, FilterTarget = 0x1E, BBPValue=0;
UINT loop = 0, count = 0, loopcnt = 0, ReTry = 0;
UCHAR RF_R24_Value = 0;
// Give bbp filter initial value
pAd->Mlme.CaliBW20RfR24 = 0x1F;
pAd->Mlme.CaliBW40RfR24 = 0x2F; //Bit[5] must be 1 for BW 40
do
{
if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))
return;
if (loop == 1) //BandWidth = 40 MHz
{
// Write 0x27 to RF_R24 to program filter
RT30xxReadRFRegister(pAd, RF_R24, (PUCHAR)(&RF_R24_Value));
RF_R24_Value = (RF_R24_Value & 0xC0) | 0x27; // <bit 5>:tx_h20M<bit 5> and <bit 4:0>:tx_agc_fc<bit 4:0>
RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
if (IS_RT3071(pAd) || IS_RT3572(pAd))
FilterTarget = 0x15;
else
FilterTarget = 0x19;
// when calibrate BW40, BBP mask must set to BW40.
RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue);
BBPValue&= (~0x18);
BBPValue|= (0x10);
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue);
// set to BW40
RT30xxReadRFRegister(pAd, RF_R31, &value);
value |= 0x20;
RT30xxWriteRFRegister(pAd, RF_R31, value);
}
else //BandWidth = 20 MHz
{
// Write 0x07 to RF_R24 to program filter
RT30xxReadRFRegister(pAd, RF_R24, (PUCHAR)(&RF_R24_Value));
RF_R24_Value = (RF_R24_Value & 0xC0) | 0x07; // <bit 5>:tx_h20M<bit 5> and <bit 4:0>:tx_agc_fc<bit 4:0>
RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
if (IS_RT3071(pAd) || IS_RT3572(pAd))
FilterTarget = 0x13;
else
FilterTarget = 0x16;
// set to BW20
RT30xxReadRFRegister(pAd, RF_R31, &value);
value &= (~0x20);
RT30xxWriteRFRegister(pAd, RF_R31, value);
}
// Write 0x01 to RF_R22 to enable baseband loopback mode
RT30xxReadRFRegister(pAd, RF_R22, &value);
value |= 0x01;
RT30xxWriteRFRegister(pAd, RF_R22, value);
// Write 0x00 to BBP_R24 to set power & frequency of passband test tone
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0);
do
{
if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))
return;
// Write 0x90 to BBP_R25 to transmit test tone
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R25, 0x90);
RTMPusecDelay(1000);
// Read BBP_R55[6:0] for received power, set R55x = BBP_R55[6:0]
RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R55, &value);
R55x = value & 0xFF;
} while ((ReTry++ < 100) && (R55x == 0));
// Write 0x06 to BBP_R24 to set power & frequency of stopband test tone
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0x06);
while(TRUE)
{
if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))
return;
// Write 0x90 to BBP_R25 to transmit test tone
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R25, 0x90);
//We need to wait for calibration
RTMPusecDelay(1000);
RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R55, &value);
value &= 0xFF;
if ((R55x - value) < FilterTarget)
{
RF_R24_Value ++;
}
else if ((R55x - value) == FilterTarget)
{
RF_R24_Value ++;
count ++;
}
else
{
break;
}
// prevent infinite loop cause driver hang.
if (loopcnt++ > 100)
{
DBGPRINT(RT_DEBUG_ERROR, ("RTMPFilterCalibration - can't find a valid value, loopcnt=%d stop calibrating", loopcnt));
break;
}
// Write RF_R24 to program filter
RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
}
if (count > 0)
{
RF_R24_Value = RF_R24_Value - ((count) ? (1) : (0));
}
// Store for future usage
if (loopcnt < 100)
{
if (loop++ == 0)
{
//BandWidth = 20 MHz
pAd->Mlme.CaliBW20RfR24 = (UCHAR)RF_R24_Value;
}
else
{
//BandWidth = 40 MHz
pAd->Mlme.CaliBW40RfR24 = (UCHAR)RF_R24_Value;
break;
}
}
else
break;
RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
// reset count
count = 0;
} while(TRUE);
//
// Set back to initial state
//
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0);
RT30xxReadRFRegister(pAd, RF_R22, &value);
value &= ~(0x01);
RT30xxWriteRFRegister(pAd, RF_R22, value);
//
// Check BBP R25 RF Calibration at bit 4. Patch from windows driver
//
RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R25, &BBPValue);
if (BBPValue & 0x10)
{
//
// Clear RF calibration
//
BBPValue &= (~0x10);
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R25, BBPValue);
DBGPRINT(RT_DEBUG_WARN, ("RTMPFilterCalibration, RF calibration should be done\n"));
}
// set BBP back to BW20
RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue);
BBPValue&= (~0x18);
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue);
DBGPRINT(RT_DEBUG_TRACE, ("RTMPFilterCalibration - CaliBW20RfR24=0x%x, CaliBW40RfR24=0x%x\n", pAd->Mlme.CaliBW20RfR24, pAd->Mlme.CaliBW40RfR24));
}
VOID NICInitRT3390RFRegisters(IN PRTMP_ADAPTER pAd)
{
INT i;
// Driver must read EEPROM to get RfIcType before initial RF registers
// Initialize RF register to default value
if (IS_RT3090(pAd)||IS_RT3390(pAd)||IS_RT3572(pAd))
{
// Init RF calibration
// Driver should toggle RF R30 bit7 before init RF registers
UINT32 RfReg = 0, data;
RT30xxReadRFRegister(pAd, RF_R30, (PUCHAR)&RfReg);
RfReg |= 0x80;
RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg);
RTMPusecDelay(1000);
RfReg &= 0x7F;
RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg);
// init R24, R31
RT30xxWriteRFRegister(pAd, RF_R24, 0x0F);
RT30xxWriteRFRegister(pAd, RF_R31, 0x0F);
if (IS_RT3390(pAd))
{
// patch LNA_PE_G1 failed issue
RTMP_IO_READ32(pAd, GPIO_SWITCH, &data);
data &= ~(0x20);
RTMP_IO_WRITE32(pAd, GPIO_SWITCH, data);
// RF registers initialization
for (i = 0; i < NUM_RF_REG_PARMS_OVER_RT3390; i++)
{
RT30xxWriteRFRegister(pAd, RFRegTableOverRT3390[i].Register, RFRegTableOverRT3390[i].Value);
}
}
// patch LNA_PE_G1 failed issue
RTMP_IO_READ32(pAd, GPIO_SWITCH, &data);
data &= ~(0x20);
RTMP_IO_WRITE32(pAd, GPIO_SWITCH, data);
// Initialize RF register to default value
for (i = 0; i < NUM_RF_REG_PARMS_OVER_RT3390; i++)
{
RT30xxWriteRFRegister(pAd, RFRegTableOverRT3390[i].Register, RFRegTableOverRT3390[i].Value);
}
// Driver should set RF R6 bit6 on before calibration
RT30xxReadRFRegister(pAd, RF_R06, (PUCHAR)&RfReg);
RfReg |= 0x40;
RT30xxWriteRFRegister(pAd, RF_R06, (UCHAR)RfReg);
//For RF filter Calibration
RTMPFilterCalibration(pAd);
// Initialize RF R27 register, set RF R27 must be behind RTMPFilterCalibration()
if ((pAd->MACVersion & 0xffff) < 0x0211)
RT30xxWriteRFRegister(pAd, RF_R27, 0x3);
// set led open drain enable
RTMP_IO_READ32(pAd, OPT_14, &data);
data |= 0x01;
RTMP_IO_WRITE32(pAd, OPT_14, data);
// set default antenna as main
if (pAd->RfIcType == RFIC_3020)
AsicSetRxAnt(pAd, pAd->RxAnt.Pair1PrimaryRxAnt);
// add by johnli, RF power sequence setup, load RF normal operation-mode setup
RT33xxLoadRFNormalModeSetup(pAd);
}
}
/*
==========================================================================
Description:
Reverse RF sleep-mode setup
==========================================================================
*/
VOID RT30xxReverseRFSleepModeSetup(
IN PRTMP_ADAPTER pAd)
{
UCHAR RFValue;
UINT32 MACValue;
if(!IS_RT3572(pAd))
{
#ifdef RT3593
if (IS_RT3593(pAd))
{
UCHAR rfreg;
RT30xxReadRFRegister(pAd, RF_R01, &rfreg);
rfreg = ((rfreg & ~0x01) | 0x01); // vco_en
RT30xxWriteRFRegister(pAd, RF_R01, rfreg);
RT30xxReadRFRegister(pAd, RF_R03, &rfreg);
rfreg |= 0x80; // vcocal_en (initiate VCO calibration (reset after completion))
RT30xxWriteRFRegister(pAd, RF_R03, rfreg);
RT30xxReadRFRegister(pAd, RF_R06, &rfreg);
rfreg |= 0x40; // vco_ic (VCO bias current control, 11: high)
RT30xxWriteRFRegister(pAd, RF_R06, rfreg);
RT30xxReadRFRegister(pAd, RF_R02, &rfreg);
rfreg |= 0x80; // rescal_en (initiate calibration)
RT30xxWriteRFRegister(pAd, RF_R02, rfreg);
RT30xxReadRFRegister(pAd, RF_R22, &rfreg);
rfreg = ((rfreg & ~0xE0) | 0x20); // cp_ic (reference current control, 001: 0.33 mA)
RT30xxWriteRFRegister(pAd, RF_R22, rfreg);
RT30xxReadRFRegister(pAd, RF_R46, &rfreg);
rfreg |= 0x20; // rx_ctb_en
RT30xxWriteRFRegister(pAd, RF_R46, rfreg);
RT30xxReadRFRegister(pAd, RF_R20, &rfreg);
rfreg &= (~0xEE); // ldo_rf_vc and ldo_pll_vc ( 111: +0.15)
RT30xxWriteRFRegister(pAd, RF_R20, rfreg);
}
else
#endif // RT3593 //
{
// RF_BLOCK_en, RF R1 register Bit 0 to 1
RT30xxReadRFRegister(pAd, RF_R01, &RFValue);
RFValue |= 0x01;
RT30xxWriteRFRegister(pAd, RF_R01, RFValue);
// VCO_IC, RF R7 register Bit 5 to 1 (VCO bias current control, 11: high)
RT30xxReadRFRegister(pAd, RF_R07, &RFValue);
RFValue |= 0x30;
RT30xxWriteRFRegister(pAd, RF_R07, RFValue);
// Idoh, RF R9 register Bit 1, Bit 2 & Bit 3 to 1
RT30xxReadRFRegister(pAd, RF_R09, &RFValue);
RFValue |= 0x0E;
RT30xxWriteRFRegister(pAd, RF_R09, RFValue);
// RX_CTB_en, RF R21 register Bit 7 to 1
RT30xxReadRFRegister(pAd, RF_R21, &RFValue);
RFValue |= 0x80;
RT30xxWriteRFRegister(pAd, RF_R21, RFValue);
}
}
if (IS_RT3090(pAd) || // IS_RT3090 including RT309x and RT3071/72
IS_RT3572(pAd) ||
IS_RT3390(pAd) ||
IS_RT3593(pAd) ||
(IS_RT3070(pAd) && ((pAd->MACVersion & 0xffff) < 0x0201)))
{
if ((!IS_RT3572(pAd)) && (!IS_RT3593(pAd)))
{
RT30xxReadRFRegister(pAd, RF_R27, &RFValue);
if ((pAd->MACVersion & 0xffff) < 0x0211)
RFValue = (RFValue & (~0x77)) | 0x3;
else
RFValue = (RFValue & (~0x77));
RT30xxWriteRFRegister(pAd, RF_R27, RFValue);
}
// RT3071 version E has fixed this issue
if ((pAd->NicConfig2.field.DACTestBit == 1) && ((pAd->MACVersion & 0xffff) < 0x0211))
{
// patch tx EVM issue temporarily
RTMP_IO_READ32(pAd, LDO_CFG0, &MACValue);
MACValue = ((MACValue & 0xE0FFFFFF) | 0x0D000000);
RTMP_IO_WRITE32(pAd, LDO_CFG0, MACValue);
}
// else if ((!IS_RT3090(pAd) && !IS_RT3593(pAd)) || (pAd->CommonCfg.PatchHWControl.field.LDOCfg == 1))
else if ((!IS_RT3090(pAd) && !IS_RT3593(pAd)))
{
RTMP_IO_READ32(pAd, LDO_CFG0, &MACValue);
MACValue = ((MACValue & 0xE0FFFFFF) | 0x01000000);
RTMP_IO_WRITE32(pAd, LDO_CFG0, MACValue);
}
}
if(IS_RT3572(pAd))
RT30xxWriteRFRegister(pAd, RF_R08, 0x80);
}
RTMP_BUILD_DRV_OPS_FUNCTION_BODY
#endif /* OS_ABL_FUNC_SUPPORT */
#endif /* LINUX */
int rt28xx_init(
IN VOID *pAdSrc,
IN PSTRING pDefaultMac,
IN PSTRING pHostName)
{
PRTMP_ADAPTER pAd = (PRTMP_ADAPTER)pAdSrc;
UINT index;
UCHAR TmpPhy;
NDIS_STATUS Status;
if (pAd == NULL)
return FALSE;
#ifdef RT3290
DBGPRINT(RT_DEBUG_OFF, ("MACVersion=0x%x\n", pAd->MACVersion));
if (IS_RT3290(pAd))
{
UINT32 MacRegValue;
OSCCTL_STRUC osCtrl = {.word = 0};
CMB_CTRL_STRUC cmbCtrl = {.word = 0};
WLAN_FUN_CTRL_STRUC WlanFunCtrl = {.word = 0};
RTMPEnableWlan(pAd, TRUE, TRUE);
//
// Too much time for reading efuse(enter/exit L1), and our device will hang up
// Disable L1
//
RTMP_IO_READ32(pAd, WLAN_FUN_CTRL, &WlanFunCtrl.word);
if (WlanFunCtrl.field.WLAN_EN == TRUE)
{
WlanFunCtrl.field.PCIE_APP0_CLK_REQ = TRUE;
RTMP_IO_WRITE32(pAd, WLAN_FUN_CTRL, WlanFunCtrl.word);
}
//Enable ROSC_EN first then CAL_REQ
RTMP_IO_READ32(pAd, OSCCTL, &osCtrl.word);
osCtrl.field.ROSC_EN = TRUE; //HW force
RTMP_IO_WRITE32(pAd, OSCCTL, osCtrl.word);
osCtrl.field.ROSC_EN = TRUE; //HW force
osCtrl.field.CAL_REQ = TRUE;
osCtrl.field.REF_CYCLE = 0x27;
RTMP_IO_WRITE32(pAd, OSCCTL, osCtrl.word);
RTMP_IO_READ32(pAd, CMB_CTRL, &cmbCtrl.word);
pAd->CmbCtrl.word = cmbCtrl.word;
// Overwrite default Coex Parameter
RTMP_IO_READ32(pAd, COEXCFG0, &MacRegValue);
MacRegValue &= ~(0xFF000000);
MacRegValue |= 0x5E000000;
RTMP_IO_WRITE32(pAd, COEXCFG0, MacRegValue);
}
if (IS_RT3290LE(pAd))
{
PLL_CTRL_STRUC PllCtrl;
RTMP_IO_READ32(pAd, PLL_CTRL, &PllCtrl.word);
PllCtrl.field.VCO_FIXED_CURRENT_CONTROL = 0x1;
RTMP_IO_WRITE32(pAd, PLL_CTRL, PllCtrl.word);
}
#endif /* RT3290 */
#ifdef CONFIG_STA_SUPPORT
#ifdef PCIE_PS_SUPPORT
IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
{
/* If dirver doesn't wake up firmware here,*/
/* NICLoadFirmware will hang forever when interface is up again.*/
if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_DOZE) &&
OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_ADVANCE_POWER_SAVE_PCIE_DEVICE))
{
AUTO_WAKEUP_STRUC AutoWakeupCfg;
AsicForceWakeup(pAd, TRUE);
AutoWakeupCfg.word = 0;
RTMP_IO_WRITE32(pAd, AUTO_WAKEUP_CFG, AutoWakeupCfg.word);
OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_DOZE);
}
}
#endif /* PCIE_PS_SUPPORT */
#endif /* CONFIG_STA_SUPPORT */
/* reset Adapter flags*/
RTMP_CLEAR_FLAGS(pAd);
/* Init BssTab & ChannelInfo tabbles for auto channel select.*/
#ifdef CONFIG_AP_SUPPORT
IF_DEV_CONFIG_OPMODE_ON_AP(pAd)
{
/*#ifdef AUTO_CH_SELECT_ENHANCE*/
AutoChBssTableInit(pAd);
ChannelInfoInit(pAd);
/*#endif AUTO_CH_SELECT_ENHANCE */
}
#endif /* CONFIG_AP_SUPPORT */
#ifdef DOT11_N_SUPPORT
/* Allocate BA Reordering memory*/
if (ba_reordering_resource_init(pAd, MAX_REORDERING_MPDU_NUM) != TRUE)
goto err1;
#endif /* DOT11_N_SUPPORT */
/* Make sure MAC gets ready.*/
index = 0;
if (WaitForAsicReady(pAd) != TRUE)
goto err1;
DBGPRINT(RT_DEBUG_TRACE, ("MAC[Ver:Rev=0x%08x]\n", pAd->MACVersion));
if (MAX_LEN_OF_MAC_TABLE > MAX_AVAILABLE_CLIENT_WCID(pAd))
{
DBGPRINT(RT_DEBUG_ERROR, ("MAX_LEN_OF_MAC_TABLE can not be larger than MAX_AVAILABLE_CLIENT_WCID!!!!\n"));
goto err1;
}
/* Disable DMA*/
RT28XXDMADisable(pAd);
/* Load 8051 firmware*/
Status = NICLoadFirmware(pAd);
if (Status != NDIS_STATUS_SUCCESS)
{
DBGPRINT_ERR(("NICLoadFirmware failed, Status[=0x%08x]\n", Status));
goto err1;
}
NICLoadRateSwitchingParams(pAd);
/* Disable interrupts here which is as soon as possible*/
/* This statement should never be true. We might consider to remove it later*/
#ifdef RESOURCE_PRE_ALLOC
Status = RTMPInitTxRxRingMemory(pAd);
#else
Status = RTMPAllocTxRxRingMemory(pAd);
#endif /* RESOURCE_PRE_ALLOC */
if (Status != NDIS_STATUS_SUCCESS)
{
DBGPRINT_ERR(("RTMPAllocTxRxMemory failed, Status[=0x%08x]\n", Status));
goto err2;
}
RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE);
/* initialize MLME*/
Status = RtmpMgmtTaskInit(pAd);
if (Status != NDIS_STATUS_SUCCESS)
goto err3;
Status = MlmeInit(pAd);
if (Status != NDIS_STATUS_SUCCESS)
{
DBGPRINT_ERR(("MlmeInit failed, Status[=0x%08x]\n", Status));
goto err4;
}
#ifdef RMTP_RBUS_SUPPORT
#ifdef VIDEO_TURBINE_SUPPORT
VideoConfigInit(pAd);
#endif /* VIDEO_TURBINE_SUPPORT */
#endif /* RMTP_RBUS_SUPPORT */
/* Initialize pAd->StaCfg, pAd->ApCfg, pAd->CommonCfg to manufacture default*/
UserCfgInit(pAd);
Status = RtmpNetTaskInit(pAd);
if (Status != NDIS_STATUS_SUCCESS)
goto err5;
/* COPY_MAC_ADDR(pAd->ApCfg.MBSSID[apidx].Bssid, netif->hwaddr);*/
/* pAd->bForcePrintTX = TRUE;*/
CfgInitHook(pAd);
#ifdef CONFIG_AP_SUPPORT
if ((pAd->OpMode == OPMODE_AP)
#ifdef P2P_SUPPORT
|| TRUE
#endif /* P2P_SUPPORT */
)
APInitialize(pAd);
#endif /* CONFIG_AP_SUPPORT */
#ifdef BLOCK_NET_IF
initblockQueueTab(pAd);
#endif /* BLOCK_NET_IF */
Status = MeasureReqTabInit(pAd);
if (Status != NDIS_STATUS_SUCCESS)
{
DBGPRINT_ERR(("MeasureReqTabInit failed, Status[=0x%08x]\n",Status));
goto err6;
}
Status = TpcReqTabInit(pAd);
if (Status != NDIS_STATUS_SUCCESS)
{
DBGPRINT_ERR(("TpcReqTabInit failed, Status[=0x%08x]\n",Status));
goto err6;
}
/* Init the hardware, we need to init asic before read registry, otherwise mac register will be reset*/
Status = NICInitializeAdapter(pAd, TRUE);
if (Status != NDIS_STATUS_SUCCESS)
{
DBGPRINT_ERR(("NICInitializeAdapter failed, Status[=0x%08x]\n", Status));
if (Status != NDIS_STATUS_SUCCESS)
goto err6;
}
#ifdef CONFIG_AP_SUPPORT
IF_DEV_CONFIG_OPMODE_ON_AP(pAd)
{
}
#endif /* CONFIG_AP_SUPPORT */
/* Read parameters from Config File */
/* unknown, it will be updated in NICReadEEPROMParameters */
pAd->RfIcType = RFIC_UNKNOWN;
Status = RTMPReadParametersHook(pAd);
#ifdef CONFIG_STA_SUPPORT
#ifdef CREDENTIAL_STORE
RecoverConnectInfo(pAd);
#endif /* CREDENTIAL_STORE */
#endif /* CONFIG_STA_SUPPORT */
DBGPRINT(RT_DEBUG_OFF, ("1. Phy Mode = %d\n", pAd->CommonCfg.PhyMode));
if (Status != NDIS_STATUS_SUCCESS)
{
DBGPRINT_ERR(("RTMPReadParametersHook failed, Status[=0x%08x]\n",Status));
goto err6;
}
#ifdef RTMP_MAC_USB
pAd->CommonCfg.bMultipleIRP = FALSE;
if (pAd->CommonCfg.bMultipleIRP)
pAd->CommonCfg.NumOfBulkInIRP = RX_RING_SIZE;
else
pAd->CommonCfg.NumOfBulkInIRP = 1;
#endif /* RTMP_MAC_USB */
#ifdef DOT11_N_SUPPORT
/*Init Ba Capability parameters.*/
/* RT28XX_BA_INIT(pAd);*/
pAd->CommonCfg.DesiredHtPhy.MpduDensity = (UCHAR)pAd->CommonCfg.BACapability.field.MpduDensity;
pAd->CommonCfg.DesiredHtPhy.AmsduEnable = (USHORT)pAd->CommonCfg.BACapability.field.AmsduEnable;
pAd->CommonCfg.DesiredHtPhy.AmsduSize = (USHORT)pAd->CommonCfg.BACapability.field.AmsduSize;
pAd->CommonCfg.DesiredHtPhy.MimoPs = (USHORT)pAd->CommonCfg.BACapability.field.MMPSmode;
/* UPdata to HT IE*/
pAd->CommonCfg.HtCapability.HtCapInfo.MimoPs = (USHORT)pAd->CommonCfg.BACapability.field.MMPSmode;
pAd->CommonCfg.HtCapability.HtCapInfo.AMsduSize = (USHORT)pAd->CommonCfg.BACapability.field.AmsduSize;
pAd->CommonCfg.HtCapability.HtCapParm.MpduDensity = (UCHAR)pAd->CommonCfg.BACapability.field.MpduDensity;
#endif /* DOT11_N_SUPPORT */
/* after reading Registry, we now know if in AP mode or STA mode*/
/* Load 8051 firmware; crash when FW image not existent*/
/* Status = NICLoadFirmware(pAd);*/
/* if (Status != NDIS_STATUS_SUCCESS)*/
/* break;*/
DBGPRINT(RT_DEBUG_OFF, ("2. Phy Mode = %d\n", pAd->CommonCfg.PhyMode));
/* We should read EEPROM for all cases. rt2860b*/
NICReadEEPROMParameters(pAd, (PSTRING)pDefaultMac);
#ifdef CONFIG_STA_SUPPORT
#endif /* CONFIG_STA_SUPPORT */
DBGPRINT(RT_DEBUG_OFF, ("3. Phy Mode = %d\n", pAd->CommonCfg.PhyMode));
#ifdef LED_CONTROL_SUPPORT
/* Send LED Setting to MCU */
RTMPInitLEDMode(pAd);
#endif /* LED_CONTROL_SUPPORT */
NICInitAsicFromEEPROM(pAd); /* rt2860b */
#ifdef RALINK_ATE
if (ATEInit(pAd) != NDIS_STATUS_SUCCESS)
{
DBGPRINT(RT_DEBUG_ERROR, ("%s(): ATE initialization failed !\n", __FUNCTION__));
goto err6;
}
#endif /* RALINK_ATE */
#ifdef RTMP_FREQ_CALIBRATION_SUPPORT
#ifdef CONFIG_STA_SUPPORT
/* Initialize the frequency calibration*/
if (pAd->chipCap.FreqCalibrationSupport)
FrequencyCalibration(pAd);
#endif /* CONFIG_STA_SUPPORT */
#endif /* RTMP_FREQ_CALIBRATION_SUPPORT */
#ifdef RTMP_INTERNAL_TX_ALC
/* Initialize the desired TSSI table*/
RTMP_CHIP_ASIC_TSSI_TABLE_INIT(pAd);
#endif /* RTMP_INTERNAL_TX_ALC */
#ifdef RTMP_TEMPERATURE_COMPENSATION
/* Temperature compensation, initialize the lookup table */
DBGPRINT(RT_DEBUG_OFF, ("bAutoTxAgcG = %d\n", pAd->bAutoTxAgcG));
if (pAd->chipCap.bTempCompTxALC && pAd->bAutoTxAgcG)
InitLookupTable(pAd);
#endif /* RTMP_TEMPERATURE_COMPENSATION */
#ifdef RTMP_FREQ_CALIBRATION_SUPPORT
#ifdef CONFIG_STA_SUPPORT
if (pAd->chipCap.FreqCalibrationSupport)
InitFrequencyCalibration(pAd);
#endif /* CONFIG_STA_SUPPORT */
#endif /* RTMP_FREQ_CALIBRATION_SUPPORT */
/* Set PHY to appropriate mode*/
TmpPhy = pAd->CommonCfg.PhyMode;
pAd->CommonCfg.PhyMode = 0xff;
RTMPSetPhyMode(pAd, TmpPhy);
#ifdef DOT11_N_SUPPORT
SetCommonHT(pAd);
#endif /* DOT11_N_SUPPORT */
/* No valid channels.*/
if (pAd->ChannelListNum == 0)
{
DBGPRINT(RT_DEBUG_ERROR, ("Wrong configuration. No valid channel found. Check \"ContryCode\" and \"ChannelGeography\" setting.\n"));
goto err6;
}
#ifdef DOT11_N_SUPPORT
DBGPRINT(RT_DEBUG_OFF, ("MCS Set = %02x %02x %02x %02x %02x\n", pAd->CommonCfg.HtCapability.MCSSet[0],
pAd->CommonCfg.HtCapability.MCSSet[1], pAd->CommonCfg.HtCapability.MCSSet[2],
pAd->CommonCfg.HtCapability.MCSSet[3], pAd->CommonCfg.HtCapability.MCSSet[4]));
#endif /* DOT11_N_SUPPORT */
#ifdef CONFIG_AP_SUPPORT
IF_DEV_CONFIG_OPMODE_ON_AP(pAd)
{
#ifdef AP_QLOAD_SUPPORT
/* init QBSS Element */
QBSS_LoadInit(pAd);
#endif /* AP_QLOAD_SUPPORT */
}
#endif /* CONFIG_AP_SUPPORT */
/* APInitialize(pAd);*/
#ifdef IKANOS_VX_1X0
VR_IKANOS_FP_Init(pAd->ApCfg.BssidNum, pAd->PermanentAddress);
#endif /* IKANOS_VX_1X0 */
#ifdef RTMP_MAC_USB
AsicSendCommandToMcu(pAd, 0x31, 0xff, 0x00, 0x02, FALSE);
RTMPusecDelay(10000);
#endif /* RTMP_MAC_USB */
#ifdef RALINK_ATE
#ifdef RT5592
#ifdef RTMP_RF_RW_SUPPORT
/* both for RT5572 and RT5592 */
if (IS_RT5592(pAd))
{
RT55x2ATEFilterCalibration(pAd);
}
#endif /* RTMP_RF_RW_SUPPORT */
#endif /* RT5592 */
#endif /* RALINK_ATE */
#ifdef CONFIG_AP_SUPPORT
/* Initialize RF register to default value*/
if (pAd->OpMode == OPMODE_AP)
{
AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
AsicLockChannel(pAd, pAd->CommonCfg.Channel);
}
#endif /* CONFIG_AP_SUPPORT */
/*
Some modules init must be called before APStartUp().
Or APStartUp() will make up beacon content and call
other modules API to get some information to fill.
*/
#ifdef CONFIG_TSO_SUPPORT
if (RTMP_TEST_MORE_FLAG(pAd, fRTMP_ADAPTER_TSO_SUPPORT))
RTMPTsoEnable(pAd);
#endif /* CONFIG_TSO_SUPPORT */
if (pAd && (Status != NDIS_STATUS_SUCCESS))
{
/* Undo everything if it failed*/
if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE))
{
/* NdisMDeregisterInterrupt(&pAd->Interrupt);*/
RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE);
}
/* RTMPFreeAdapter(pAd); we will free it in disconnect()*/
}
else if (pAd)
{
/* Microsoft HCT require driver send a disconnect event after driver initialization.*/
OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED);
OPSTATUS_CLEAR_FLAG(pAd, fOP_AP_STATUS_MEDIA_STATE_CONNECTED);
RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_MEDIA_STATE_CHANGE);
DBGPRINT(RT_DEBUG_TRACE, ("NDIS_STATUS_MEDIA_DISCONNECT Event B!\n"));
#ifdef CONFIG_AP_SUPPORT
IF_DEV_CONFIG_OPMODE_ON_AP(pAd)
{
if (pAd->ApCfg.bAutoChannelAtBootup || (pAd->CommonCfg.Channel == 0))
{
UINT8 BBPValue = 0;
/* Enable Interrupt first due to we need to scan channel to receive beacons.*/
RTMP_IRQ_ENABLE(pAd);
#ifdef RTMP_MAC_USB
RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_RESET_IN_PROGRESS);
RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_REMOVE_IN_PROGRESS);
/* Support multiple BulkIn IRP,*/
/* the value on pAd->CommonCfg.NumOfBulkInIRP may be large than 1.*/
for(index=0; index<pAd->CommonCfg.NumOfBulkInIRP; index++)
{
RTUSBBulkReceive(pAd);
DBGPRINT(RT_DEBUG_TRACE, ("RTUSBBulkReceive!\n" ));
}
#endif /* RTMP_MAC_USB */
/* Now Enable RxTx*/
RTMPEnableRxTx(pAd);
RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_START_UP);
/* Let BBP register at 20MHz to do scan */
RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue);
BBPValue &= (~0x18);
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue);
DBGPRINT(RT_DEBUG_ERROR, ("SYNC - BBP R4 to 20MHz.l\n"));
/* Now we can receive the beacon and do the listen beacon*/
/* use default BW to select channel*/
pAd->CommonCfg.Channel = AP_AUTO_CH_SEL(pAd, pAd->ApCfg.AutoChannelAlg);
pAd->ApCfg.bAutoChannelAtBootup = FALSE;
}
#ifdef DOT11_N_SUPPORT
/* If phymode > PHY_11ABGN_MIXED and BW=40 check extension channel, after select channel */
N_ChannelCheck(pAd);
#ifdef DOT11N_DRAFT3
/*
We only do this Overlapping BSS Scan when system up, for the
other situation of channel changing, we depends on station's
report to adjust ourself.
*/
if (pAd->CommonCfg.bForty_Mhz_Intolerant == TRUE)
{
DBGPRINT(RT_DEBUG_TRACE, ("Disable 20/40 BSSCoex Channel Scan(BssCoex=%d, 40MHzIntolerant=%d)\n",
pAd->CommonCfg.bBssCoexEnable,
pAd->CommonCfg.bForty_Mhz_Intolerant));
}
else if(pAd->CommonCfg.bBssCoexEnable == TRUE)
{
DBGPRINT(RT_DEBUG_TRACE, ("Enable 20/40 BSSCoex Channel Scan(BssCoex=%d)\n",
pAd->CommonCfg.bBssCoexEnable));
APOverlappingBSSScan(pAd);
}
RTMP_11N_D3_TimerInit(pAd);
/* RTMPInitTimer(pAd, &pAd->CommonCfg.Bss2040CoexistTimer, GET_TIMER_FUNCTION(Bss2040CoexistTimeOut), pAd, FALSE);*/
#endif /* DOT11N_DRAFT3 */
#endif /* DOT11_N_SUPPORT */
APStartUp(pAd);
DBGPRINT(RT_DEBUG_OFF, ("Main bssid = %02x:%02x:%02x:%02x:%02x:%02x\n",
PRINT_MAC(pAd->ApCfg.MBSSID[BSS0].Bssid)));
}
#endif /* CONFIG_AP_SUPPORT */
#ifdef RTMP_MAC_USB
RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_RESET_IN_PROGRESS);
RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_REMOVE_IN_PROGRESS);
/* Support multiple BulkIn IRP,*/
/* the value on pAd->CommonCfg.NumOfBulkInIRP may be large than 1.*/
for(index=0; index<pAd->CommonCfg.NumOfBulkInIRP; index++)
{
RTUSBBulkReceive(pAd);
DBGPRINT(RT_DEBUG_TRACE, ("RTUSBBulkReceive!\n" ));
}
#endif /* RTMP_MAC_USB */
}/* end of else*/
/* Set up the Mac address*/
#ifdef CONFIG_AP_SUPPORT
#ifndef P2P_APCLI_SUPPORT
RtmpOSNetDevAddrSet(pAd->OpMode, pAd->net_dev, &pAd->CurrentAddress[0], NULL);
#endif /* P2P_APCLI_SUPPORT */
#endif /* CONFIG_AP_SUPPORT */
#ifdef CONFIG_STA_SUPPORT
RtmpOSNetDevAddrSet(pAd->OpMode, pAd->net_dev, &pAd->CurrentAddress[0], (PUCHAR)(pAd->StaCfg.dev_name));
#endif /* CONFIG_STA_SUPPORT */
/* Various AP function init*/
#ifdef CONFIG_AP_SUPPORT
#ifdef P2P_SUPPORT
#else
IF_DEV_CONFIG_OPMODE_ON_AP(pAd)
#endif /* P2P_SUPPORT */
{
#ifdef MBSS_SUPPORT
/* the function can not be moved to RT2860_probe() even register_netdev()
is changed as register_netdevice().
Or in some PC, kernel will panic (Fedora 4) */
/* RT28xx_MBSS_Init(pAd, pAd->net_dev); os abl move to rt_main_dev.c*/
#endif /* MBSS_SUPPORT */
#ifdef APCLI_SUPPORT
/* RT28xx_ApCli_Init(pAd, pAd->net_dev);*/
#endif /* APCLI_SUPPORT */
}
#endif /* CONFIG_AP_SUPPORT */
#ifdef UAPSD_SUPPORT
UAPSD_Init(pAd);
#endif /* UAPSD_SUPPORT */
/* assign function pointers*/
#ifdef MAT_SUPPORT
/* init function pointers, used in OS_ABL */
RTMP_MATOpsInit(pAd);
#endif /* MAT_SUPPORT */
#ifdef P2P_SUPPORT
/* RTMP_P2P_Init(pAd, pAd->net_dev); */
#endif /* P2P_SUPPORT */
#ifdef CONFIG_AP_SUPPORT
IF_DEV_CONFIG_OPMODE_ON_AP(pAd)
{
#ifdef MAT_SUPPORT
MATEngineInit(pAd);
#endif /* MAT_SUPPORT */
#ifdef CLIENT_WDS
CliWds_ProxyTabInit(pAd);
#endif /* CLIENT_WDS */
}
#endif /* CONFIG_AP_SUPPORT */
#ifdef CONFIG_STA_SUPPORT
IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
{
#ifdef DOT11Z_TDLS_SUPPORT
TDLS_Table_Init(pAd);
#endif /* DOT11Z_TDLS_SUPPORT */
#ifdef WPA_SUPPLICANT_SUPPORT
#ifndef NATIVE_WPA_SUPPLICANT_SUPPORT
/* send wireless event to wpa_supplicant for infroming interface up.*/
RtmpOSWrielessEventSend(pAd->net_dev, RT_WLAN_EVENT_CUSTOM, RT_INTERFACE_UP, NULL, NULL, 0);
#endif /* NATIVE_WPA_SUPPLICANT_SUPPORT */
#endif /* WPA_SUPPLICANT_SUPPORT */
}
#endif /* CONFIG_STA_SUPPORT */
/* auto-fall back settings */
#ifdef RANGE_EXTEND
RTMP_IO_WRITE32(pAd, HT_FBK_CFG1, 0xedcba980);
#endif // RANGE_EXTEND //
#ifdef DOT11N_SS3_SUPPORT
if (pAd->CommonCfg.TxStream >= 3)
{
RTMP_IO_WRITE32(pAd, TX_FBK_CFG_3S_0, 0x12111008);
RTMP_IO_WRITE32(pAd, TX_FBK_CFG_3S_1, 0x16151413);
}
#endif /* DOT11N_SS3_SUPPORT */
#ifdef STREAM_MODE_SUPPORT
RtmpStreamModeInit(pAd);
#endif /* STREAM_MODE_SUPPORT */
#ifdef DOT11_N_SUPPORT
#endif /* DOT11_N_SUPPORT */
#ifdef RT3290
if (IS_RT3290(pAd))
{
WLAN_FUN_CTRL_STRUC WlanFunCtrl = {.word = 0};
RTMP_MAC_PWRSV_EN(pAd, TRUE, TRUE);
//
// Too much time for reading efuse(enter/exit L1), and our device will hang up
// Enable L1
//
RTMP_IO_READ32(pAd, WLAN_FUN_CTRL, &WlanFunCtrl.word);
if (WlanFunCtrl.field.WLAN_EN == TRUE)
{
WlanFunCtrl.field.PCIE_APP0_CLK_REQ = FALSE;
RTMP_IO_WRITE32(pAd, WLAN_FUN_CTRL, WlanFunCtrl.word);
}
}
#endif /* RT3290 */
DBGPRINT_S(Status, ("<==== rt28xx_init, Status=%x\n", Status));
return TRUE;
/*err7:
APStop(pAd);*/
err6:
#ifdef IGMP_SNOOP_SUPPORT
MultiCastFilterTableReset(&pAd->pMulticastFilterTable);
#endif /* IGMP_SNOOP_SUPPORT */
MeasureReqTabExit(pAd);
TpcReqTabExit(pAd);
err5:
RtmpNetTaskExit(pAd);
UserCfgExit(pAd);
err4:
MlmeHalt(pAd);
RTMP_TimerListRelease(pAd);
err3:
RtmpMgmtTaskExit(pAd);
#ifdef RTMP_TIMER_TASK_SUPPORT
NdisFreeSpinLock(&pAd->TimerQLock);
#endif /* RTMP_TIMER_TASK_SUPPORT */
err2:
#ifdef RESOURCE_PRE_ALLOC
RTMPResetTxRxRingMemory(pAd);
#else
RTMPFreeTxRxRingMemory(pAd);
#endif /* RESOURCE_PRE_ALLOC */
err1:
#ifdef CONFIG_AP_SUPPORT
/* Free BssTab & ChannelInfo tabbles.*/
AutoChBssTableDestroy(pAd);
ChannelInfoDestroy(pAd);
#endif /* CONFIG_AP_SUPPORT */
#ifdef RT3290
if (IS_RT3290(pAd))
RTMPEnableWlan(pAd, FALSE, FALSE);
#endif /* RT3290 */
#ifdef DOT11_N_SUPPORT
if(pAd->mpdu_blk_pool.mem)
os_free_mem(pAd, pAd->mpdu_blk_pool.mem); /* free BA pool*/
#endif /* DOT11_N_SUPPORT */
/* shall not set priv to NULL here because the priv didn't been free yet.*/
/*net_dev->priv = 0;*/
#ifdef INF_AMAZON_SE
err0:
#endif /* INF_AMAZON_SE */
#ifdef ST
err0:
#endif /* ST */
DBGPRINT(RT_DEBUG_ERROR, ("!!! rt28xx Initialized fail !!!\n"));
return FALSE;
}
VOID RTMPDrvOpen(
IN VOID *pAdSrc)
{
PRTMP_ADAPTER pAd = (PRTMP_ADAPTER)pAdSrc;
#ifdef CONFIG_STA_SUPPORT
#endif /* CONFIG_STA_SUPPORT */
/* Enable Interrupt*/
RTMP_IRQ_ENABLE(pAd);
/* Now Enable RxTx*/
RTMPEnableRxTx(pAd);
RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_START_UP);
{
UINT32 reg = 0;
RTMP_IO_READ32(pAd, 0x1300, ®); /* clear garbage interrupts*/
printk("0x1300 = %08x\n", reg);
}
{
/* u32 reg;*/
/* UINT8 byte;*/
/* u16 tmp;*/
/* RTMP_IO_READ32(pAd, XIFS_TIME_CFG, ®);*/
/* tmp = 0x0805;*/
/* reg = (reg & 0xffff0000) | tmp;*/
/* RTMP_IO_WRITE32(pAd, XIFS_TIME_CFG, reg);*/
}
#ifdef CONFIG_STA_SUPPORT
#ifdef PCIE_PS_SUPPORT
IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
RTMPInitPCIeLinkCtrlValue(pAd);
#endif /* PCIE_PS_SUPPORT */
#endif /* CONFIG_STA_SUPPORT */
#ifdef CONFIG_AP_SUPPORT
#ifdef BG_FT_SUPPORT
BG_FTPH_Init();
#endif /* BG_FT_SUPPORT */
#endif /* CONFIG_AP_SUPPORT */
#ifdef CONFIG_STA_SUPPORT
/*
To reduce connection time,
do auto reconnect here instead of waiting STAMlmePeriodicExec to do auto reconnect.
*/
if (pAd->OpMode == OPMODE_STA)
MlmeAutoReconnectLastSSID(pAd);
#endif /* CONFIG_STA_SUPPORT */
#ifdef CONFIG_STA_SUPPORT
#endif /* CONFIG_STA_SUPPORT */
#ifdef WSC_INCLUDED
#ifdef CONFIG_AP_SUPPORT
if ((pAd->OpMode == OPMODE_AP)
#ifdef P2P_SUPPORT
/* P2P will use ApCfg.MBSSID and ApCfg.ApCliTab also. */
|| TRUE
#endif /* P2P_SUPPORT */
)
{
int index;
for (index = 0; index < pAd->ApCfg.BssidNum; index++)
{
#ifdef HOSTAPD_SUPPORT
if (pAd->ApCfg.MBSSID[index].Hostapd == TRUE)
{
DBGPRINT(RT_DEBUG_TRACE, ("WPS is control by hostapd now.\n"));
}
else
#endif /*HOSTAPD_SUPPORT*/
{
PWSC_CTRL pWscControl;
UCHAR zeros16[16]= {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0};
pWscControl = &pAd->ApCfg.MBSSID[index].WscControl;
DBGPRINT(RT_DEBUG_TRACE, ("Generate UUID for apidx(%d)\n", index));
if (NdisEqualMemory(&pWscControl->Wsc_Uuid_E[0], zeros16, UUID_LEN_HEX))
WscGenerateUUID(pAd, &pWscControl->Wsc_Uuid_E[0], &pWscControl->Wsc_Uuid_Str[0], index, FALSE);
WscInit(pAd, FALSE, index);
}
}
#ifdef APCLI_SUPPORT
for(index = 0; index < MAX_APCLI_NUM; index++)
{
PWSC_CTRL pWpsCtrl = &pAd->ApCfg.ApCliTab[index].WscControl;
pWpsCtrl->pAd = pAd;
NdisZeroMemory(pWpsCtrl->EntryAddr, MAC_ADDR_LEN);
pWpsCtrl->WscConfigMethods= 0x018C;
RTMP_AP_IoctlHandle(pAd, NULL, CMD_RTPRIV_IOCTL_WSC_INIT, 0, (VOID *)&pAd->ApCfg.ApCliTab[index], index);
}
#endif /* APCLI_SUPPORT */
}
#endif /* CONFIG_AP_SUPPORT */
#ifdef CONFIG_STA_SUPPORT
IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
{
PWSC_CTRL pWscControl = &pAd->StaCfg.WscControl;
WscGenerateUUID(pAd, &pWscControl->Wsc_Uuid_E[0], &pWscControl->Wsc_Uuid_Str[0], 0, FALSE);
WscInit(pAd, FALSE, BSS0);
#ifdef WSC_V2_SUPPORT
WscInitRegistrarPair(pAd, &pAd->StaCfg.WscControl, BSS0);
#endif /* WSC_V2_SUPPORT */
}
#endif /* CONFIG_STA_SUPPORT */
/* WSC hardware push button function 0811 */
WSC_HDR_BTN_Init(pAd);
#endif /* WSC_INCLUDED */
}
VOID RTMPDrvClose(
IN VOID *pAdSrc,
IN VOID *net_dev)
{
PRTMP_ADAPTER pAd = (PRTMP_ADAPTER)pAdSrc;
BOOLEAN Cancelled;
UINT32 i = 0;
Cancelled = FALSE;
#ifdef CONFIG_STA_SUPPORT
#ifdef CREDENTIAL_STORE
if (pAd->IndicateMediaState == NdisMediaStateConnected)
{
StoreConnectInfo(pAd);
}
else
{
RTMP_SEM_LOCK(&pAd->StaCtIf.Lock);
pAd->StaCtIf.Changeable = FALSE;
RTMP_SEM_UNLOCK(&pAd->StaCtIf.Lock);
}
#endif /* CREDENTIAL_STORE */
#endif /* CONFIG_STA_SUPPORT */
#ifdef CONFIG_AP_SUPPORT
#ifdef BG_FT_SUPPORT
BG_FTPH_Remove();
#endif /* BG_FT_SUPPORT */
#endif /* CONFIG_AP_SUPPORT */
#ifdef CONFIG_STA_SUPPORT
IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
{
#ifdef PCIE_PS_SUPPORT
RTMPPCIeLinkCtrlValueRestore(pAd, RESTORE_CLOSE);
#endif /* PCIE_PS_SUPPORT */
/* If dirver doesn't wake up firmware here,*/
/* NICLoadFirmware will hang forever when interface is up again.*/
if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_DOZE))
{
AsicForceWakeup(pAd, TRUE);
}
#ifdef RTMP_MAC_USB
RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_REMOVE_IN_PROGRESS);
#endif /* RTMP_MAC_USB */
}
#endif /* CONFIG_STA_SUPPORT */
RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS);
#ifdef EXT_BUILD_CHANNEL_LIST
if (pAd->CommonCfg.pChDesp != NULL)
os_free_mem(NULL, pAd->CommonCfg.pChDesp);
pAd->CommonCfg.pChDesp = NULL;
pAd->CommonCfg.DfsType = MAX_RD_REGION;
pAd->CommonCfg.bCountryFlag = 0;
#endif /* EXT_BUILD_CHANNEL_LIST */
for (i = 0 ; i < NUM_OF_TX_RING; i++)
{
while (pAd->DeQueueRunning[i] == TRUE)
{
DBGPRINT(RT_DEBUG_TRACE, ("Waiting for TxQueue[%d] done..........\n", i));
RTMPusecDelay(1000);
}
}
#ifdef RTMP_MAC_USB
RtmpOsUsbEmptyUrbCheck(&pAd->wait, &pAd->BulkInLock, &pAd->PendingRx);
#endif /* RTMP_MAC_USB */
#ifdef CONFIG_AP_SUPPORT
IF_DEV_CONFIG_OPMODE_ON_AP(pAd)
{
#ifdef RTMP_MAC_USB
RTMPCancelTimer(&pAd->CommonCfg.BeaconUpdateTimer, &Cancelled);
#endif /* RTMP_MAC_USB */
#ifdef DOT11N_DRAFT3
if (pAd->CommonCfg.Bss2040CoexistFlag & BSS_2040_COEXIST_TIMER_FIRED)
{
RTMPCancelTimer(&pAd->CommonCfg.Bss2040CoexistTimer, &Cancelled);
pAd->CommonCfg.Bss2040CoexistFlag = 0;
}
#endif /* DOT11N_DRAFT3 */
/* PeriodicTimer already been canceled by MlmeHalt() API.*/
/*RTMPCancelTimer(&pAd->PeriodicTimer, &Cancelled);*/
}
#endif /* CONFIG_AP_SUPPORT */
/* Stop Mlme state machine*/
MlmeHalt(pAd);
/* Close net tasklets*/
RtmpNetTaskExit(pAd);
#ifdef CONFIG_STA_SUPPORT
IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
{
MacTableReset(pAd);
#ifdef MAT_SUPPORT
MATEngineExit(pAd);
#endif /* MAT_SUPPORT */
#if defined(WOW_SUPPORT) && defined(RTMP_MAC_USB) && defined(WOW_IFDOWN_SUPPORT)
if (pAd->WOW_Cfg.bEnable == TRUE)
RT28xxUsbAsicWOWEnable(pAd);
else
#endif /* WOW_SUPPORT */
MlmeRadioOff(pAd);
}
#endif /* CONFIG_STA_SUPPORT */
#ifdef CONFIG_AP_SUPPORT
IF_DEV_CONFIG_OPMODE_ON_AP(pAd)
{
#ifdef MAT_SUPPORT
MATEngineExit(pAd);
#endif /* MAT_SUPPORT */
#ifdef CLIENT_WDS
CliWds_ProxyTabDestory(pAd);
#endif /* CLIENT_WDS */
/* Shutdown Access Point function, release all related resources */
APShutdown(pAd);
/*#ifdef AUTO_CH_SELECT_ENHANCE*/
/* Free BssTab & ChannelInfo tabbles.*/
/* AutoChBssTableDestroy(pAd); */
/* ChannelInfoDestroy(pAd); */
/*#endif AUTO_CH_SELECT_ENHANCE */
}
#endif /* CONFIG_AP_SUPPORT */
MeasureReqTabExit(pAd);
TpcReqTabExit(pAd);
#ifdef LED_CONTROL_SUPPORT
RTMPExitLEDMode(pAd);
#endif // LED_CONTROL_SUPPORT
/* Close kernel threads*/
RtmpMgmtTaskExit(pAd);
#ifdef CONFIG_AP_SUPPORT
IF_DEV_CONFIG_OPMODE_ON_AP(pAd)
{
/* must after RtmpMgmtTaskExit(); Or pAd->pChannelInfo will be NULL */
/* Free BssTab & ChannelInfo tabbles.*/
AutoChBssTableDestroy(pAd);
ChannelInfoDestroy(pAd);
}
#endif /* CONFIG_AP_SUPPORT */
/* Free IRQ*/
if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE))
{
RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE);
}
/* Free Ring or USB buffers*/
#ifdef RESOURCE_PRE_ALLOC
RTMPResetTxRxRingMemory(pAd);
#else
/* Free Ring or USB buffers*/
RTMPFreeTxRxRingMemory(pAd);
#endif /* RESOURCE_PRE_ALLOC */
RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS);
#ifdef DOT11_N_SUPPORT
/* Free BA reorder resource*/
ba_reordering_resource_release(pAd);
#endif /* DOT11_N_SUPPORT */
UserCfgExit(pAd); /* must after ba_reordering_resource_release */
#ifdef CONFIG_STA_SUPPORT
#endif /* CONFIG_STA_SUPPORT */
RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_START_UP);
/*+++Modify by woody to solve the bulk fail+++*/
#ifdef CONFIG_STA_SUPPORT
IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
{
#ifdef RT35xx
if (IS_RT3572(pAd))
{
RT30xxWriteRFRegister(pAd, RF_R08, 0x00);
AsicSendCommandToMcu(pAd, 0x30, 0xff, 0xff, 0x02, FALSE);
}
#endif /* RT35xx */
#ifdef DOT11Z_TDLS_SUPPORT
TDLS_Table_Destory(pAd);
#ifdef TDLS_AUTOLINK_SUPPORT
TDLS_ClearEntryList(&pAd->StaCfg.TdlsInfo.TdlsDiscovPeerList);
NdisFreeSpinLock(&pAd->StaCfg.TdlsInfo.TdlsDiscovPeerListSemLock);
TDLS_ClearEntryList(&pAd->StaCfg.TdlsInfo.TdlsBlackList);
NdisFreeSpinLock(&pAd->StaCfg.TdlsInfo.TdlsBlackListSemLock);
#endif /* TDLS_AUTOLINK_SUPPORT */
#endif /* DOT11Z_TDLS_SUPPORT */
}
#endif /* CONFIG_STA_SUPPORT */
/* clear MAC table */
/* TODO: do not clear spin lock, such as fLastChangeAccordingMfbLock */
NdisZeroMemory(&pAd->MacTab, sizeof(MAC_TABLE));
/* release all timers */
RTMPusecDelay(2000);
RTMP_TimerListRelease(pAd);
#ifdef RTMP_TIMER_TASK_SUPPORT
NdisFreeSpinLock(&pAd->TimerQLock);
#endif /* RTMP_TIMER_TASK_SUPPORT */
}
VOID RTMPInfClose(
IN VOID *pAdSrc)
{
PRTMP_ADAPTER pAd = (PRTMP_ADAPTER)pAdSrc;
#ifdef CONFIG_AP_SUPPORT
pAd->ApCfg.MBSSID[MAIN_MBSSID].bBcnSntReq = FALSE;
IF_DEV_CONFIG_OPMODE_ON_AP(pAd)
{
/* kick out all STAs behind the bss.*/
MbssKickOutStas(pAd, MAIN_MBSSID, REASON_DISASSOC_INACTIVE);
}
#ifdef RT_CFG80211_SUPPORT
#else
APMakeAllBssBeacon(pAd);
APUpdateAllBeaconFrame(pAd);
#endif /* RT_CFG80211_SUPPORT */
#endif /* CONFIG_AP_SUPPORT */
#ifdef CONFIG_STA_SUPPORT
IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
{
#ifdef PROFILE_STORE
WriteDatThread(pAd);
RTMPusecDelay(1000);
#endif /* PROFILE_STORE */
#ifdef QOS_DLS_SUPPORT
/* send DLS-TEAR_DOWN message, */
if (pAd->CommonCfg.bDLSCapable)
{
UCHAR i;
/* tear down local dls table entry*/
for (i=0; i<MAX_NUM_OF_INIT_DLS_ENTRY; i++)
{
if (pAd->StaCfg.DLSEntry[i].Valid && (pAd->StaCfg.DLSEntry[i].Status == DLS_FINISH))
{
RTMPSendDLSTearDownFrame(pAd, pAd->StaCfg.DLSEntry[i].MacAddr);
pAd->StaCfg.DLSEntry[i].Status = DLS_NONE;
pAd->StaCfg.DLSEntry[i].Valid = FALSE;
}
}
/* tear down peer dls table entry*/
for (i=MAX_NUM_OF_INIT_DLS_ENTRY; i<MAX_NUM_OF_DLS_ENTRY; i++)
{
if (pAd->StaCfg.DLSEntry[i].Valid && (pAd->StaCfg.DLSEntry[i].Status == DLS_FINISH))
{
RTMPSendDLSTearDownFrame(pAd, pAd->StaCfg.DLSEntry[i].MacAddr);
pAd->StaCfg.DLSEntry[i].Status = DLS_NONE;
pAd->StaCfg.DLSEntry[i].Valid = FALSE;
}
}
RTMP_MLME_HANDLER(pAd);
}
#endif /* QOS_DLS_SUPPORT */
if (INFRA_ON(pAd) &&
#if defined(WOW_SUPPORT) && defined(RTMP_MAC_USB) && defined(WOW_IFDOWN_SUPPORT) /* In WOW state, can't issue disassociation reqeust */
pAd->WOW_Cfg.bEnable == FALSE &&
#endif /* WOW_SUPPORT */
(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)))
{
MLME_DISASSOC_REQ_STRUCT DisReq;
MLME_QUEUE_ELEM *MsgElem;/* = (MLME_QUEUE_ELEM *) kmalloc(sizeof(MLME_QUEUE_ELEM), MEM_ALLOC_FLAG);*/
os_alloc_mem(NULL, (UCHAR **)&MsgElem, sizeof(MLME_QUEUE_ELEM));
if (MsgElem)
{
COPY_MAC_ADDR(DisReq.Addr, pAd->CommonCfg.Bssid);
DisReq.Reason = REASON_DEAUTH_STA_LEAVING;
MsgElem->Machine = ASSOC_STATE_MACHINE;
MsgElem->MsgType = MT2_MLME_DISASSOC_REQ;
MsgElem->MsgLen = sizeof(MLME_DISASSOC_REQ_STRUCT);
NdisMoveMemory(MsgElem->Msg, &DisReq, sizeof(MLME_DISASSOC_REQ_STRUCT));
/* Prevent to connect AP again in STAMlmePeriodicExec*/
pAd->MlmeAux.AutoReconnectSsidLen= 32;
NdisZeroMemory(pAd->MlmeAux.AutoReconnectSsid, pAd->MlmeAux.AutoReconnectSsidLen);
pAd->Mlme.CntlMachine.CurrState = CNTL_WAIT_OID_DISASSOC;
MlmeDisassocReqAction(pAd, MsgElem);
/* kfree(MsgElem);*/
os_free_mem(NULL, MsgElem);
}
RTMPusecDelay(1000);
}
#ifdef WPA_SUPPLICANT_SUPPORT
#ifndef NATIVE_WPA_SUPPLICANT_SUPPORT
/* send wireless event to wpa_supplicant for infroming interface down.*/
RtmpOSWrielessEventSend(pAd->net_dev, RT_WLAN_EVENT_CUSTOM, RT_INTERFACE_DOWN, NULL, NULL, 0);
#endif /* NATIVE_WPA_SUPPLICANT_SUPPORT */
if (pAd->StaCfg.pWpsProbeReqIe)
{
/* kfree(pAd->StaCfg.pWpsProbeReqIe);*/
os_free_mem(NULL, pAd->StaCfg.pWpsProbeReqIe);
pAd->StaCfg.pWpsProbeReqIe = NULL;
pAd->StaCfg.WpsProbeReqIeLen = 0;
}
if (pAd->StaCfg.pWpaAssocIe)
{
/* kfree(pAd->StaCfg.pWpaAssocIe);*/
os_free_mem(NULL, pAd->StaCfg.pWpaAssocIe);
pAd->StaCfg.pWpaAssocIe = NULL;
pAd->StaCfg.WpaAssocIeLen = 0;
}
#endif /* WPA_SUPPLICANT_SUPPORT */
}
#endif /* CONFIG_STA_SUPPORT */
}
PNET_DEV RtmpPhyNetDevMainCreate(
IN VOID *pAdSrc)
{
PRTMP_ADAPTER pAd = (PRTMP_ADAPTER)pAdSrc;
PNET_DEV pDevNew;
UINT32 MC_RowID = 0, IoctlIF = 0;
pAd = pAd;
#ifdef MULTIPLE_CARD_SUPPORT
MC_RowID = pAd->MC_RowID;
#endif /* MULTIPLE_CARD_SUPPORT */
#ifdef HOSTAPD_SUPPORT
IoctlIF = pAd->IoctlIF;
#endif /* HOSTAPD_SUPPORT */
pDevNew = RtmpOSNetDevCreate((INT32)MC_RowID, (UINT32 *)&IoctlIF,
INT_MAIN, 0, sizeof(PRTMP_ADAPTER), INF_MAIN_DEV_NAME);
#ifdef HOSTAPD_SUPPORT
pAd->IoctlIF = IoctlIF;
#endif /* HOSTAPD_SUPPORT */
return pDevNew;
}
/*
==========================================================================
Description:
Reverse RF sleep-mode setup
==========================================================================
*/
void RT30xxReverseRFSleepModeSetup(struct rt_rtmp_adapter *pAd)
{
u8 RFValue;
u32 MACValue;
#ifdef RTMP_MAC_USB
if (!IS_RT3572(pAd))
#endif /* RTMP_MAC_USB // */
{
/* RF_BLOCK_en, RF R1 register Bit 0 to 1 */
RT30xxReadRFRegister(pAd, RF_R01, &RFValue);
RFValue |= 0x01;
RT30xxWriteRFRegister(pAd, RF_R01, RFValue);
/* VCO_IC, RF R7 register Bit 4 & Bit 5 to 1 */
RT30xxReadRFRegister(pAd, RF_R07, &RFValue);
RFValue |= 0x20;
RT30xxWriteRFRegister(pAd, RF_R07, RFValue);
/* Idoh, RF R9 register Bit 1, Bit 2 & Bit 3 to 1 */
RT30xxReadRFRegister(pAd, RF_R09, &RFValue);
RFValue |= 0x0E;
RT30xxWriteRFRegister(pAd, RF_R09, RFValue);
/* RX_CTB_en, RF R21 register Bit 7 to 1 */
RT30xxReadRFRegister(pAd, RF_R21, &RFValue);
RFValue |= 0x80;
RT30xxWriteRFRegister(pAd, RF_R21, RFValue);
}
if (IS_RT3090(pAd) || /* IS_RT3090 including RT309x and RT3071/72 */
IS_RT3572(pAd) ||
IS_RT3390(pAd) ||
(IS_RT3070(pAd) && ((pAd->MACVersion & 0xffff) < 0x0201))) {
#ifdef RTMP_MAC_USB
if (!IS_RT3572(pAd))
#endif /* RTMP_MAC_USB // */
{
RT30xxReadRFRegister(pAd, RF_R27, &RFValue);
if ((pAd->MACVersion & 0xffff) < 0x0211)
RFValue = (RFValue & (~0x77)) | 0x3;
else
RFValue = (RFValue & (~0x77));
RT30xxWriteRFRegister(pAd, RF_R27, RFValue);
}
/* RT3071 version E has fixed this issue */
if ((pAd->NicConfig2.field.DACTestBit == 1)
&& ((pAd->MACVersion & 0xffff) < 0x0211)) {
/* patch tx EVM issue temporarily */
RTMP_IO_READ32(pAd, LDO_CFG0, &MACValue);
MACValue = ((MACValue & 0xE0FFFFFF) | 0x0D000000);
RTMP_IO_WRITE32(pAd, LDO_CFG0, MACValue);
} else {
RTMP_IO_READ32(pAd, LDO_CFG0, &MACValue);
MACValue = ((MACValue & 0xE0FFFFFF) | 0x01000000);
RTMP_IO_WRITE32(pAd, LDO_CFG0, MACValue);
}
}
if (IS_RT3572(pAd))
RT30xxWriteRFRegister(pAd, RF_R08, 0x80);
}
VOID NICInitRT3090RFRegisters(IN PRTMP_ADAPTER pAd)
{
INT i;
if (IS_RT3090(pAd))
{
UINT32 RfReg = 0, data;
RT30xxReadRFRegister(pAd, RF_R30, (PUCHAR)&RfReg);
RfReg |= 0x80;
RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg);
RTMPusecDelay(1000);
RfReg &= 0x7F;
RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg);
RT30xxWriteRFRegister(pAd, RF_R24, 0x0F);
RT30xxWriteRFRegister(pAd, RF_R31, 0x0F);
if ((pAd->NicConfig2.field.DACTestBit == 1) && ((pAd->MACVersion & 0xffff) < 0x0211))
{
RTMP_IO_READ32(pAd, LDO_CFG0, &data);
data = ((data & 0xE0FFFFFF) | 0x0D000000);
RTMP_IO_WRITE32(pAd, LDO_CFG0, data);
}
else
{
RTMP_IO_READ32(pAd, LDO_CFG0, &data);
data = ((data & 0xE0FFFFFF) | 0x01000000);
RTMP_IO_WRITE32(pAd, LDO_CFG0, data);
}
RTMP_IO_READ32(pAd, GPIO_SWITCH, &data);
data &= ~(0x20);
RTMP_IO_WRITE32(pAd, GPIO_SWITCH, data);
for (i = 0; i < NUM_RF_REG_PARMS; i++)
{
RT30xxWriteRFRegister(pAd, RT30xx_RFRegTable[i].Register, RT30xx_RFRegTable[i].Value);
}
RT30xxReadRFRegister(pAd, RF_R06, (PUCHAR)&RfReg);
RfReg |= 0x40;
RT30xxWriteRFRegister(pAd, RF_R06, (UCHAR)RfReg);
RTMPFilterCalibration(pAd);
if ((pAd->MACVersion & 0xffff) < 0x0211)
RT30xxWriteRFRegister(pAd, RF_R27, 0x3);
RTMP_IO_READ32(pAd, OPT_14, &data);
data |= 0x01;
RTMP_IO_WRITE32(pAd, OPT_14, data);
if (pAd->RfIcType == RFIC_3020)
AsicSetRxAnt(pAd, pAd->RxAnt.Pair1PrimaryRxAnt);
RT30xxLoadRFNormalModeSetup(pAd);
}
}
VOID NICInitRT3370RFRegisters(IN PRTMP_ADAPTER pAd)
{
int i;
UINT8 RfReg = 0;
UINT32 data;
CHAR bbpreg;
/* Driver must read EEPROM to get RfIcType before initial RF registers*/
/* Initialize RF register to default value*/
/* Init RF calibration*/
/* Driver should toggle RF R30 bit7 before init RF registers*/
RT30xxReadRFRegister(pAd, RF_R30, (PUCHAR)&RfReg);
RfReg |= 0x80;
RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg);
RTMPusecDelay(1000);
RfReg &= 0x7F;
RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg);
for (i = 0; i < RT3370_NUM_RF_REG_PARMS; i++)
{
RT30xxWriteRFRegister(pAd, RT3370_RFRegTable[i].Register, RT3370_RFRegTable[i].Value);
}
/* Driver should set RF R6 bit6 on before init RF registers */
RT30xxReadRFRegister(pAd, RF_R06, (PUCHAR)&RfReg);
RfReg |= 0x40;
RT30xxWriteRFRegister(pAd, RF_R06, (UCHAR)RfReg);
/* RT3071 version E has fixed this issue*/
if ((pAd->NicConfig2.field.DACTestBit == 1) && ((pAd->MACVersion & 0xffff) < 0x0211))
{
/* patch tx EVM issue temporarily*/
RTUSBReadMACRegister(pAd, LDO_CFG0, &data);
data = ((data & 0xE0FFFFFF) | 0x0D000000);
RTUSBWriteMACRegister(pAd, LDO_CFG0, data);
}
else
{
/* patch CCK ok, OFDM failed issue, just toggle and restore LDO_CFG0.*/
RTUSBReadMACRegister(pAd, LDO_CFG0, &data);
data = ((data & 0xE0FFFFFF) | 0x0D000000);
RTUSBWriteMACRegister(pAd, LDO_CFG0, data);
RTMPusecDelay(1000);
data = ((data & 0xE0FFFFFF) | 0x01000000);
RTUSBWriteMACRegister(pAd, LDO_CFG0, data);
}
/* patch LNA_PE_G1 failed issue*/
RTMP_IO_READ32(pAd, GPIO_SWITCH, &data);
data &= ~(0x20);
RTMP_IO_WRITE32(pAd, GPIO_SWITCH, data);
if (IS_RT3390(pAd)) /* Disable RF filter calibration*/
{
pAd->Mlme.CaliBW20RfR24 = BW20RFR24;
pAd->Mlme.CaliBW40RfR24 = BW40RFR24;
pAd->Mlme.CaliBW20RfR31 = BW20RFR31;
pAd->Mlme.CaliBW40RfR31 = BW40RFR31;
}
else
{
/*For RF filter Calibration*/
/*RTMPFilterCalibration(pAd);*/
}
/* set led open drain enable*/
RTMP_IO_READ32(pAd, OPT_14, &data);
data |= 0x01;
RTMP_IO_WRITE32(pAd, OPT_14, data);
/* set default antenna as main*/
if (pAd->RfIcType == RFIC_3320)
AsicSetRxAnt(pAd, pAd->RxAnt.Pair1PrimaryRxAnt);
/*
From RT3071 Power Sequence v1.1 document, the Normal Operation Setting Registers as follow :
BBP_R138 / RF_R1 / RF_R15 / RF_R17 / RF_R20 / RF_R21.
*/
/* add by johnli, RF power sequence setup, load RF normal operation-mode setup*/
RT33xxLoadRFNormalModeSetup(pAd);
}
void NICInitRT3090RFRegisters(struct rt_rtmp_adapter *pAd)
{
int i;
/* Driver must read EEPROM to get RfIcType before initial RF registers */
/* Initialize RF register to default value */
if (IS_RT3090(pAd)) {
/* Init RF calibration */
/* Driver should toggle RF R30 bit7 before init RF registers */
u8 RfReg;
u32 data;
RT30xxReadRFRegister(pAd, RF_R30, (u8 *)&RfReg);
RfReg |= 0x80;
RT30xxWriteRFRegister(pAd, RF_R30, (u8)RfReg);
RTMPusecDelay(1000);
RfReg &= 0x7F;
RT30xxWriteRFRegister(pAd, RF_R30, (u8)RfReg);
/* init R24, R31 */
RT30xxWriteRFRegister(pAd, RF_R24, 0x0F);
RT30xxWriteRFRegister(pAd, RF_R31, 0x0F);
/* RT309x version E has fixed this issue */
if ((pAd->NicConfig2.field.DACTestBit == 1)
&& ((pAd->MACVersion & 0xffff) < 0x0211)) {
/* patch tx EVM issue temporarily */
RTMP_IO_READ32(pAd, LDO_CFG0, &data);
data = ((data & 0xE0FFFFFF) | 0x0D000000);
RTMP_IO_WRITE32(pAd, LDO_CFG0, data);
} else {
RTMP_IO_READ32(pAd, LDO_CFG0, &data);
data = ((data & 0xE0FFFFFF) | 0x01000000);
RTMP_IO_WRITE32(pAd, LDO_CFG0, data);
}
/* patch LNA_PE_G1 failed issue */
RTMP_IO_READ32(pAd, GPIO_SWITCH, &data);
data &= ~(0x20);
RTMP_IO_WRITE32(pAd, GPIO_SWITCH, data);
/* Initialize RF register to default value */
for (i = 0; i < NUM_RF_REG_PARMS; i++) {
RT30xxWriteRFRegister(pAd,
RT30xx_RFRegTable[i].Register,
RT30xx_RFRegTable[i].Value);
}
/* Driver should set RF R6 bit6 on before calibration */
RT30xxReadRFRegister(pAd, RF_R06, (u8 *)&RfReg);
RfReg |= 0x40;
RT30xxWriteRFRegister(pAd, RF_R06, (u8)RfReg);
/*For RF filter Calibration */
RTMPFilterCalibration(pAd);
/* Initialize RF R27 register, set RF R27 must be behind RTMPFilterCalibration() */
if ((pAd->MACVersion & 0xffff) < 0x0211)
RT30xxWriteRFRegister(pAd, RF_R27, 0x3);
/* set led open drain enable */
RTMP_IO_READ32(pAd, OPT_14, &data);
data |= 0x01;
RTMP_IO_WRITE32(pAd, OPT_14, data);
/* set default antenna as main */
if (pAd->RfIcType == RFIC_3020)
AsicSetRxAnt(pAd, pAd->RxAnt.Pair1PrimaryRxAnt);
/* add by johnli, RF power sequence setup, load RF normal operation-mode setup */
RT30xxLoadRFNormalModeSetup(pAd);
}
}
/*
========================================================================
Routine Description:
Close raxx interface.
Arguments:
*net_dev the raxx interface pointer
Return Value:
0 Open OK
otherwise Open Fail
Note:
1. if open fail, kernel will not call the close function.
2. Free memory for
(1) Mlme Memory Handler: MlmeHalt()
(2) TX & RX: RTMPFreeTxRxRingMemory()
(3) BA Reordering: ba_reordering_resource_release()
========================================================================
*/
int rt28xx_close(IN PNET_DEV dev)
{
struct net_device * net_dev = (struct net_device *)dev;
RTMP_ADAPTER *pAd = NULL;
BOOLEAN Cancelled;
UINT32 i = 0;
#ifdef RTMP_MAC_USB
DECLARE_WAIT_QUEUE_HEAD(unlink_wakeup);
DECLARE_WAITQUEUE(wait, current);
//RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_REMOVE_IN_PROGRESS);
#endif // RTMP_MAC_USB //
GET_PAD_FROM_NET_DEV(pAd, net_dev);
DBGPRINT(RT_DEBUG_TRACE, ("===> rt28xx_close\n"));
Cancelled = FALSE;
// Sanity check for pAd
if (pAd == NULL)
return 0; // close ok
#ifdef WDS_SUPPORT
WdsDown(pAd);
#endif // WDS_SUPPORT //
#ifdef CONFIG_STA_SUPPORT
IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
{
// If dirver doesn't wake up firmware here,
// NICLoadFirmware will hang forever when interface is up again.
if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_DOZE))
{
AsicForceWakeup(pAd, TRUE);
}
#ifdef QOS_DLS_SUPPORT
// send DLS-TEAR_DOWN message,
if (pAd->CommonCfg.bDLSCapable)
{
UCHAR i;
// tear down local dls table entry
for (i=0; i<MAX_NUM_OF_INIT_DLS_ENTRY; i++)
{
if (pAd->StaCfg.DLSEntry[i].Valid && (pAd->StaCfg.DLSEntry[i].Status == DLS_FINISH))
{
RTMPSendDLSTearDownFrame(pAd, pAd->StaCfg.DLSEntry[i].MacAddr);
pAd->StaCfg.DLSEntry[i].Status = DLS_NONE;
pAd->StaCfg.DLSEntry[i].Valid = FALSE;
}
}
// tear down peer dls table entry
for (i=MAX_NUM_OF_INIT_DLS_ENTRY; i<MAX_NUM_OF_DLS_ENTRY; i++)
{
if (pAd->StaCfg.DLSEntry[i].Valid && (pAd->StaCfg.DLSEntry[i].Status == DLS_FINISH))
{
RTMPSendDLSTearDownFrame(pAd, pAd->StaCfg.DLSEntry[i].MacAddr);
pAd->StaCfg.DLSEntry[i].Status = DLS_NONE;
pAd->StaCfg.DLSEntry[i].Valid = FALSE;
}
}
RTMP_MLME_HANDLER(pAd);
}
#endif // QOS_DLS_SUPPORT //
if (INFRA_ON(pAd) &&
(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)))
{
MLME_DISASSOC_REQ_STRUCT DisReq;
MLME_QUEUE_ELEM *MsgElem = (MLME_QUEUE_ELEM *) kmalloc(sizeof(MLME_QUEUE_ELEM), MEM_ALLOC_FLAG);
if (MsgElem)
{
COPY_MAC_ADDR(DisReq.Addr, pAd->CommonCfg.Bssid);
DisReq.Reason = REASON_DEAUTH_STA_LEAVING;
MsgElem->Machine = ASSOC_STATE_MACHINE;
MsgElem->MsgType = MT2_MLME_DISASSOC_REQ;
MsgElem->MsgLen = sizeof(MLME_DISASSOC_REQ_STRUCT);
NdisMoveMemory(MsgElem->Msg, &DisReq, sizeof(MLME_DISASSOC_REQ_STRUCT));
// Prevent to connect AP again in STAMlmePeriodicExec
pAd->MlmeAux.AutoReconnectSsidLen= 32;
NdisZeroMemory(pAd->MlmeAux.AutoReconnectSsid, pAd->MlmeAux.AutoReconnectSsidLen);
pAd->Mlme.CntlMachine.CurrState = CNTL_WAIT_OID_DISASSOC;
MlmeDisassocReqAction(pAd, MsgElem);
kfree(MsgElem);
}
RTMPusecDelay(1000);
}
#ifdef RTMP_MAC_USB
RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_REMOVE_IN_PROGRESS);
#endif // RTMP_MAC_USB //
RTMPCancelTimer(&pAd->StaCfg.StaQuickResponeForRateUpTimer, &Cancelled);
RTMPCancelTimer(&pAd->StaCfg.WpaDisassocAndBlockAssocTimer, &Cancelled);
#ifdef WPA_SUPPLICANT_SUPPORT
#ifndef NATIVE_WPA_SUPPLICANT_SUPPORT
// send wireless event to wpa_supplicant for infroming interface down.
RtmpOSWrielessEventSend(pAd, IWEVCUSTOM, RT_INTERFACE_DOWN, NULL, NULL, 0);
#endif // NATIVE_WPA_SUPPLICANT_SUPPORT //
#endif // WPA_SUPPLICANT_SUPPORT //
MlmeRadioOff(pAd);
}
#endif // CONFIG_STA_SUPPORT //
RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS);
for (i = 0 ; i < NUM_OF_TX_RING; i++)
{
while (pAd->DeQueueRunning[i] == TRUE)
{
DBGPRINT(RT_DEBUG_TRACE, ("Waiting for TxQueue[%d] done..........\n", i));
RTMPusecDelay(1000);
}
}
#ifdef RTMP_MAC_USB
// ensure there are no more active urbs.
add_wait_queue (&unlink_wakeup, &wait);
pAd->wait = &unlink_wakeup;
// maybe wait for deletions to finish.
i = 0;
//while((i < 25) && atomic_read(&pAd->PendingRx) > 0)
while(i < 25)
{
unsigned long IrqFlags;
RTMP_IRQ_LOCK(&pAd->BulkInLock, IrqFlags);
if (pAd->PendingRx == 0)
{
RTMP_IRQ_UNLOCK(&pAd->BulkInLock, IrqFlags);
break;
}
RTMP_IRQ_UNLOCK(&pAd->BulkInLock, IrqFlags);
#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,9)
msleep(UNLINK_TIMEOUT_MS); //Time in millisecond
#else
RTMPusecDelay(UNLINK_TIMEOUT_MS*1000); //Time in microsecond
#endif
i++;
}
pAd->wait = NULL;
remove_wait_queue (&unlink_wakeup, &wait);
#endif // RTMP_MAC_USB //
// Stop Mlme state machine
MlmeHalt(pAd);
// Close net tasklets
RtmpNetTaskExit(pAd);
#ifdef CONFIG_STA_SUPPORT
IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
{
MacTableReset(pAd);
}
#endif // CONFIG_STA_SUPPORT //
MeasureReqTabExit(pAd);
TpcReqTabExit(pAd);
#ifdef WSC_INCLUDED
#ifdef CONFIG_STA_SUPPORT
IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
WscStop(pAd,
&pAd->StaCfg.WscControl);
#endif // CONFIG_STA_SUPPORT //
#ifdef OLD_DH_KEY
#ifdef CONFIG_STA_SUPPORT
IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
WSC_VFREE_KEY_MEM(pAd->StaCfg.WscControl.pPubKeyMem, pAd->StaCfg.WscControl.pSecKeyMem);
#endif // CONFIG_STA_SUPPORT //
#endif // OLD_DH_KEY //
#ifndef OLD_DH_KEY
DH_freeall();
#endif // OLD_DH_KEY //
/* WSC hardware push button function 0811 */
WSC_HDR_BTN_Stop(pAd);
#endif // WSC_INCLUDED //
// Close kernel threads
RtmpMgmtTaskExit(pAd);
// Free IRQ
if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE))
{
RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE);
}
// Free Ring or USB buffers
RTMPFreeTxRxRingMemory(pAd);
RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS);
#ifdef DOT11_N_SUPPORT
// Free BA reorder resource
ba_reordering_resource_release(pAd);
#endif // DOT11_N_SUPPORT //
#ifdef CONFIG_STA_SUPPORT
#endif // CONFIG_STA_SUPPORT //
RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_START_UP);
/*+++Modify by woody to solve the bulk fail+++*/
#ifdef CONFIG_STA_SUPPORT
IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
{
#ifdef RT35xx
if (IS_RT3572(pAd))
{
RT30xxWriteRFRegister(pAd, RF_R08, 0x00);
AsicSendCommandToMcu(pAd, 0x30, 0xff, 0xff, 0x02);
}
#endif // RT35xx //
}
#endif // CONFIG_STA_SUPPORT //
DBGPRINT(RT_DEBUG_TRACE, ("<=== rt28xx_close\n"));
return 0; // close ok
} /* End of rt28xx_close */
