static INT rtmp_bbp_get_temp(struct _RTMP_ADAPTER *pAd, CHAR *temp_val) { #if defined(RTMP_INTERNAL_TX_ALC) || defined(RTMP_TEMPERATURE_COMPENSATION) BBP_R49_STRUC bbp_val; bbp_val.byte = 0; RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R49, &bbp_val.byte); *temp_val = (CHAR)bbp_val.byte; pAd->curr_temp = (bbp_val.byte & 0xff); #endif return TRUE; }
INT rtmp_bbp_is_ready(struct _RTMP_ADAPTER *pAd) { INT idx = 0; UCHAR val; do { RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R0, &val); if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)) return FALSE; DBGPRINT(RT_DEBUG_TRACE, ("BBP version = %x\n", val)); } while ((++idx < 20) && ((val == 0xff) || (val == 0x00))); return (((val == 0xff) || (val == 0x00)) ? FALSE : TRUE); }
INT rtmp_bbp_set_mmps(struct _RTMP_ADAPTER *pAd, BOOLEAN ReduceCorePower) { UCHAR bbp_val, org_val; RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &org_val); bbp_val = org_val; if (ReduceCorePower) bbp_val |= 0x04; else bbp_val &= ~0x04; if (bbp_val != org_val) RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, bbp_val); return TRUE; }
static INT rtmp_bbp_set_rxpath(struct _RTMP_ADAPTER *pAd, INT rxpath) { UCHAR val = 0; RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &val); val &= (~0x18); if(rxpath == 3) val |= (0x10); else if(rxpath == 2) val |= (0x8); else if(rxpath == 1) val |= (0x0); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, val); return TRUE; }
/* ========================================================================== Description: Load RF normal operation-mode setup ========================================================================== */ static VOID RT3593LoadRFNormalModeSetup( IN PRTMP_ADAPTER pAd) { UCHAR RfReg; CHAR bbpreg = 0; // TX_LO2_en RT30xxReadRFRegister(pAd, RF_R50, (PUCHAR)&RfReg); RfReg = ((RfReg & ~0x10) | 0x00); // tx_lo2_en (both bands, 0: LO2 follows TR switch) RT30xxWriteRFRegister(pAd, RF_R50, (UCHAR)RfReg); // TX_LO1_en, RX_MX2_GC RT30xxReadRFRegister(pAd, RF_R51, (PUCHAR)&RfReg); RfReg = ((RfReg & ~0x1C) | ((pAd->TxMixerGain24G & 0x07) << 2)); // tx_mx1_cc (RF mixer output tank tuning, both bands) RT30xxWriteRFRegister(pAd, RF_R51, (UCHAR)RfReg); // RX_LO1_en RT30xxReadRFRegister(pAd, RF_R38, (PUCHAR)&RfReg); RfReg = ((RfReg & ~0x20) | 0x00); // rx_lo1_en (enable RX LO1, 0: LO1 follows TR switch) RT30xxWriteRFRegister(pAd, RF_R38, (UCHAR)RfReg); // RX_LO2_en RT30xxReadRFRegister(pAd, RF_R39, (PUCHAR)&RfReg); RfReg = ((RfReg & ~0x80) | 0x00); // rx_lo2_en (enable RX LO2, 0: LO2 follows TR switch) RT30xxWriteRFRegister(pAd, RF_R39, (UCHAR)RfReg); // // Avoid data lost and CRC error // RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &bbpreg); bbpreg = ((bbpreg & ~0x40) | 0x40); // MAC interface control (MAC_IF_80M, 1: 80 MHz) RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, bbpreg); RT30xxReadRFRegister(pAd, RF_R32, (PUCHAR)&RfReg); RfReg = ((RfReg & ~0x07) | 0x07); // BB_rx_out_en (enable DAC output or baseband input) //RT30xxWriteRFRegister(pAd, RF_R32, (UCHAR)RfReg); RT30xxReadRFRegister(pAd, RF_R01, (PUCHAR)&RfReg); RfReg = ((RfReg & ~0x03) | 0x03); // rf_block_en and pll_en RT30xxWriteRFRegister(pAd, RF_R01, (UCHAR)RfReg); RT30xxReadRFRegister(pAd, RF_R30, (PUCHAR)&RfReg); RfReg = ((RfReg & ~0x18) | 0x10); // rxvcm (Rx BB filter VCM) RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg); } /* End of RT3593LoadRFNormalModeSetup */
INT rtmp_bbp_set_rxpath(struct _RTMP_ADAPTER *pAd, INT rxpath) { UCHAR val = 0; RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &val); val &= (~0x18); if(rxpath == 3) val |= (0x10); else if(rxpath == 2) val |= (0x8); else if(rxpath == 1) val |= (0x0); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, val); #ifdef CONFIG_STA_SUPPORT #endif /* CONFIG_STA_SUPPORT */ return TRUE; }
static NDIS_STATUS AsicBBPWriteWithRxChain( IN RTMP_ADAPTER *pAd, IN UCHAR bbpId, IN CHAR bbpVal, IN RX_CHAIN_IDX rx_ch_idx) { UCHAR idx = 0, val = 0; if (((pAd->MACVersion & 0xffff0000) <= 0x30900000) || (pAd->Antenna.field.RxPath == 1)) { RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, bbpId, bbpVal); return NDIS_STATUS_SUCCESS; } while (rx_ch_idx != 0) { if (idx >= pAd->Antenna.field.RxPath) break; if (rx_ch_idx & 0x01) { RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R27, &val); val = (val & (~0x60)) | (idx << 5); #ifdef RTMP_MAC_PCI if (IS_PCI_INF(pAd) || IS_RBUS_INF(pAd)) { RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R27, val); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, bbpId, bbpVal); } #endif /* RTMP_MAC_PCI */ DBGPRINT(RT_DEBUG_INFO, ("%s(Idx):Write(R%d,val:0x%x) to Chain(0x%x, idx:%d)\n", __FUNCTION__, bbpId, bbpVal, rx_ch_idx, idx)); } rx_ch_idx >>= 1; idx++; } return NDIS_STATUS_SUCCESS; }
INT rtmp_bbp_tx_comp_init(RTMP_ADAPTER *pAd, INT adc_insel, INT tssi_mode) { UCHAR bbp_val, rf_val; /* Set BBP_R47 */ RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R47, &bbp_val); bbp_val &= 0xe7; bbp_val |= ((tssi_mode << 3) & 0x18); bbp_val |= 0x80; RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R47, bbp_val); /* Set RF_R27 */ RT30xxReadRFRegister(pAd, RF_R27, &rf_val); rf_val &= 0x3f; rf_val |= ((adc_insel << 6) & 0xc0); RT30xxWriteRFRegister(pAd, RF_R27, rf_val); DBGPRINT(RT_DEBUG_TRACE, ("[temp. compensation] Set RF_R27 to 0x%x\n", rf_val)); }
static INT rtmp_bbp_set_filter_coefficient_ctrl(RTMP_ADAPTER *pAd, UCHAR Channel) { UCHAR bbp_val = 0, org_val = 0; if (Channel == 14) { /* when Channel==14 && Mode==CCK && BandWidth==20M, BBP R4 bit5=1 */ RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &org_val); bbp_val = org_val; if (WMODE_EQUAL(pAd->CommonCfg.PhyMode, WMODE_B)) bbp_val |= 0x20; else bbp_val &= (~0x20); if (bbp_val != org_val) RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, bbp_val); } return TRUE; }
/* ======================================================================== Routine Description: 3572/3592 R66 writing must select BBP_R27 Arguments: Return Value: IRQL = Note: ======================================================================== */ NTSTATUS RT3572WriteBBPR66( IN PRTMP_ADAPTER pAd, IN UCHAR Value) { NTSTATUS NStatus = STATUS_UNSUCCESSFUL; UCHAR bbpData = 0; if (!IS_RT3572(pAd) && !IS_RT3593(pAd)) { DBGPRINT(RT_DEBUG_ERROR, ("%s: Incorrect MAC version, pAd->MACVersion = 0x%X\n", __FUNCTION__, pAd->MACVersion)); return NStatus; } RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R27, &bbpData); /* R66 controls the gain of Rx0*/ bbpData &= ~(0x60); /*clear bit 5,6*/ #ifdef RTMP_MAC_USB if (RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R27, bbpData) == STATUS_SUCCESS) #endif /* RTMP_MAC_USB */ { RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, Value); } /* R66 controls the gain of Rx1*/ bbpData |= 0x20; /* set bit 5*/ #ifdef RTMP_MAC_USB if (RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R27, bbpData) == STATUS_SUCCESS) #endif /* RTMP_MAC_USB */ { RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, Value); NStatus = STATUS_SUCCESS; } return NStatus; }
static INT rtmp_bbp_set_ctrlch(struct _RTMP_ADAPTER *pAd, UINT8 ext_ch) { UCHAR val, old_val = 0; RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &old_val); val = old_val; switch (ext_ch) { case EXTCHA_BELOW: val |= (0x20); break; case EXTCHA_ABOVE: case EXTCHA_NONE: val &= (~0x20); break; } if (val != old_val) RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, val); return TRUE; }
VOID RT30xx_ChipBBPAdjust( IN RTMP_ADAPTER *pAd) { UINT32 Value; UCHAR byteValue = 0; { // pAd->CommonCfg.BBPCurrentBW = BW_20; // pAd->CommonCfg.CentralChannel = pAd->CommonCfg.Channel; /* TX : control channel at lower */ RTMP_IO_READ32(pAd, TX_BAND_CFG, &Value); Value &= (~0x1); RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Value); RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &byteValue); byteValue &= (~0x18); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, byteValue); /* 20 MHz bandwidth*/ /* request by Gary 20070208*/ /*RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, 0x30);*/ /* request by Brian 20070306*/ RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, 0x38); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x12); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0a); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x10); } /* request by Gary 20070208 for middle and long range G band*/ RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R62, 0x2D); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R63, 0x2D); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R64, 0x2D); /*RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R86, 0x2D);*/ }
static VOID P2PDiscCanlAction( IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM *Elem) { P2P_DISC_STATE *pCurrState = &(pAd->P2pCfg.DiscCurrentState); PRT_P2P_CONFIG pP2PCtrl = &pAd->P2pCfg; UCHAR channel = pP2PCtrl->ListenChannel; UCHAR p2pindex; BOOLEAN bGoBack = TRUE; /* Go back to working channel */ if (INFRA_ON(pAd) || (pAd->flg_p2p_OpStatusFlags != P2P_DISABLE)) { if ((pAd->CommonCfg.Channel != pAd->CommonCfg.CentralChannel) && (pAd->CommonCfg.BBPCurrentBW == BW_40)) channel = pAd->CommonCfg.CentralChannel; else channel = pAd->CommonCfg.Channel; } p2pindex = P2pGroupTabSearch(pAd, pAd->P2pCfg.ConnectingMAC); if (p2pindex != P2P_NOT_FOUND) { if (pAd->P2pTable.Client[p2pindex].P2pClientState > P2PSTATE_DISCOVERY_UNKNOWN) bGoBack = FALSE; } if (bGoBack && (channel != pAd->LatchRfRegs.Channel)) { UINT32 Data = 0, macStatus; UINT32 MTxCycle, MRxCycle; /* Disable MAC Tx/Rx */ RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Data); Data &= (~0x0C); RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Data); /* Check MAC Tx/Rx idle */ for (MTxCycle = 0; MTxCycle < 10000; MTxCycle++) { RTMP_IO_READ32(pAd, MAC_STATUS_CFG, &macStatus); if (macStatus & 0x3) RTMPusecDelay(50); else break; } AsicSwitchChannel(pAd, channel, FALSE); AsicLockChannel(pAd, channel); if (pAd->CommonCfg.BBPCurrentBW == BW_40) { UCHAR BBPValue = 0; RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue); BBPValue &= (~0x18); BBPValue |= 0x10; RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue); } //Enable MAC Tx/Rx RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Data); Data |= 0x0C; RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Data); DBGPRINT(RT_DEBUG_TRACE, ("P2PDiscCanlAction - Restore to channel %d\n",channel)); } *pCurrState = P2P_DISC_IDLE; }
/* ======================================================================== Routine Description: After evaluation, check antenna link status Arguments: pAd - Adapter pointer Return Value: None ======================================================================== */ VOID APAsicRxAntEvalTimeout( PRTMP_ADAPTER pAd) { UCHAR BBPR3 = 0; CHAR larger = -127, rssi0, rssi1, rssi2; #ifdef RALINK_ATE if (ATE_ON(pAd)) return; #endif /* RALINK_ATE */ /* if the traffic is low, use average rssi as the criteria */ if (pAd->Mlme.bLowThroughput == TRUE) { rssi0 = pAd->ApCfg.RssiSample.LastRssi0; rssi1 = pAd->ApCfg.RssiSample.LastRssi1; rssi2 = pAd->ApCfg.RssiSample.LastRssi2; } else { rssi0 = pAd->ApCfg.RssiSample.AvgRssi0; rssi1 = pAd->ApCfg.RssiSample.AvgRssi1; rssi2 = pAd->ApCfg.RssiSample.AvgRssi2; } if(pAd->Antenna.field.RxPath == 3) { larger = max(rssi0, rssi1); #ifdef DOT11N_SS3_SUPPORT if (pAd->CommonCfg.RxStream >= 3) pAd->Mlme.RealRxPath = 3; else #endif /* DOT11N_SS3_SUPPORT */ { if (larger > (rssi2 + 20)) pAd->Mlme.RealRxPath = 2; else pAd->Mlme.RealRxPath = 3; } } /* Disable the below to fix 1T/2R issue. It's suggested by Rory at 2007/7/11. */ RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BBPR3); BBPR3 &= (~0x18); if(pAd->Mlme.RealRxPath == 3 #ifdef DOT11_N_SUPPORT #ifdef GREENAP_SUPPORT && pAd->ApCfg.bGreenAPActive == FALSE #endif /* GREENAP_SUPPORT */ #endif /* DOT11_N_SUPPORT */ ) { BBPR3 |= (0x10); } else if(pAd->Mlme.RealRxPath == 2 #ifdef DOT11_N_SUPPORT #ifdef GREENAP_SUPPORT && pAd->ApCfg.bGreenAPActive == FALSE #endif /* GREENAP_SUPPORT */ #endif /* DOT11_N_SUPPORT */ ) { BBPR3 |= (0x8); } else if(pAd->Mlme.RealRxPath == 1) { BBPR3 |= (0x0); } RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BBPR3); }
/* ======================================================================== Routine Description: Periodic evaluate antenna link status Arguments: pAd - Adapter pointer Return Value: None ======================================================================== */ VOID APAsicEvaluateRxAnt( IN PRTMP_ADAPTER pAd) { UCHAR BBPR3 = 0; ULONG TxTotalCnt; #ifdef RALINK_ATE if (ATE_ON(pAd)) return; #endif /* RALINK_ATE */ #ifdef CARRIER_DETECTION_SUPPORT if(pAd->CommonCfg.CarrierDetect.CD_State == CD_SILENCE) return; #endif /* CARRIER_DETECTION_SUPPORT */ #ifdef TXBF_SUPPORT /* TODO: we didn't do RxAnt evaluate for 3x3 chips */ if (IS_RT3883(pAd) || IS_RT2883(pAd)) return; #endif /* TXBF_SUPPORT */ RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BBPR3); BBPR3 &= (~0x18); if(pAd->Antenna.field.RxPath == 3 #ifdef DOT11_N_SUPPORT #ifdef GREENAP_SUPPORT && pAd->ApCfg.bGreenAPActive == FALSE #endif /* GREENAP_SUPPORT */ #endif /* DOT11_N_SUPPORT */ ) { BBPR3 |= (0x10); } else if(pAd->Antenna.field.RxPath == 2 #ifdef DOT11_N_SUPPORT #ifdef GREENAP_SUPPORT && pAd->ApCfg.bGreenAPActive == FALSE #endif /* GREENAP_SUPPORT */ #endif /* DOT11_N_SUPPORT */ ) { BBPR3 |= (0x8); } else if(pAd->Antenna.field.RxPath == 1) { BBPR3 |= (0x0); } RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BBPR3); TxTotalCnt = pAd->RalinkCounters.OneSecTxNoRetryOkCount + pAd->RalinkCounters.OneSecTxRetryOkCount + pAd->RalinkCounters.OneSecTxFailCount; if (TxTotalCnt > 50) { RTMPSetTimer(&pAd->Mlme.RxAntEvalTimer, 20); pAd->Mlme.bLowThroughput = FALSE; } else { RTMPSetTimer(&pAd->Mlme.RxAntEvalTimer, 300); pAd->Mlme.bLowThroughput = TRUE; } }
/* Description : Send PSMP Action frame If PSMP mode switches. */ VOID SendPSMPAction( IN PRTMP_ADAPTER pAd, IN UCHAR Wcid, IN UCHAR Psmp) { PUCHAR pOutBuffer = NULL; NDIS_STATUS NStatus; //ULONG Idx; FRAME_PSMP_ACTION Frame; ULONG FrameLen; #ifdef RT30xx UCHAR bbpdata=0; UINT32 macdata; #endif // RT30xx // NStatus = MlmeAllocateMemory(pAd, &pOutBuffer); //Get an unused nonpaged memory if (NStatus != NDIS_STATUS_SUCCESS) { DBGPRINT(RT_DEBUG_ERROR,("BA - MlmeADDBAAction() allocate memory failed \n")); return; } #ifdef CONFIG_STA_SUPPORT IF_DEV_CONFIG_OPMODE_ON_STA(pAd) ActHeaderInit(pAd, &Frame.Hdr, pAd->CommonCfg.Bssid, pAd->CurrentAddress, pAd->MacTab.Content[Wcid].Addr); #endif // CONFIG_STA_SUPPORT // Frame.Category = CATEGORY_HT; Frame.Action = SMPS_ACTION; switch (Psmp) { case MMPS_ENABLE: #ifdef RT30xx if (IS_RT3090(pAd)) { // disable MMPS BBP control register RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &bbpdata); bbpdata &= ~(0x04); //bit 2 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, bbpdata); // disable MMPS MAC control register RTMP_IO_READ32(pAd, 0x1210, &macdata); macdata &= ~(0x09); //bit 0, 3 RTMP_IO_WRITE32(pAd, 0x1210, macdata); } #endif // RT30xx // Frame.Psmp = 0; break; case MMPS_DYNAMIC: #ifdef RT30xx if (IS_RT3090(pAd)) { // enable MMPS BBP control register RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &bbpdata); bbpdata |= 0x04; //bit 2 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, bbpdata); // enable MMPS MAC control register RTMP_IO_READ32(pAd, 0x1210, &macdata); macdata |= 0x09; //bit 0, 3 RTMP_IO_WRITE32(pAd, 0x1210, macdata); } #endif // RT30xx // Frame.Psmp = 3; break; case MMPS_STATIC: #ifdef RT30xx if (IS_RT3090(pAd)) { // enable MMPS BBP control register RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &bbpdata); bbpdata |= 0x04; //bit 2 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, bbpdata); // enable MMPS MAC control register RTMP_IO_READ32(pAd, 0x1210, &macdata); macdata |= 0x09; //bit 0, 3 RTMP_IO_WRITE32(pAd, 0x1210, macdata); } #endif // RT30xx // Frame.Psmp = 1; break; } MakeOutgoingFrame(pOutBuffer, &FrameLen, sizeof(FRAME_PSMP_ACTION), &Frame, END_OF_ARGS); MiniportMMRequest(pAd, QID_AC_BE, pOutBuffer, FrameLen); MlmeFreeMemory(pAd, pOutBuffer); DBGPRINT(RT_DEBUG_ERROR,("HT - SendPSMPAction( %d ) \n", Frame.Psmp)); }
VOID RT35xx_ChipBBPAdjust( IN RTMP_ADAPTER *pAd) { UINT32 Value; UCHAR byteValue = 0; #ifdef RT3593 /* 3x3 device will not run AsicEvaluateRxAnt*/ if (IS_RT3593(pAd)) { UCHAR BBPValue = 0; /* Receiver Antenna Selection*/ RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BBPValue); if(pAd->Antenna.field.RxPath == 3) { BBPValue |= (0x10); } else if(pAd->Antenna.field.RxPath == 2) { BBPValue |= (0x8); } else if(pAd->Antenna.field.RxPath == 1) { BBPValue |= (0x0); } RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BBPValue); /*Number of transmitter chains*/ RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &BBPValue); BBPValue &= (~0x18); if (pAd->Antenna.field.TxPath == 3) BBPValue |= 0x10; else if (pAd->Antenna.field.TxPath == 2) BBPValue |= 0x08; RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BBPValue); } #endif /* RT3593 */ #ifdef DOT11_N_SUPPORT if ((pAd->CommonCfg.HtCapability.HtCapInfo.ChannelWidth == BW_40) && (pAd->CommonCfg.RegTransmitSetting.field.EXTCHA == EXTCHA_ABOVE)) { pAd->CommonCfg.BBPCurrentBW = BW_40; pAd->CommonCfg.CentralChannel = pAd->CommonCfg.Channel + 2; /* TX : control channel at lower */ RTMP_IO_READ32(pAd, TX_BAND_CFG, &Value); Value &= (~0x1); RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Value); /* RX : control channel at lower */ RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &byteValue); byteValue &= (~0x20); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, byteValue); RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &byteValue); byteValue &= (~0x18); byteValue |= 0x10; RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, byteValue); if (pAd->CommonCfg.Channel > 14) { /* request by Gary 20070208 for middle and long range A Band*/ if (IS_RT3572(pAd)) AsicBBPWriteWithRxChain(pAd, BBP_R66, 0x48, RX_CHAIN_ALL); } else { /* request by Gary 20070208 for middle and long range G Band*/ if (IS_RT3572(pAd)) AsicBBPWriteWithRxChain(pAd, BBP_R66, 0x38, RX_CHAIN_ALL); } if (pAd->MACVersion == 0x28600100) { RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x1A); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0A); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x16); } else { RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x12); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0A); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x10); } DBGPRINT(RT_DEBUG_TRACE, ("ApStartUp : ExtAbove, ChannelWidth=%d, Channel=%d, ExtChanOffset=%d(%d) \n", pAd->CommonCfg.HtCapability.HtCapInfo.ChannelWidth, pAd->CommonCfg.Channel, pAd->CommonCfg.RegTransmitSetting.field.EXTCHA, pAd->CommonCfg.AddHTInfo.AddHtInfo.ExtChanOffset)); } else if ((pAd->CommonCfg.Channel > 2) && (pAd->CommonCfg.HtCapability.HtCapInfo.ChannelWidth == BW_40) && (pAd->CommonCfg.RegTransmitSetting.field.EXTCHA == EXTCHA_BELOW)) { pAd->CommonCfg.BBPCurrentBW = BW_40; if (pAd->CommonCfg.Channel == 14) pAd->CommonCfg.CentralChannel = pAd->CommonCfg.Channel - 1; else pAd->CommonCfg.CentralChannel = pAd->CommonCfg.Channel - 2; /* TX : control channel at upper */ RTMP_IO_READ32(pAd, TX_BAND_CFG, &Value); Value |= (0x1); RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Value); /* RX : control channel at upper */ RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &byteValue); byteValue |= (0x20); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, byteValue); RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &byteValue); byteValue &= (~0x18); byteValue |= 0x10; RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, byteValue); if (pAd->CommonCfg.Channel > 14) { /* request by Gary 20070208 for middle and long range A Band*/ if (IS_RT3572(pAd)) AsicBBPWriteWithRxChain(pAd, BBP_R66, 0x48, RX_CHAIN_ALL); } else { /* request by Gary 20070208 for middle and long range G band*/ if (IS_RT3572(pAd)) AsicBBPWriteWithRxChain(pAd, BBP_R66, 0x38, RX_CHAIN_ALL); } if (pAd->MACVersion == 0x28600100) { RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x1A); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0A); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x16); } else { RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x12); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0A); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x10); } DBGPRINT(RT_DEBUG_TRACE, ("ApStartUp : ExtBlow, ChannelWidth=%d, Channel=%d, ExtChanOffset=%d(%d) \n", pAd->CommonCfg.HtCapability.HtCapInfo.ChannelWidth, pAd->CommonCfg.Channel, pAd->CommonCfg.RegTransmitSetting.field.EXTCHA, pAd->CommonCfg.AddHTInfo.AddHtInfo.ExtChanOffset)); } else #endif /* DOT11_N_SUPPORT */ { pAd->CommonCfg.BBPCurrentBW = BW_20; pAd->CommonCfg.CentralChannel = pAd->CommonCfg.Channel; /* TX : control channel at lower */ RTMP_IO_READ32(pAd, TX_BAND_CFG, &Value); Value &= (~0x1); RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Value); RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &byteValue); byteValue &= (~0x18); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, byteValue); /* 20 MHz bandwidth*/ if (pAd->CommonCfg.Channel > 14) { /* request by Gary 20070208*/ if (IS_RT3572(pAd)) AsicBBPWriteWithRxChain(pAd, BBP_R66, 0x40, RX_CHAIN_ALL); } else { /* request by Gary 20070208*/ /*RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, 0x30);*/ /* request by Brian 20070306*/ if (IS_RT3572(pAd)) AsicBBPWriteWithRxChain(pAd, BBP_R66, 0x38, RX_CHAIN_ALL); } if (pAd->MACVersion == 0x28600100) { RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x08); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x11); } else { RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x12); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0a); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x10); } #ifdef DOT11_N_SUPPORT DBGPRINT(RT_DEBUG_TRACE, ("ApStartUp : 20MHz, ChannelWidth=%d, Channel=%d, ExtChanOffset=%d(%d) \n", pAd->CommonCfg.HtCapability.HtCapInfo.ChannelWidth, pAd->CommonCfg.Channel, pAd->CommonCfg.RegTransmitSetting.field.EXTCHA, pAd->CommonCfg.AddHTInfo.AddHtInfo.ExtChanOffset)); #endif /* DOT11_N_SUPPORT */ } if (pAd->CommonCfg.Channel > 14) { /* request by Gary 20070208 for middle and long range A Band*/ RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R62, 0x1D); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R63, 0x1D); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R64, 0x1D); /*RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R86, 0x1D);*/ } else { /* request by Gary 20070208 for middle and long range G band*/ RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R62, 0x2D); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R63, 0x2D); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R64, 0x2D); /*RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R86, 0x2D);*/ } }
/* ========================================================================== Description: Load RF normal operation-mode setup ========================================================================== */ VOID RT30xxLoadRFNormalModeSetup( IN PRTMP_ADAPTER pAd) { UCHAR RFValue, bbpreg = 0; { // improve power consumption RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R138, &bbpreg); if (pAd->Antenna.field.TxPath == 1) { // turn off tx DAC_1 bbpreg = (bbpreg | 0x20); } if (pAd->Antenna.field.RxPath == 1) { // turn off tx ADC_1 bbpreg &= (~0x2); } RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R138, bbpreg); } #ifdef RT53xx if (IS_RT5390(pAd)) { RT30xxReadRFRegister(pAd, RF_R38, (PUCHAR)&RFValue); RFValue = ((RFValue & ~0x20) | 0x00); // rx_lo1_en (enable RX LO1, 0: LO1 follows TR switch) RT30xxWriteRFRegister(pAd, RF_R38, (UCHAR)RFValue); RT30xxReadRFRegister(pAd, RF_R39, (PUCHAR)&RFValue); RFValue = ((RFValue & ~0x80) | 0x00); // rx_lo2_en (enable RX LO2, 0: LO2 follows TR switch) RT30xxWriteRFRegister(pAd, RF_R39, (UCHAR)RFValue); // // Avoid data lost and CRC error // RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &bbpreg); bbpreg = ((bbpreg & ~0x40) | 0x40); // MAC interface control (MAC_IF_80M, 1: 80 MHz) RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, bbpreg); RT30xxReadRFRegister(pAd, RF_R30, (PUCHAR)&RFValue); RFValue = ((RFValue & ~0x18) | 0x10); // rxvcm (Rx BB filter VCM) RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RFValue); } else #endif //RT53xx // { // RX0_PD & TX0_PD, RF R1 register Bit 2 & Bit 3 to 0 and RF_BLOCK_en,RX1_PD & TX1_PD, Bit0, Bit 4 & Bit5 to 1 RT30xxReadRFRegister(pAd, RF_R01, &RFValue); RFValue = (RFValue & (~0x0C)) | 0x31; RT30xxWriteRFRegister(pAd, RF_R01, RFValue); // TX_LO2_en, RF R15 register Bit 3 to 0 RT30xxReadRFRegister(pAd, RF_R15, &RFValue); RFValue &= (~0x08); RT30xxWriteRFRegister(pAd, RF_R15, RFValue); // TX_LO1_en, RF R17 register Bit 3 to 0 RT30xxReadRFRegister(pAd, RF_R17, &RFValue); RFValue &= (~0x08); // to fix rx long range issue if (((pAd->MACVersion & 0xffff) >= 0x0211) && (pAd->NicConfig2.field.ExternalLNAForG == 0)) { RFValue |= 0x20; } // set RF_R17_bit[2:0] equal to EEPROM setting at 0x48h if (pAd->TxMixerGain24G >= 2) { RFValue &= (~0x7); // clean bit [2:0] RFValue |= pAd->TxMixerGain24G; } RT30xxWriteRFRegister(pAd, RF_R17, RFValue); // RX_LO1_en, RF R20 register Bit 3 to 0 RT30xxReadRFRegister(pAd, RF_R20, &RFValue); RFValue &= (~0x08); RT30xxWriteRFRegister(pAd, RF_R20, RFValue); // RX_LO2_en, RF R21 register Bit 3 to 0 RT30xxReadRFRegister(pAd, RF_R21, &RFValue); RFValue &= (~0x08); RT30xxWriteRFRegister(pAd, RF_R21, RFValue); } }
/* ========================================================================== Description: Scan next channel ========================================================================== */ VOID ScanNextChannel( IN PRTMP_ADAPTER pAd) { HEADER_802_11 Hdr80211; PUCHAR pOutBuffer = NULL; NDIS_STATUS NStatus; ULONG FrameLen = 0; UCHAR SsidLen = 0, ScanType = pAd->MlmeAux.ScanType, BBPValue = 0; UINT ScanTimeIn5gChannel = SHORT_CHANNEL_TIME; BOOLEAN ScanPending = FALSE; #ifdef RALINK_ATE // Nothing to do in ATE mode. if (ATE_ON(pAd)) return; #endif // RALINK_ATE // if ((pAd->MlmeAux.Channel == 0) || ScanPending) { if ((pAd->CommonCfg.BBPCurrentBW == BW_40) ) { AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE); AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel); RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue); BBPValue &= (~0x18); BBPValue |= 0x10; RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue); DBGPRINT(RT_DEBUG_TRACE, ("SYNC - End of SCAN, restore to 40MHz channel %d, Total BSS[%02d]\n",pAd->CommonCfg.CentralChannel, pAd->ScanTab.BssNr)); } else { AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE); AsicLockChannel(pAd, pAd->CommonCfg.Channel); DBGPRINT(RT_DEBUG_TRACE, ("SYNC - End of SCAN, restore to channel %d, Total BSS[%02d]\n",pAd->CommonCfg.Channel, pAd->ScanTab.BssNr)); } #ifdef CONFIG_AP_SUPPORT IF_DEV_CONFIG_OPMODE_ON_AP(pAd) { pAd->Mlme.ApSyncMachine.CurrState = AP_SYNC_IDLE; RTMPResumeMsduTransmission(pAd); // iwpriv set auto channel selection // scanned all channels if (pAd->ApCfg.bAutoChannelAtBootup==TRUE) { pAd->CommonCfg.Channel = SelectBestChannel(pAd, pAd->ApCfg.AutoChannelAlg); pAd->ApCfg.bAutoChannelAtBootup = FALSE; #ifdef DOT11_N_SUPPORT N_ChannelCheck(pAd); #endif // DOT11_N_SUPPORT // APStop(pAd); APStartUp(pAd); } if (!((pAd->CommonCfg.Channel > 14) && (pAd->CommonCfg.bIEEE80211H == TRUE))) { AsicEnableBssSync(pAd); } } #endif // CONFIG_AP_SUPPORT // } else {
// // Post-process the BBP registers based on the chip model // // Parameters // pAd: The adapter data structure // // Return Value // None // static VOID RT3593_PostBBPInitialization( IN PRTMP_ADAPTER pAd) { BBP_R105_STRUC BBPR105 = { { 0 } }; BBP_R106_STRUC BBPR106 = { { 0 } }; DBGPRINT(RT_DEBUG_TRACE, ("--> %s\n", __FUNCTION__)); // // The channel estimation updates based on remodulation of L-SIG and HT-SIG symbols. // RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R105, &BBPR105.byte); // Disable re-modulation until further verificaiton (poor Rx throughput with Atheros APs) /* if (IS_RT3090A(pAd)) { BBPR105.field.EnableSIGRemodulation = 1; // The channel estimation updates based on remodulation of L-SIG and HT-SIG symbols. } else { BBPR105.field.EnableSIGRemodulation = 0; } */ // // Apply Maximum Likelihood Detection (MLD) for 2 stream case (reserved field if single RX) // if (pAd->Antenna.field.RxPath == 1) // Single RX { BBPR105.field.MLDFor2Stream = 0; } else { BBPR105.field.MLDFor2Stream = 1; } RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R105, BBPR105.byte); DBGPRINT(RT_DEBUG_TRACE, ("%s: BBP_R105: BBPR105.field.EnableSIGRemodulation = %d, BBPR105.field.MLDFor2Stream = %d\n", __FUNCTION__, BBPR105.field.EnableSIGRemodulation, BBPR105.field.MLDFor2Stream)); // if (IS_RT3593(pAd)) { RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R106, &BBPR106.byte); BBPR106.field.ShortGI_Offset20 = 0x06; // Delay GI remover when the short GI is detected in 20MHz band (20M sampling rate) BBPR106.field.ShortGI_Offset40 = 0x08; // Delay GI remover when the short GI is detected in 40MHz band (40M sampling rate) RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R106, BBPR106.byte); DBGPRINT(RT_DEBUG_TRACE, ("%s: BBPR106: BBPR106.field.ShortGI_Offset20 = %d, BBPR106.field.ShortGI_Offset40 = %d\n", __FUNCTION__, BBPR106.field.ShortGI_Offset20, BBPR106.field.ShortGI_Offset40)); // if (IS_RT3593(pAd)) { // Patch wrong default value for SNR2 report RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R142, 0x04); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R143, 0x3b); } } DBGPRINT(RT_DEBUG_TRACE, ("<-- %s\n", __FUNCTION__)); } /* End of RT3593_PostBBPInitialization */
VOID NICInitRT3593RFRegisters( IN PRTMP_ADAPTER pAd) { ULONG RfReg = 0; ULONG data; USHORT i; // if (IS_RT3593(pAd)) { // Init RF calibration // Driver should toggle RF R30 bit7 before init RF registers RT30xxReadRFRegister(pAd, RF_R02, (PUCHAR)&RfReg); RfReg = ((RfReg & ~0x80) | 0x80); // rescal_en (initiate calbration) RT30xxWriteRFRegister(pAd, RF_R02, (UCHAR)RfReg); RTMPusecDelay(1000); RfReg = (RfReg & ~0x80); // rescal_en (initiate calbration) RT30xxWriteRFRegister(pAd, RF_R02, (UCHAR)RfReg); // init R24, R31 RT30xxReadRFRegister(pAd, RF_R32, (PUCHAR)&RfReg); RfReg = ((RfReg & ~0xF8) | 0x78); // tx_agc_fc (capacitor control in Tx baseband filter) //RT30xxWriteRFRegister(pAd, RF_R32, (UCHAR)RfReg); RT30xxReadRFRegister(pAd, RF_R31, (PUCHAR)&RfReg); RfReg = ((RfReg & ~0xF8) | 0x78); // rx_agc_fc (capacitor control in Rx baseband filter) //RT30xxWriteRFRegister(pAd, RF_R31, (UCHAR)RfReg); // RT3071 version E has fixed this issue if ((pAd->MACVersion & 0xffff) < 0x0211) { if (pAd->NicConfig2.field.DACTestBit == 1) { // patch tx EVM issue temporarily RTMP_IO_READ32(pAd, LDO_CFG0, &data); data = ((data & 0xE0FFFFFF) | 0x0D000000); RTMP_IO_WRITE32(pAd, LDO_CFG0, data); } } else { // Patch CCK ok, OFDM failed issue, just toggle and restore LDO_CFG0. // Patch SRAM for 3572, increase voltage to 1.35V on core voltage and down to 1.2V after 1 msec RTMP_IO_READ32(pAd, LDO_CFG0, &data); data = ((data & 0xE0FFFFFF) | 0x0D000000); RTMP_IO_WRITE32(pAd, LDO_CFG0, data); RTMPusecDelay(1000); data = ((data & 0xE0FFFFFF) | 0x01000000); RTMP_IO_WRITE32(pAd, LDO_CFG0, data); } // patch LNA_PE_G1 failed issue RTMP_IO_READ32(pAd, GPIO_SWITCH, &data); data &= ~(0x20); RTMP_IO_WRITE32(pAd, GPIO_SWITCH, data); // Initialize RF register to default value for (i = 0; i < NUM_RF_3053_REG_PARMS; i++) { RT30xxWriteRFRegister(pAd, RF3053RegTable[i].Register, RF3053RegTable[i].Value); } // Driver should set RF R6 bit6 on before calibration RT30xxReadRFRegister(pAd, RF_R18, (PUCHAR)&RfReg); RfReg |= ((RfReg & ~0x40) | 0x40); // xo_tune_bypass (0: XO is auto-tuned and 1: XO tuning bypassed) RT30xxWriteRFRegister(pAd, RF_R18, (UCHAR)RfReg); //For RF filter Calibration RTMPFilterCalibration(pAd); //2 TODO:? pAd->Mlme.CaliBW20RfR24 = 0x1F; pAd->Mlme.CaliBW40RfR24 = 0x2F; // save R25, R26 for 2.4GHz RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R25, &pAd->Bbp25); RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R26, &pAd->Bbp26); // Initialize RF R27 register, set RF R27 must be behind RTMPFilterCalibration() if ((pAd->MACVersion & 0xffff) < 0x0211) RT30xxWriteRFRegister(pAd, RF_R27, 0x3); // set led open drain enable RTMP_IO_READ32(pAd, OPT_14, &data); data |= 0x01; RTMP_IO_WRITE32(pAd, OPT_14, data); // Initialize RT3090 serial MAc registers which is different from RT2860 serial RTMP_IO_WRITE32(pAd, TX_SW_CFG1, 0); // RT3071 version E has fixed this issue if ((pAd->MACVersion & 0xffff) < 0x0211) { if (pAd->NicConfig2.field.DACTestBit == 1) { RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x1F); // To fix throughput drop drastically } else { RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x0F); // To fix throughput drop drastically } } else { RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x0); } // set default antenna as main if (pAd->RfIcType == RFIC_3020) AsicSetRxAnt(pAd, pAd->RxAnt.Pair1PrimaryRxAnt); // add by johnli, RF power sequence setup, load RF normal operation-mode setup RT3593LoadRFNormalModeSetup(pAd); // adjust some BBP register contents // also can put these BBP registers to pBBPRegTable RT3593_PostBBPInitialization(pAd); } } /* End of NICInitRT3593RFRegisters */
RTMP_BUILD_DRV_OPS_FUNCTION_BODY #endif /* OS_ABL_FUNC_SUPPORT */ #endif /* LINUX */ int rt28xx_init( IN VOID *pAdSrc, IN PSTRING pDefaultMac, IN PSTRING pHostName) { PRTMP_ADAPTER pAd = (PRTMP_ADAPTER)pAdSrc; UINT index; UCHAR TmpPhy; NDIS_STATUS Status; if (pAd == NULL) return FALSE; /* reset Adapter flags*/ RTMP_CLEAR_FLAGS(pAd); /* Init BssTab & ChannelInfo tabbles for auto channel select.*/ #ifdef CONFIG_AP_SUPPORT IF_DEV_CONFIG_OPMODE_ON_AP(pAd) { AutoChBssTableInit(pAd); ChannelInfoInit(pAd); } #endif /* CONFIG_AP_SUPPORT */ #ifdef DOT11_N_SUPPORT /* Allocate BA Reordering memory*/ if (ba_reordering_resource_init(pAd, MAX_REORDERING_MPDU_NUM) != TRUE) goto err1; #endif /* DOT11_N_SUPPORT */ /* Make sure MAC gets ready.*/ index = 0; if (WaitForAsicReady(pAd) != TRUE) goto err1; DBGPRINT(RT_DEBUG_TRACE, ("MAC[Ver:Rev=0x%08x]\n", pAd->MACVersion)); if (MAX_LEN_OF_MAC_TABLE > MAX_AVAILABLE_CLIENT_WCID(pAd)) { DBGPRINT(RT_DEBUG_ERROR, ("MAX_LEN_OF_MAC_TABLE can not be larger than MAX_AVAILABLE_CLIENT_WCID!!!!\n")); goto err1; } #ifdef RTMP_MAC_PCI #if defined(RT3090) || defined(RT3592) || defined(RT3390) || defined(RT3593) || defined(RT5390) || defined(RT5392) || defined(RT5592) /*Iverson patch PCIE L1 issue to make sure that driver can be read,write ,BBP and RF register at pcie L.1 level */ if ((IS_RT3090(pAd) || IS_RT3572(pAd) ||IS_RT3390(pAd) || IS_RT3593(pAd) || IS_RT5390(pAd) || IS_RT5392(pAd) || IS_RT5592(pAd)) &&pAd->infType==RTMP_DEV_INF_PCIE) { UINT32 MacValue = 0; RTMP_IO_READ32(pAd, AUX_CTRL, &MacValue); MacValue |= 0x402; RTMP_IO_WRITE32(pAd, AUX_CTRL, MacValue); DBGPRINT(RT_DEBUG_TRACE, ("AUX_CTRL = 0x%x\n", MacValue)); } #endif /* To fix driver disable/enable hang issue when radio off*/ RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x2); #endif /* RTMP_MAC_PCI */ /* Disable DMA*/ RT28XXDMADisable(pAd); /* Load 8051 firmware*/ Status = NICLoadFirmware(pAd); if (Status != NDIS_STATUS_SUCCESS) { DBGPRINT_ERR(("NICLoadFirmware failed, Status[=0x%08x]\n", Status)); goto err1; } NICLoadRateSwitchingParams(pAd); /* Disable interrupts here which is as soon as possible*/ /* This statement should never be true. We might consider to remove it later*/ #ifdef RTMP_MAC_PCI if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_ACTIVE)) { RTMP_ASIC_INTERRUPT_DISABLE(pAd); } #endif /* RTMP_MAC_PCI */ #ifdef RESOURCE_PRE_ALLOC Status = RTMPInitTxRxRingMemory(pAd); #else Status = RTMPAllocTxRxRingMemory(pAd); #endif /* RESOURCE_PRE_ALLOC */ if (Status != NDIS_STATUS_SUCCESS) { DBGPRINT_ERR(("RTMPAllocTxRxMemory failed, Status[=0x%08x]\n", Status)); goto err2; } RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE); /* initialize MLME*/ Status = RtmpMgmtTaskInit(pAd); if (Status != NDIS_STATUS_SUCCESS) goto err3; Status = MlmeInit(pAd); if (Status != NDIS_STATUS_SUCCESS) { DBGPRINT_ERR(("MlmeInit failed, Status[=0x%08x]\n", Status)); goto err4; } #ifdef RT_SOC_SUPPORT #ifdef VIDEO_TURBINE_SUPPORT VideoConfigInit(pAd); #endif /* VIDEO_TURBINE_SUPPORT */ #endif /* RT_SOC_SUPPORT */ /* Initialize pAd->StaCfg, pAd->ApCfg, pAd->CommonCfg to manufacture default*/ UserCfgInit(pAd); Status = RtmpNetTaskInit(pAd); if (Status != NDIS_STATUS_SUCCESS) goto err5; /* COPY_MAC_ADDR(pAd->ApCfg.MBSSID[apidx].Bssid, netif->hwaddr);*/ /* pAd->bForcePrintTX = TRUE;*/ CfgInitHook(pAd); #ifdef CONFIG_AP_SUPPORT if ((pAd->OpMode == OPMODE_AP) ) APInitialize(pAd); #endif /* CONFIG_AP_SUPPORT */ #ifdef BLOCK_NET_IF initblockQueueTab(pAd); #endif /* BLOCK_NET_IF */ Status = MeasureReqTabInit(pAd); if (Status != NDIS_STATUS_SUCCESS) { DBGPRINT_ERR(("MeasureReqTabInit failed, Status[=0x%08x]\n",Status)); goto err6; } Status = TpcReqTabInit(pAd); if (Status != NDIS_STATUS_SUCCESS) { DBGPRINT_ERR(("TpcReqTabInit failed, Status[=0x%08x]\n",Status)); goto err6; } /* Init the hardware, we need to init asic before read registry, otherwise mac register will be reset*/ Status = NICInitializeAdapter(pAd, TRUE); if (Status != NDIS_STATUS_SUCCESS) { DBGPRINT_ERR(("NICInitializeAdapter failed, Status[=0x%08x]\n", Status)); if (Status != NDIS_STATUS_SUCCESS) goto err6; } #ifdef CONFIG_AP_SUPPORT IF_DEV_CONFIG_OPMODE_ON_AP(pAd) { } #endif /* CONFIG_AP_SUPPORT */ /* Read parameters from Config File */ /* unknown, it will be updated in NICReadEEPROMParameters */ pAd->RfIcType = RFIC_UNKNOWN; Status = RTMPReadParametersHook(pAd); /* Set eeprom related hook functions */ Status = RtmpChipOpsEepromHook(pAd, pAd->infType); DBGPRINT(RT_DEBUG_OFF, ("1. Phy Mode = %d\n", pAd->CommonCfg.PhyMode)); if (Status != NDIS_STATUS_SUCCESS) { DBGPRINT_ERR(("RTMPReadParametersHook failed, Status[=0x%08x]\n",Status)); goto err6; } #ifdef DOT11_N_SUPPORT /*Init Ba Capability parameters.*/ /* RT28XX_BA_INIT(pAd);*/ pAd->CommonCfg.DesiredHtPhy.MpduDensity = (UCHAR)pAd->CommonCfg.BACapability.field.MpduDensity; pAd->CommonCfg.DesiredHtPhy.AmsduEnable = (USHORT)pAd->CommonCfg.BACapability.field.AmsduEnable; pAd->CommonCfg.DesiredHtPhy.AmsduSize = (USHORT)pAd->CommonCfg.BACapability.field.AmsduSize; pAd->CommonCfg.DesiredHtPhy.MimoPs = (USHORT)pAd->CommonCfg.BACapability.field.MMPSmode; /* UPdata to HT IE*/ pAd->CommonCfg.HtCapability.HtCapInfo.MimoPs = (USHORT)pAd->CommonCfg.BACapability.field.MMPSmode; pAd->CommonCfg.HtCapability.HtCapInfo.AMsduSize = (USHORT)pAd->CommonCfg.BACapability.field.AmsduSize; pAd->CommonCfg.HtCapability.HtCapParm.MpduDensity = (UCHAR)pAd->CommonCfg.BACapability.field.MpduDensity; #endif /* DOT11_N_SUPPORT */ /* after reading Registry, we now know if in AP mode or STA mode*/ /* Load 8051 firmware; crash when FW image not existent*/ /* Status = NICLoadFirmware(pAd);*/ /* if (Status != NDIS_STATUS_SUCCESS)*/ /* break;*/ DBGPRINT(RT_DEBUG_OFF, ("2. Phy Mode = %d\n", pAd->CommonCfg.PhyMode)); /* We should read EEPROM for all cases. rt2860b*/ NICReadEEPROMParameters(pAd, (PSTRING)pDefaultMac); DBGPRINT(RT_DEBUG_OFF, ("3. Phy Mode = %d\n", pAd->CommonCfg.PhyMode)); #ifdef LED_CONTROL_SUPPORT /* Send LED Setting to MCU */ RTMPInitLEDMode(pAd); #endif /* LED_CONTROL_SUPPORT */ NICInitAsicFromEEPROM(pAd); /* rt2860b */ #ifdef RALINK_ATE if (ATEInit(pAd) != NDIS_STATUS_SUCCESS) { DBGPRINT(RT_DEBUG_ERROR, ("%s(): ATE initialization failed !\n", __FUNCTION__)); goto err6; } #endif /* RALINK_ATE */ #ifdef RTMP_FREQ_CALIBRATION_SUPPORT #endif /* RTMP_FREQ_CALIBRATION_SUPPORT */ #ifdef RTMP_INTERNAL_TX_ALC /* Initialize the desired TSSI table*/ RTMP_CHIP_ASIC_TSSI_TABLE_INIT(pAd); #endif /* RTMP_INTERNAL_TX_ALC */ #ifdef RTMP_TEMPERATURE_COMPENSATION /* Temperature compensation, initialize the lookup table */ DBGPRINT(RT_DEBUG_OFF, ("bAutoTxAgcG = %d\n", pAd->bAutoTxAgcG)); if (pAd->chipCap.bTempCompTxALC && pAd->bAutoTxAgcG) InitLookupTable(pAd); #endif /* RTMP_TEMPERATURE_COMPENSATION */ #ifdef RTMP_FREQ_CALIBRATION_SUPPORT #endif /* RTMP_FREQ_CALIBRATION_SUPPORT */ /* Set PHY to appropriate mode*/ TmpPhy = pAd->CommonCfg.PhyMode; pAd->CommonCfg.PhyMode = 0xff; RTMPSetPhyMode(pAd, TmpPhy); #ifdef DOT11_N_SUPPORT SetCommonHT(pAd); #endif /* DOT11_N_SUPPORT */ /* No valid channels.*/ if (pAd->ChannelListNum == 0) { DBGPRINT(RT_DEBUG_ERROR, ("Wrong configuration. No valid channel found. Check \"ContryCode\" and \"ChannelGeography\" setting.\n")); goto err6; } #ifdef DOT11_N_SUPPORT DBGPRINT(RT_DEBUG_OFF, ("MCS Set = %02x %02x %02x %02x %02x\n", pAd->CommonCfg.HtCapability.MCSSet[0], pAd->CommonCfg.HtCapability.MCSSet[1], pAd->CommonCfg.HtCapability.MCSSet[2], pAd->CommonCfg.HtCapability.MCSSet[3], pAd->CommonCfg.HtCapability.MCSSet[4])); #endif /* DOT11_N_SUPPORT */ #ifdef CONFIG_AP_SUPPORT IF_DEV_CONFIG_OPMODE_ON_AP(pAd) { #ifdef AP_QLOAD_SUPPORT /* init QBSS Element */ QBSS_LoadInit(pAd); #endif /* AP_QLOAD_SUPPORT */ } #endif /* CONFIG_AP_SUPPORT */ /* APInitialize(pAd);*/ #ifdef IKANOS_VX_1X0 VR_IKANOS_FP_Init(pAd->ApCfg.BssidNum, pAd->PermanentAddress); #endif /* IKANOS_VX_1X0 */ #ifdef RALINK_ATE #ifdef RT5592 #ifdef RTMP_RF_RW_SUPPORT /* both for RT5572 and RT5592 */ if (IS_RT5592(pAd)) { RT55x2ATEFilterCalibration(pAd); } #endif /* RTMP_RF_RW_SUPPORT */ #endif /* RT5592 */ #endif /* RALINK_ATE */ #ifdef CONFIG_AP_SUPPORT /* Initialize RF register to default value*/ if (pAd->OpMode == OPMODE_AP) { AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE); AsicLockChannel(pAd, pAd->CommonCfg.Channel); } #endif /* CONFIG_AP_SUPPORT */ /* Some modules init must be called before APStartUp(). Or APStartUp() will make up beacon content and call other modules API to get some information to fill. */ #ifdef CONFIG_TSO_SUPPORT if (RTMP_TEST_MORE_FLAG(pAd, fRTMP_ADAPTER_TSO_SUPPORT)) RTMPTsoEnable(pAd); #endif /* CONFIG_TSO_SUPPORT */ if (pAd && (Status != NDIS_STATUS_SUCCESS)) { /* Undo everything if it failed*/ if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE)) { /* NdisMDeregisterInterrupt(&pAd->Interrupt);*/ RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE); } /* RTMPFreeAdapter(pAd); we will free it in disconnect()*/ } else if (pAd) { /* Microsoft HCT require driver send a disconnect event after driver initialization.*/ OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED); OPSTATUS_CLEAR_FLAG(pAd, fOP_AP_STATUS_MEDIA_STATE_CONNECTED); RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_MEDIA_STATE_CHANGE); DBGPRINT(RT_DEBUG_TRACE, ("NDIS_STATUS_MEDIA_DISCONNECT Event B!\n")); #ifdef CONFIG_AP_SUPPORT IF_DEV_CONFIG_OPMODE_ON_AP(pAd) { if (pAd->ApCfg.bAutoChannelAtBootup || (pAd->CommonCfg.Channel == 0)) { UINT8 BBPValue = 0; /* Enable Interrupt first due to we need to scan channel to receive beacons.*/ RTMP_IRQ_ENABLE(pAd); /* Now Enable RxTx*/ RTMPEnableRxTx(pAd); RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_START_UP); /* Let BBP register at 20MHz to do scan */ RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue); BBPValue &= (~0x18); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue); DBGPRINT(RT_DEBUG_ERROR, ("SYNC - BBP R4 to 20MHz.l\n")); /* Now we can receive the beacon and do the listen beacon*/ /* use default BW to select channel*/ pAd->CommonCfg.Channel = AP_AUTO_CH_SEL(pAd, pAd->ApCfg.AutoChannelAlg); pAd->ApCfg.bAutoChannelAtBootup = FALSE; } #ifdef DOT11_N_SUPPORT /* If phymode > PHY_11ABGN_MIXED and BW=40 check extension channel, after select channel */ N_ChannelCheck(pAd); #ifdef DOT11N_DRAFT3 /* We only do this Overlapping BSS Scan when system up, for the other situation of channel changing, we depends on station's report to adjust ourself. */ if (pAd->CommonCfg.bForty_Mhz_Intolerant == TRUE) { DBGPRINT(RT_DEBUG_TRACE, ("Disable 20/40 BSSCoex Channel Scan(BssCoex=%d, 40MHzIntolerant=%d)\n", pAd->CommonCfg.bBssCoexEnable, pAd->CommonCfg.bForty_Mhz_Intolerant)); } else if(pAd->CommonCfg.bBssCoexEnable == TRUE) { DBGPRINT(RT_DEBUG_TRACE, ("Enable 20/40 BSSCoex Channel Scan(BssCoex=%d)\n", pAd->CommonCfg.bBssCoexEnable)); APOverlappingBSSScan(pAd); } RTMP_11N_D3_TimerInit(pAd); /* RTMPInitTimer(pAd, &pAd->CommonCfg.Bss2040CoexistTimer, GET_TIMER_FUNCTION(Bss2040CoexistTimeOut), pAd, FALSE);*/ #endif /* DOT11N_DRAFT3 */ #endif /* DOT11_N_SUPPORT */ APStartUp(pAd); DBGPRINT(RT_DEBUG_OFF, ("Main bssid = %02x:%02x:%02x:%02x:%02x:%02x\n", PRINT_MAC(pAd->ApCfg.MBSSID[BSS0].Bssid))); } #endif /* CONFIG_AP_SUPPORT */ }/* end of else*/ /* Set up the Mac address*/ #ifdef CONFIG_AP_SUPPORT RtmpOSNetDevAddrSet(pAd->OpMode, pAd->net_dev, &pAd->CurrentAddress[0], NULL); #endif /* CONFIG_AP_SUPPORT */ /* Various AP function init*/ #ifdef CONFIG_AP_SUPPORT IF_DEV_CONFIG_OPMODE_ON_AP(pAd) { #ifdef MBSS_SUPPORT /* the function can not be moved to RT2860_probe() even register_netdev() is changed as register_netdevice(). Or in some PC, kernel will panic (Fedora 4) */ /* RT28xx_MBSS_Init(pAd, pAd->net_dev); os abl move to rt_main_dev.c*/ #endif /* MBSS_SUPPORT */ #ifdef WDS_SUPPORT /* RT28xx_WDS_Init(pAd, pAd->net_dev);*/ #endif /* WDS_SUPPORT */ #ifdef APCLI_SUPPORT /* RT28xx_ApCli_Init(pAd, pAd->net_dev);*/ #endif /* APCLI_SUPPORT */ } #endif /* CONFIG_AP_SUPPORT */ #ifdef UAPSD_SUPPORT UAPSD_Init(pAd); #endif /* UAPSD_SUPPORT */ /* assign function pointers*/ #ifdef MAT_SUPPORT /* init function pointers, used in OS_ABL */ RTMP_MATOpsInit(pAd); #endif /* MAT_SUPPORT */ #ifdef RT_SOC_SUPPORT if (pAd->infType == RTMP_DEV_INF_RBUS || pAd->infType == RTMP_DEV_INF_PCIE) { #ifdef VIDEO_TURBINE_SUPPORT VideoTurbineDynamicTune(pAd); #endif /* VIDEO_TURBINE_SUPPORT */ #ifdef RT3XXX_ANTENNA_DIVERSITY_SUPPORT RT3XXX_AntDiversity_Init(pAd); #endif /* RT3XXX_ANTENNA_DIVERSITY_SUPPORT */ } #endif /* RT_SOC_SUPPORT */ #ifdef CONFIG_AP_SUPPORT IF_DEV_CONFIG_OPMODE_ON_AP(pAd) { #ifdef MAT_SUPPORT MATEngineInit(pAd); #endif /* MAT_SUPPORT */ #ifdef CLIENT_WDS CliWds_ProxyTabInit(pAd); #endif /* CLIENT_WDS */ } #endif /* CONFIG_AP_SUPPORT */ /* auto-fall back settings */ RTMP_IO_WRITE32(pAd, HT_FBK_CFG1, 0xedcba980); #ifdef DOT11N_SS3_SUPPORT if (pAd->CommonCfg.TxStream >= 3) { RTMP_IO_WRITE32(pAd, TX_FBK_CFG_3S_0, 0x12111008); RTMP_IO_WRITE32(pAd, TX_FBK_CFG_3S_1, 0x16151413); } #endif /* DOT11N_SS3_SUPPORT */ #ifdef STREAM_MODE_SUPPORT RtmpStreamModeInit(pAd); #endif /* STREAM_MODE_SUPPORT */ #if defined(RT2883) || defined(RT3883) || defined(RT3593) if (IS_RT2883(pAd) || IS_RT3883(pAd) || IS_RT3593(pAd)) { UINT8 BBPValue = 0; BBP_IO_READ8_BY_REG_ID(pAd, BBP_R65, &BBPValue); if (pAd->CommonCfg.FineAGC) BBPValue |= 0x40; /* turn on fine AGC*/ else BBPValue &= ~0x40; /* turn off fine AGC*/ BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R65, BBPValue); } #endif /* defined(RT2883) || defined(RT3883) || defined(RT3593) */ #ifdef DOT11_N_SUPPORT #ifdef TXBF_SUPPORT if (pAd->CommonCfg.ITxBfTimeout) { RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R179, 0x02); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R180, 0); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R182, pAd->CommonCfg.ITxBfTimeout & 0xFF); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R180, 1); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R182, (pAd->CommonCfg.ITxBfTimeout>>8) & 0xFF); }
RTMP_BUILD_DRV_OPS_FUNCTION_BODY #endif /* OS_ABL_FUNC_SUPPORT */ #endif /* LINUX */ int rt28xx_init( IN VOID *pAdSrc, IN PSTRING pDefaultMac, IN PSTRING pHostName) { PRTMP_ADAPTER pAd = (PRTMP_ADAPTER)pAdSrc; UINT index; UCHAR TmpPhy; NDIS_STATUS Status; if (pAd == NULL) return FALSE; #ifdef CONFIG_STA_SUPPORT #ifdef PCIE_PS_SUPPORT IF_DEV_CONFIG_OPMODE_ON_STA(pAd) { /* If dirver doesn't wake up firmware here,*/ /* NICLoadFirmware will hang forever when interface is up again.*/ if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_DOZE) && OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_ADVANCE_POWER_SAVE_PCIE_DEVICE)) { AUTO_WAKEUP_STRUC AutoWakeupCfg; AsicForceWakeup(pAd, TRUE); AutoWakeupCfg.word = 0; RTMP_IO_WRITE32(pAd, AUTO_WAKEUP_CFG, AutoWakeupCfg.word); OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_DOZE); } } #endif /* PCIE_PS_SUPPORT */ #endif /* CONFIG_STA_SUPPORT */ /* reset Adapter flags*/ RTMP_CLEAR_FLAGS(pAd); /* Init BssTab & ChannelInfo tabbles for auto channel select.*/ #ifdef CONFIG_AP_SUPPORT IF_DEV_CONFIG_OPMODE_ON_AP(pAd) { /*#ifdef AUTO_CH_SELECT_ENHANCE*/ AutoChBssTableInit(pAd); ChannelInfoInit(pAd); /*#endif AUTO_CH_SELECT_ENHANCE */ } #endif /* CONFIG_AP_SUPPORT */ #ifdef DOT11_N_SUPPORT /* Allocate BA Reordering memory*/ if (ba_reordering_resource_init(pAd, MAX_REORDERING_MPDU_NUM) != TRUE) goto err1; #endif /* DOT11_N_SUPPORT */ /* Make sure MAC gets ready.*/ index = 0; if (WaitForAsicReady(pAd) != TRUE) goto err1; DBGPRINT(RT_DEBUG_TRACE, ("MAC[Ver:Rev=0x%08x]\n", pAd->MACVersion)); if (MAX_LEN_OF_MAC_TABLE > MAX_AVAILABLE_CLIENT_WCID(pAd)) { DBGPRINT(RT_DEBUG_ERROR, ("MAX_LEN_OF_MAC_TABLE can not be larger than MAX_AVAILABLE_CLIENT_WCID!!!!\n")); goto err1; } #ifdef RTMP_MAC_PCI /* To fix driver disable/enable hang issue when radio off*/ RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x2); #endif /* RTMP_MAC_PCI */ /* Disable DMA*/ RT28XXDMADisable(pAd); /* Load 8051 firmware*/ Status = NICLoadFirmware(pAd); if (Status != NDIS_STATUS_SUCCESS) { DBGPRINT_ERR(("NICLoadFirmware failed, Status[=0x%08x]\n", Status)); goto err1; } NICLoadRateSwitchingParams(pAd); /* Disable interrupts here which is as soon as possible*/ /* This statement should never be true. We might consider to remove it later*/ #ifdef RTMP_MAC_PCI if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_ACTIVE)) { RTMP_ASIC_INTERRUPT_DISABLE(pAd); } #endif /* RTMP_MAC_PCI */ #ifdef RESOURCE_PRE_ALLOC Status = RTMPInitTxRxRingMemory(pAd); #else Status = RTMPAllocTxRxRingMemory(pAd); #endif /* RESOURCE_PRE_ALLOC */ if (Status != NDIS_STATUS_SUCCESS) { DBGPRINT_ERR(("RTMPAllocTxRxMemory failed, Status[=0x%08x]\n", Status)); goto err2; } RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE); /* initialize MLME*/ #ifdef RT6352 pAd->bCalibrationDone = FALSE; #endif /* RT6352 */ Status = RtmpMgmtTaskInit(pAd); if (Status != NDIS_STATUS_SUCCESS) goto err3; Status = MlmeInit(pAd); if (Status != NDIS_STATUS_SUCCESS) { DBGPRINT_ERR(("MlmeInit failed, Status[=0x%08x]\n", Status)); goto err4; } #ifdef RMTP_RBUS_SUPPORT #ifdef VIDEO_TURBINE_SUPPORT VideoConfigInit(pAd); #endif /* VIDEO_TURBINE_SUPPORT */ #endif /* RMTP_RBUS_SUPPORT */ /* Initialize pAd->StaCfg, pAd->ApCfg, pAd->CommonCfg to manufacture default*/ UserCfgInit(pAd); Status = RtmpNetTaskInit(pAd); if (Status != NDIS_STATUS_SUCCESS) goto err5; /* COPY_MAC_ADDR(pAd->ApCfg.MBSSID[apidx].Bssid, netif->hwaddr);*/ /* pAd->bForcePrintTX = TRUE;*/ CfgInitHook(pAd); #ifdef CONFIG_AP_SUPPORT if ((pAd->OpMode == OPMODE_AP) #ifdef P2P_SUPPORT || TRUE #endif /* P2P_SUPPORT */ ) APInitialize(pAd); #endif /* CONFIG_AP_SUPPORT */ #ifdef BLOCK_NET_IF initblockQueueTab(pAd); #endif /* BLOCK_NET_IF */ Status = MeasureReqTabInit(pAd); if (Status != NDIS_STATUS_SUCCESS) { DBGPRINT_ERR(("MeasureReqTabInit failed, Status[=0x%08x]\n",Status)); goto err6; } Status = TpcReqTabInit(pAd); if (Status != NDIS_STATUS_SUCCESS) { DBGPRINT_ERR(("TpcReqTabInit failed, Status[=0x%08x]\n",Status)); goto err6; } /* Init the hardware, we need to init asic before read registry, otherwise mac register will be reset*/ Status = NICInitializeAdapter(pAd, TRUE); if (Status != NDIS_STATUS_SUCCESS) { DBGPRINT_ERR(("NICInitializeAdapter failed, Status[=0x%08x]\n", Status)); if (Status != NDIS_STATUS_SUCCESS) goto err6; } #ifdef CONFIG_AP_SUPPORT IF_DEV_CONFIG_OPMODE_ON_AP(pAd) { } #endif /* CONFIG_AP_SUPPORT */ /* Read parameters from Config File */ /* unknown, it will be updated in NICReadEEPROMParameters */ pAd->RfIcType = RFIC_UNKNOWN; Status = RTMPReadParametersHook(pAd); if(pAd->CommonCfg.Channel==0) { RTMPSetDefaultChannel(pAd); } #ifdef CONFIG_STA_SUPPORT #ifdef CREDENTIAL_STORE RecoverConnectInfo(pAd); #endif /* CREDENTIAL_STORE */ #endif /* CONFIG_STA_SUPPORT */ DBGPRINT(RT_DEBUG_OFF, ("1. Phy Mode = %d\n", pAd->CommonCfg.PhyMode)); if (Status != NDIS_STATUS_SUCCESS) { DBGPRINT_ERR(("RTMPReadParametersHook failed, Status[=0x%08x]\n",Status)); goto err6; } #ifdef DOT11_N_SUPPORT /*Init Ba Capability parameters.*/ /* RT28XX_BA_INIT(pAd);*/ pAd->CommonCfg.DesiredHtPhy.MpduDensity = (UCHAR)pAd->CommonCfg.BACapability.field.MpduDensity; pAd->CommonCfg.DesiredHtPhy.AmsduEnable = (USHORT)pAd->CommonCfg.BACapability.field.AmsduEnable; pAd->CommonCfg.DesiredHtPhy.AmsduSize = (USHORT)pAd->CommonCfg.BACapability.field.AmsduSize; pAd->CommonCfg.DesiredHtPhy.MimoPs = (USHORT)pAd->CommonCfg.BACapability.field.MMPSmode; /* UPdata to HT IE*/ pAd->CommonCfg.HtCapability.HtCapInfo.MimoPs = (USHORT)pAd->CommonCfg.BACapability.field.MMPSmode; pAd->CommonCfg.HtCapability.HtCapInfo.AMsduSize = (USHORT)pAd->CommonCfg.BACapability.field.AmsduSize; pAd->CommonCfg.HtCapability.HtCapParm.MpduDensity = (UCHAR)pAd->CommonCfg.BACapability.field.MpduDensity; #endif /* DOT11_N_SUPPORT */ /* after reading Registry, we now know if in AP mode or STA mode*/ /* Load 8051 firmware; crash when FW image not existent*/ /* Status = NICLoadFirmware(pAd);*/ /* if (Status != NDIS_STATUS_SUCCESS)*/ /* break;*/ DBGPRINT(RT_DEBUG_OFF, ("2. Phy Mode = %d\n", pAd->CommonCfg.PhyMode)); /* We should read EEPROM for all cases. rt2860b*/ NICReadEEPROMParameters(pAd, (PSTRING)pDefaultMac); #ifdef CONFIG_STA_SUPPORT #endif /* CONFIG_STA_SUPPORT */ DBGPRINT(RT_DEBUG_OFF, ("3. Phy Mode = %d\n", pAd->CommonCfg.PhyMode)); #ifdef LED_CONTROL_SUPPORT /* Send LED Setting to MCU */ RTMPInitLEDMode(pAd); #endif /* LED_CONTROL_SUPPORT */ NICInitAsicFromEEPROM(pAd); /* rt2860b */ #ifdef RT6352 if (IS_RT6352(pAd)) { RtmpKickOutHwNullFrame(pAd, TRUE, FALSE); #if defined(RT6352_EP_SUPPORT) || defined(RT6352_EL_SUPPORT) { ULONG SysRegValue; RTMP_SYS_IO_READ32(0xb0000060, &SysRegValue); if ((SysRegValue & 0x100000) == 0x0) { SysRegValue |= 0x100000; RTMP_SYS_IO_WRITE32(0xb0000060, SysRegValue); DBGPRINT(RT_DEBUG_ERROR,("Change as GPIO Mode(0x%x)\n", SysRegValue)); } } #endif /* defined(RT6352_EP_SUPPORT) || defined(RT6352_EL_SUPPORT) */ /* Do R-Calibration */ R_Calibration(pAd); #ifdef RTMP_TEMPERATURE_CALIBRATION /* Temperature Init */ RT6352_Temperature_Init(pAd); RT6352_TemperatureCalibration(pAd); #endif /* RTMP_TEMPERATURE_CALIBRATION */ #ifdef RTMP_TEMPERATURE_COMPENSATION /* read out tempature reference value (0x80 ~ 0x7F) TssiPlusBoundaryG [7] [6] [5] [4] [3] [2] [1] [0] (smaller) + TssiMinusBoundaryG[0] [1] [2] [3] [4] [5] [6] [7] (larger) */ RT6352_EEPROM_TSSI_24G_READ(pAd); /* pAd->TssiCalibratedOffset: reference temperature(e2p[D1h]) */ /* adjust the boundary table by pAd->TssiCalibratedOffset */ RT6352_TssiTableAdjust(pAd); /* ATE temperature(e2p[77h]) */ RT6352_TssiMpAdjust(pAd); DBGPRINT(RT_DEBUG_OFF,("E2PROM: G Tssi[-7 .. +7] = %d %d %d %d %d %d %d - %d - %d %d %d %d %d %d %d, offset=%d, tuning=%d\n", pAd->TssiMinusBoundaryG[7], pAd->TssiMinusBoundaryG[6], pAd->TssiMinusBoundaryG[5], pAd->TssiMinusBoundaryG[4], pAd->TssiMinusBoundaryG[3], pAd->TssiMinusBoundaryG[2], pAd->TssiMinusBoundaryG[1], pAd->TssiRefG, pAd->TssiPlusBoundaryG[1], pAd->TssiPlusBoundaryG[2], pAd->TssiPlusBoundaryG[3], pAd->TssiPlusBoundaryG[4], pAd->TssiPlusBoundaryG[5], pAd->TssiPlusBoundaryG[6], pAd->TssiPlusBoundaryG[7], pAd->TssiCalibratedOffset, pAd->bAutoTxAgcG)); #endif /* RTMP_TEMPERATURE_COMPENSATION */ AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, TRUE); AsicLockChannel(pAd, pAd->CommonCfg.Channel); /* RF Self TX DC Calibration */ RF_SELF_TXDC_CAL(pAd); /* Rx DCOC Calibration */ RxDCOC_Calibration(pAd); /* BandWidth Filter Calibration */ BW_Filter_Calibration(pAd,TRUE); BW_Filter_Calibration(pAd,FALSE); /* Do LOFT and IQ Calibration */ LOFT_IQ_Calibration(pAd); /* DPD_Calibration */ #ifdef RT6352_EP_SUPPORT if (pAd->bExtPA == FALSE) #endif /* RT6352_EP_SUPPORT */ { DoDPDCalibration(pAd); pAd->DoDPDCurrTemperature = 0x7FFFFFFF; } /* Rx DCOC Calibration */ RxDCOC_Calibration(pAd); /* Do RXIQ Calibration */ RXIQ_Calibration(pAd); #if defined(RT6352_EP_SUPPORT) || defined(RT6352_EL_SUPPORT) RT6352_Init_ExtPA_ExtLNA(pAd, FALSE); #endif /* defined(RT6352_EP_SUPPORT) || defined(RT6352_EL_SUPPORT) */ } #endif /* RT6352 */ #ifdef RALINK_ATE if (ATEInit(pAd) != NDIS_STATUS_SUCCESS) { DBGPRINT(RT_DEBUG_ERROR, ("%s(): ATE initialization failed !\n", __FUNCTION__)); goto err6; } #endif /* RALINK_ATE */ #ifdef RTMP_INTERNAL_TX_ALC /* Initialize the desired TSSI table*/ RTMP_CHIP_ASIC_TSSI_TABLE_INIT(pAd); #endif /* RTMP_INTERNAL_TX_ALC */ InitRfPaModeTable(pAd); #ifdef RTMP_TEMPERATURE_COMPENSATION /* Temperature compensation, initialize the lookup table */ DBGPRINT(RT_DEBUG_OFF, ("bAutoTxAgcG = %d\n", pAd->bAutoTxAgcG)); if (pAd->chipCap.bTempCompTxALC && pAd->bAutoTxAgcG) InitLookupTable(pAd); #endif /* RTMP_TEMPERATURE_COMPENSATION */ /* Set PHY to appropriate mode*/ TmpPhy = pAd->CommonCfg.PhyMode; pAd->CommonCfg.PhyMode = 0xff; RTMPSetPhyMode(pAd, TmpPhy); #ifdef DOT11_N_SUPPORT SetCommonHT(pAd); #endif /* DOT11_N_SUPPORT */ /* No valid channels.*/ if (pAd->ChannelListNum == 0) { DBGPRINT(RT_DEBUG_ERROR, ("Wrong configuration. No valid channel found. Check \"ContryCode\" and \"ChannelGeography\" setting.\n")); goto err6; } #ifdef DOT11_N_SUPPORT DBGPRINT(RT_DEBUG_OFF, ("MCS Set = %02x %02x %02x %02x %02x\n", pAd->CommonCfg.HtCapability.MCSSet[0], pAd->CommonCfg.HtCapability.MCSSet[1], pAd->CommonCfg.HtCapability.MCSSet[2], pAd->CommonCfg.HtCapability.MCSSet[3], pAd->CommonCfg.HtCapability.MCSSet[4])); #endif /* DOT11_N_SUPPORT */ #ifdef CONFIG_AP_SUPPORT IF_DEV_CONFIG_OPMODE_ON_AP(pAd) { #ifdef AP_QLOAD_SUPPORT /* init QBSS Element */ QBSS_LoadInit(pAd); #endif /* AP_QLOAD_SUPPORT */ } #endif /* CONFIG_AP_SUPPORT */ /* APInitialize(pAd);*/ #ifdef IKANOS_VX_1X0 VR_IKANOS_FP_Init(pAd->ApCfg.BssidNum, pAd->PermanentAddress); #endif /* IKANOS_VX_1X0 */ #ifdef RALINK_ATE #endif /* RALINK_ATE */ #ifdef CONFIG_AP_SUPPORT /* Initialize RF register to default value*/ if (pAd->OpMode == OPMODE_AP) { AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE); AsicLockChannel(pAd, pAd->CommonCfg.Channel); } #endif /* CONFIG_AP_SUPPORT */ #ifdef RTMP_INTERNAL_TX_ALC #ifdef RT6352 if (IS_RT6352(pAd) && (pAd->TxPowerCtrl.bInternalTxALC == TRUE)) { RT635xTssiDcCalibration(pAd); } #endif /* RT6352 */ #endif /* RTMP_INTERNAL_TX_ALC */ /* Some modules init must be called before APStartUp(). Or APStartUp() will make up beacon content and call other modules API to get some information to fill. */ if (pAd && (Status != NDIS_STATUS_SUCCESS)) { /* Undo everything if it failed*/ if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE)) { /* NdisMDeregisterInterrupt(&pAd->Interrupt);*/ RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE); } /* RTMPFreeAdapter(pAd); we will free it in disconnect()*/ } else if (pAd) { /* Microsoft HCT require driver send a disconnect event after driver initialization.*/ OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED); OPSTATUS_CLEAR_FLAG(pAd, fOP_AP_STATUS_MEDIA_STATE_CONNECTED); RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_MEDIA_STATE_CHANGE); DBGPRINT(RT_DEBUG_TRACE, ("NDIS_STATUS_MEDIA_DISCONNECT Event B!\n")); #ifdef CONFIG_AP_SUPPORT IF_DEV_CONFIG_OPMODE_ON_AP(pAd) { if (pAd->ApCfg.bAutoChannelAtBootup || (pAd->CommonCfg.Channel == 0)) { UINT8 BBPValue = 0; /* Enable Interrupt first due to we need to scan channel to receive beacons.*/ RTMP_IRQ_ENABLE(pAd); /* Now Enable RxTx*/ RTMPEnableRxTx(pAd); RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_START_UP); /* Let BBP register at 20MHz to do scan */ RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue); BBPValue &= (~0x18); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue); DBGPRINT(RT_DEBUG_ERROR, ("SYNC - BBP R4 to 20MHz.l\n")); /* Now we can receive the beacon and do the listen beacon*/ /* use default BW to select channel*/ pAd->CommonCfg.Channel = AP_AUTO_CH_SEL(pAd, pAd->ApCfg.AutoChannelAlg); pAd->ApCfg.bAutoChannelAtBootup = FALSE; } #ifdef DOT11_N_SUPPORT /* If phymode > PHY_11ABGN_MIXED and BW=40 check extension channel, after select channel */ N_ChannelCheck(pAd); #ifdef DOT11N_DRAFT3 /* We only do this Overlapping BSS Scan when system up, for the other situation of channel changing, we depends on station's report to adjust ourself. */ if (pAd->CommonCfg.bForty_Mhz_Intolerant == TRUE) { DBGPRINT(RT_DEBUG_TRACE, ("Disable 20/40 BSSCoex Channel Scan(BssCoex=%d, 40MHzIntolerant=%d)\n", pAd->CommonCfg.bBssCoexEnable, pAd->CommonCfg.bForty_Mhz_Intolerant)); } else if(pAd->CommonCfg.bBssCoexEnable == TRUE) { DBGPRINT(RT_DEBUG_TRACE, ("Enable 20/40 BSSCoex Channel Scan(BssCoex=%d)\n", pAd->CommonCfg.bBssCoexEnable)); APOverlappingBSSScan(pAd); } RTMP_11N_D3_TimerInit(pAd); /* RTMPInitTimer(pAd, &pAd->CommonCfg.Bss2040CoexistTimer, GET_TIMER_FUNCTION(Bss2040CoexistTimeOut), pAd, FALSE);*/ #endif /* DOT11N_DRAFT3 */ #endif /* DOT11_N_SUPPORT */ APStartUp(pAd); DBGPRINT(RT_DEBUG_OFF, ("Main bssid = %02x:%02x:%02x:%02x:%02x:%02x\n", PRINT_MAC(pAd->ApCfg.MBSSID[BSS0].Bssid))); } #endif /* CONFIG_AP_SUPPORT */ #ifdef RT6352 pAd->bCalibrationDone = TRUE; if (IS_RT6352(pAd)) { #ifdef DYNAMIC_VGA_SUPPORT if (pAd->CommonCfg.MO_Cfg.bDyncVGAEnable) { RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R195, 0x83); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R196, 0x70); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R195, 0x86); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R196, 0x70); } #endif /* DYNAMIC_VGA_SUPPORT */ } #endif /* RT6352 */ }/* end of else*/ /* Set up the Mac address*/ #ifdef CONFIG_AP_SUPPORT #ifndef P2P_APCLI_SUPPORT RtmpOSNetDevAddrSet(pAd->OpMode, pAd->net_dev, &pAd->CurrentAddress[0], NULL); #endif /* P2P_APCLI_SUPPORT */ #endif /* CONFIG_AP_SUPPORT */ #ifdef CONFIG_STA_SUPPORT RtmpOSNetDevAddrSet(pAd->OpMode, pAd->net_dev, &pAd->CurrentAddress[0], (PUCHAR)(pAd->StaCfg.dev_name)); #endif /* CONFIG_STA_SUPPORT */ /* Various AP function init*/ #ifdef CONFIG_AP_SUPPORT #ifdef P2P_SUPPORT #else IF_DEV_CONFIG_OPMODE_ON_AP(pAd) #endif /* P2P_SUPPORT */ { #ifdef MBSS_SUPPORT /* the function can not be moved to RT2860_probe() even register_netdev() is changed as register_netdevice(). Or in some PC, kernel will panic (Fedora 4) */ /* RT28xx_MBSS_Init(pAd, pAd->net_dev); os abl move to rt_main_dev.c*/ #endif /* MBSS_SUPPORT */ #ifdef WDS_SUPPORT /* RT28xx_WDS_Init(pAd, pAd->net_dev);*/ #endif /* WDS_SUPPORT */ #ifdef APCLI_SUPPORT /* RT28xx_ApCli_Init(pAd, pAd->net_dev);*/ #endif /* APCLI_SUPPORT */ } #endif /* CONFIG_AP_SUPPORT */ #ifdef UAPSD_SUPPORT UAPSD_Init(pAd); #endif /* UAPSD_SUPPORT */ /* assign function pointers*/ #ifdef MAT_SUPPORT /* init function pointers, used in OS_ABL */ RTMP_MATOpsInit(pAd); #endif /* MAT_SUPPORT */ #ifdef RTMP_RBUS_SUPPORT if (pAd->infType == RTMP_DEV_INF_RBUS) { #ifdef VIDEO_TURBINE_SUPPORT VideoTurbineDynamicTune(pAd); #endif /* VIDEO_TURBINE_SUPPORT */ #ifdef RT3XXX_ANTENNA_DIVERSITY_SUPPORT RT3XXX_AntDiversity_Init(pAd); #endif /* RT3XXX_ANTENNA_DIVERSITY_SUPPORT */ } #endif /* RTMP_RBUS_SUPPORT */ #ifdef P2P_SUPPORT /* RTMP_P2P_Init(pAd, pAd->net_dev); */ #endif /* P2P_SUPPORT */ #ifdef CONFIG_AP_SUPPORT IF_DEV_CONFIG_OPMODE_ON_AP(pAd) { #ifdef MAT_SUPPORT MATEngineInit(pAd); #endif /* MAT_SUPPORT */ #ifdef CLIENT_WDS CliWds_ProxyTabInit(pAd); #endif /* CLIENT_WDS */ } #endif /* CONFIG_AP_SUPPORT */ #ifdef CONFIG_STA_SUPPORT IF_DEV_CONFIG_OPMODE_ON_STA(pAd) { #ifdef DOT11Z_TDLS_SUPPORT TDLS_Table_Init(pAd); #endif /* DOT11Z_TDLS_SUPPORT */ #ifdef WPA_SUPPLICANT_SUPPORT #ifndef NATIVE_WPA_SUPPLICANT_SUPPORT /* send wireless event to wpa_supplicant for infroming interface up.*/ RtmpOSWrielessEventSend(pAd->net_dev, RT_WLAN_EVENT_CUSTOM, RT_INTERFACE_UP, NULL, NULL, 0); #endif /* NATIVE_WPA_SUPPLICANT_SUPPORT */ #endif /* WPA_SUPPLICANT_SUPPORT */ } #endif /* CONFIG_STA_SUPPORT */ /* auto-fall back settings */ RTMP_IO_WRITE32(pAd, HT_FBK_CFG1, 0xedcba980); /* Fallback MCS8->MCS0 */ #ifdef DOT11N_SS3_SUPPORT if (pAd->CommonCfg.TxStream >= 3) { RTMP_IO_WRITE32(pAd, TX_FBK_CFG_3S_0, 0x12111008); RTMP_IO_WRITE32(pAd, TX_FBK_CFG_3S_1, 0x16151413); } #endif /* DOT11N_SS3_SUPPORT */ #ifdef STREAM_MODE_SUPPORT RtmpStreamModeInit(pAd); #endif /* STREAM_MODE_SUPPORT */ #if defined(RT2883) || defined(RT3883) if (IS_RT2883(pAd) || IS_RT3883(pAd)) { UINT8 BBPValue = 0; BBP_IO_READ8_BY_REG_ID(pAd, BBP_R65, &BBPValue); if (pAd->CommonCfg.FineAGC) BBPValue |= 0x40; /* turn on fine AGC*/ else BBPValue &= ~0x40; /* turn off fine AGC*/ BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R65, BBPValue); } #endif /* defined(RT2883) || defined(RT3883) */ #ifdef DOT11_N_SUPPORT #ifdef TXBF_SUPPORT if (pAd->CommonCfg.ITxBfTimeout) { RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R179, 0x02); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R180, 0); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R182, pAd->CommonCfg.ITxBfTimeout & 0xFF); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R180, 1); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R182, (pAd->CommonCfg.ITxBfTimeout>>8) & 0xFF); }
int rt28xx_init( IN PRTMP_ADAPTER pAd, IN PSTRING pDefaultMac, IN PSTRING pHostName) { UINT index; UCHAR TmpPhy; NDIS_STATUS Status; UINT32 MacCsr0 = 0; UINT16 ChipId = 0; // reset Adapter flags RTMP_CLEAR_FLAGS(pAd); // Init BssTab & ChannelInfo tabbles for auto channel select. #ifdef CONFIG_AP_SUPPORT IF_DEV_CONFIG_OPMODE_ON_AP(pAd) { //#ifdef AUTO_CH_SELECT_ENHANCE AutoChBssTableInit(pAd); ChannelInfoInit(pAd); //#endif // AUTO_CH_SELECT_ENHANCE // } #endif // CONFIG_AP_SUPPORT // #ifdef DOT11_N_SUPPORT // Allocate BA Reordering memory if (ba_reordering_resource_init(pAd, MAX_REORDERING_MPDU_NUM) != TRUE) goto err1; #endif // DOT11_N_SUPPORT // // Make sure MAC gets ready. index = 0; do { RTMP_IO_READ32(pAd, MAC_CSR0, &MacCsr0); pAd->MACVersion = MacCsr0; /* The purpose is to identify RT5390H */ RT28xx_EEPROM_READ16(pAd, 0x00, ChipId); pAd->ChipId = ChipId; if ((pAd->MACVersion != 0x00) && (pAd->MACVersion != 0xFFFFFFFF)) break; if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)) goto err1; RTMPusecDelay(10); } while (index++ < 100); DBGPRINT(RT_DEBUG_TRACE, ("MAC_CSR0 [ Ver:Rev=0x%08x]\n", pAd->MACVersion)); #ifdef RT5390 if (IS_RT5390H(pAd)) DBGPRINT(RT_DEBUG_ERROR, ("The chip belongs to 0x%04x\n", pAd->ChipId)); #endif /* RT5390 */ #ifdef SPECIFIC_BCN_BUF_SUPPORT pAd->BcnCB.DYN_MAX_MBSSID_NUM = 1; if (IS_RT5390(pAd) || IS_RT3593(pAd)) { pAd->BcnCB.bHighShareMemSupport = 1; pAd->BcnCB.DYN_HW_BEACON_BASE0 = 0x4000; pAd->BcnCB.DYN_HW_BEACON_MAX_SIZE = 0x2000; pAd->BcnCB.DYN_HW_BEACON_MAX_COUNT = 16; #ifdef MBSS_SUPPORT #ifdef APCLI_SUPPORT pAd->BcnCB.DYN_MAX_MBSSID_NUM = 8 - MAX_MESH_NUM; #else pAd->BcnCB.DYN_MAX_MBSSID_NUM = 16 - MAX_MESH_NUM; #endif // APCLI_SUPPORT // #endif // MBSS_SUPPORT // } else { pAd->BcnCB.bHighShareMemSupport = 0; pAd->BcnCB.DYN_HW_BEACON_BASE0 = 0x7800; pAd->BcnCB.DYN_HW_BEACON_MAX_SIZE = 0x1000; pAd->BcnCB.DYN_HW_BEACON_MAX_COUNT = 8; #ifdef MBSS_SUPPORT pAd->BcnCB.DYN_MAX_MBSSID_NUM = (pAd->BcnCB.DYN_HW_BEACON_MAX_COUNT - MAX_MESH_NUM - MAX_APCLI_NUM); #endif // MBSS_SUPPORT // } #endif // SPECIFIC_BCN_BUF_SUPPORT // #ifdef RTMP_MAC_PCI #if defined(RT3090) || defined(RT3592) || defined(RT3390) || defined(RT3593) || defined(RT5390) /*Iverson patch PCIE L1 issue to make sure that driver can be read,write ,BBP and RF register at pcie L.1 level */ if ((IS_RT3090(pAd) || IS_RT3572(pAd) || IS_RT3390(pAd) || IS_RT3593(pAd) || IS_RT5390(pAd))&&pAd->infType==RTMP_DEV_INF_PCIE) { RTMP_IO_READ32(pAd, AUX_CTRL, &MacCsr0); MacCsr0 |= 0x402; RTMP_IO_WRITE32(pAd, AUX_CTRL, MacCsr0); DBGPRINT(RT_DEBUG_TRACE, ("AUX_CTRL = 0x%x\n", MacCsr0)); } #endif // RT3090 // // To fix driver disable/enable hang issue when radio off RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x2); #endif // RTMP_MAC_PCI // // Disable DMA RT28XXDMADisable(pAd); // Load 8051 firmware Status = NICLoadFirmware(pAd); if (Status != NDIS_STATUS_SUCCESS) { DBGPRINT_ERR(("NICLoadFirmware failed, Status[=0x%08x]\n", Status)); goto err1; } NICLoadRateSwitchingParams(pAd); // Disable interrupts here which is as soon as possible // This statement should never be true. We might consider to remove it later #ifdef RTMP_MAC_PCI if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_ACTIVE)) { RTMP_ASIC_INTERRUPT_DISABLE(pAd); } #endif // RTMP_MAC_PCI // #ifdef RESOURCE_PRE_ALLOC Status = RTMPInitTxRxRingMemory(pAd); #else Status = RTMPAllocTxRxRingMemory(pAd); #endif // RESOURCE_PRE_ALLOC // if (Status != NDIS_STATUS_SUCCESS) { DBGPRINT_ERR(("RTMPAllocTxRxMemory failed, Status[=0x%08x]\n", Status)); goto err2; } RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE); // initialize MLME // Status = RtmpMgmtTaskInit(pAd); if (Status != NDIS_STATUS_SUCCESS) goto err3; Status = MlmeInit(pAd); if (Status != NDIS_STATUS_SUCCESS) { DBGPRINT_ERR(("MlmeInit failed, Status[=0x%08x]\n", Status)); goto err4; } #ifdef RMTP_RBUS_SUPPORT #ifdef VIDEO_TURBINE_SUPPORT VideoConfigInit(pAd); #endif // VIDEO_TURBINE_SUPPORT // #endif // RMTP_RBUS_SUPPORT // // Initialize pAd->StaCfg, pAd->ApCfg, pAd->CommonCfg to manufacture default // UserCfgInit(pAd); Status = RtmpNetTaskInit(pAd); if (Status != NDIS_STATUS_SUCCESS) goto err5; // COPY_MAC_ADDR(pAd->ApCfg.MBSSID[apidx].Bssid, netif->hwaddr); // pAd->bForcePrintTX = TRUE; CfgInitHook(pAd); #ifdef CONFIG_AP_SUPPORT IF_DEV_CONFIG_OPMODE_ON_AP(pAd) APInitialize(pAd); #endif // CONFIG_AP_SUPPORT // #ifdef BLOCK_NET_IF initblockQueueTab(pAd); #endif // BLOCK_NET_IF // Status = MeasureReqTabInit(pAd); if (Status != NDIS_STATUS_SUCCESS) { DBGPRINT_ERR(("MeasureReqTabInit failed, Status[=0x%08x]\n",Status)); goto err6; } Status = TpcReqTabInit(pAd); if (Status != NDIS_STATUS_SUCCESS) { DBGPRINT_ERR(("TpcReqTabInit failed, Status[=0x%08x]\n",Status)); goto err6; } // // Init the hardware, we need to init asic before read registry, otherwise mac register will be reset // Status = NICInitializeAdapter(pAd, TRUE); if (Status != NDIS_STATUS_SUCCESS) { DBGPRINT_ERR(("NICInitializeAdapter failed, Status[=0x%08x]\n", Status)); if (Status != NDIS_STATUS_SUCCESS) goto err6; } #ifdef CONFIG_AP_SUPPORT IF_DEV_CONFIG_OPMODE_ON_AP(pAd) { } #endif // CONFIG_AP_SUPPORT // // Read parameters from Config File /* unknown, it will be updated in NICReadEEPROMParameters */ pAd->RfIcType = RFIC_UNKNOWN; Status = RTMPReadParametersHook(pAd); DBGPRINT(RT_DEBUG_OFF, ("1. Phy Mode = %d\n", pAd->CommonCfg.PhyMode)); if (Status != NDIS_STATUS_SUCCESS) { DBGPRINT_ERR(("RTMPReadParametersHook failed, Status[=0x%08x]\n",Status)); goto err6; } #ifdef DOT11_N_SUPPORT //Init Ba Capability parameters. // RT28XX_BA_INIT(pAd); pAd->CommonCfg.DesiredHtPhy.MpduDensity = (UCHAR)pAd->CommonCfg.BACapability.field.MpduDensity; pAd->CommonCfg.DesiredHtPhy.AmsduEnable = (USHORT)pAd->CommonCfg.BACapability.field.AmsduEnable; pAd->CommonCfg.DesiredHtPhy.AmsduSize = (USHORT)pAd->CommonCfg.BACapability.field.AmsduSize; pAd->CommonCfg.DesiredHtPhy.MimoPs = (USHORT)pAd->CommonCfg.BACapability.field.MMPSmode; // UPdata to HT IE pAd->CommonCfg.HtCapability.HtCapInfo.MimoPs = (USHORT)pAd->CommonCfg.BACapability.field.MMPSmode; pAd->CommonCfg.HtCapability.HtCapInfo.AMsduSize = (USHORT)pAd->CommonCfg.BACapability.field.AmsduSize; pAd->CommonCfg.HtCapability.HtCapParm.MpduDensity = (UCHAR)pAd->CommonCfg.BACapability.field.MpduDensity; #endif // DOT11_N_SUPPORT // // after reading Registry, we now know if in AP mode or STA mode // Load 8051 firmware; crash when FW image not existent // Status = NICLoadFirmware(pAd); // if (Status != NDIS_STATUS_SUCCESS) // break; DBGPRINT(RT_DEBUG_OFF, ("2. Phy Mode = %d\n", pAd->CommonCfg.PhyMode)); // We should read EEPROM for all cases. rt2860b NICReadEEPROMParameters(pAd, (PUCHAR)pDefaultMac); DBGPRINT(RT_DEBUG_OFF, ("3. Phy Mode = %d\n", pAd->CommonCfg.PhyMode)); NICInitAsicFromEEPROM(pAd); //rt2860b #ifdef RTMP_INTERNAL_TX_ALC // // Initialize the desired TSSI table // InitDesiredTSSITable(pAd); #endif // RTMP_INTERNAL_TX_ALC // #if defined(RT5390) || defined(RT5370) // // Temperature compensation, initialize the lookup table // DBGPRINT(RT_DEBUG_ERROR, ("IS_RT5392 = %d, bAutoTxAgcG = %d\n", IS_RT5392(pAd), pAd->bAutoTxAgcG)); if (IS_RT5392(pAd) && pAd->bAutoTxAgcG && pAd->CommonCfg.TempComp != 0) { InitLookupTable(pAd); } #endif // defined(RT5390) || defined(RT5370) // // Set PHY to appropriate mode TmpPhy = pAd->CommonCfg.PhyMode; pAd->CommonCfg.PhyMode = 0xff; RTMPSetPhyMode(pAd, TmpPhy); #ifdef DOT11_N_SUPPORT SetCommonHT(pAd); #endif // DOT11_N_SUPPORT // // No valid channels. if (pAd->ChannelListNum == 0) { DBGPRINT(RT_DEBUG_ERROR, ("Wrong configuration. No valid channel found. Check \"ContryCode\" and \"ChannelGeography\" setting.\n")); goto err6; } #ifdef DOT11_N_SUPPORT DBGPRINT(RT_DEBUG_OFF, ("MCS Set = %02x %02x %02x %02x %02x\n", pAd->CommonCfg.HtCapability.MCSSet[0], pAd->CommonCfg.HtCapability.MCSSet[1], pAd->CommonCfg.HtCapability.MCSSet[2], pAd->CommonCfg.HtCapability.MCSSet[3], pAd->CommonCfg.HtCapability.MCSSet[4])); #endif // DOT11_N_SUPPORT // #ifdef CONFIG_AP_SUPPORT IF_DEV_CONFIG_OPMODE_ON_AP(pAd) { #ifdef AP_QLOAD_SUPPORT /* init QBSS Element */ QBSS_LoadInit(pAd); #endif // AP_QLOAD_SUPPORT // //#ifdef DOT11K_RRM_SUPPORT // RRM_CfgInit(pAd); //#endif // DOT11K_RRM_SUPPORT // } #endif // CONFIG_AP_SUPPORT // // APInitialize(pAd); #ifdef IKANOS_VX_1X0 VR_IKANOS_FP_Init(pAd->ApCfg.BssidNum, pAd->PermanentAddress); #endif // IKANOS_VX_1X0 // #ifdef CONFIG_AP_SUPPORT // // Initialize RF register to default value // if (pAd->OpMode == OPMODE_AP) { AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE); AsicLockChannel(pAd, pAd->CommonCfg.Channel); } #endif // CONFIG_AP_SUPPORT // /* Some modules init must be called before APStartUp(). Or APStartUp() will make up beacon content and call other modules API to get some information to fill. */ #ifdef WMM_ACM_SUPPORT #ifdef CONFIG_AP_SUPPORT ACMP_Init(pAd, pAd->CommonCfg.APEdcaParm.bACM[0], pAd->CommonCfg.APEdcaParm.bACM[1], pAd->CommonCfg.APEdcaParm.bACM[2], pAd->CommonCfg.APEdcaParm.bACM[3], 0); #endif // CONFIG_AP_SUPPORT // #endif // WMM_ACM_SUPPORT // if (pAd && (Status != NDIS_STATUS_SUCCESS)) { // // Undo everything if it failed // if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE)) { // NdisMDeregisterInterrupt(&pAd->Interrupt); RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE); } // RTMPFreeAdapter(pAd); // we will free it in disconnect() } else if (pAd) { // Microsoft HCT require driver send a disconnect event after driver initialization. OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED); RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_MEDIA_STATE_CHANGE); DBGPRINT(RT_DEBUG_TRACE, ("NDIS_STATUS_MEDIA_DISCONNECT Event B!\n")); #ifdef CONFIG_AP_SUPPORT IF_DEV_CONFIG_OPMODE_ON_AP(pAd) { if (pAd->ApCfg.bAutoChannelAtBootup || (pAd->CommonCfg.Channel == 0)) { UINT8 BBPValue = 0; // Enable Interrupt first due to we need to scan channel to receive beacons. RTMP_IRQ_ENABLE(pAd); // Now Enable RxTx RTMPEnableRxTx(pAd); RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_START_UP); // Let BBP register at 20MHz to do scan RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue); BBPValue &= (~0x18); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue); DBGPRINT(RT_DEBUG_ERROR, ("SYNC - BBP R4 to 20MHz.l\n")); // Now we can receive the beacon and do the listen beacon // use default BW to select channel pAd->CommonCfg.Channel = AP_AUTO_CH_SEL(pAd, pAd->ApCfg.AutoChannelAlg); pAd->ApCfg.bAutoChannelAtBootup = FALSE; } #ifdef DOT11_N_SUPPORT // If phymode > PHY_11ABGN_MIXED and BW=40 check extension channel, after select channel N_ChannelCheck(pAd); #ifdef DOT11N_DRAFT3 /* We only do this Overlapping BSS Scan when system up, for the other situation of channel changing, we depends on station's report to adjust ourself. */ if (pAd->CommonCfg.bForty_Mhz_Intolerant == TRUE) { DBGPRINT(RT_DEBUG_TRACE, ("Disable 20/40 BSSCoex Channel Scan(BssCoex=%d, 40MHzIntolerant=%d)\n", pAd->CommonCfg.bBssCoexEnable, pAd->CommonCfg.bForty_Mhz_Intolerant)); } else if(pAd->CommonCfg.bBssCoexEnable == TRUE) { DBGPRINT(RT_DEBUG_TRACE, ("Enable 20/40 BSSCoex Channel Scan(BssCoex=%d)\n", pAd->CommonCfg.bBssCoexEnable)); APOverlappingBSSScan(pAd); } RTMP_11N_D3_TimerInit(pAd); // RTMPInitTimer(pAd, &pAd->CommonCfg.Bss2040CoexistTimer, GET_TIMER_FUNCTION(Bss2040CoexistTimeOut), pAd, FALSE); #endif // DOT11N_DRAFT3 // #endif // DOT11_N_SUPPORT // #ifdef RT3090 #ifdef TONE_RADAR_DETECT_SUPPORT if (IS_RT3090A(pAd) || IS_RT3390(pAd) || IS_RT5390(pAd)) pAd->CommonCfg.carrier_func=TONE_RADAR_V2; else pAd->CommonCfg.carrier_func=TONE_RADAR_V1; #endif // TONE_RADAR_DETECT_SUPPORT // #endif // RT3090 // APStartUp(pAd); DBGPRINT(RT_DEBUG_OFF, ("Main bssid = %02x:%02x:%02x:%02x:%02x:%02x\n", PRINT_MAC(pAd->ApCfg.MBSSID[BSS0].Bssid))); } #endif // CONFIG_AP_SUPPORT // }// end of else #ifdef WSC_INCLUDED #ifdef CONFIG_AP_SUPPORT IF_DEV_CONFIG_OPMODE_ON_AP(pAd) { INT apidx; #ifdef HOSTAPD_SUPPORT if (pAd->ApCfg.Hostapd == TRUE) { DBGPRINT(RT_DEBUG_TRACE, ("WPS is control by hostapd now.\n")); } else #endif //HOSTAPD_SUPPORT// for (apidx = 0; apidx < pAd->ApCfg.BssidNum; apidx++) { PWSC_CTRL pWscControl; UCHAR zeros16[16]= {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}; pWscControl = &pAd->ApCfg.MBSSID[apidx].WscControl; DBGPRINT(RT_DEBUG_TRACE, ("Generate UUID for apidx(%d)\n", apidx)); if (NdisEqualMemory(&pWscControl->Wsc_Uuid_E[0], zeros16, UUID_LEN_HEX)) WscGenerateUUID(pAd, &pWscControl->Wsc_Uuid_E[0], &pWscControl->Wsc_Uuid_Str[0], apidx, FALSE); WscInit(pAd, FALSE, apidx); } } #endif // CONFIG_AP_SUPPORT // /* WSC hardware push button function 0811 */ WSC_HDR_BTN_Init(pAd); #endif // WSC_INCLUDED // // Set up the Mac address RtmpOSNetDevAddrSet(pAd->net_dev, &pAd->CurrentAddress[0]); // Various AP function init #ifdef CONFIG_AP_SUPPORT IF_DEV_CONFIG_OPMODE_ON_AP(pAd) { #ifdef MBSS_SUPPORT /* the function can not be moved to RT2860_probe() even register_netdev() is changed as register_netdevice(). Or in some PC, kernel will panic (Fedora 4) */ RT28xx_MBSS_Init(pAd, pAd->net_dev); #endif // MBSS_SUPPORT // #ifdef WDS_SUPPORT RT28xx_WDS_Init(pAd, pAd->net_dev); #endif // WDS_SUPPORT // #ifdef APCLI_SUPPORT RT28xx_ApCli_Init(pAd, pAd->net_dev); #endif // APCLI_SUPPORT // } #endif // CONFIG_AP_SUPPORT // #ifdef CONFIG_AP_SUPPORT IF_DEV_CONFIG_OPMODE_ON_AP(pAd) { #ifdef MAT_SUPPORT MATEngineInit(pAd); #endif // MAT_SUPPORT // #ifdef CLIENT_WDS CliWds_ProxyTabInit(pAd); #endif // CLIENT_WDS // } #endif // CONFIG_AP_SUPPORT // #ifdef RT33xx if (IS_RT3390(pAd)) { RTMP_TxEvmCalibration(pAd); } #endif // RT33xx // DBGPRINT_S(Status, ("<==== rt28xx_init, Status=%x\n", Status)); return TRUE; err6: MeasureReqTabExit(pAd); TpcReqTabExit(pAd); err5: RtmpNetTaskExit(pAd); UserCfgExit(pAd); err4: MlmeHalt(pAd); err3: RtmpMgmtTaskExit(pAd); err2: #ifdef RESOURCE_PRE_ALLOC RTMPResetTxRxRingMemory(pAd); #else RTMPFreeTxRxRingMemory(pAd); #endif // RESOURCE_PRE_ALLOC // err1: #ifdef DOT11_N_SUPPORT if(pAd->mpdu_blk_pool.mem) os_free_mem(pAd, pAd->mpdu_blk_pool.mem); // free BA pool #endif // DOT11_N_SUPPORT // // shall not set priv to NULL here because the priv didn't been free yet. //net_dev->priv = 0; #ifdef INF_AMAZON_SE err0: #endif // INF_AMAZON_SE // #ifdef ST err0: #endif // ST // DBGPRINT(RT_DEBUG_ERROR, ("!!! rt28xx Initialized fail !!!\n")); return FALSE; }
/* ======================================================================== Routine Description: For RF filter calibration purpose Arguments: pAd Pointer to our adapter Return Value: None IRQL = PASSIVE_LEVEL ======================================================================== */ VOID RTMPFilterCalibration( IN PRTMP_ADAPTER pAd) { UCHAR R55x = 0, value, FilterTarget = 0x1E, BBPValue=0; UINT loop = 0, count = 0, loopcnt = 0, ReTry = 0; UCHAR RF_R24_Value = 0; // Give bbp filter initial value pAd->Mlme.CaliBW20RfR24 = 0x1F; pAd->Mlme.CaliBW40RfR24 = 0x2F; //Bit[5] must be 1 for BW 40 do { if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)) return; if (loop == 1) //BandWidth = 40 MHz { // Write 0x27 to RF_R24 to program filter RT30xxReadRFRegister(pAd, RF_R24, (PUCHAR)(&RF_R24_Value)); RF_R24_Value = (RF_R24_Value & 0xC0) | 0x27; // <bit 5>:tx_h20M<bit 5> and <bit 4:0>:tx_agc_fc<bit 4:0> RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value); if (IS_RT3071(pAd) || IS_RT3572(pAd)) FilterTarget = 0x15; else FilterTarget = 0x19; // when calibrate BW40, BBP mask must set to BW40. RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue); BBPValue&= (~0x18); BBPValue|= (0x10); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue); // set to BW40 RT30xxReadRFRegister(pAd, RF_R31, &value); value |= 0x20; RT30xxWriteRFRegister(pAd, RF_R31, value); } else //BandWidth = 20 MHz { // Write 0x07 to RF_R24 to program filter RT30xxReadRFRegister(pAd, RF_R24, (PUCHAR)(&RF_R24_Value)); RF_R24_Value = (RF_R24_Value & 0xC0) | 0x07; // <bit 5>:tx_h20M<bit 5> and <bit 4:0>:tx_agc_fc<bit 4:0> RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value); if (IS_RT3071(pAd) || IS_RT3572(pAd)) FilterTarget = 0x13; else FilterTarget = 0x16; // set to BW20 RT30xxReadRFRegister(pAd, RF_R31, &value); value &= (~0x20); RT30xxWriteRFRegister(pAd, RF_R31, value); } // Write 0x01 to RF_R22 to enable baseband loopback mode RT30xxReadRFRegister(pAd, RF_R22, &value); value |= 0x01; RT30xxWriteRFRegister(pAd, RF_R22, value); // Write 0x00 to BBP_R24 to set power & frequency of passband test tone RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0); do { if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)) return; // Write 0x90 to BBP_R25 to transmit test tone RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R25, 0x90); RTMPusecDelay(1000); // Read BBP_R55[6:0] for received power, set R55x = BBP_R55[6:0] RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R55, &value); R55x = value & 0xFF; } while ((ReTry++ < 100) && (R55x == 0)); // Write 0x06 to BBP_R24 to set power & frequency of stopband test tone RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0x06); while(TRUE) { if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)) return; // Write 0x90 to BBP_R25 to transmit test tone RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R25, 0x90); //We need to wait for calibration RTMPusecDelay(1000); RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R55, &value); value &= 0xFF; if ((R55x - value) < FilterTarget) { RF_R24_Value ++; } else if ((R55x - value) == FilterTarget) { RF_R24_Value ++; count ++; } else { break; } // prevent infinite loop cause driver hang. if (loopcnt++ > 100) { DBGPRINT(RT_DEBUG_ERROR, ("RTMPFilterCalibration - can't find a valid value, loopcnt=%d stop calibrating", loopcnt)); break; } // Write RF_R24 to program filter RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value); } if (count > 0) { RF_R24_Value = RF_R24_Value - ((count) ? (1) : (0)); } // Store for future usage if (loopcnt < 100) { if (loop++ == 0) { //BandWidth = 20 MHz pAd->Mlme.CaliBW20RfR24 = (UCHAR)RF_R24_Value; } else { //BandWidth = 40 MHz pAd->Mlme.CaliBW40RfR24 = (UCHAR)RF_R24_Value; break; } } else break; RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value); // reset count count = 0; } while(TRUE); // // Set back to initial state // RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0); RT30xxReadRFRegister(pAd, RF_R22, &value); value &= ~(0x01); RT30xxWriteRFRegister(pAd, RF_R22, value); // // Check BBP R25 RF Calibration at bit 4. Patch from windows driver // RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R25, &BBPValue); if (BBPValue & 0x10) { // // Clear RF calibration // BBPValue &= (~0x10); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R25, BBPValue); DBGPRINT(RT_DEBUG_WARN, ("RTMPFilterCalibration, RF calibration should be done\n")); } // set BBP back to BW20 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue); BBPValue&= (~0x18); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue); DBGPRINT(RT_DEBUG_TRACE, ("RTMPFilterCalibration - CaliBW20RfR24=0x%x, CaliBW40RfR24=0x%x\n", pAd->Mlme.CaliBW20RfR24, pAd->Mlme.CaliBW40RfR24)); }
/* ========================================================================== Description: Scan next channel ========================================================================== */ VOID ScanNextChannel( IN PRTMP_ADAPTER pAd) { HEADER_802_11 Hdr80211; PUCHAR pOutBuffer = NULL; NDIS_STATUS NStatus; ULONG FrameLen = 0; UCHAR SsidLen = 0, ScanType = pAd->MlmeAux.ScanType, BBPValue = 0; #ifdef CONFIG_STA_SUPPORT USHORT Status; PHEADER_802_11 pHdr80211; #endif // CONFIG_STA_SUPPORT // UINT ScanTimeIn5gChannel = SHORT_CHANNEL_TIME; #ifdef CONFIG_STA_SUPPORT IF_DEV_CONFIG_OPMODE_ON_STA(pAd) { if (MONITOR_ON(pAd)) return; } #endif // CONFIG_STA_SUPPORT // #ifdef RALINK_ATE // Nothing to do in ATE mode. if (ATE_ON(pAd)) return; #endif // RALINK_ATE // if (pAd->MlmeAux.Channel == 0) { if ((pAd->CommonCfg.BBPCurrentBW == BW_40) #ifdef CONFIG_STA_SUPPORT && (INFRA_ON(pAd) || (pAd->OpMode == OPMODE_AP)) #endif // CONFIG_STA_SUPPORT // ) { AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE); AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel); RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue); BBPValue &= (~0x18); BBPValue |= 0x10; RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue); DBGPRINT(RT_DEBUG_TRACE, ("SYNC - End of SCAN, restore to 40MHz channel %d, Total BSS[%02d]\n",pAd->CommonCfg.CentralChannel, pAd->ScanTab.BssNr)); } else { AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE); AsicLockChannel(pAd, pAd->CommonCfg.Channel); DBGPRINT(RT_DEBUG_TRACE, ("SYNC - End of SCAN, restore to channel %d, Total BSS[%02d]\n",pAd->CommonCfg.Channel, pAd->ScanTab.BssNr)); } #ifdef CONFIG_STA_SUPPORT IF_DEV_CONFIG_OPMODE_ON_STA(pAd) { // // To prevent data lost. // Send an NULL data with turned PSM bit on to current associated AP before SCAN progress. // Now, we need to send an NULL data with turned PSM bit off to AP, when scan progress done // if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED) && (INFRA_ON(pAd))) { NStatus = MlmeAllocateMemory(pAd, (PVOID)&pOutBuffer); if (NStatus == NDIS_STATUS_SUCCESS) { pHdr80211 = (PHEADER_802_11) pOutBuffer; MgtMacHeaderInit(pAd, pHdr80211, SUBTYPE_NULL_FUNC, 1, pAd->CommonCfg.Bssid, pAd->CommonCfg.Bssid); pHdr80211->Duration = 0; pHdr80211->FC.Type = BTYPE_DATA; pHdr80211->FC.PwrMgmt = (pAd->StaCfg.Psm == PWR_SAVE); // Send using priority queue MiniportMMRequest(pAd, 0, pOutBuffer, sizeof(HEADER_802_11)); DBGPRINT(RT_DEBUG_TRACE, ("MlmeScanReqAction -- Send PSM Data frame\n")); MlmeFreeMemory(pAd, pOutBuffer); RTMPusecDelay(5000); } } pAd->Mlme.SyncMachine.CurrState = SYNC_IDLE; Status = MLME_SUCCESS; MlmeEnqueue(pAd, MLME_CNTL_STATE_MACHINE, MT2_SCAN_CONF, 2, &Status); } #endif // CONFIG_STA_SUPPORT // RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_BSS_SCAN_IN_PROGRESS); } #ifdef RT2870 #ifdef CONFIG_STA_SUPPORT else if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST) && (pAd->OpMode == OPMODE_STA))
// Antenna divesity use GPIO3 and EESK pin for control // Antenna and EEPROM access are both using EESK pin, // Therefor we should avoid accessing EESK at the same time // Then restore antenna after EEPROM access // The original name of this function is AsicSetRxAnt(), now change to //VOID AsicSetRxAnt( VOID RT30xxSetRxAnt( IN PRTMP_ADAPTER pAd, IN UCHAR Ant) { UINT32 Value; #ifdef RTMP_MAC_PCI UINT32 x; #endif // RTMP_MAC_PCI // if (//(!pAd->NicConfig2.field.AntDiversity) || (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_RESET_IN_PROGRESS)) || (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS)) || (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF)) || (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))) { return; } #ifdef RT53xx if (IS_RT5390(pAd) #ifdef RT5390 #endif // RT5390 // ) { UCHAR BbpValue = 0; if (Ant == 0) // 0: Main antenna { RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R152, &BbpValue); BbpValue = ((BbpValue & ~0x80) | (0x80)); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R152, BbpValue); DBGPRINT(RT_DEBUG_TRACE, ("AsicSetRxAnt, switch to main antenna\n")); } else // 1: Aux. antenna { RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R152, &BbpValue); BbpValue = ((BbpValue & ~0x80) | (0x00)); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R152, BbpValue); DBGPRINT(RT_DEBUG_TRACE, ("AsicSetRxAnt, switch to aux. antenna\n")); } } else #endif // RT53xx // { // the antenna selection is through firmware and MAC register(GPIO3) if (Ant == 0) { // Main antenna // E2PROM_CSR only in PCI bus Reg., USB Bus need MCU commad to control the EESK pin. #ifdef RTMP_MAC_PCI #ifdef RT5390 #endif // RT5390 // { RTMP_IO_READ32(pAd, E2PROM_CSR, &x); x |= (EESK); RTMP_IO_WRITE32(pAd, E2PROM_CSR, x); } #endif // RTMP_MAC_PCI // RTMP_IO_READ32(pAd, GPIO_CTRL_CFG, &Value); Value &= ~(0x0808); RTMP_IO_WRITE32(pAd, GPIO_CTRL_CFG, Value); DBGPRINT_RAW(RT_DEBUG_TRACE, ("AsicSetRxAnt, switch to main antenna\n")); } else { // Aux antenna // E2PROM_CSR only in PCI bus Reg., USB Bus need MCU commad to control the EESK pin. #ifdef RTMP_MAC_PCI #ifdef RT5390 #endif // RT5390 // { RTMP_IO_READ32(pAd, E2PROM_CSR, &x); x &= ~(EESK); RTMP_IO_WRITE32(pAd, E2PROM_CSR, x); } #endif // RTMP_MAC_PCI // RTMP_IO_READ32(pAd, GPIO_CTRL_CFG, &Value); Value &= ~(0x0808); Value |= 0x08; RTMP_IO_WRITE32(pAd, GPIO_CTRL_CFG, Value); DBGPRINT_RAW(RT_DEBUG_TRACE, ("AsicSetRxAnt, switch to aux antenna\n")); } } }
VOID AsicGetAutoAgcOffsetForExternalTxAlc( IN PRTMP_ADAPTER pAd, IN PCHAR pDeltaPwr, IN PCHAR pTotalDeltaPwr, IN PCHAR pAgcCompensate, IN PCHAR pDeltaPowerByBbpR1) { BBP_R49_STRUC BbpR49; BOOLEAN bAutoTxAgc = FALSE; UCHAR TssiRef, *pTssiMinusBoundary, *pTssiPlusBoundary, TxAgcStep, idx; PCHAR pTxAgcCompensate = NULL; CHAR DeltaPwr = 0; DBGPRINT(RT_DEBUG_INFO, ("-->%s\n", __FUNCTION__)); BbpR49.byte = 0; /* TX power compensation for temperature variation based on TSSI. Try every 4 second */ if (pAd->Mlme.OneSecPeriodicRound % 4 == 0) { if (pAd->CommonCfg.Channel <= 14) { /* bg channel */ bAutoTxAgc = pAd->bAutoTxAgcG; TssiRef = pAd->TssiRefG; pTssiMinusBoundary = &pAd->TssiMinusBoundaryG[0]; pTssiPlusBoundary = &pAd->TssiPlusBoundaryG[0]; TxAgcStep = pAd->TxAgcStepG; pTxAgcCompensate = &pAd->TxAgcCompensateG; } else { /* a channel */ bAutoTxAgc = pAd->bAutoTxAgcA; TssiRef = pAd->TssiRefA; pTssiMinusBoundary = &pAd->TssiMinusBoundaryA[0]; pTssiPlusBoundary = &pAd->TssiPlusBoundaryA[0]; TxAgcStep = pAd->TxAgcStepA; pTxAgcCompensate = &pAd->TxAgcCompensateA; } if (bAutoTxAgc) { RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R49, &BbpR49.byte); /* TSSI representation */ if (IS_RT3071(pAd) || IS_RT3390(pAd) || IS_RT3090A(pAd) || IS_RT3572(pAd)) /* 5-bits */ { BbpR49.byte = (BbpR49.byte & 0x1F); } /* (p) TssiPlusBoundaryG[0] = 0 = (m) TssiMinusBoundaryG[0] */ /* compensate: +4 +3 +2 +1 0 -1 -2 -3 -4 * steps */ /* step value is defined in pAd->TxAgcStepG for tx power value */ /* [4]+1+[4] p4 p3 p2 p1 o1 m1 m2 m3 m4 */ /* ex: 0x00 0x15 0x25 0x45 0x88 0xA0 0xB5 0xD0 0xF0 above value are examined in mass factory production */ /* [4] [3] [2] [1] [0] [1] [2] [3] [4] */ /* plus (+) is 0x00 ~ 0x45, minus (-) is 0xa0 ~ 0xf0 */ /* if value is between p1 ~ o1 or o1 ~ s1, no need to adjust tx power */ /* if value is 0xa5, tx power will be -= TxAgcStep*(2-1) */ if (BbpR49.byte > pTssiMinusBoundary[1]) { /* Reading is larger than the reference value */ /* Check for how large we need to decrease the Tx power */ for (idx = 1; idx < 5; idx++) { if (BbpR49.byte <= pTssiMinusBoundary[idx]) /* Found the range */ break; } /* The index is the step we should decrease, idx = 0 means there is nothing to compensate */ *pTxAgcCompensate = -(TxAgcStep * (idx-1)); DeltaPwr += (*pTxAgcCompensate); DBGPRINT(RT_DEBUG_TRACE, ("-- Tx Power, BBP R49=%x, TssiRef=%x, TxAgcStep=%x, step = -%d\n", BbpR49.byte, TssiRef, TxAgcStep, idx-1)); } else if (BbpR49.byte < pTssiPlusBoundary[1]) { /* Reading is smaller than the reference value */ /* Check for how large we need to increase the Tx power */ for (idx = 1; idx < 5; idx++) { if (BbpR49.byte >= pTssiPlusBoundary[idx]) /* Found the range*/ break; } /* The index is the step we should increase, idx = 0 means there is nothing to compensate */ *pTxAgcCompensate = TxAgcStep * (idx-1); DeltaPwr += (*pTxAgcCompensate); DBGPRINT(RT_DEBUG_TRACE, ("++ Tx Power, BBP R49=%x, TssiRef=%x, TxAgcStep=%x, step = +%d\n", BbpR49.byte, TssiRef, TxAgcStep, idx-1)); } else { *pTxAgcCompensate = 0; DBGPRINT(RT_DEBUG_TRACE, (" Tx Power, BBP R49=%x, TssiRef=%x, TxAgcStep=%x, step = +%d\n", BbpR49.byte, TssiRef, TxAgcStep, 0)); } } } else { if (pAd->CommonCfg.Channel <= 14) { bAutoTxAgc = pAd->bAutoTxAgcG; pTxAgcCompensate = &pAd->TxAgcCompensateG; } else { bAutoTxAgc = pAd->bAutoTxAgcA; pTxAgcCompensate = &pAd->TxAgcCompensateA; } if (bAutoTxAgc) DeltaPwr += (*pTxAgcCompensate); } *pDeltaPwr = DeltaPwr; *pAgcCompensate = *pTxAgcCompensate; DBGPRINT(RT_DEBUG_INFO, ("<--%s\n", __FUNCTION__)); }
VOID RT35xx_ChipBBPAdjust( IN RTMP_ADAPTER *pAd) { UINT32 Value; UCHAR byteValue = 0; #ifdef DOT11_N_SUPPORT if ((pAd->CommonCfg.HtCapability.HtCapInfo.ChannelWidth == BW_40) && (pAd->CommonCfg.RegTransmitSetting.field.EXTCHA == EXTCHA_ABOVE)) { pAd->CommonCfg.BBPCurrentBW = BW_40; pAd->CommonCfg.CentralChannel = pAd->CommonCfg.Channel + 2; /* TX : control channel at lower */ RTMP_IO_READ32(pAd, TX_BAND_CFG, &Value); Value &= (~0x1); RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Value); /* RX : control channel at lower */ RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &byteValue); byteValue &= (~0x20); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, byteValue); RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &byteValue); byteValue &= (~0x18); byteValue |= 0x10; RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, byteValue); if (pAd->CommonCfg.Channel > 14) { /* request by Gary 20070208 for middle and long range A Band*/ if (IS_RT3572(pAd) || IS_RT3593(pAd)) RT3572WriteBBPR66(pAd, 0x48); } else { /* request by Gary 20070208 for middle and long range G Band*/ if (IS_RT3572(pAd) || IS_RT3593(pAd)) RT3572WriteBBPR66(pAd, 0x38); } /* */ if (pAd->MACVersion == 0x28600100) { RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x1A); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0A); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x16); } else { RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x12); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0A); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x10); } DBGPRINT(RT_DEBUG_TRACE, ("ApStartUp : ExtAbove, ChannelWidth=%d, Channel=%d, ExtChanOffset=%d(%d) \n", pAd->CommonCfg.HtCapability.HtCapInfo.ChannelWidth, pAd->CommonCfg.Channel, pAd->CommonCfg.RegTransmitSetting.field.EXTCHA, pAd->CommonCfg.AddHTInfo.AddHtInfo.ExtChanOffset)); } else if ((pAd->CommonCfg.Channel > 2) && (pAd->CommonCfg.HtCapability.HtCapInfo.ChannelWidth == BW_40) && (pAd->CommonCfg.RegTransmitSetting.field.EXTCHA == EXTCHA_BELOW)) { pAd->CommonCfg.BBPCurrentBW = BW_40; if (pAd->CommonCfg.Channel == 14) pAd->CommonCfg.CentralChannel = pAd->CommonCfg.Channel - 1; else pAd->CommonCfg.CentralChannel = pAd->CommonCfg.Channel - 2; /* TX : control channel at upper */ RTMP_IO_READ32(pAd, TX_BAND_CFG, &Value); Value |= (0x1); RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Value); /* RX : control channel at upper */ RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &byteValue); byteValue |= (0x20); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, byteValue); RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &byteValue); byteValue &= (~0x18); byteValue |= 0x10; RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, byteValue); if (pAd->CommonCfg.Channel > 14) { /* request by Gary 20070208 for middle and long range A Band*/ if (IS_RT3572(pAd) || IS_RT3593(pAd)) RT3572WriteBBPR66(pAd, 0x48); } else { /* request by Gary 20070208 for middle and long range G band*/ if (IS_RT3572(pAd) || IS_RT3593(pAd)) RT3572WriteBBPR66(pAd, 0x38); } if (pAd->MACVersion == 0x28600100) { RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x1A); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0A); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x16); } else { RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x12); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0A); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x10); } DBGPRINT(RT_DEBUG_TRACE, ("ApStartUp : ExtBlow, ChannelWidth=%d, Channel=%d, ExtChanOffset=%d(%d) \n", pAd->CommonCfg.HtCapability.HtCapInfo.ChannelWidth, pAd->CommonCfg.Channel, pAd->CommonCfg.RegTransmitSetting.field.EXTCHA, pAd->CommonCfg.AddHTInfo.AddHtInfo.ExtChanOffset)); } else #endif /* DOT11_N_SUPPORT */ { pAd->CommonCfg.BBPCurrentBW = BW_20; pAd->CommonCfg.CentralChannel = pAd->CommonCfg.Channel; /* TX : control channel at lower */ RTMP_IO_READ32(pAd, TX_BAND_CFG, &Value); Value &= (~0x1); RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Value); RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &byteValue); byteValue &= (~0x18); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, byteValue); /* 20 MHz bandwidth*/ if (pAd->CommonCfg.Channel > 14) { /* request by Gary 20070208*/ if (IS_RT3572(pAd) || IS_RT3593(pAd)) RT3572WriteBBPR66(pAd, 0x40); } else { /* request by Gary 20070208*/ /*RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, 0x30);*/ /* request by Brian 20070306*/ if (IS_RT3572(pAd) || IS_RT3593(pAd)) RT3572WriteBBPR66(pAd, 0x38); } if (pAd->MACVersion == 0x28600100) { RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x08); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x11); } else { RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x12); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0a); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x10); } #ifdef DOT11_N_SUPPORT DBGPRINT(RT_DEBUG_TRACE, ("ApStartUp : 20MHz, ChannelWidth=%d, Channel=%d, ExtChanOffset=%d(%d) \n", pAd->CommonCfg.HtCapability.HtCapInfo.ChannelWidth, pAd->CommonCfg.Channel, pAd->CommonCfg.RegTransmitSetting.field.EXTCHA, pAd->CommonCfg.AddHTInfo.AddHtInfo.ExtChanOffset)); #endif /* DOT11_N_SUPPORT */ } if (pAd->CommonCfg.Channel > 14) { /* request by Gary 20070208 for middle and long range A Band*/ RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R62, 0x1D); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R63, 0x1D); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R64, 0x1D); /*RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R86, 0x1D);*/ } else { /* request by Gary 20070208 for middle and long range G band*/ RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R62, 0x2D); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R63, 0x2D); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R64, 0x2D); /*RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R86, 0x2D);*/ } }
int rt28xx_init( IN PRTMP_ADAPTER pAd, IN PSTRING pDefaultMac, IN PSTRING pHostName) { UINT index; UCHAR TmpPhy; NDIS_STATUS Status; UINT32 MacCsr0 = 0; #ifdef CONFIG_STA_SUPPORT #ifdef PCIE_PS_SUPPORT IF_DEV_CONFIG_OPMODE_ON_STA(pAd) { // If dirver doesn't wake up firmware here, // NICLoadFirmware will hang forever when interface is up again. if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_DOZE) && OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_ADVANCE_POWER_SAVE_PCIE_DEVICE)) { AUTO_WAKEUP_STRUC AutoWakeupCfg; AsicForceWakeup(pAd, TRUE); AutoWakeupCfg.word = 0; RTMP_IO_WRITE32(pAd, AUTO_WAKEUP_CFG, AutoWakeupCfg.word); OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_DOZE); } } #endif // PCIE_PS_SUPPORT // #endif // CONFIG_STA_SUPPORT // // reset Adapter flags RTMP_CLEAR_FLAGS(pAd); // Init BssTab & ChannelInfo tabbles for auto channel select. #ifdef CONFIG_AP_SUPPORT IF_DEV_CONFIG_OPMODE_ON_AP(pAd) { AutoChBssTableInit(pAd); ChannelInfoInit(pAd); } #endif // CONFIG_AP_SUPPORT // #ifdef DOT11_N_SUPPORT // Allocate BA Reordering memory if (ba_reordering_resource_init(pAd, MAX_REORDERING_MPDU_NUM) != TRUE) goto err1; #endif // DOT11_N_SUPPORT // // Make sure MAC gets ready. index = 0; do { RTMP_IO_READ32(pAd, MAC_CSR0, &MacCsr0); pAd->MACVersion = MacCsr0; if ((pAd->MACVersion != 0x00) && (pAd->MACVersion != 0xFFFFFFFF)) break; if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)) goto err1; RTMPusecDelay(10); } while (index++ < 100); DBGPRINT(RT_DEBUG_TRACE, ("MAC_CSR0 [ Ver:Rev=0x%08x]\n", pAd->MACVersion)); #ifdef RTMP_MAC_PCI // To fix driver disable/enable hang issue when radio off RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x2); #endif // RTMP_MAC_PCI // // Disable DMA RT28XXDMADisable(pAd); // Load 8051 firmware Status = NICLoadFirmware(pAd); if (Status != NDIS_STATUS_SUCCESS) { DBGPRINT_ERR(("NICLoadFirmware failed, Status[=0x%08x]\n", Status)); goto err1; } NICLoadRateSwitchingParams(pAd); // Disable interrupts here which is as soon as possible // This statement should never be true. We might consider to remove it later #ifdef RTMP_MAC_PCI if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_ACTIVE)) { RTMP_ASIC_INTERRUPT_DISABLE(pAd); } #endif // RTMP_MAC_PCI // #ifdef RESOURCE_PRE_ALLOC Status = RTMPInitTxRxRingMemory(pAd); #else Status = RTMPAllocTxRxRingMemory(pAd); #endif // RESOURCE_PRE_ALLOC // if (Status != NDIS_STATUS_SUCCESS) { DBGPRINT_ERR(("RTMPAllocTxRxMemory failed, Status[=0x%08x]\n", Status)); goto err2; } RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE); // initialize MLME // Status = RtmpMgmtTaskInit(pAd); if (Status != NDIS_STATUS_SUCCESS) goto err3; Status = MlmeInit(pAd); if (Status != NDIS_STATUS_SUCCESS) { DBGPRINT_ERR(("MlmeInit failed, Status[=0x%08x]\n", Status)); goto err4; } #ifdef RMTP_RBUS_SUPPORT #ifdef VIDEO_TURBINE_SUPPORT VideoConfigInit(pAd); #endif // VIDEO_TURBINE_SUPPORT // #endif // RMTP_RBUS_SUPPORT // // Initialize pAd->StaCfg, pAd->ApCfg, pAd->CommonCfg to manufacture default // UserCfgInit(pAd); Status = RtmpNetTaskInit(pAd); if (Status != NDIS_STATUS_SUCCESS) goto err5; // COPY_MAC_ADDR(pAd->ApCfg.MBSSID[apidx].Bssid, netif->hwaddr); // pAd->bForcePrintTX = TRUE; CfgInitHook(pAd); #ifdef CONFIG_AP_SUPPORT IF_DEV_CONFIG_OPMODE_ON_AP(pAd) APInitialize(pAd); #endif // CONFIG_AP_SUPPORT // #ifdef BLOCK_NET_IF initblockQueueTab(pAd); #endif // BLOCK_NET_IF // Status = MeasureReqTabInit(pAd); if (Status != NDIS_STATUS_SUCCESS) { DBGPRINT_ERR(("MeasureReqTabInit failed, Status[=0x%08x]\n",Status)); goto err6; } Status = TpcReqTabInit(pAd); if (Status != NDIS_STATUS_SUCCESS) { DBGPRINT_ERR(("TpcReqTabInit failed, Status[=0x%08x]\n",Status)); goto err6; } // // Init the hardware, we need to init asic before read registry, otherwise mac register will be reset // Status = NICInitializeAdapter(pAd, TRUE); if (Status != NDIS_STATUS_SUCCESS) { DBGPRINT_ERR(("NICInitializeAdapter failed, Status[=0x%08x]\n", Status)); if (Status != NDIS_STATUS_SUCCESS) goto err6; } // Read parameters from Config File Status = RTMPReadParametersHook(pAd); DBGPRINT(RT_DEBUG_OFF, ("1. Phy Mode = %d\n", pAd->CommonCfg.PhyMode)); if (Status != NDIS_STATUS_SUCCESS) { DBGPRINT_ERR(("RTMPReadParametersHook failed, Status[=0x%08x]\n",Status)); goto err6; } #ifdef DOT11_N_SUPPORT //Init Ba Capability parameters. // RT28XX_BA_INIT(pAd); pAd->CommonCfg.DesiredHtPhy.MpduDensity = (UCHAR)pAd->CommonCfg.BACapability.field.MpduDensity; pAd->CommonCfg.DesiredHtPhy.AmsduEnable = (USHORT)pAd->CommonCfg.BACapability.field.AmsduEnable; pAd->CommonCfg.DesiredHtPhy.AmsduSize = (USHORT)pAd->CommonCfg.BACapability.field.AmsduSize; pAd->CommonCfg.DesiredHtPhy.MimoPs = (USHORT)pAd->CommonCfg.BACapability.field.MMPSmode; // UPdata to HT IE pAd->CommonCfg.HtCapability.HtCapInfo.MimoPs = (USHORT)pAd->CommonCfg.BACapability.field.MMPSmode; pAd->CommonCfg.HtCapability.HtCapInfo.AMsduSize = (USHORT)pAd->CommonCfg.BACapability.field.AmsduSize; pAd->CommonCfg.HtCapability.HtCapParm.MpduDensity = (UCHAR)pAd->CommonCfg.BACapability.field.MpduDensity; #endif // DOT11_N_SUPPORT // // after reading Registry, we now know if in AP mode or STA mode // Load 8051 firmware; crash when FW image not existent // Status = NICLoadFirmware(pAd); // if (Status != NDIS_STATUS_SUCCESS) // break; DBGPRINT(RT_DEBUG_OFF, ("2. Phy Mode = %d\n", pAd->CommonCfg.PhyMode)); // We should read EEPROM for all cases. rt2860b NICReadEEPROMParameters(pAd, (PUCHAR)pDefaultMac); #ifdef CONFIG_STA_SUPPORT #endif // CONFIG_STA_SUPPORT // DBGPRINT(RT_DEBUG_OFF, ("3. Phy Mode = %d\n", pAd->CommonCfg.PhyMode)); NICInitAsicFromEEPROM(pAd); //rt2860b #ifdef RTMP_INTERNAL_TX_ALC // // Initialize the desired TSSI table // InitDesiredTSSITable(pAd); #endif // RTMP_INTERNAL_TX_ALC // // Set PHY to appropriate mode TmpPhy = pAd->CommonCfg.PhyMode; pAd->CommonCfg.PhyMode = 0xff; RTMPSetPhyMode(pAd, TmpPhy); #ifdef DOT11_N_SUPPORT SetCommonHT(pAd); #endif // DOT11_N_SUPPORT // // No valid channels. if (pAd->ChannelListNum == 0) { DBGPRINT(RT_DEBUG_ERROR, ("Wrong configuration. No valid channel found. Check \"ContryCode\" and \"ChannelGeography\" setting.\n")); goto err6; } #ifdef DOT11_N_SUPPORT DBGPRINT(RT_DEBUG_OFF, ("MCS Set = %02x %02x %02x %02x %02x\n", pAd->CommonCfg.HtCapability.MCSSet[0], pAd->CommonCfg.HtCapability.MCSSet[1], pAd->CommonCfg.HtCapability.MCSSet[2], pAd->CommonCfg.HtCapability.MCSSet[3], pAd->CommonCfg.HtCapability.MCSSet[4])); #endif // DOT11_N_SUPPORT // #ifdef CONFIG_AP_SUPPORT IF_DEV_CONFIG_OPMODE_ON_AP(pAd) { #ifdef AP_QLOAD_SUPPORT /* init QBSS Element */ QBSS_LoadInit(pAd); #endif // AP_QLOAD_SUPPORT // } #endif // CONFIG_AP_SUPPORT // // APInitialize(pAd); #ifdef IKANOS_VX_1X0 VR_IKANOS_FP_Init(pAd->ApCfg.BssidNum, pAd->PermanentAddress); #endif // IKANOS_VX_1X0 // // // Initialize RF register to default value // AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE); AsicLockChannel(pAd, pAd->CommonCfg.Channel); /* Some modules init must be called before APStartUp(). Or APStartUp() will make up beacon content and call other modules API to get some information to fill. */ #ifdef WMM_ACM_SUPPORT #ifdef CONFIG_AP_SUPPORT ACMP_Init(pAd, pAd->CommonCfg.APEdcaParm.bACM[0], pAd->CommonCfg.APEdcaParm.bACM[1], pAd->CommonCfg.APEdcaParm.bACM[2], pAd->CommonCfg.APEdcaParm.bACM[3], 0); #endif // CONFIG_AP_SUPPORT // #ifdef CONFIG_STA_SUPPORT ACMP_Init(pAd); #endif // CONFIG_STA_SUPPORT // #endif // WMM_ACM_SUPPORT // if (pAd && (Status != NDIS_STATUS_SUCCESS)) { // // Undo everything if it failed // if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE)) { // NdisMDeregisterInterrupt(&pAd->Interrupt); RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE); } // RTMPFreeAdapter(pAd); // we will free it in disconnect() } else if (pAd) { // Microsoft HCT require driver send a disconnect event after driver initialization. OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED); // pAd->IndicateMediaState = NdisMediaStateDisconnected; RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_MEDIA_STATE_CHANGE); DBGPRINT(RT_DEBUG_TRACE, ("NDIS_STATUS_MEDIA_DISCONNECT Event B!\n")); #ifdef CONFIG_AP_SUPPORT IF_DEV_CONFIG_OPMODE_ON_AP(pAd) { if (pAd->ApCfg.bAutoChannelAtBootup || (pAd->CommonCfg.Channel == 0)) { UINT8 BBPValue = 0; // Enable Interrupt first due to we need to scan channel to receive beacons. RTMP_IRQ_ENABLE(pAd); // Now Enable RxTx RTMPEnableRxTx(pAd); RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_START_UP); // Let BBP register at 20MHz to do scan RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue); BBPValue &= (~0x18); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue); DBGPRINT(RT_DEBUG_ERROR, ("SYNC - BBP R4 to 20MHz.l\n")); // Now we can receive the beacon and do the listen beacon // use default BW to select channel pAd->CommonCfg.Channel = AP_AUTO_CH_SEL(pAd, pAd->ApCfg.AutoChannelAlg); pAd->ApCfg.bAutoChannelAtBootup = FALSE; } #ifdef DOT11_N_SUPPORT // If phymode > PHY_11ABGN_MIXED and BW=40 check extension channel, after select channel N_ChannelCheck(pAd); #ifdef DOT11N_DRAFT3 /* We only do this Overlapping BSS Scan when system up, for the other situation of channel changing, we depends on station's report to adjust ourself. */ if (pAd->CommonCfg.bForty_Mhz_Intolerant == TRUE) { DBGPRINT(RT_DEBUG_TRACE, ("Disable 20/40 BSSCoex Channel Scan(BssCoex=%d, 40MHzIntolerant=%d)\n", pAd->CommonCfg.bBssCoexEnable, pAd->CommonCfg.bForty_Mhz_Intolerant)); } else if(pAd->CommonCfg.bBssCoexEnable == TRUE) { DBGPRINT(RT_DEBUG_TRACE, ("Enable 20/40 BSSCoex Channel Scan(BssCoex=%d)\n", pAd->CommonCfg.bBssCoexEnable)); APOverlappingBSSScan(pAd); } RTMP_11N_D3_TimerInit(pAd); // RTMPInitTimer(pAd, &pAd->CommonCfg.Bss2040CoexistTimer, GET_TIMER_FUNCTION(Bss2040CoexistTimeOut), pAd, FALSE); #endif // DOT11N_DRAFT3 // #endif // DOT11_N_SUPPORT // #ifdef RELASE_EXCLUDE /* 3090, 3090A and 3390 all support hadware tone radar function. But the soluation of those are different. 3090 is the old one. */ #endif // RELASE_EXCLUDE // APStartUp(pAd); DBGPRINT(RT_DEBUG_OFF, ("Main bssid = %02x:%02x:%02x:%02x:%02x:%02x\n", PRINT_MAC(pAd->ApCfg.MBSSID[BSS0].Bssid))); } #endif // CONFIG_AP_SUPPORT // }// end of else #ifdef WSC_INCLUDED #ifdef CONFIG_AP_SUPPORT IF_DEV_CONFIG_OPMODE_ON_AP(pAd) { INT apidx; #ifdef HOSTAPD_SUPPORT if (pAd->ApCfg.Hostapd == TRUE) { DBGPRINT(RT_DEBUG_TRACE, ("WPS is control by hostapd now.\n")); } else #endif //HOSTAPD_SUPPORT// for (apidx = 0; apidx < pAd->ApCfg.BssidNum; apidx++) { PWSC_CTRL pWscControl; UCHAR zeros16[16]= {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}; pWscControl = &pAd->ApCfg.MBSSID[apidx].WscControl; DBGPRINT(RT_DEBUG_TRACE, ("Generate UUID for apidx(%d)\n", apidx)); if (NdisEqualMemory(&pWscControl->Wsc_Uuid_E[0], zeros16, UUID_LEN_HEX)) WscGenerateUUID(pAd, &pWscControl->Wsc_Uuid_E[0], &pWscControl->Wsc_Uuid_Str[0], apidx, FALSE); WscInit(pAd, FALSE, apidx); if (pWscControl->WscEnrolleePinCode == 0) { pWscControl->WscEnrolleePinCode = GenerateWpsPinCode(pAd, FALSE, apidx); pWscControl->WscEnrolleePinCodeLen = 8; } } } #endif // CONFIG_AP_SUPPORT // #ifdef CONFIG_STA_SUPPORT IF_DEV_CONFIG_OPMODE_ON_STA(pAd) { PWSC_CTRL pWscControl = &pAd->StaCfg.WscControl; WscGenerateUUID(pAd, &pWscControl->Wsc_Uuid_E[0], &pWscControl->Wsc_Uuid_Str[0], 0, FALSE); WscInit(pAd, BSS0); if (pWscControl->WscEnrolleePinCode == 0) { pWscControl->WscEnrolleePinCode = GenerateWpsPinCode(pAd, BSS0); pWscControl->WscEnrolleePinCodeLen = 8; } } #endif // CONFIG_STA_SUPPORT // /* WSC hardware push button function 0811 */ WSC_HDR_BTN_Init(pAd); #endif // WSC_INCLUDED // // Set up the Mac address RtmpOSNetDevAddrSet(pAd->net_dev, &pAd->CurrentAddress[0]); // Various AP function init #ifdef CONFIG_AP_SUPPORT IF_DEV_CONFIG_OPMODE_ON_AP(pAd) { #ifdef MBSS_SUPPORT /* the function can not be moved to RT2860_probe() even register_netdev() is changed as register_netdevice(). Or in some PC, kernel will panic (Fedora 4) */ RT28xx_MBSS_Init(pAd, pAd->net_dev); #endif // MBSS_SUPPORT // #ifdef WDS_SUPPORT RT28xx_WDS_Init(pAd, pAd->net_dev); #endif // WDS_SUPPORT // #ifdef APCLI_SUPPORT RT28xx_ApCli_Init(pAd, pAd->net_dev); #endif // APCLI_SUPPORT // } #endif // CONFIG_AP_SUPPORT // #ifdef RTMP_RBUS_SUPPORT #ifdef VIDEO_TURBINE_SUPPORT VideoTurbineDynamicTune(pAd); #endif // VIDEO_TURBINE_SUPPORT // #endif // RTMP_RBUS_SUPPORT // #ifdef RTMP_RBUS_SUPPORT #ifdef RT3XXX_ANTENNA_DIVERSITY_SUPPORT RT3XXX_AntDiversity_Init(pAd); #endif // RT3XXX_ANTENNA_DIVERSITY_SUPPORT // #endif // RTMP_RBUS_SUPPORT // #ifdef CONFIG_AP_SUPPORT IF_DEV_CONFIG_OPMODE_ON_AP(pAd) { #ifdef MAT_SUPPORT MATEngineInit(pAd); #endif // MAT_SUPPORT // #ifdef CLIENT_WDS CliWds_ProxyTabInit(pAd); #endif // CLIENT_WDS // } #endif // CONFIG_AP_SUPPORT // #ifdef CONFIG_STA_SUPPORT IF_DEV_CONFIG_OPMODE_ON_STA(pAd) { #ifdef DOT11Z_TDLS_SUPPORT TDLS_Table_Init(pAd); #endif // DOT11Z_TDLS_SUPPORT // #ifdef WPA_SUPPLICANT_SUPPORT #ifndef NATIVE_WPA_SUPPLICANT_SUPPORT // send wireless event to wpa_supplicant for infroming interface up. RtmpOSWrielessEventSend(pAd, IWEVCUSTOM, RT_INTERFACE_UP, NULL, NULL, 0); #endif // NATIVE_WPA_SUPPLICANT_SUPPORT // #endif // WPA_SUPPLICANT_SUPPORT // } #endif // CONFIG_STA_SUPPORT // #if defined(RT2883) || defined(RT3883) #ifdef CONFIG_AP_SUPPORT IF_DEV_CONFIG_OPMODE_ON_AP(pAd) { if (IS_RT2883(pAd) || IS_RT3883(pAd)) { #ifdef RANGE_EXT_SUPPORT RTMP_IO_WRITE32(pAd, HT_FBK_CFG1, 0xedcba980); #endif // RANGE_EXT_SUPPORT // RTMP_IO_WRITE32(pAd, TX_FBK_CFG_3S_0, 0x12111008); RTMP_IO_WRITE32(pAd, TX_FBK_CFG_3S_1, 0x16151413); } #ifdef STREAM_MODE_SUPPORT if (pAd->CommonCfg.StreamMode > 0) { ULONG streamWord = StreamModeRegVal(pAd); RTMP_IO_WRITE32(pAd, TX_CHAIN_ADDR0_L, (ULONG)(pAd->CommonCfg.StreamModeMac[0][0]) | (ULONG)(pAd->CommonCfg.StreamModeMac[0][1] << 8) | (ULONG)(pAd->CommonCfg.StreamModeMac[0][2] << 16) | (ULONG)(pAd->CommonCfg.StreamModeMac[0][3] << 24)); RTMP_IO_WRITE32(pAd, TX_CHAIN_ADDR0_H, streamWord | (ULONG)(pAd->CommonCfg.StreamModeMac[0][4]) | (ULONG)(pAd->CommonCfg.StreamModeMac[0][5] << 8)); RTMP_IO_WRITE32(pAd, TX_CHAIN_ADDR1_L, (ULONG)(pAd->CommonCfg.StreamModeMac[1][0]) | (ULONG)(pAd->CommonCfg.StreamModeMac[1][1] << 8) | (ULONG)(pAd->CommonCfg.StreamModeMac[1][2] << 16) | (ULONG)(pAd->CommonCfg.StreamModeMac[1][3] << 24)); RTMP_IO_WRITE32(pAd, TX_CHAIN_ADDR1_H, streamWord | (ULONG)(pAd->CommonCfg.StreamModeMac[1][4]) | (ULONG)(pAd->CommonCfg.StreamModeMac[1][5] << 8)); RTMP_IO_WRITE32(pAd, TX_CHAIN_ADDR2_L, (ULONG)(pAd->CommonCfg.StreamModeMac[2][0]) | (ULONG)(pAd->CommonCfg.StreamModeMac[2][1] << 8) | (ULONG)(pAd->CommonCfg.StreamModeMac[2][2] << 16) | (ULONG)(pAd->CommonCfg.StreamModeMac[2][3] << 24)); RTMP_IO_WRITE32(pAd, TX_CHAIN_ADDR2_H, streamWord | (ULONG)(pAd->CommonCfg.StreamModeMac[2][4]) | (ULONG)(pAd->CommonCfg.StreamModeMac[2][5] << 8)); RTMP_IO_WRITE32(pAd, TX_CHAIN_ADDR3_L, (ULONG)(pAd->CommonCfg.StreamModeMac[3][0]) | (ULONG)(pAd->CommonCfg.StreamModeMac[3][1] << 8) | (ULONG)(pAd->CommonCfg.StreamModeMac[3][2] << 16) | (ULONG)(pAd->CommonCfg.StreamModeMac[3][3] << 24)); RTMP_IO_WRITE32(pAd, TX_CHAIN_ADDR3_H, streamWord | (ULONG)(pAd->CommonCfg.StreamModeMac[3][4]) | (ULONG)(pAd->CommonCfg.StreamModeMac[3][5] << 8)); } #endif // STREAM_MODE_SUPPORT // } #endif // CONFIG_AP_SUPPORT // if (pAd->CommonCfg.FineAGC) { UINT8 BBPValue = 0; BBP_IO_READ8_BY_REG_ID(pAd, BBP_R65, &BBPValue); BBPValue |= 0x40; // turn on fine AGC BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R65, BBPValue); } else { UINT8 BBPValue = 0; BBP_IO_READ8_BY_REG_ID(pAd, BBP_R65, &BBPValue); BBPValue &= ~0x40; // turn off fine AGC BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R65, BBPValue); } #endif // defined(RT2883) || defined(RT3883) // #ifdef DOT11_N_SUPPORT #ifdef TXBF_SUPPORT if (pAd->CommonCfg.ITxBfTimeout) { RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R179, 0x02); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R180, 0); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R182, pAd->CommonCfg.ITxBfTimeout & 0xFF); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R180, 1); RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R182, (pAd->CommonCfg.ITxBfTimeout>>8) & 0xFF); }