/** * \brief Disables the selected interrupts sources on a TWI peripheral. * \param pTwi Pointer to an Twi instance. * \param sources Bitwise OR of selected interrupt sources. */ void TWI_DisableIt(Twi *pTwi, uint32_t sources) { SANITY_CHECK(pTwi); SANITY_CHECK((sources & 0xFFFFF088) == 0); pTwi->TWI_IDR = sources; }
//----------------------------------------------------------------------------- /// Disables the selected interrupts sources on a TWI peripheral. /// \param pTwi Pointer to an AT91S_TWI instance. /// \param sources Bitwise OR of selected interrupt sources. //----------------------------------------------------------------------------- void TWI_DisableIt(AT91S_TWI *pTwi, unsigned int sources) { SANITY_CHECK(pTwi); SANITY_CHECK((sources & 0xFFFFFEF8) == 0); pTwi->TWI_IDR = sources; }
//------------------------------------------------------------------------------ /// Writes data on the At45 at the specified address. Only one page of /// data is written that way; if the address is not at the beginning of the /// page, the data is written starting from this address and wraps around to /// the beginning of the page. /// \param pAt45 Pointer to a At45 driver instance. /// \param pBuffer Buffer containing the data to write. /// \param size Number of bytes to write. /// \param address Destination address on the At45. //------------------------------------------------------------------------------ void AT45D_Write( At45 *pAt45, unsigned char *pBuffer, unsigned int size, unsigned int address) { unsigned char error; SANITY_CHECK(pAt45); SANITY_CHECK(pBuffer); SANITY_CHECK(size <= pAt45->pDesc->pageSize); // Issue a page write through buffer 1 command error = AT45_SendCommand(pAt45, AT45_PAGE_WRITE_BUF1, 4, pBuffer, size, address, 0, 0); ASSERT(!error, "-F- AT45_Write: Could not issue command.\n\r"); // Wait until the command is sent while (AT45_IsBusy(pAt45)) { AT45D_Wait(pAt45); } // Wait until the At45 becomes ready again AT45D_WaitReady(pAt45); }
//------------------------------------------------------------------------------ /// Sets the input data buffer to encrypt/decrypt when in PDC mode. /// \param pInput Pointer to the input data. /// \param size Size of buffer in bytes. //------------------------------------------------------------------------------ void TDES_SetInputBuffer(const unsigned int *pInput, unsigned int size) { trace_LOG(trace_DEBUG, "-D- TDES_SetInputBuffer()\n\r"); SANITY_CHECK(pInput); SANITY_CHECK((size > 0) && ((size % 8) == 0)); AT91C_BASE_TDES->TDES_TPR = (unsigned int) pInput; AT91C_BASE_TDES->TDES_TCR = size / 4; }
//------------------------------------------------------------------------------ /// Sets the output buffer which will receive the encrypted/decrypted data when /// using the PDC. /// \param pOutput Pointer to the output data. /// \param size Size of buffer in bytes. //------------------------------------------------------------------------------ void TDES_SetOutputBuffer(unsigned int *pOutput, unsigned int size) { trace_LOG(trace_DEBUG, "-D- TDES_SetOutputBuffer()\n\r"); SANITY_CHECK(pOutput); SANITY_CHECK((size > 0) && ((size % 8) == 0)); AT91C_BASE_TDES->TDES_RPR = (unsigned int) pOutput; AT91C_BASE_TDES->TDES_RCR = size / 4; }
//------------------------------------------------------------------------------ /// Initializes a TWI driver instance, using the given TWI peripheral. The /// peripheral must have been initialized properly before calling this function. /// \param pTwid Pointer to the Twid instance to initialize. /// \param pTwi Pointer to the TWI peripheral to use. //------------------------------------------------------------------------------ void TWID_Initialize(Twid *pTwid, AT91S_TWI *pTwi) { TRACE_DEBUG("TWID_Initialize()\n\r"); SANITY_CHECK(pTwid); SANITY_CHECK(pTwi); // Initialize driver pTwid->pTwi = pTwi; pTwid->pTransfer = 0; }
static QImage decodeNotificationSpecImageHint(const QDBusArgument& arg) { int width, height, rowStride, hasAlpha, bitsPerSample, channels; QByteArray pixels; char* ptr; char* end; arg.beginStructure(); arg >> width >> height >> rowStride >> hasAlpha >> bitsPerSample >> channels >> pixels; arg.endStructure(); //qDebug() << width << height << rowStride << hasAlpha << bitsPerSample << channels; #define SANITY_CHECK(condition) \ if (!(condition)) { \ qWarning() << "Sanity check failed on" << #condition; \ return QImage(); \ } SANITY_CHECK(width > 0); SANITY_CHECK(width < 2048); SANITY_CHECK(height > 0); SANITY_CHECK(height < 2048); SANITY_CHECK(rowStride > 0); #undef SANITY_CHECK QImage::Format format = QImage::Format_Invalid; void (*fcn)(QRgb*, const char*, int) = 0; if (bitsPerSample == 8) { if (channels == 4) { format = QImage::Format_ARGB32; fcn = copyLineARGB32; } else if (channels == 3) { format = QImage::Format_RGB32; fcn = copyLineRGB32; } } if (format == QImage::Format_Invalid) { qWarning() << "Unsupported image format (hasAlpha:" << hasAlpha << "bitsPerSample:" << bitsPerSample << "channels:" << channels << ")"; return QImage(); } QImage image(width, height, format); ptr = pixels.data(); end = ptr + pixels.length(); for (int y=0; y<height; ++y, ptr += rowStride) { if (ptr + channels * width > end) { qWarning() << "Image data is incomplete. y:" << y << "height:" << height; break; } fcn((QRgb*)image.scanLine(y), ptr, width); } return image; }
void adc_spi_cb(void) { if(gAdcDesc.state==ADC_SPI) { gAdcDesc.buf_wr=(gAdcDesc.buf_wr+1)%ADC_BUFSIZE; SANITY_CHECK(gAdcDesc.buf_wr!=gAdcDesc.buf_rd); gAdcDesc.state=ADC_PIO; } else SANITY_CHECK(gAdcDesc.state==ADC_IDLE); }
//------------------------------------------------------------------------------ /// Configure the MCI SDCBUS in the MCI_SDCR register. Only two modes available /// /// \param pMci Pointer to the low level MCI driver. /// \param busWidth MCI bus width mode. //------------------------------------------------------------------------------ void MCI_SetBusWidth(Mci *pMci, unsigned char busWidth) { AT91S_MCI *pMciHw = pMci->pMciHw; unsigned int mciSdcr; SANITY_CHECK(pMci); SANITY_CHECK(pMci->pMciHw); mciSdcr = (READ_MCI(pMciHw, MCI_SDCR) & ~(AT91C_MCI_SCDBUS)); WRITE_MCI(pMciHw, MCI_SDCR, mciSdcr | busWidth); }
//------------------------------------------------------------------------------ /// Returns the number of locked regions inside the given address range. /// \param start Start address of range. /// \param end End address of range. //------------------------------------------------------------------------------ unsigned char FLASHD_IsLocked(unsigned int start, unsigned int end) { AT91S_EFC *pEfc; unsigned short startPage, endPage; unsigned char startRegion, endRegion; unsigned int numPagesInRegion; unsigned int status; unsigned char error; unsigned int numLockedRegions = 0; SANITY_CHECK(end >= start); #ifdef AT91C_BASE_EFC1 // Convert wrapped address to physical address. start &= 0x19FFFF; end &= 0x19FFFF; // Check EFC crossover 2 bank SANITY_CHECK(((start >=AT91C_IFLASH) && (end <= AT91C_IFLASH + AT91C_IFLASH_SIZE)) || ((start >=AT91C_IFLASH1) && (end <= AT91C_IFLASH1 + AT91C_IFLASH1_SIZE))); #else SANITY_CHECK((start >=AT91C_IFLASH) && (end <= AT91C_IFLASH + AT91C_IFLASH_SIZE)); #endif // Compute page numbers EFC_TranslateAddress(&pEfc, start, &startPage, 0); EFC_TranslateAddress(0, end, &endPage, 0); // Compute region numbers numPagesInRegion = AT91C_IFLASH_LOCK_REGION_SIZE / AT91C_IFLASH_PAGE_SIZE; startRegion = startPage / numPagesInRegion; endRegion = endPage / numPagesInRegion; if ((endPage % numPagesInRegion) != 0) { endRegion++; } // Retrieve lock status error = EFC_PerformCommand(pEfc, AT91C_EFC_FCMD_GLB, 0); ASSERT(!error, "-F- Error while trying to fetch lock bits status (0x%02X)\r\n", error); status = EFC_GetResult(pEfc); // Check status of each involved region while (startRegion < endRegion) { if ((status & (1 << startRegion)) != 0) { numLockedRegions++; } startRegion++; } return numLockedRegions; }
//------------------------------------------------------------------------------ /// Enable/disable a MCI driver instance. /// \param pMci Pointer to a MCI driver instance. /// \param enb 0 for disable MCI and 1 for enable MCI. //------------------------------------------------------------------------------ void MCI_Enable(Mci *pMci, unsigned char enb) { AT91S_MCI *pMciHw = pMci->pMciHw; SANITY_CHECK(pMci); SANITY_CHECK(pMci->pMciHw); // Set the Control Register: Enable/Disable MCI interface clock if(enb == DISABLE) { WRITE_MCI(pMciHw, MCI_CR, AT91C_MCI_MCIDIS); } else { WRITE_MCI(pMciHw, MCI_CR, AT91C_MCI_MCIEN); } }
/** * \brief Sets the dead time used by a PWM channel. * This function writes directly to the DT register if the channel is disabled; * otherwise it uses the update register DTUPD. * Note that the dead time must always be inferior or equal to the channel * period. * * \param channel Channel number. * \param timeH Dead time value for PWMHx output. * \param timeL Dead time value for PWMLx output. */ void PWMC_SetDeadTime(uint8_t channel, uint16_t timeH, uint16_t timeL) { SANITY_CHECK(timeH <= PWM->PWM_CH_NUM[channel].PWM_CPRD); SANITY_CHECK(timeL <= PWM->PWM_CH_NUM[channel].PWM_CPRD); /* If channel is disabled, write to DT */ if ((PWM->PWM_SR & (1 << channel)) == 0) { PWM->PWM_CH_NUM[channel].PWM_DT = timeH | (timeL << 16); } /* Otherwise use update register */ else { PWM->PWM_CH_NUM[channel].PWM_DTUPD = timeH | (timeL << 16); } }
//------------------------------------------------------------------------------ /// Erases the specified 64KB block of the serial firmware dataflash. /// Returns 0 if successful; otherwise returns AT26_ERROR_PROTECTED if the /// device is protected or AT26_ERROR_BUSY if it is busy executing a command. /// \param pAt26 Pointer to an AT26 driver instance. /// \param address Address of the block to erase. //------------------------------------------------------------------------------ unsigned char AT26D_EraseBlock(At26 *pAt26, unsigned int address) { unsigned char status; unsigned char error; SANITY_CHECK(pAt26); // Check that the flash is ready and unprotected status = AT26D_ReadStatus(pAt26); if ((status & AT26_STATUS_RDYBSY) != AT26_STATUS_RDYBSY_READY) { TRACE_ERROR("AT26D_EraseBlock : Flash busy\n\r"); return AT26_ERROR_BUSY; } else if ((status & AT26_STATUS_SWP) != AT26_STATUS_SWP_PROTNONE) { TRACE_ERROR("AT26D_EraseBlock : Flash protected\n\r"); return AT26_ERROR_PROTECTED; } // Enable critical write operation AT26D_EnableWrite(pAt26); // Start the block erase command error = AT26_SendCommand(pAt26, AT26_BlockEraseCmd(pAt26), 4, 0, 0, address, 0, 0); ASSERT(!error, "-F- AT26_EraseBlock: Could not issue command.\n\r"); // Wait for transfer to finish AT26D_Wait(pAt26); // Poll the Serial flash status register until the operation is achieved AT26D_WaitReady(pAt26); return 0; }
//------------------------------------------------------------------------------ /// Sets the trigger period when using the TSADCC in periodic trigger mode. /// As usual, this function requires TSADCC_SetAdcFrequency() to be called /// before it. /// \param period Trigger period in nanoseconds. //------------------------------------------------------------------------------ void TSADCC_SetTriggerPeriod(unsigned int period) { unsigned int trgper; unsigned int divisor = 100000000; while ((period >= 10) && (divisor >= 10)) { period /= 10; divisor /= 10; } trgper = (period * lAdcclk) / divisor; if ((trgper % 10) > 0) { trgper /= 10; } else { trgper /= 10; if (trgper > 0) trgper--; } SANITY_CHECK((trgper & ~0xFFFF) == 0); AT91C_BASE_TSADC->TSADC_TRGR = (AT91C_BASE_TSADC->TSADC_TRGR & ~AT91C_TSADC_TRGPER) | (trgper << 16); }
//------------------------------------------------------------------------------ /// Erases all the content of the memory chip. /// \param pAt26 Pointer to an AT26 driver instance. //------------------------------------------------------------------------------ unsigned char AT26D_EraseChip(At26 *pAt26) { unsigned char status; unsigned char error; SANITY_CHECK(pAt26); // Check that the flash is unprotected status = AT26D_ReadStatus(pAt26); if ((status & AT26_STATUS_SWP) != AT26_STATUS_SWP_PROTNONE) { return AT26_ERROR_PROTECTED; } // Enable critical write operation AT26D_EnableWrite(pAt26); // Erase the chip error = AT26_SendCommand(pAt26, AT26_CHIP_ERASE_2, 1, 0, 0, 0, 0, 0); ASSERT(!error, "-F- AT26_ChipErase: Could not issue command.\n\r"); // Wait for transfer to finish AT26D_Wait(pAt26); // Poll the Serial flash status register until the operation is achieved AT26D_WaitReady(pAt26); return 0; }
static WEBP_INLINE void DoVerticalFilter(const uint8_t* in, int width, int height, int stride, int row, int num_rows, int inverse, uint8_t* out) { const uint8_t* preds; const size_t start_offset = row * stride; const int last_row = row + num_rows; SANITY_CHECK(in, out); in += start_offset; out += start_offset; preds = inverse ? out : in; if (row == 0) { // Very first top-left pixel is copied. out[0] = in[0]; // Rest of top scan-line is left-predicted. PredictLine(in + 1, preds, out + 1, width - 1, inverse); row = 1; in += stride; out += stride; } else { // We are starting from in-between. Make sure 'preds' points to prev row. preds -= stride; } // Filter line-by-line. while (row < last_row) { PredictLine(in, preds, out, width, inverse); ++row; preds += stride; in += stride; out += stride; } }
//------------------------------------------------------------------------------ /// Configures the AES peripheral to encrypt/decrypt, start mode (manual, auto, /// PDC) and operating mode (ECB, CBC, OFB, CFB, CTR). /// \param cipher Indicates if the peripheral should encrypt or decrypt data. /// \param smode Start mode. /// \param opmode Operating mode. //------------------------------------------------------------------------------ void AES_Configure( unsigned char cipher, unsigned int smode, unsigned int opmode) { TRACE_DEBUG("AES_Configure()\n\r"); SANITY_CHECK((cipher & 0xFFFFFFFE) == 0); SANITY_CHECK((smode & 0xFFFFFCFF) == 0); SANITY_CHECK((opmode & 0xFFFF8FFF) == 0); // Reset the peripheral first AT91C_BASE_AES->AES_CR = AT91C_AES_SWRST; // Configure mode register AT91C_BASE_AES->AES_MR = cipher | smode | opmode; }
PERF_TEST_P(Size_MatType, Mat_Transform, testing::Combine(testing::Values(TYPICAL_MAT_SIZES), testing::Values(CV_8UC3, CV_8SC3, CV_16UC3, CV_16SC3, CV_32SC3, CV_32FC3, CV_64FC3)) ) { const Size_MatType_t params = GetParam(); const Size srcSize0 = get<0>(params); const Size srcSize = Size(1, srcSize0.width*srcSize0.height); const int type = get<1>(params); const float transform[] = { 0.5f, 0.f, 0.86602540378f, 128, 0.f, 1.f, 0.f, -64, 0.86602540378f, 0.f, 0.5f, 32,}; Mat mtx(Size(4, 3), CV_32FC1, (void*)transform); Mat src(srcSize, type), dst(srcSize, type); randu(src, 0, 30); declare.in(src).out(dst); TEST_CYCLE() { cv::transform(src, dst, mtx); } SANITY_CHECK(dst, 1e-6, ERROR_RELATIVE); }
static WEBP_INLINE void DoHorizontalFilter(const uint8_t* in, int width, int height, int stride, int row, int num_rows, int inverse, uint8_t* out) { const uint8_t* preds; const size_t start_offset = row * stride; const int last_row = row + num_rows; SANITY_CHECK(in, out); in += start_offset; out += start_offset; preds = inverse ? out : in; if (row == 0) { // Leftmost pixel is the same as input for topmost scanline. out[0] = in[0]; PredictLine(in + 1, preds, out + 1, width - 1, inverse); row = 1; preds += stride; in += stride; out += stride; } // Filter line-by-line. while (row < last_row) { // Leftmost pixel is predicted from above. PredictLine(in, preds - stride, out, 1, inverse); PredictLine(in + 1, preds, out + 1, width - 1, inverse); ++row; preds += stride; in += stride; out += stride; } }
PERF_TEST_P(DevInfo, StereoBeliefPropagation, testing::ValuesIn(devices())) { DeviceInfo devInfo = GetParam(); setDevice(devInfo.deviceID()); Mat img_l_host = readImage("gpu/stereobm/aloe-L.png", CV_LOAD_IMAGE_GRAYSCALE); Mat img_r_host = readImage("gpu/stereobm/aloe-R.png", CV_LOAD_IMAGE_GRAYSCALE); ASSERT_FALSE(img_l_host.empty()); ASSERT_FALSE(img_r_host.empty()); GpuMat img_l(img_l_host); GpuMat img_r(img_r_host); GpuMat dst; StereoBeliefPropagation bp(128); declare.time(10.0); SIMPLE_TEST_CYCLE() { bp(img_l, img_r, dst); } Mat dst_host(dst); SANITY_CHECK(dst_host); }
//------------------------------------------------------------------------------ /// Returns 1 if the given GPNVM bit is currently set; otherwise returns 0. /// \param gpnvm GPNVM bit index. //------------------------------------------------------------------------------ unsigned char FLASHD_IsGPNVMSet(unsigned char gpnvm) { AT91S_EFC *pEfc = AT91C_BASE_EFC0; unsigned int status; SANITY_CHECK(gpnvm < CHIP_EFC_NUM_GPNVMS); #ifdef AT91C_BASE_EFC1 // GPNVM in EFC1 if (gpnvm >= 8) { pEfc = AT91C_BASE_EFC1; gpnvm -= 8; } #endif // Check if GPNVM is set status = EFC_GetStatus(pEfc); if ((status & (1 << gpnvm << 8)) != 0) { return 1; } else { return 0; } }
PERF_TEST_P(DevInfo, StereoConstantSpaceBP, testing::ValuesIn(devices())) { DeviceInfo devInfo = GetParam(); setDevice(devInfo.deviceID()); Mat img_l_host = readImage("gpu/perf/aloe.jpg", CV_LOAD_IMAGE_GRAYSCALE); Mat img_r_host = readImage("gpu/perf/aloeR.jpg", CV_LOAD_IMAGE_GRAYSCALE); ASSERT_FALSE(img_l_host.empty()); ASSERT_FALSE(img_r_host.empty()); GpuMat img_l(img_l_host); GpuMat img_r(img_r_host); GpuMat dst; StereoConstantSpaceBP bp(128); declare.time(10.0); SIMPLE_TEST_CYCLE() { bp(img_l, img_r, dst); } Mat dst_host(dst); SANITY_CHECK(dst_host); }
void fatfs_node_cache_flush(fatfs_disk_t *disk) { fatfs_node_t *node, *next_node; node = node_list_get_head(&disk->live_nlist); while (NULL != node) { next_node = node_list_get_next(node); node_list_remove(&disk->live_nlist, node); if (!node_hash_remove(&disk->node_hash, node)) CYG_ASSERT(false, "Node not in hash"); node_pool_free(disk, node); node = next_node; } node = node_list_get_head(&disk->dead_nlist); while (NULL != node) { next_node = node_list_get_next(node); node_list_remove(&disk->dead_nlist, node); if (!node_hash_remove(&disk->node_hash, node)) CYG_ASSERT(false, "Node not in hash"); node_pool_free(disk, node); node = next_node; } SANITY_CHECK(); }
//------------------------------------------------------------------------------ /// Finds a prescaler/divisor couple to generate the desired frequency from /// MCK. /// Returns the value to enter in PWMC_MR or 0 if the configuration cannot be /// met. /// \param frequency Desired frequency in Hz. /// \param mck Master clock frequency in Hz. //------------------------------------------------------------------------------ static unsigned short FindClockConfiguration( unsigned int frequency, unsigned int mck) { unsigned int divisors[11] = {1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024}; unsigned char divisor = 0; unsigned int prescaler; SANITY_CHECK(frequency < mck); // Find prescaler and divisor values prescaler = (mck / divisors[divisor]) / frequency; while ((prescaler > 255) && (divisor < 11)) { divisor++; prescaler = (mck / divisors[divisor]) / frequency; } // Return result if (divisor < 11) { TRACE_DEBUG("Found divisor=%u and prescaler=%u for freq=%uHz\n\r", divisors[divisor], prescaler, frequency); return prescaler | (divisor << 8); } else { return 0; } }
PERF_TEST_P(DevInfo, DisparityBilateralFilter, testing::ValuesIn(devices())) { DeviceInfo devInfo = GetParam(); setDevice(devInfo.deviceID()); Mat img_host = readImage("gpu/stereobm/aloe-L.png", CV_LOAD_IMAGE_GRAYSCALE); Mat disp_host = readImage("gpu/stereobm/aloe-disp.png", CV_LOAD_IMAGE_GRAYSCALE); ASSERT_FALSE(img_host.empty()); ASSERT_FALSE(disp_host.empty()); GpuMat img(img_host); GpuMat disp(disp_host); GpuMat dst; DisparityBilateralFilter f(128); declare.time(0.5).iterations(100); SIMPLE_TEST_CYCLE() { f(disp, img, dst); } Mat dst_host(dst); SANITY_CHECK(dst_host); }
PERF_TEST_P(Size_MatType, Mat_Clone_Roi, testing::Combine(testing::Values(TYPICAL_MAT_SIZES), testing::Values(TYPICAL_MAT_TYPES)) ) { Size size = get<0>(GetParam()); int type = get<1>(GetParam()); unsigned int width = size.width; unsigned int height = size.height; Mat source(height, width, type); Mat destination(size.height/2, size.width/2, type); declare.in(source, WARMUP_RNG).out(destination); Mat roi(source, Rect(width/4, height/4, 3*width/4, 3*height/4)); TEST_CYCLE() { Mat tmp = roi.clone(); CV_UNUSED(tmp); } destination = roi.clone(); SANITY_CHECK(destination, 1); }
static WEBP_INLINE void DoGradientFilter(const uint8_t* in, int width, int height, int stride, int inverse, uint8_t* out) { const uint8_t* preds = (inverse ? out : in); int h; SANITY_CHECK(in, out); // left prediction for top scan-line out[0] = in[0]; PredictLine(in + 1, preds, out + 1, width - 1, inverse); // Filter line-by-line. for (h = 1; h < height; ++h) { int w; preds += stride; in += stride; out += stride; // leftmost pixel: predict from above. PredictLine(in, preds - stride, out, 1, inverse); for (w = 1; w < width; ++w) { const int pred = GradientPredictor(preds[w - 1], preds[w - stride], preds[w - stride - 1]); out[w] = in[w] + (inverse ? pred : -pred); } } }
static void HorizontalFilter(const uint8_t* data, int width, int height, int stride, uint8_t* filtered_data) { const uint8_t* preds = data; const uint8_t* in = data; uint8_t* out = filtered_data; int row = 1; SANITY_CHECK(in, out); // Leftmost pixel is the same as input for topmost scanline. out[0] = in[0]; PredictLineInverse0(in + 1, preds, out + 1, width - 1); preds += stride; in += stride; out += stride; // Filter line-by-line. while (row < height) { // Leftmost pixel is predicted from above. PredictLineInverse0(in, preds - stride, out, 1); PredictLineInverse0(in + 1, preds, out + 1, width - 1); ++row; preds += stride; in += stride; out += stride; } }
//------------------------------------------------------------------------------ /// Sets the duty cycle used by a PWM channel. This function writes directly to /// the CDTY register if the channel is disabled; otherwise it uses the /// update register CUPD. /// Note that the duty cycle must always be inferior or equal to the channel /// period. /// \param channel Channel number. /// \param duty Duty cycle value. //------------------------------------------------------------------------------ void PWMC_SetDutyCycle(unsigned char channel, unsigned short duty) { SANITY_CHECK(duty <= AT91C_BASE_PWMC->PWMC_CH[channel].PWMC_CPRDR); // SAM7S errata #if defined(at91sam7s16) || defined(at91sam7s161) || defined(at91sam7s32) \ || defined(at91sam7s321) || defined(at91sam7s64) || defined(at91sam7s128) \ || defined(at91sam7s256) || defined(at91sam7s512) ASSERT(duty > 0, "-F- Duty cycle value 0 is not permitted on SAM7S chips.\n\r"); ASSERT((duty > 1) || (AT91C_BASE_PWMC->PWMC_CH[channel].PWMC_CMR & AT91C_PWMC_CALG), "-F- Duty cycle value 1 is not permitted in left-aligned mode on SAM7S chips.\n\r"); #endif // If channel is disabled, write to CDTY if ((AT91C_BASE_PWMC->PWMC_SR & (1 << channel)) == 0) { AT91C_BASE_PWMC->PWMC_CH[channel].PWMC_CDTYR = duty; } // Otherwise use update register else { AT91C_BASE_PWMC->PWMC_CH[channel].PWMC_CMR &= ~AT91C_PWMC_CPD; AT91C_BASE_PWMC->PWMC_CH[channel].PWMC_CUPDR = duty; } }
PERF_TEST_P(DevInfo, StereoBM, testing::ValuesIn(devices())) { DeviceInfo devInfo = GetParam(); setDevice(devInfo.deviceID()); Mat img_l_host = readImage("gpu/perf/aloe.jpg", CV_LOAD_IMAGE_GRAYSCALE); Mat img_r_host = readImage("gpu/perf/aloeR.jpg", CV_LOAD_IMAGE_GRAYSCALE); ASSERT_FALSE(img_l_host.empty()); ASSERT_FALSE(img_r_host.empty()); GpuMat img_l(img_l_host); GpuMat img_r(img_r_host); GpuMat dst; StereoBM_GPU bm(0, 256); declare.time(0.5).iterations(100); SIMPLE_TEST_CYCLE() { bm(img_l, img_r, dst); } Mat dst_host(dst); SANITY_CHECK(dst_host); }