main (int argc, char **argv) { int id; setvbuf (stdout, NULL, _IOLBF, 0); printf ("%s: starting...\n", progname); // request I/O privity ThreadCtl(_NTO_TCTL_IO, 0 ); // set up an event for the handler or the kernel to use to wake up // this thread. Use whatever type of event and event handling you want SIGEV_INTR_INIT( &int_event ); // either register an interrupt handler or the event id = InterruptAttach(0, hdlr, NULL, 0, _NTO_INTR_FLAGS_TRK_MSK ); while (1) { // block here waiting for the event InterruptWait(0, NULL ); // if using a high frequency interrupt, don't print every interrupt printf ("%s: we got an event after 1500 timer ticks and unblocked\n", progname); } }
int main() { int i; int id1, id2; struct _pulse pulse; // Request I/O privileges ThreadCtl( _NTO_TCTL_IO, 0 ); chid = ChannelCreate( 0 ); coid = ConnectAttach( 0, 0, chid, _NTO_SIDE_CHANNEL, 0 ); SIGEV_PULSE_INIT( &event1, coid, getprio(0), MY_PULSE_CODE1, 0 ); id1=InterruptAttach( SYSPAGE_ENTRY(qtime)->intr, &handler1, NULL, 0, 0 ); SIGEV_PULSE_INIT( &event2, coid, getprio(0), MY_PULSE_CODE2, 0 ); id2=InterruptAttach( SYSPAGE_ENTRY(qtime)->intr, &handler2, NULL, 0, 0 ); for( i = 0; i < 10; ++i ) { // Wait for ISR to wake us up MsgReceivePulse( chid, &pulse, sizeof( pulse ), NULL ); if(pulse.code == MY_PULSE_CODE1) { printf( "1000 events\n" ); } else if(pulse.code == MY_PULSE_CODE2) { printf( "2500 events\n" ); } } // Disconnect the ISR handler InterruptDetach(id1); InterruptDetach(id2); return 0; }
int main(){ int i; sem_t block; // Enable Hardware Access - QNX library // http://www.qnx.org/developers/docs/6.3.2/neutrino/lib_ref/t/threadctl.html ThreadCtl(_NTO_TCTL_IO, NULL); // Instantiate and Configure Global Modules // Signal registration is done in individual module's Init()'s MNET = new MatlabNet(); VNET = new VisionNet(); // Hardware management module HW = new IoHardware(); HW->Init(); // Make sure all digital io processing settles down for(int i=0; i<20; i++){ HW->ProcessInput(); } // Initialize external interrupt command ExtInt = new ExternalInterrupt(); ExtInt->Init("External Interrupt", 65, 10); //Enable external interrupt on port C, bit 3 of group 1 HW->EnableExternalInterrupt(); HW->ClearExternalInterrupt(); // Instantiate Tasks SampleLoop = new SampleLoopTask(); SampleLoop->Init("SampleLoop", SAMPLE_RATE, &ActualSampleRate, 60); // Start up MatlabNet after all the signals have been added MNET->Init(ActualSampleRate, 14); VNET->Init(ActualSampleRate, 14); // Set up digital output to enable motor // Let's make a default as motor off HW->WriteDigitalBit(IoHardware::MOTOR_ENABLE, MOTOR_OFF); HW->motorStatus = MOTOR_OFF; // Start user interface loop - list of commands in table. // exits when user hits 'q' // See userInterface.C for this function. ui(); // Set motor output to zero and disable the amplifier SampleLoop->done = 1; // camera command HW->SetAnalogOut(IoHardware::AMP_SIGNAL, 0.0); // first send a zero current command , then motor off. // there is no problem with the other way, but just logically. HW->WriteDigitalBit(IoHardware::MOTOR_ENABLE, MOTOR_OFF); HW->motorStatus = MOTOR_OFF; delay(10); }
void SensorHAL::initInterrupt() { //Create channel for pulse notification if ((chid = ChannelCreate(0)) == -1) { printf("SensorHAL: Error in ChannelCreate\n"); } //Connect to channel if ((coid = ConnectAttach(0, 0, chid, _NTO_SIDE_CHANNEL, 0)) == -1) { printf("SensorHAL: Error in ConnectAttach\n"); } //Initialisiere ein sigevent als Pulse SIGEV_PULSE_INIT(&event, coid, SIGEV_PULSE_PRIO_INHERIT, PULSE_FROM_ISR, 0); //Get rights if (-1 == ThreadCtl(_NTO_TCTL_IO, 0)) { printf("ThreadCtl access failed\n"); exit(EXIT_FAILURE); } //Init Port A, B, C, if HAl doesnt already out8(PORT_CTRL, DIO_INIT); //Enable IRQs for PortB and PortC out8(DIO_INTERRUPT_ENABLE_REG, DIO_INTERRUPT_ENABLE_BC); //Reset IRQs out8(DIO_INTERRUPT_CLEAR_REG, 0x00); //Registriere die Interrupt Service Routine if ((interruptId = InterruptAttach(DIO_IRQ, ISR, &event, sizeof(event), 0)) == -1) { printf("SensorHAL: Error in InterruptAttach\n"); } }
void xf86EnableIO() { ErrorF("xf86EnableIO: enabling I/O access\n"); if(ThreadCtl(_NTO_TCTL_IO, 0)) { ErrorF("xf86EnableIO: could not set I/O privilege, errno %d\n",errno); } return; }
/** * set affinity for thread to bind on designated CPU */ void bindToCPU(Int32 cpu, const char* name) { #ifdef __QNX__ /* Determine the number of array elements required to hold * the runmasks, based on the number of CPUs in the system. */ num_elements = RMSK_SIZE(_syspage_ptr->num_cpu); /* Determine the size of the runmask, in bytes. */ masksize_bytes = num_elements * sizeof(unsigned); /* Allocate memory for the data structure that we'll pass * to ThreadCtl(). We need space for an integer (the number * of elements in each mask array) and the two masks * (runmask and inherit mask). */ size = sizeof(int) + 2 * masksize_bytes; if ((my_data = malloc(size)) == NULL) { /* Not enough memory. */ } else { memset(my_data, 0x00, size); /* Set up pointers to the "members" of the structure. */ rsizep = (int *)my_data; rmaskp = rsizep + 1; imaskp = rmaskp + num_elements; /* Set the size. */ *rsizep = num_elements; /* Set the runmask. Call this macro once for each processor the thread can run on. */ RMSK_SET(cpu, rmaskp); /* Set the inherit mask. Call this macro once for each processor the thread's children can run on. */ RMSK_SET(cpu, imaskp); if ( ThreadCtl( _NTO_TCTL_RUNMASK_GET_AND_SET, my_data) == -1) { DEBUG_PRINT("Thread Control Start-Error ---------------"); } } //TODO use fuction ThreadCtl( int cmd, void * data ) to control the thread with a runmask, see QNX library reference DEBUG_PRINT("WARNING: bind thread [%s] with pid=%d to cpu=%d failed - not implemented yet in qnx ",name, getpid(), cpu); #elif __linux__ //TODO use struct cpu_set_t, for documentation visit http://www.ibm.com/developerworks/linux/library/l-affinity.html DEBUG_PRINT("WARNING: bind thread [%s] with pid=%d to cpu=%d failed - not implemented yet in qnx ",name, getpid(), cpu); #endif }
void PMAPI PM_init(void) { char *force; if (VRegs == NULL) { #ifdef __QNXNTO__ ThreadCtl(_NTO_TCTL_IO, 0); /* Get IO privilidge */ #endif force = getenv("VBIOS_METHOD"); VRegs = VBIOSinit(force ? atoi(force) : 0); } MTRR_init(); }
Weiche* Weiche::getInstance(){ // Zugriffsrechte fuer den Zugriff auf die HW holen if (-1 == ThreadCtl(_NTO_TCTL_IO, 0)) { perror("ThreadCtl access failed\n"); return NULL; } if(instance == NULL){ instance = getInstance(); } return instance; }
void CreateInterrupt(Interrupt *ret, long periodMicros, long sec) { //declare variables struct sigevent event; struct itimerspec timer; struct _clockperiod clkper; struct sched_param param; timer_t timer_id; /* Give this thread root permissions to access the hardware */ ThreadCtl( _NTO_TCTL_IO, NULL ); int chid = ChannelCreate( 0 ); //create event channel /* Set our priority to the maximum, so we won’t get disrupted by anything other than interrupts. */ param.sched_priority = sched_get_priority_max( SCHED_RR ); //set the clock from 10ns to 1microsecond ticks clkper.nsec = 100000; clkper.fract = 0; ClockPeriod ( CLOCK_REALTIME, &clkper, NULL, 0 ); // 1ms //Set up the pulse width modulation event event.sigev_notify = SIGEV_PULSE; // most basic message we can send -- just a pulse number event.sigev_coid = ConnectAttach ( ND_LOCAL_NODE, 0, chid, 0, 0 ); // Get ID that allows me to communicate on the channel assert ( event.sigev_coid != -1 ); // stop with error if cannot attach to channel event.sigev_priority = getprio(0); event.sigev_code = 1023; // arbitrary number assigned to this pulse event.sigev_value.sival_ptr = (void*)0; // ?? TBD // Now create the timer and get back the timer_id value for the timer we created. if ( timer_create( CLOCK_REALTIME, &event, &timer_id ) == -1) { perror ( "can’t create timer" ); exit( EXIT_FAILURE ); } /* Change the timer request to alter the behavior. */ timer.it_value.tv_sec = sec; timer.it_value.tv_nsec = periodMicros * 1000; timer.it_interval.tv_sec = sec; timer.it_interval.tv_nsec = periodMicros * 1000; //ret = (Interrupt){timer_id, timer, chid, periodMicros}; ret->timer_id = timer_id; ret->timer = timer; ret->chid = chid; ret->period = periodMicros; }
int main(int argc, char *argv[]) { int privity_err; uintptr_t ctrl_handle_chennalReg; uintptr_t ctrl_handle_Inputgain; uintptr_t ctrl_handle_commandRegMSB; uintptr_t ctrl_handle_commandRegLSB; uintptr_t ctrl_handle_portA; int LSB, MSB, DATA; struct timespec my_timer_value; my_timer_value.tv_nsec = 10000; //10us /* Give this thread root permissions to access the hardware */ privity_err = ThreadCtl( _NTO_TCTL_IO, NULL ); if ( privity_err == -1 ) { fprintf( stderr, "can't get root permissions\n" ); return -1; } ctrl_handle_commandRegLSB = mmap_device_io( PORT_LENGTH, BASE_ADDR); ctrl_handle_commandRegMSB = mmap_device_io( PORT_LENGTH, BASE_ADDR+1); ctrl_handle_chennalReg = mmap_device_io( PORT_LENGTH, BASE_ADDR + 2); ctrl_handle_Inputgain = mmap_device_io( PORT_LENGTH, BASE_ADDR + 3); ctrl_handle_portA = mmap_device_io( PORT_LENGTH, BASE_ADDR + 8); ctrl_handle_DIO = mmap_device_io(PORT_LENGTH, BASE_ADDR + B); out8(ctrl_handle_chennalReg, 0xF0); // Set Analog Input as -5V to +5V out8( ctrl_handle_Inputgain, 0x01 ); int port_value = in8(ctrl_handle_Inputgain); while (port_value & 0x20) { //nanospin( &my_timer_value ); port_value = in8(ctrl_handle_Inputgain); } out8(ctrl_handle_commandRegLSB, 0x80); while (in8(ctrl_handle_Inputgain) & 0x80); LSB = in8(ctrl_handle_commandRegLSB); MSB = in8(ctrl_handle_commandRegMSB); DATA = MSB*256 + LSB; printf("Welcome to the QNX Momentics IDE\n"); return EXIT_SUCCESS; }
Hal* Hal::getInstance() { // Zugriffsrechte fuer den Zugriff auf die HW holen if (-1 == ThreadCtl(_NTO_TCTL_IO, 0)) { perror("ThreadCtl access failed\n"); return NULL; } if (instance == NULL) { halMutex->lock(); if (instance == NULL) instance = new Hal(); halMutex->unlock(); } return instance; }
_X_EXPORT Bool xf86EnableIO() { if (ExtendedEnabled) return TRUE; if (ThreadCtl(_NTO_TCTL_IO, 0) < 0) { xf86Msg(X_WARNING,"%s: Failed to gain I/O privileges: %d\n", "xf86EnableIO", errno); return FALSE; } ExtendedEnabled = TRUE; return TRUE; }
LightFlash* LightFlash::getInstance() { if (-1 == ThreadCtl(_NTO_TCTL_IO, 0)) { perror("ThreadCtl access failed\n"); return NULL; } if (!light_flash_instance_) { light_flash_mutex_.lock(); if (!light_flash_instance_) { light_flash_instance_ = new LightFlash; } light_flash_mutex_.unlock(); } return light_flash_instance_; }
void SensorHAL::stopInterrupt() { if (-1 == ThreadCtl(_NTO_TCTL_IO, 0)) { printf("ThreadCtl access failed\n"); exit(EXIT_FAILURE); } if (InterruptDetach(interruptId) == -1) { printf("SensorHAL: Error InterruptDetach\n"); } if (ConnectDetach(coid) == -1) { printf("SensorHAL: Error in ConnectDetach\n"); } if (ChannelDestroy(chid) == -1) { printf("SensorHAL: Error in ChannelDestroy\n"); } }
int main(int argc, char **argv) { unsigned int base_addr = 0xd8000; // truck CAN 1 address unsigned char reg_addr; unsigned char value; unsigned int pbase; unsigned int mask = 0xffffffff; // print all by default unsigned char data_mask = 0xff; // use complete value by default volatile unsigned char *preg; int i; ThreadCtl(_NTO_TCTL_IO, NULL); //required to access I/O ports printf("array size %d\n", array_size); if (argc > 1) sscanf(argv[1],"%i",&base_addr); if (argc > 2) sscanf(argv[2], "%i", &mask); if (argc > 3) sscanf(argv[3], "%hhi", &data_mask); printf("base 0x%08x, mask 0x%08x, data_mask 0x%02x\n", base_addr, mask, data_mask); pbase = (unsigned int) mmap_device_memory(NULL, I82527_MAP_SIZE, PROT_READ | PROT_WRITE | PROT_NOCACHE, 0, base_addr); printf("Mapped address 0x%08x\n", pbase); for (i = 0; i < array_size; i++) { if ((mask & (1 << i)) == 0) continue; reg_addr = init_array[i].addr; value = init_array[i].value & data_mask; preg = (volatile unsigned char *) (pbase + reg_addr); *preg = value; printf("0x%02x: wrote 0x%02x\n", reg_addr, value); } return 0; }
/* ______________________________________________________________________ */ int main( ) { int privity_err; uintptr_t ctrl_handle_portC; uintptr_t ctrl_handle_portB; uintptr_t ctrl_handle_portCTL; struct timespec my_timer_value; my_timer_value.tv_nsec = 100000000; /* Give this thread root permissions to access the hardware */ privity_err = ThreadCtl( _NTO_TCTL_IO, NULL ); if ( privity_err == -1 ) { fprintf( stderr, "can't get root permissions\n" ); return -1; } /* Get a handle to the DIO port's Control register */ //ctrl_handle_portA = mmap_device_io( PORT_LENGTH, DIO_BASE_ADDR + 0x08 ); ctrl_handle_portB = mmap_device_io( PORT_LENGTH, DIO_BASE_ADDR + DIO_PORTB_ADDR); ctrl_handle_portCTL = mmap_device_io( PORT_LENGTH, DIO_BASE_ADDR + DIO_CTL_ADDR); /* Initialise the DIO port */ out8( ctrl_handle_portCTL, 0x00 ); //out8( ctrl_handle_portA, ENABLE_IN ); //out8( ctrl_handle_portB, ENABLE_OUT ); for (;;) { //out8( ctrl_handle_portB, HIGH ); out8( ctrl_handle_portB, HIGH ); nanospin( &my_timer_value ); //out8( ctrl_handle_portB, LOW ); out8( ctrl_handle_portB, LOW ); nanospin( &my_timer_value ); } return 0; }
///// 制御ボードイニシャライズ関数////////////////////////////////////////////// void Board_Open(void) { int ch; ThreadCtl(_NTO_TCTL_IO,0); mmap_device_io(BIO_SIZE,0x300); ///// カウンタ初期化 ///// out8(Count_com,0x13); //A-2-phase x4 out8(Count_com,0x1b); //B-2-phase x4 out8(Count_com,0x14); //A-count enable set out8(Count_com,0x1c); //B-count enable set out8(Count_com,0x16); //separate mode out8(Count_com,0x0e); //level CLR out8(Count_com,0x0f); //edge CLR for(ch=1; ch<=Channel; ch++){ M[ch].AD_Init = 2048; //とりあえずのADの初期値 DA_Write(ch,2048); //2.5V出力 } }
/* * IOControl constructor - initializes I/O settings and controls */ IOControl::IOControl( std::queue<Event>* qin, pthread_mutex_t *aQ ) { // Initialize variables accessQ = aQ; q = qin; // Initialize HW I/O control handlers if( ThreadCtl(_NTO_TCTL_IO, NULL) == -1 ) { std::perror("Error - could not access I/O registers"); } CONTROL_HANDLE = mmap_device_io(IO_PORT_SIZE, IO_CONTROL_REGISTER); A_HANDLE = mmap_device_io(IO_PORT_SIZE, IO_A_REGISTER); B_HANDLE = mmap_device_io(IO_PORT_SIZE, IO_B_REGISTER); C_HANDLE = mmap_device_io(IO_PORT_SIZE, IO_C_REGISTER); if(CONTROL_HANDLE == MAP_DEVICE_FAILED) { std::cout << "Failed to map control register"; } if(A_HANDLE == MAP_DEVICE_FAILED) { std::cout << "Failed to map register A"; } if(B_HANDLE == MAP_DEVICE_FAILED) { std::cout << "Failed to map register B"; } if(C_HANDLE == MAP_DEVICE_FAILED) { std::cout << "Failed to map register C"; } // Initialize control register // A is input // B,C are output out8(CONTROL_HANDLE,0x90); }
/**************************************************************************** REMARKS: Function to execute a service at ring 0. This is done using the clock interrupt handler since the code we attach to it will always run at ring 0. ****************************************************************************/ static void CallRing0(void) { #ifdef __QNXNTO__ uint clock_intno = SYSPAGE_ENTRY(qtime)->intr; #else uint clock_intno = 0; /* clock irq */ #endif int intrid; #ifdef __QNXNTO__ mlock((void*)&_PM_R0, sizeof(_PM_R0)); ThreadCtl(_NTO_TCTL_IO, 0); #endif #ifdef __QNXNTO__ if ((intrid = InterruptAttach(_NTO_INTR_CLASS_EXTERNAL | clock_intno, _PM_ring0_isr, (void*)&_PM_R0, sizeof(_PM_R0), _NTO_INTR_FLAGS_END)) == -1) { #else if ((intrid = qnx_hint_attach(clock_intno, _PM_ring0_isr, FP_SEG(&_PM_R0))) == -1) { #endif perror("Attach"); exit(-1); } while (_PM_R0.service != -1) ; #ifdef __QNXNTO__ InterruptDetach(intrid); #else qnx_hint_detach(intrid); #endif } /**************************************************************************** REMARKS: Flush the translation lookaside buffer. ****************************************************************************/ void PMAPI PM_flushTLB(void) { _PM_R0.service = R0_FLUSH_TLB; CallRing0(); }
qmm10xt_typ *qmm10xt_init( unsigned base) { qmm10xt_typ *pboard; if( (pboard = (qmm10xt_typ *) MALLOC( sizeof( qmm10xt_typ ))) == NULL ) return( NULL ); printf("Preparing to map QMM board at %03x\n", base); fflush(stdout); ThreadCtl(_NTO_TCTL_IO, NULL); /// required to access I/O ports pboard->base = mmap_device_io(8, base); //maps 8 bytes of device space printf("QMM board mapped, base 0x%x\n", base); fflush(stdout); pboard->error = 0; pboard->dig_old_bits= 0; QMM10XT_INT_DISABLE(pboard); if( (pboard->ptimer[0] = am9513_init( base + CTS9513_1, TRUE )) == NULL ) { FREE( pboard ); return( NULL ); } if( (pboard->ptimer[1] = am9513_init( base + CTS9513_2, TRUE )) == NULL ) { am9513_done( pboard->ptimer[0] ); FREE( pboard ); return( NULL ); } qmm10xt_reset( pboard ); return( pboard ); }
int main(int argc, char *argv[]) { int privity_err; uintptr_t ctrl_handle; uintptr_t data_handle; int count; struct timespec my_timer_value; my_timer_value.tv_nsec = 500000; /* Give this thread root permissions to access the hardware */ privity_err = ThreadCtl( _NTO_TCTL_IO, NULL ); if ( privity_err == -1 ) { fprintf( stderr, "can't get root permissions\n" ); return -1; } /* Get a handle to the parallel port's Control register */ ctrl_handle = mmap_device_io( PORT_LENGTH, CTRL_ADDRESS ); /* Initialise the parallel port */ out8( ctrl_handle, INIT_BIT ); /* Get a handle to the parallel port's Data register */ data_handle = mmap_device_io( PORT_LENGTH, DATA_ADDRESS ); while(1) { /* Output a byte of lows to the data lines */ out8( data_handle, HIGH ); nanospin( &my_timer_value ); /* Output a byte of highs to the data lines */ out8( data_handle, LOW ); nanospin( &my_timer_value ); } return 0; }
/* * OpenVideo -- * * Enable access to the installed video hardware. */ int OpenVideo() { int fd; char fn[20]; if (geteuid() != 0) { fprintf(stderr, "%s: Must be run as root\n", MyName); return(-1); } if ((fd = open("/dev/console", O_WRONLY, 0)) < 0) { fprintf(stderr, "%s: Cannot open /dev/console\n", MyName); return(-1); } if(ThreadCtl(_NTO_TCTL_IO,0)) { close(fd); fprintf(stderr, "Could not set I/O priviledge\n"); return(-1); } return fd; }
HAL_A::HAL_A() { #ifdef SIMULATION std::cout << "Simulation aktiv" << std::endl; std::cout << "Zum Aufbau der Verbindung muss Die Festo Simulation schon laufen." << std::endl; IOaccess_open(); // Baue die Verbindung zur Simulation auf #endif // Zugriffsrechte fuer den Zugriff auf die HW holen if (-1 == ThreadCtl(_NTO_TCTL_IO, 0)) { printf("ThreadCtl access failed\n"); exit(EXIT_FAILURE); } // Initialisierung der Digitalen IO Karte //out8(DIO_BASE + DIO_CONTROL_BLA, 0x8A); out8(PORT_CTRL, DIO_INIT); //-->nicht nötig aber sicherer out8(PORT_A, 0x00); out8(PORT_C, 0x00); fullStop = false; }
/** * Hauptschleife des geerbten HAW-Thread. * Die oberklasse HAW-Thread erzwingt die Implementierung der execute Methode. * Der Thread endet nach Ende dieser Methode. */ void Blink_Thread::execute(void*){ /* Klassenweiten Mutex, locken. */ Lock lock(&mtx_); cout << "Blink_Thread executing" << endl; /* Zugriffsrechte von QNX fuer diesen Thread, auf die Hardware erbitten. */ if( ThreadCtl(_NTO_TCTL_IO_PRIV,0) == -1 ){ cout << "Can't get Hardware access, therefore can't do anything." << endl; } /* IO Register als Eingänge bzw. Ausgänge definieren. */ out8(ioControlAddress_, ioControlBitmask_); /* Gruenes Licht blinken lassen inkl. Pruefung ob der Thread extern gestoppt wurde. */ for(int i = 0; i < times_; i++){ /* Pruefen ob der Thread durch stop() beendet wurde. */ if( !isStopped() ){ turnGreenOn(); usleep(500000); turnGreenOff(); usleep(500000); } } }
int main(int argc, char *argv[]) { uint32_t l; int id, id2; my_data_t msg; int rcvid; name_attach_t *name; printf("Welcome Onda\n"); if (ThreadCtl(_NTO_TCTL_IO, 0) < 0) { perror(NULL); return -1; } name = name_attach(NULL, "onda", NAME_FLAG_ATTACH_GLOBAL); if (name == NULL) { perror("Error0\n"); return -1; } /* attach GPIO interrupt */ id = InterruptAttach (33, gpio_isr_handler, NULL, 0, _NTO_INTR_FLAGS_PROCESS); /* attach timer interrupt */ id2 = InterruptAttach (45, timer_isr_handler, NULL, 0, _NTO_INTR_FLAGS_PROCESS); gpio5 = mmap_device_io(OMAP3530_GPIO_SIZE, OMAP3530_GPIO5_BASE); if (gpio5 == MAP_DEVICE_FAILED) { perror(NULL); return -1; } //gpt3 = mmap_device_io(OMAP3530_GPT_SIZE, OMAP3530_GPT3_BASE); gpt9 = mmap_device_io(OMAP3530_GPT_SIZE, OMAP3530_GPT9_BASE); if (gpt9 == MAP_DEVICE_FAILED) { perror(NULL); return -1; } sys = mmap_device_io(OMAP3530_SYSCTL_SIZE, OMAP3530_SYSCTL_BASE); if (sys == MAP_DEVICE_FAILED) { perror(NULL); return -1; } /* selecting mode 4 function - GPIO 139 * selecting pullup and mode 4 function - GPIO 138 */ #define SYS_CONF ((4 << 16) | ((1 << 8) | (1<<3) | 4)) #define SYS_MASK ~(0x10F010F) l = (in32(sys + 0x168) & SYS_MASK) | SYS_CONF; //l = (in32(sys + 0x168) & ~(7<<16) ) | (4 << 16); //out32(sys + 0x168, ((1<<3 | 4) << 16) | (1<<3) | 4); out32(sys + 0x168, l); /* setting mode 2 - PWM */ l = (in32(sys + 0x174) & ~7 ) | 2; out32(sys + 0x174, l); /* setting the PIN 138 to input * setting the PIN 139 to output */ l = (in32(gpio5 + OMAP2420_GPIO_OE) & ~(1 << 11)) | 1 << 10; out32(gpio5 + OMAP2420_GPIO_OE, l); /* enabling interrupt on both levels on GPIO 139 */ out32(gpio5 + OMAP2420_GPIO_RISINGDETECT, l << 10); out32(gpio5 + OMAP2420_GPIO_FALLINGDETECT, l << 10); out32(gpio5 + OMAP2420_GPIO_SETIRQENABLE1, l << 10); /* make sure timer has stop */ out32(gpt9 + OMAP3530_GPT_TCLR, 0); /* enabling the interrupt */ out32(gpt9 + OMAP3530_GPT_TIER, 2); //comentar se PWM /* configuring PWM */ out32(gpt9 + OMAP3530_GPT_TCLR, (1<<12) | (1<<10) | (1<<7)); //-- PWM out32(gpio5 + OMAP2420_GPIO_SETDATAOUT, (1 << 11)); printf("Esperando requisições\n"); while (1) { rcvid = MsgReceive(name->chid, &msg, sizeof(msg), NULL); if (rcvid == -1) {/* Error condition, exit */ break; } /* name_open() sends a connect message, must EOK this */ if (msg.hdr.type == _IO_CONNECT) { MsgReply(rcvid, EOK, NULL, 0); continue; } /* Some other QNX IO message was received; reject it */ if (msg.hdr.type > _IO_BASE && msg.hdr.type <= _IO_MAX) { MsgError(rcvid, ENOSYS); continue; } switch (msg.hdr.subtype) { case 0x55: MsgReply(rcvid, EOK, &pincount, sizeof(pincount)); break; case 0x65: MsgReply(rcvid, EOK, &interval, sizeof(interval)); break; case 0x66: interval = msg.data; MsgReply(rcvid, EOK, &interval, sizeof(interval)); break; default: MsgReply(rcvid, EOK, NULL, 0); } } out32(gpt9 + OMAP3530_GPT_TCLR, 0); out32(gpt9 + OMAP3530_GPT_TIER, 0); InterruptDetach (id); InterruptDetach (id2); printf("Fim\n"); return EXIT_SUCCESS; }
static Boolean getTime (ClockDriver *self, TimeInternal *time) { #ifdef __QNXNTO__ static TimerIntData tmpData; int ret; uint64_t delta; double tick_delay; uint64_t clock_offset; struct timespec tp; if(!tDataUpdated) { memset(&tData, 0, sizeof(TimerIntData)); if(ThreadCtl(_NTO_TCTL_IO, 0) == -1) { ERROR(THIS_COMPONENT"QNX: could not give process I/O privileges"); return FALSE; } tData.cps = SYSPAGE_ENTRY(qtime)->cycles_per_sec; tData.ns_per_tick = 1000000000.0 / tData.cps; tData.prev_tsc = ClockCycles(); clock_gettime(CLOCK_REALTIME, &tp); tData.last_clock = timespec2nsec(&tp); ret = InterruptAttach(0, timerIntHandler, &tData, sizeof(TimerIntData), _NTO_INTR_FLAGS_END | _NTO_INTR_FLAGS_TRK_MSK); if(ret == -1) { ERROR(THIS_COMPONENT"QNX: could not attach to timer interrupt"); return FALSE; } tDataUpdated = TRUE; time->seconds = tp.tv_sec; time->nanoseconds = tp.tv_nsec; return; } memcpy(&tmpData, &tData, sizeof(TimerIntData)); delta = ClockCycles() - tmpData.prev_tsc; /* compute time since last clock update */ tick_delay = (double)delta / (double)tmpData.filtered_delta; clock_offset = (uint64_t)(tick_delay * tmpData.ns_per_tick * (double)tmpData.filtered_delta); /* not filtered yet */ if(tData.counter < 2) { clock_offset = 0; } DBGV("QNX getTime cps: %lld tick interval: %.09f, time since last tick: %lld\n", tmpData.cps, tmpData.filtered_delta * tmpData.ns_per_tick, clock_offset); nsec2timespec(&tp, tmpData.last_clock + clock_offset); time->seconds = tp.tv_sec; time->nanoseconds = tp.tv_nsec; return TRUE; #else #if defined(_POSIX_TIMERS) && (_POSIX_TIMERS > 0) struct timespec tp; if (clock_gettime(CLOCK_REALTIME, &tp) < 0) { PERROR(THIS_COMPONENT"clock_gettime() failed, exiting."); exit(0); } time->seconds = tp.tv_sec; time->nanoseconds = tp.tv_nsec; #else struct timeval tv; gettimeofday(&tv, 0); time->seconds = tv.tv_sec; time->nanoseconds = tv.tv_usec * 1000; #endif /* _POSIX_TIMERS */ #endif /* __QNXNTO__ */ return TRUE; }
int _open_PLX9052(int *pci_handle, unsigned int *mmap_io_ptr, int *interrupt_line, int print){ #ifdef __QNX__ volatile unsigned char *BASE0, *BASE1; unsigned flags, lastbus, version, hardware, bus, device; int temp; unsigned pci_index=0; struct _pci_config_regs pci_reg; /* CONNECT TO PCI SERVER */ *pci_handle=pci_attach(flags); if (*pci_handle == -1){ perror("Cannot attach to PCI system"); return -1; } /* CHECK FOR PCI BUS */ temp=pci_present(&lastbus, &version, &hardware); if(temp != PCI_SUCCESS){ perror("Cannot find PCI BIOS"); return -1; } /* FIND DEVICE */ temp=pci_find_device(DEVICE_ID, VENDOR_ID, pci_index, &bus, &device); if(temp != PCI_SUCCESS){ perror("Cannot find GC314-PCI/FS Digital Receiver Card"); return -1; } /* READ THE DEVICE PCI CONFIGURATION */ temp=pci_read_config32(bus, device, 0, 16, (char *)&pci_reg); if(temp != PCI_SUCCESS){ perror("Cannot read from configuration space of the GC314 PCI/FS digital receiver card"); return -1; } BASEIO=(int)pci_reg.Base_Address_Regs[1]-1; /* ALLOW I/O ACCESS ON THIS THREAD */ temp=ThreadCtl(_NTO_TCTL_IO,0); if (temp==-1){ perror("Unable to attach I/O privileges to thread"); return -1; } /* MAP THE IO SPACE TO BE ABLE TO R/W TO PCI IO */ *mmap_io_ptr=(unsigned int *)mmap_device_io(16, pci_reg.Base_Address_Regs[2]); if ((int)mmap_io_ptr == MAP_DEVICE_FAILED){ perror("Device I/O mapping failed"); return -1; } /* TRY TO MEMORY MAP TO THE DEVICE REGISTER SPACE */ //BASE0=mmap_device_memory(0, 256, PROT_EXEC|PROT_READ|PROT_WRITE|PROT_NOCACHE, 0, pci_reg.Base_Address_Regs[0]); //BASE1=mmap_device_memory(0, 1048576, PROT_EXEC|PROT_READ|PROT_WRITE|PROT_NOCACHE, 0, pci_reg.Base_Address_Regs[2]); //if ((BASE0 == MAP_FAILED) | (BASE1 == MAP_FAILED)){ // perror("Device Memory mapping failed"); // return -1; //} /* TRY TO READ PCI DEVICE PARAMETERS */ //pci_write_config16(bus, device, PLX9656_PCIICR, 1, &vPLX9656_PCIICR); //*((uint16*)(BASE0+PLX9656_BIGEND))=vPLX9656_BIGEND; //*((uint16*)(BASE0+PLX9656_BIGEND))=0; //*((uint32*)(BASE0+0x4c))=0x48; //temp=*((uint32*)(BASE0+0x4c)); //printf(" INTCSR is %x\n",temp); //temp=in32(BASEIO+0x4c); //printf(" INTCSR is %x\n",temp); //*BASEA=(int)mmap_io_ptr; //*BASEB=0; *interrupt_line=pci_reg.Interrupt_Line; /* PRINT PLX9656 PARAMETERS */ if (print == 1){ printf(" PCI DEVICE PARAMETERS:\n"); printf(" lastbus= %d\n", lastbus); printf(" version= %d\n", version); printf(" hardware= %d\n", hardware); printf(" bus= %d\n", bus); printf(" device= %d\n", device); printf(" MEMORY ALLOCATION:\n"); printf(" IO Base0= 0x%x\n", pci_reg.Base_Address_Regs[0]); printf(" IO Base1= 0x%x\n", pci_reg.Base_Address_Regs[1]); printf(" IO Base2= 0x%x\n", pci_reg.Base_Address_Regs[2]); } *mmap_io_ptr=pci_reg.Base_Address_Regs[2]-1; return 1; #else return 1; #endif }
void HAWThread::cont() { ThreadCtl(_NTO_TCTL_ONE_THREAD_CONT, (void*) tid_); }
void HAWThread::hold() { ThreadCtl(_NTO_TCTL_ONE_THREAD_HOLD, (void*) tid_); }
int main (int argc, char *argv[]) { int opt = 0, verbose = 0, pin = -1, direction = -1, gpio_module = -1; int cmd = -1; extern char *optarg; // Handle commandline arguments // -m gpio_module The GPIO module. Can be a value from 1 to 6 // -p pin The GPIO pin you want to set // -d direction The direction of the GPIO pin. Can be: 0 (=write)|1(=read) // -c command Action to perform. Can be: set|reset|read while ((opt = getopt(argc, argv, "m:p:d:c:v")) != -1) { switch (opt) { case 'm': gpio_module = strtol(optarg, NULL, 10); if (errno != 0) gpio_module = -1; break; case 'p': pin = strtol(optarg, NULL, 10); if (errno != 0) pin = -1; break; case 'd': direction = strtol(optarg, NULL, 10); if (errno != 0 || direction > 1) direction = -1; if (strcmp(optarg, "write") == 0) direction = 0; else if (strcmp(optarg, "read") == 0) direction = 1; else direction = -1; case 'c': if (strcmp(optarg, "set") == 0) cmd = 0; else if (strcmp(optarg, "reset") == 0) cmd = 1; else if (strcmp(optarg, "read") == 0) cmd = 2; else cmd = -1; break; case 'v': verbose++; break; default: break; } } if (gpio_module != -1 && pin != -1 && direction != -1 && cmd != -1) { /* enable this thread to execute i/o functions... */ ThreadCtl(_NTO_TCTL_IO, 0); //ptr = mmap_device_memory( 0, OMAP35XX_GPIO_SIZE, PROT_READ|PROT_WRITE|PROT_NOCACHE, 0, gpio_base[gpio_module - 1]); ptr = mmap_device_io(OMAP35XX_GPIO_SIZE, gpio_base[gpio_module - 1]); ctrl_ptr = mmap_device_io(OMAP35XX_GPIO_SIZE, CONTROL_PADCONF_MMC2_CLK); if ( (void*)ptr == MAP_FAILED ) { perror( "mmap_device_memory for physical address failed"); exit( EXIT_FAILURE ); } printf("ctrl_ptr %x\n",in32(ctrl_ptr)); //out32(ctrl_ptr, 0x01040000); gpio_set_direction(pin, direction); if (cmd == 0) gpio_set(pin); if (cmd == 1) gpio_reset(pin); if (cmd == 2) printf("0x%x\n",gpio_read(direction, pin)); //munmap_device_memory(gpio_base[gpio_module - 1], OMAP35XX_GPIO_SIZE); munmap_device_io(gpio_base[gpio_module - 1], OMAP35XX_GPIO_SIZE); munmap_device_io(CONTROL_PADCONF_MMC2_CLK, OMAP35XX_GPIO_SIZE); return 0; } else { printf("Illigal commandline options provided, type 'use %s' on the commandline for usage information:\n", argv[0]); return -1; } }