void main(void)
{
WDTCTL = WDTPW + WDTHOLD; // Stop WDT
P1DIR |= 0x02; // P1.1 output
P1SEL |= 0x02; // P1.1 option select
CCTL0 = OUTMOD_4; // CCR0 toggle mode
CCR0 = 500-1;
TACTL = TASSEL_2 + MC_1; // SMCLK, upmode
_BIS_SR(CPUOFF); // CPU off
}
void board_init( void )
{
_BIC_SR( GIE ); /* Disable interrupts during initialization. */
WDTCTL = WDTPW | WDTHOLD; /* Stop WDT */
init_ports( );
init_button_led( );
init_rf( );
_BIS_SR( GIE ); /* Enable interrupts after initialization. */
}
int main(void) {
WDTCTL = WDTPW + WDTHOLD;
P1DIR |= (REDLED | GREENLED | (!BUTTON)); // LEDs out, BUTTON in
manckn430_set_crystal_timer0_a0();
manckn430_set_display(3);
manckn430_enable_button_interrupt();
_BIS_SR(LPM0_bits + GIE); // LPM0 (low power mode) with interrupts enabled
return 0;
}
/*
* main.c
*/
int main(void) {
WDTCTL = WDT_MDLY_32; // Watchdog timer ~ 32ms
IE1 |= WDTIE; // enable watchdog timer interrupt
P1DIR |= BIT6; // Green LED as output
P1SEL |= BIT6; // Green LED controlled by Pulse width modulation
TA0CCR0 = 1000; // PWM period
TA0CCR1 = 1; // PWM duty cycle, time cycle on vs.off
TA0CCTL1 = OUTMOD_7; // TA0CCR1 reset/set -- high voltage below count and low voltage when past
TA0CTL = TASSEL_2 + MC_1; // Timer A control set to SMCLK clock TASSEL_2, 1MHz and count up mode MC_1
_BIS_SR(LPM0_bits + GIE);
return 0;
}
void main(void)
{
WDTCTL = WDTPW + WDTHOLD; // Stop WDT
P1SEL |= 0x0E; // P1.1 - P1.4 option select
P1DIR |= 0x0F; // P1.0 - P1.4 outputs
CCTL0 = OUTMOD_4 + CCIE; // CCR0 toggle, interrupt enabled
CCTL1 = OUTMOD_4 + CCIE; // CCR1 toggle, interrupt enabled
CCTL2 = OUTMOD_4 + CCIE; // CCR2 toggle, interrupt enabled
TACTL = TASSEL_2 + MC_2 + TAIE; // SMCLK, Contmode, int enabled
_BIS_SR(LPM0_bits + GIE); // Enter LPM0 w/ interrupt
}
void main(void)
{
WDTCTL = WDTPW + WDTHOLD; // Stop WDT
P1DIR |= 0x0C; // P1.2 and P1.3 output
P1SEL |= 0x0C; // P1.2 and P1.3 TA1/2 options
CCR0 = 512-1; // PWM Period
CCTL1 = OUTMOD_7; // CCR1 reset/set
CCR1 = 384; // CCR1 PWM duty cycle
TACTL = TASSEL_2 + MC_1; // SMCLK, up mode
_BIS_SR(CPUOFF); // Enter LPM0
}
void main(void)
{
WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer
P1OUT &= ~0x41;
P1DIR |= 0x41; // Set P1.0 and P1.6 to output direction
P1IE |= 0x08; // P1.3 interrupt enabled
P1IES |= 0x08; // P1.3 Hi/lo edge
P1IFG &= ~0x08; // P1.3 IFG cleared
_BIS_SR(LPM4_bits + GIE); // Enter LPM4 w/interrupt
}
void main(void)
{
WDTCTL = WDTPW + WDTHOLD; // Stop WDT
P1DIR |= 0x0C; // P1.2 and P1.3 output
P1SEL |= 0x0C; // P1.2 and P1.3 TA1/2 options // g2231 page32
CCR0 = 128; // PWM Period/2
CCTL1 = OUTMOD_6; // CCR1 toggle/set //user guid page371 368
CCR1 = 32; // CCR1 PWM duty cycle
TACTL = TASSEL_2 + MC_3; // SMCLK, up-down mode
_BIS_SR(LPM0_bits); // Enter LPM0
}
void main(void)
{
WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer
P1DIR = 0x01; // P1.0 output, else input
P1OUT = 0x10; // P1.4 set, else reset
P1REN |= 0x10; // P1.4 pullup
P1IE |= 0x10; // P1.4 interrupt enabled
P1IES |= 0x10; // P1.4 Hi/lo edge
P1IFG &= ~0x10; // P1.4 IFG cleared
_BIS_SR(LPM4_bits + GIE); // Enter LPM4 w/interrupt
}
void main(void)
{
BCSCTL2 |= DIVS_3; // SMCLK/8
WDTCTL = WDT_MDLY_32; // WDT Timer interval
IE1 |= WDTIE; // Enable WDT interrupt
P1DIR |= 0x01; // P1.0 to output direction
SD16CTL = SD16REFON +SD16SSEL_1; // 1.2V ref, SMCLK
SD16INCTL0 = SD16INCH_6; // A6+/-
SD16CCTL0 = SD16SNGL + SD16IE ; // Single conv, interrupt
_BIS_SR(LPM0_bits + GIE); // Enter LPM0 with interrupt
}
void main(void)
{
WDTCTL = WDTPW + WDTHOLD; // Stop WDT
Clock_init();
P4DIR |= 0xff; // P1.0 output
timerA_init();
_BIS_SR(LPM0_bits + GIE); // Enter LPM0 w/ interrupt
}
//setup i2c
void i2cActivate() {
_DINT();
P3SEL |= 0x06; // Assign I2C pins to USCI_B0
UCB0CTL1 |= UCSWRST; // Enable SW reset
UCB0CTL0 = UCMST + UCMODE_3 + UCSYNC; // I2C Master, synchronous mode
UCB0CTL1 = UCSSEL_2 + UCSWRST; // Use SMCLK, keep SW reset
UCB0BR0 = 50; // fSCL = SMCLK/50 = ~80kHz for 4MHz DCO
UCB0BR1 = 0;
UCB0I2CSA = i2caddress; // set slave address
UCB0CTL1 &= ~UCSWRST; // Clear SW reset, resume operation
_BIS_SR(GIE); // General Interrupt Enable
}
void main(void)
{
WDTCTL = WDTPW + WDTHOLD; // Stop WDT
P1DIR |= 0x0C; // P1.2 and P1.3 output
P1SEL |= 0x0C; // P1.2 and P1.3 TA1/2 otions page368
CCR0 = 128; // PWM Period/2
CCTL1 = OUTMOD_6; // CCR1 toggle/set
CCR1 = 32; // CCR1 PWM duty cycle
TACTL = TASSEL_1 + MC_3; // ACLK, up-down mode
_BIS_SR(LPM3_bits); // Enter LPM3
}
int main(void) {
WDTCTL = WDTPW | WDTHOLD; // Stop watchdog timer
//P2REN |= BIT3; // enable pull up resistor on p2.3
//P2OUT |= BIT3; // This does not seem to be working as expected.
// Initialize radio and SPI
TI_CC_SPISetup(); // Initialize SPI port
TI_CC_PowerupResetCCxxxx(); // Reset CCxxxx
writeRFSettings(); // Write RF settings to config reg
TI_CC_SPIWriteBurstReg(TI_CCxxx0_PATABLE, paTable, paTableLen);//Write PATABLE
// Enable interrupts from radio module
TI_CC_GDO0_PxIES |= TI_CC_GDO0_PIN; // Int on falling edge (end of pkt)
TI_CC_GDO0_PxIFG &= ~TI_CC_GDO0_PIN; // Clear flag
TI_CC_GDO0_PxIE |= TI_CC_GDO0_PIN; // Enable int on end of packet
// Enable radio
TI_CC_SPIStrobe(TI_CCxxx0_SRX); // Initialize CCxxxx in RX mode.
// configure packet
// --------------------------------------------
txBuffer[0] = MSGLEN-1; // Packet length
txBuffer[1] = 0x01; // Packet address - If this is 0xFF, it's an ack and not data.
// Begin data
// --------------------------------------------
txBuffer[2] = VALID_LEVEL; // default flag is valid. This is set on request from other module.
txBuffer[3] = 0x30;
txBuffer[4] = 0x31;
txBuffer[5] = 0x34;
txBuffer[6] = 0x35;
txBuffer[7] = 0x36;
txBuffer[8] = 0x37;
txBuffer[9] = 0x38;
txBuffer[10] = 0x39; // the rest of this data is used as filler.
// ------
// End Data
txBuffer[11] = 0x00; // terimate
// --------------------------------------------
_BIS_SR(GIE); // turn on interrupts. Initialization must be complete by this point
while(1) {
if(water_level_request) {
// Ideally, P2.3 should be pulled high. This is causing strange behavior
// on the pin that should be investigated.
// Check the status of P2.3 and set the r
txBuffer[WATER_DATA_TX_INDEX] = (P2IN & BIT3) ? 0 : VALID_LEVEL;// turn on the pump if the water level is valid.
RFSendPacket(txBuffer, MSGLEN); // Send water level data back to controller
__delay_cycles(450000); // delay a few cycles. Note that this means requests that take place during
// a pump cycle will be ignored completely.
water_level_request = 0; // clear requested data flag
}
}
}
void main(void)
{
WDTCTL = WDTPW + WDTHOLD; // Stop the Watch dog
//------------------- Configure the Clocks -------------------//
if (CALBC1_1MHZ==0xFF) // If calibration constant erased
{
while(1); // do not load, trap CPU!!
}
DCOCTL = 0; // Select lowest DCOx and MODx settings
BCSCTL1 = CALBC1_1MHZ; // Set range
DCOCTL = CALDCO_1MHZ; // Set DCO step + modulation
//------------------- Configure the Ports -------------------//
// Setting the UART function for P1.1 & P1.2
P1SEL |= BIT1 + BIT2; // P1.1 UCA0RXD input
P1SEL2 |= BIT1 + BIT2; // P1.2 UCA0TXD output
// Setting the ports for MAX485 control
P1DIR |= BIT7; // P1.7-> DE Output
P2DIR |= BIT5; // P2.5 -> ~RE Output
P1OUT &= ~BIT7; // P1.7 = 0
P2OUT &= ~BIT5; // P2.5 = 0, Receive Mode
//LED control for RS485
P2DIR = 0xFF; // Port 2 all pins output
P2OUT = 0x00;
P2OUT &= ~BIT1; //Switch off P2.1 LED
P2OUT &= ~BIT2; //Switch off P2.2 LED
P2OUT &= ~BIT0 + BIT6; // Both motors Off,P2.0 = P2.6 = 0,
//-------------- Configure USCI_A0 in UART mode --------------//
UCA0CTL1 |= UCSSEL_2 + UCSWRST; // USCI Clock = SMCLK,USCI_A0 disabled
UCA0BR0 = 104; // 104 From datasheet table-
UCA0BR1 = 0; // -selects baudrate =9600,clk = SMCLK
UCA0MCTL = UCBRS_6; // Modulation value = 6 from datasheet
UCA0CTL1 &= ~UCSWRST; // Clear UCSWRST to enable USCI_A0
//-------------- Configure USCI_A0 interrupts --------------//
IE2 |= UCA0RXIE; //Enable Recieve interrupt
_BIS_SR(LPM0_bits + GIE); // Going to LPM0
}//end of main()
int main(void)
{
WDTCTL = WDTPW | WDTHOLD;
/* configure P2.6 and P2.7 as XIN/XOUT function pins */
P2DIR &= ~BIT6;
P2DIR |= BIT7;
P2SEL |= BIT7 | BIT6;
/* 32kHz external crystal, XCAP = 12.5pF, clear LFXT1 osc fault */
BCSCTL3 |= XCAP0 | XCAP1;
BCSCTL3 &= ~(LFXT1S0 | LFXT1S1);
/* enable ACLK function of P1.0 (32KHz clock output) */
P1DIR |= BIT0;
P1SEL |= BIT0;
spi_init();
/* to save space, since we do it in the interrupt anyway */
P1DIR |= DISPLAY_SUPPLY;
P1OUT |= DISPLAY_SUPPLY;
#if 0
display_puts("MSP430", 0);
display_puts("123456", 1);
#endif
display_init(1);
delay_ms(100);
display_update(1);
/* enable falling edge interrupt for BUSY1 of the display, which
* becomes low when the display content has been updated */
P1IE |= DISPLAY_BUSY1;
P1IES |= DISPLAY_BUSY1;
/* Timer A: input divider /8, ACLK clock source, UP mode */
TACTL = ID_3 | TASSEL_1 | MC_3;
/* enable the TACCR0 compare interrupt */
TACCTL0 = CCIE;
/* load TACCR0, starts timer. (32768Hz / 8) * 15 = 61440, so the
* timer interrupt fires every 15 seconds */
TACCR0 = 61440 - 1;
/* enable global interrupts and enter LPM3 */
_BIS_SR(LPM3_bits + GIE);
while (1) { };
}
void main(void)
{
WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer
SD16CTL = SD16REFON; // 1.2V ref
DAC12_0CTL = DAC12OPS + DAC12SREF_2 + DAC12AMP_5 + DAC12ENC;
// DAC o/p external, Ref Voltage = internal (SD16),
// Enable conversion
DAC12_0DAT = 0x471; // 1V
_BIS_SR(LPM4_bits); // Enter LPM4
} // main
void main(void)
{
WDTCTL = WDTPW + WDTHOLD;
P1SEL &= ~0x08;
P1DIR &= ~0x08;
P1REN |= 0x08;
P1IE |= 0x08;
P1IFG &= ~0x08;
_BIS_SR(GIE);
while(1) i++;
}
void main(void)
{
WDTCTL = WDTPW+WDTHOLD; // Stop WDT
FLL_CTL0 |= XCAP14PF; // Configure load caps
MPY = 0x12; // Load first operand -unsigned mult
OP2 = 0x56; // Load second operand
MAC = 0x12; // Load first operand -unsigned MAC
OP2 = 0x56; // Load second operand
_BIS_SR(LPM4_bits); // LPM4
}
void main (void)
{
WDTCTL = WDTPW + WDTHOLD; // Stop WDT
P3SEL |= 0x0A; // Select I2C pins
U0CTL |= I2C + SYNC; // Recommended init procedure
U0CTL &= ~I2CEN; // Recommended init procedure
I2CTCTL |= I2CSSEL1; // SMCLK
I2COA = 0x0048; // Own Address is 048h
I2CIE = RXRDYIE; // Enable RXRDYIFG interrupt
U0CTL |= I2CEN; // Enable I2C
_BIS_SR(LPM0_bits + GIE); // Enter LPM0 w/ interrupt
}
int main(void)
{
WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer
P1DIR |= BIT0; // Set P1.0 to output direction
P1IE |= BIT3; // P1.3 interrupt enabled
P1IES |= BIT3; // P1.3 Hi/lo edge
P1REN |= BIT3; // Enable Pull Up on SW2 (P1.3)
P1IFG &= ~BIT3; // P1.3 IFG cleared
//BIT3 on Port 1 can be used as Switch2
_BIS_SR(LPM4_bits + GIE); // Enter LPM4 w/interrupt
}
void main(void)
{
WDTCTL = WDTPW + WDTHOLD; // Stop WDT
BCSCTL2 = 0; //MCLK = DCOCLK, SMCLK=DCOCLK, = EXT CRYTAL 32.768KHZ
P4DIR |= 0x01; // P4.0 output
TBCCTL0 = CCIE; // CCR0 interrupt enabled
TBCCR0 = 50000;
TBCTL = TBSSEL_1 + MC_2; // SMCLK, contmode
_BIS_SR(LPM0_bits + GIE); // Enter LPM0 w/ interrupt
}
void main(void)
{
WDTCTL=WDTPW+WDTHOLD;
P1DIR |= (LED1+LED2);//
P1OUT &= ~(LED1+LED2);
P1IE |= BUTTON;
P1IFG &= ~BUTTON;
//__enable_interrupt();//enable all interrupts
_BIS_SR(LPM4_bits+GIE);
for(;;)
{}
}
/*
* ======== main ========
*/
void main(int argc, char *argv[])
{
CSL_init();
while(1)
{
int i;
_BIS_SR(LPM3_bits + GIE); // Enter LPM3
P1OUT |= 0x01; // Set P1.0 LED on
for (i = 5000; i>0; i--); // Delay
P1OUT &= ~0x01; // Reset P1.0 LED off
}
}
// This will drift and will require calibration – ok for testing though.
//#define TICKS_PER_SECOND 2500
void wait(int delay)
{
WDTCTL = WDTPW + WDTHOLD; // Stop WDT
IE2 |= BTIE; // Enable BT interrupt
BTCTL = 0x00+BTDIV+BTIP2+BTIP1+BTIP0; // Divide System clock by 256//removing BTSSEL from above to select ACLK
_EINT(); // Enable interrupts
for (d = delay; d > 0;)
{
IE2 |= BTIE; // Enable BT interrupt
_BIS_SR(CPUOFF+ GIE);
__no_operation(); // Required only for C-spy
}
}
void main(void)
{
WDTCTL = WDTPW + WDTHOLD; // Stop watchdog
P1DIR |= 0x03; // P1.0/1.1 output
DMACTL0 = DMA0TSEL_1; // CCR2IFG trigger
DMA0SA = (unsigned int)testconst; // Source block address
DMA0DA = (unsigned int) &P1OUT; // Dest single address
DMA0SZ = sizeof testconst; // Block size
DMA0CTL = DMADT_4 + DMASRCINCR_3 + DMASBDB + DMAEN; // Rpt, inc src, enable
TACTL = TASSEL_2 + MC_2; // SMCLK, cont-mode
_BIS_SR(LPM0_bits); // Enter LPM0
}
/**
* Application idle hook. Set proper power mode.
*
*/
void vApplicationIdleHook( void )
{
for(;;)
{
#ifdef HAVE_IDLE_VIEW
P5DIR |= 1;
P5OUT |= 1;
#endif
switch (power_current)
{
case POWER_LPM4:
_BIS_SR(GIE+CPUOFF+SCG1+SCG0+OSCOFF);
break;
case POWER_LPM3:
_BIS_SR(GIE+CPUOFF+SCG1+SCG0);
break;
case POWER_LPM2:
_BIS_SR(GIE+CPUOFF+SCG1);
break;
case POWER_LPM1:
_BIS_SR(GIE+CPUOFF+SCG0);
break;
case POWER_LPM0:
_BIS_SR(GIE+CPUOFF);
break;
default:
break;
}
#ifdef HAVE_IDLE_VIEW
P5OUT &= ~1;
#endif
taskYIELD();
}
}
////////////////////////////////////////////////////////////////
// MAIN //
////////////////////////////////////////////////////////////////
void main(void)
{ WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer
UART_Initialize(); //Initialize UART /* Initialize Timer A to measure 1/10 sec */
TACTL = TASSEL_2 + MC_1+ ID_3; // Select smclk/8 and up mode
TACCR0 = 13107; // 100ms interval
TACCTL0 = CCIE; // Capture/compare interrupt enable
P5DIR |= 0x02;
while(1) // Infinite loop
{
_BIS_SR(LPM0_bits + GIE); // Enter LPM0 w/ interrupts
SendTime(); // Send Time to HyperTerminal
}
}
int main(void)
{
WDTCTL = WDTPW | WDTHOLD; // Stop watchdog timer
bitbang_initialise();
/*write to all the needed registers and configure their values*/
regwrite2();
regwrite9();
regwrite13();
regwrite1();
__delay_cycles(10000);
regwrite3();
regwrite6();
regwrite5();
__delay_cycles(10000);
regwrite11();
regwrite12();
regwrite0();
__delay_cycles(10000);
regwrite4();
regwrite10();
/* now in Tx Mode */
init_reception();
/* initialise the gpio pins required for initiating the reception mode*/
P2IE |= SWD_BIT; //interupt set on SWD
P2IES &= ~SWD_BIT; //LOW TO HIGH EDGE SELECTED
_BIS_SR(GIE); // Enter w/interrupt
/* else,
while(!(swd pin & swd bit); - waits for swd pin to go high
run the loop
*/
return 0;
}
void main(void)
{
WDTCTL = WDTPW + WDTHOLD; // Stop the Watch dog
char Text[50] = "Hello From MSP430\n";
char Count = 0;
//------------------- Configure the Clocks -------------------//
if (CALBC1_1MHZ==0xFF) // If calibration constant erased
{
while(1); // do not load, trap CPU!!
}
DCOCTL = 0; // Select lowest DCOx and MODx settings
BCSCTL1 = CALBC1_1MHZ; // Set range
DCOCTL = CALDCO_1MHZ; // Set DCO step + modulation
//------------ Configuring MAX485 Control Lines ---------------//
P1DIR |= BIT7; // P1.7-> DE Output
P2DIR |= BIT5; // P2.5 -> ~RE Output
//--------- Setting the UART function for P1.1 & P1.2 ---------//
P1DIR |= BIT1 + BIT2;
P1SEL |= BIT1 + BIT2; // P1.1 UCA0RXD input
P1SEL2 |= BIT1 + BIT2; // P1.2 UCA0TXD output
//------------ Configuring the UART(USCI_A0) ----------------//
UCA0CTL1 |= UCSSEL_2 + UCSWRST; // USCI Clock = SMCLK,USCI_A0 disabled
UCA0BR0 = 104; // 104 From datasheet table-
UCA0BR1 = 0; // -selects baudrate =9600,clk = SMCLK
UCA0MCTL = UCBRS_1; // Modulation value = 1 from datasheet
UCA0CTL1 &= ~UCSWRST; // Clear UCSWRST to enable USCI_A0
//----------------- Put MAX485 in Transmit Mode ---------------//
P1OUT |= BIT7; // P1.7-> DE high -> Transmit
P2OUT |= BIT5; // P2.5 -> ~RE High-> Receive Disabled
while(Text[Count] != '\0')
{
while(!(UCA0TXIFG & IFG2));
UCA0TXBUF = Text[Count];
Count++;
}
_BIS_SR(LPM0_bits + GIE); // Going to LPM0
}
