void __init at91sam9261_initialize(unsigned long main_clock)
{
	/* Map peripherals */
	iotable_init(at91sam9261_io_desc, ARRAY_SIZE(at91sam9261_io_desc));

	if (cpu_is_at91sam9g10())
		iotable_init(at91sam9g10_sram_desc, ARRAY_SIZE(at91sam9g10_sram_desc));
	else
		iotable_init(at91sam9261_sram_desc, ARRAY_SIZE(at91sam9261_sram_desc));


	at91_arch_reset = at91sam9261_reset;
	pm_power_off = at91sam9261_poweroff;
	at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1)
			| (1 << AT91SAM9261_ID_IRQ2);

	/* Init clock subsystem */
	at91_clock_init(main_clock);

	/* Register the processor-specific clocks */
	at91sam9261_register_clocks();

	/* Register GPIO subsystem */
	at91_gpio_init(at91sam9261_gpio, 3);
}
Example #2
0
void __init at91sam9x5_initialize(void)
{
	at91_extern_irq = (1 << AT91SAM9X5_ID_IRQ0);

	/* Register GPIO subsystem (using DT) */
	at91_gpio_init(NULL, 0);
}
Example #3
0
static void __init at91sam9263_initialize(void)
{
	arm_pm_idle = at91sam9_idle;
	arm_pm_restart = at91sam9_alt_restart;

	/* Register GPIO subsystem */
	at91_gpio_init(at91sam9263_gpio, 5);
}
Example #4
0
static void __init at91sam9g45_initialize(void)
{
	at91_arch_reset = at91sam9g45_reset;
	pm_power_off = at91sam9g45_poweroff;
	at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0);

	/* Register GPIO subsystem */
	at91_gpio_init(at91sam9g45_gpio, 5);
}
Example #5
0
static void __init at91sam9260_initialize(void)
{
	arm_pm_restart = at91sam9_alt_restart;
	at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
			| (1 << AT91SAM9260_ID_IRQ2);

	/* Register GPIO subsystem */
	at91_gpio_init(at91sam9260_gpio, 3);
}
static void __init at91sam9g45_initialize(void)
{
	arm_pm_idle = at91sam9_idle;
	arm_pm_restart = at91sam9g45_restart;
	at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0);

	/*                         */
	at91_gpio_init(at91sam9g45_gpio, 5);
}
Example #7
0
static void __init at91sam9rl_initialize(void)
{
	at91_arch_reset = at91sam9_alt_reset;
	pm_power_off = at91sam9rl_poweroff;
	at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0);

	/* Register GPIO subsystem */
	at91_gpio_init(at91sam9rl_gpio, 4);
}
Example #8
0
static void __init at91sam9263_initialize(void)
{
	arm_pm_idle = at91sam9_idle;
	arm_pm_restart = at91sam9_alt_restart;
	at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1);

	
	at91_gpio_init(at91sam9263_gpio, 5);
}
Example #9
0
static void __init at91sam9rl_initialize(void)
{
	arm_pm_idle = at91sam9_idle;
	arm_pm_restart = at91sam9_alt_restart;
	at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0);

	/* Register GPIO subsystem */
	at91_gpio_init(at91sam9rl_gpio, 4);
}
Example #10
0
static void __init at91rm9200_initialize(void)
{
	arm_pm_idle = at91rm9200_idle;
	arm_pm_restart = at91rm9200_restart;

	/* Initialize GPIO subsystem */
	at91_gpio_init(at91rm9200_gpio,
		cpu_is_at91rm9200_bga() ? AT91RM9200_BGA : AT91RM9200_PQFP);
}
Example #11
0
static void __init at91sam9261_initialize(void)
{
	arm_pm_idle = at91sam9_idle;
	arm_pm_restart = at91sam9_alt_restart;

	at91_sysirq_mask_rtt(AT91SAM9261_BASE_RTT);

	/* Register GPIO subsystem */
	at91_gpio_init(at91sam9261_gpio, 3);
}
Example #12
0
static void __init at91sam9g45_initialize(void)
{
	arm_pm_idle = at91sam9_idle;
	arm_pm_restart = at91sam9g45_restart;

	at91_sysirq_mask_rtc(AT91SAM9G45_BASE_RTC);
	at91_sysirq_mask_rtt(AT91SAM9G45_BASE_RTT);

	/* Register GPIO subsystem */
	at91_gpio_init(at91sam9g45_gpio, 5);
}
Example #13
0
static void __init at91sam9260_initialize(void)
{
	arm_pm_idle = at91sam9_idle;
	arm_pm_restart = at91sam9_alt_restart;
	at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
			| (1 << AT91SAM9260_ID_IRQ2);

	at91_sysirq_mask_rtt(AT91SAM9260_BASE_RTT);

	/* Register GPIO subsystem */
	at91_gpio_init(at91sam9260_gpio, 3);
}
Example #14
0
static void __init at91rm9200_initialize(void)
{
	at91_arch_reset = at91rm9200_reset;
	at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1)
			| (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3)
			| (1 << AT91RM9200_ID_IRQ4) | (1 << AT91RM9200_ID_IRQ5)
			| (1 << AT91RM9200_ID_IRQ6);

	/* Initialize GPIO subsystem */
	at91_gpio_init(at91rm9200_gpio,
		cpu_is_at91rm9200_bga() ? AT91RM9200_BGA : AT91RM9200_PQFP);
}
Example #15
0
static void __init at91rm9200_initialize(void)
{
	arm_pm_idle = at91rm9200_idle;
	arm_pm_restart = at91rm9200_restart;
	at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1)
			| (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3)
			| (1 << AT91RM9200_ID_IRQ4) | (1 << AT91RM9200_ID_IRQ5)
			| (1 << AT91RM9200_ID_IRQ6);

	
	at91_gpio_init(at91rm9200_gpio,
		cpu_is_at91rm9200_bga() ? AT91RM9200_BGA : AT91RM9200_PQFP);
}
Example #16
0
static void __init at91cap9_initialize(void)
{
	arm_pm_restart = at91sam9g45_restart;
	at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1);

	/* Register GPIO subsystem */
	at91_gpio_init(at91cap9_gpio, 4);

	/* Remember the silicon revision */
	if (cpu_is_at91cap9_revB())
		system_rev = 0xB;
	else if (cpu_is_at91cap9_revC())
		system_rev = 0xC;
}
Example #17
0
static void __init at91cap9_initialize(void)
{
	at91_arch_reset = at91cap9_reset;
	pm_power_off = at91cap9_poweroff;
	at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1);

	/* Register GPIO subsystem */
	at91_gpio_init(at91cap9_gpio, 4);

	/* Remember the silicon revision */
	if (cpu_is_at91cap9_revB())
		system_rev = 0xB;
	else if (cpu_is_at91cap9_revC())
		system_rev = 0xC;
}
void __init at91sam9263_initialize(unsigned long main_clock)
{
	at91_arch_reset = at91sam9_alt_reset;
	pm_power_off = at91sam9263_poweroff;
	at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1);

	/* Init clock subsystem */
	at91_clock_init(main_clock);

	/* Register the processor-specific clocks */
	at91sam9263_register_clocks();

	/* Register GPIO subsystem */
	at91_gpio_init(at91sam9263_gpio, 5);
}
void __init at91sam9263_initialize(unsigned long main_clock)
{
	
	iotable_init(at91sam9263_io_desc, ARRAY_SIZE(at91sam9263_io_desc));

	at91_arch_reset = at91sam9263_reset;
	pm_power_off = at91sam9263_poweroff;
	at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1);

	
	at91_clock_init(main_clock);

	
	at91sam9263_register_clocks();

	
	at91_gpio_init(at91sam9263_gpio, 5);
}
Example #20
0
void __init at572d940hf_initialize(unsigned long main_clock)
{
	/* Map peripherals */
	iotable_init(at572d940hf_io_desc, ARRAY_SIZE(at572d940hf_io_desc));

	at91_arch_reset = at572d940hf_reset;
	at91_extern_irq = (1 << AT572D940HF_ID_IRQ0) | (1 << AT572D940HF_ID_IRQ1)
			| (1 << AT572D940HF_ID_IRQ2);

	/* Init clock subsystem */
	at91_clock_init(main_clock);

	/* Register the processor-specific clocks */
	at572d940hf_register_clocks();

	/* Register GPIO subsystem */
	at91_gpio_init(at572d940hf_gpio, 3);
}
Example #21
0
void __init at91rm9200_initialize(unsigned long main_clock)
{
	at91_arch_reset = at91rm9200_reset;
	at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1)
			| (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3)
			| (1 << AT91RM9200_ID_IRQ4) | (1 << AT91RM9200_ID_IRQ5)
			| (1 << AT91RM9200_ID_IRQ6);

	/* Init clock subsystem */
	at91_clock_init(main_clock);

	/* Register the processor-specific clocks */
	at91rm9200_register_clocks();

	/* Initialize GPIO subsystem */
	at91_gpio_init(at91rm9200_gpio,
		cpu_is_at91rm9200_bga() ? AT91RM9200_BGA : AT91RM9200_PQFP);
}
Example #22
0
/* --------------------------------------------------------------------
 *  AT91RM9200 processor initialization
 * -------------------------------------------------------------------- */
void __init at91rm9200_initialize(unsigned long main_clock, unsigned short banks)
{
    /* Map peripherals */
    iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc));

    at91_arch_reset = at91rm9200_reset;
    at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1)
            | (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3)
            | (1 << AT91RM9200_ID_IRQ4) | (1 << AT91RM9200_ID_IRQ5)
            | (1 << AT91RM9200_ID_IRQ6);

    /* Init clock subsystem */
    at91_clock_init(main_clock);

    /* Register the processor-specific clocks */
    at91rm9200_register_clocks();

    /* Initialize GPIO subsystem */
    at91_gpio_init(at91rm9200_gpio, banks);
}
void __init at91cap9_initialize(unsigned long main_clock)
{
    at91_arch_reset = at91cap9_reset;
    pm_power_off = at91cap9_poweroff;
    at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1);

    /* Init clock subsystem */
    at91_clock_init(main_clock);

    /* Register the processor-specific clocks */
    at91cap9_register_clocks();

    /* Register GPIO subsystem */
    at91_gpio_init(at91cap9_gpio, 4);

    /* Remember the silicon revision */
    if (cpu_is_at91cap9_revB())
        system_rev = 0xB;
    else if (cpu_is_at91cap9_revC())
        system_rev = 0xC;
}