Example #1
0
static void __init wnr2200_setup(void)
{
    u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);

    ath79_register_mdio(0, 0x0);

    ath79_init_mac(ath79_eth0_data.mac_addr, art+WNR2200_MAC0_OFFSET, 0);
    ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
    ath79_eth0_data.speed = SPEED_100;
    ath79_eth0_data.duplex = DUPLEX_FULL;

    ath79_init_mac(ath79_eth1_data.mac_addr, art+WNR2200_MAC1_OFFSET, 0);
    ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
    ath79_eth1_data.phy_mask = 0x10;

    ath79_register_eth(0);
    ath79_register_eth(1);

    ath79_register_m25p80(NULL);
    ap91_pci_init(art + WNR2200_PCIE_CALDATA_OFFSET,
                  art + WNR2200_MAC1_OFFSET);

    ath79_register_leds_gpio(-1, ARRAY_SIZE(wnr2200_leds_gpio),
                             wnr2200_leds_gpio);

    /* enable power for the USB port */
    gpio_request_one(WNR2200_GPIO_USB_POWER,
                     GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
                     "USB power");

    ath79_register_usb();
}
Example #2
0
static void __init cf_e385ac_setup(void)
{
	u8 *mac = (u8 *) KSEG1ADDR(0x1f040000);

	cf_e38xac_common_setup(0x40000);

	ath79_register_leds_gpio(-1, ARRAY_SIZE(cf_e385ac_leds_gpio),
				 cf_e385ac_leds_gpio);

	mdiobus_register_board_info(cf_e385ac_mdio0_info,
				    ARRAY_SIZE(cf_e385ac_mdio0_info));
	ath79_register_mdio(0, 0x0);

	ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);

	/* QCA9558 GMAC0 is connected to RMGII interface */
	ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
	ath79_eth0_data.phy_mask = BIT(0);
	ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
	ath79_eth0_pll_data.pll_1000 = 0x96000000;

	ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
	ath79_register_eth(0);

	/* QCA9558 GMAC1 is connected to SGMII interface */
	ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
	ath79_eth1_data.speed = SPEED_1000;
	ath79_eth1_data.duplex = DUPLEX_FULL;
	ath79_eth1_pll_data.pll_1000 = 0x03000101;

	ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1);
	ath79_register_eth(1);
}
Example #3
0
static void __init antminer_s1_setup(void)
{
	u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
	u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);

	/* disable PHY_SWAP and PHY_ADDR_SWAP bits */
	ath79_setup_ar933x_phy4_switch(false, false);

	ath79_register_leds_gpio(-1, ARRAY_SIZE(ANTMINER_S1_leds_gpio),
				 ANTMINER_S1_leds_gpio);

	ath79_register_gpio_keys_polled(-1, ANTMINER_S1_KEYSPOLL_INTERVAL,
					ARRAY_SIZE(ANTMINER_S1_GPIO_keys),
					ANTMINER_S1_GPIO_keys);

	gpio_request_one(ANTMINER_S1_GPIO_USB_POWER,
			 GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
			 "USB power");
	ath79_register_usb();

	ath79_register_m25p80(&ANTMINER_S1_flash_data);
	ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
	ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1);

	ath79_register_mdio(0, 0x0);
	ath79_register_eth(0);
	ath79_register_eth(1);

	ath79_register_wmac(ee, mac);
}
static void __init anonabox_pro_setup(void)
{
	u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);

	ath79_register_m25p80(NULL);

	anonabox_pro_gpio_led_setup();

	ath79_register_usb();

	ath79_register_wmac(art + ANONABOX_PRO_WMAC_CALDATA_OFFSET, NULL);

	ath79_register_mdio(0, 0x0);
	ath79_register_mdio(1, 0x0);

	ath79_init_mac(ath79_eth0_data.mac_addr, art + ANONABOX_PRO_MAC0_OFFSET, 0);
	ath79_init_mac(ath79_eth1_data.mac_addr, art + ANONABOX_PRO_MAC1_OFFSET, 0);

	/* WAN port */
	ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
	ath79_eth0_data.speed = SPEED_100;
	ath79_eth0_data.duplex = DUPLEX_FULL;
	ath79_eth0_data.phy_mask = BIT(4);
	ath79_register_eth(0);

	/* LAN ports */
	ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
	ath79_eth1_data.speed = SPEED_1000;
	ath79_eth1_data.duplex = DUPLEX_FULL;
	ath79_switch_data.phy_poll_mask |= BIT(4);
	ath79_switch_data.phy4_mii_en = 1;
	ath79_register_eth(1);
}
Example #5
0
static void __init wnr2000_setup(void)
{
	u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000);

	ath79_register_mdio(0, 0x0);

	ath79_init_mac(ath79_eth0_data.mac_addr, eeprom, 0);
	ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
	ath79_eth0_data.speed = SPEED_100;
	ath79_eth0_data.duplex = DUPLEX_FULL;
	ath79_eth0_data.has_ar8216 = 1;

	ath79_init_mac(ath79_eth1_data.mac_addr, eeprom, 1);
	ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
	ath79_eth1_data.phy_mask = 0x10;

	ath79_register_eth(0);
	ath79_register_eth(1);

	ath79_register_m25p80(&wnr2000_flash_data);

	ath79_register_leds_gpio(-1, ARRAY_SIZE(wnr2000_leds_gpio),
				 wnr2000_leds_gpio);

	ath79_register_gpio_keys_polled(-1, WNR2000_KEYS_POLL_INTERVAL,
					ARRAY_SIZE(wnr2000_gpio_keys),
					wnr2000_gpio_keys);

	ath79_register_wmac(eeprom, NULL);
}
Example #6
0
static void __init ubnt_unifi_outdoor_plus_setup(void)
{
	u8 *mac1 = (u8 *) KSEG1ADDR(0x1fff0000);
	u8 *mac2 = (u8 *) KSEG1ADDR(0x1fff0000 + ETH_ALEN);
	u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);

	ath79_register_m25p80(NULL);

	ath79_register_mdio(0, ~(UBNT_UNIFIOD_PRI_PHYMASK |
				 UBNT_UNIFIOD_2ND_PHYMASK));

	ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0);
	ath79_init_mac(ath79_eth1_data.mac_addr, mac2, 0);
	ath79_register_eth(0);
	ath79_register_eth(1);

	ap91_pci_init(ee, NULL);

	ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_unifi_outdoor_plus_leds_gpio),
				 ubnt_unifi_outdoor_plus_leds_gpio);

	ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL,
                                        ARRAY_SIZE(ubnt_xm_gpio_keys),
                                        ubnt_xm_gpio_keys);
}
Example #7
0
static void __init rb2011_setup(void)
{
	rb2011_gpio_init();

	ath79_register_m25p80(&rb2011_spi_flash_data);
	rb2011_nand_init();

	rb2011_gmac_setup();

	ath79_register_mdio(1, 0x0);
	ath79_register_mdio(0, 0x0);

	mdiobus_register_board_info(rb2011_mdio0_info,
				    ARRAY_SIZE(rb2011_mdio0_info));

	/* GMAC0 is connected to an ar8327 switch */
	ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0);
	ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
	ath79_eth0_data.phy_mask = BIT(0);
	ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
	ath79_eth0_pll_data.pll_1000 = 0x06000000;

	ath79_register_eth(0);

	/* GMAC1 is connected to the internal switch */
	ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 5);
	ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
	ath79_eth1_data.speed = SPEED_1000;
	ath79_eth1_data.duplex = DUPLEX_FULL;

	ath79_register_eth(1);
}
Example #8
0
static void __init om2p_setup(void)
{
	u8 *mac1 = (u8 *)KSEG1ADDR(0x1ffc0000);
	u8 *mac2 = (u8 *)KSEG1ADDR(0x1ffc0000 + ETH_ALEN);
	u8 *ee = (u8 *)KSEG1ADDR(0x1ffc1000);

	ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN |
				    AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN |
				    AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN |
				    AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN |
				    AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN);

	ath79_register_m25p80(&om2p_flash_data);

	ath79_register_mdio(0, ~OM2P_WAN_PHYMASK);

	ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0);
	ath79_init_mac(ath79_eth1_data.mac_addr, mac2, 0);

	ath79_register_eth(0);
	ath79_register_eth(1);

	ap91_pci_init(ee, NULL);

	ath79_register_leds_gpio(-1, ARRAY_SIZE(om2p_leds_gpio),
				 om2p_leds_gpio);

	ath79_register_gpio_keys_polled(-1, OM2P_KEYS_POLL_INTERVAL,
					ARRAY_SIZE(om2p_gpio_keys),
					om2p_gpio_keys);
}
Example #9
0
static void __init rb750_setup(void)
{
	ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN |
				     AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN |
				     AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN |
				     AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN |
				     AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN);

	ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0);
	ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1);

	ath79_register_mdio(0, 0x0);

	/* LAN ports */
	ath79_register_eth(1);

	/* WAN port */
	ath79_register_eth(0);

	rb750_leds_data.num_leds = ARRAY_SIZE(rb750_leds);
	rb750_leds_data.leds = rb750_leds;
	rb750_leds_data.latch_change = rb750_latch_change;
	platform_device_register(&rb750_leds_device);

	rb750_nand_data.nce_line = RB750_NAND_NCE;
	rb750_nand_data.enable_pins = rb750_nand_enable_pins;
	rb750_nand_data.disable_pins = rb750_nand_disable_pins;
	rb750_nand_data.latch_change = rb750_latch_change;
	platform_device_register(&rb750_nand_device);
}
Example #10
0
static void __init tew673gru_wlan_init(void)
{
	u8 mac1[ETH_ALEN], mac2[ETH_ALEN];
	u8 *caldata;

	caldata = (u8 *) KSEG1ADDR(TEW673GRU_CAL_LOCATION_0);
	if (!tew673gru_is_caldata_valid(caldata)) {
		caldata = (u8 *)KSEG1ADDR(TEW673GRU_CAL_LOCATION_1);
		if (!tew673gru_is_caldata_valid(caldata)) {
			pr_err("no calibration data found\n");
			return;
		}
	}

	ath79_parse_ascii_mac(caldata + TEW673GRU_MAC0_OFFSET, mac1);
	ath79_parse_ascii_mac(caldata + TEW673GRU_MAC1_OFFSET, mac2);

	ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 2);
	ath79_init_mac(ath79_eth1_data.mac_addr, mac1, 3);

	ap9x_pci_setup_wmac_led_pin(0, 5);
	ap9x_pci_setup_wmac_led_pin(1, 5);

	ap94_pci_init(caldata + TEW673GRU_CAL0_OFFSET, mac1,
		      caldata + TEW673GRU_CAL1_OFFSET, mac2);
}
Example #11
0
static void __init whrhpg300n_setup(void)
{
	u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
	u8 *mac = (u8 *) KSEG1ADDR(ee + WHRHPG300N_MAC_OFFSET);

	ath79_register_m25p80(NULL);

	ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN |
				    AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN |
				    AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN |
				    AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN |
				    AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN);

	ath79_register_leds_gpio(-1, ARRAY_SIZE(whrhpg300n_leds_gpio),
				 whrhpg300n_leds_gpio);

	ath79_register_gpio_keys_polled(-1, WHRHPG300N_KEYS_POLL_INTERVAL,
					ARRAY_SIZE(whrhpg300n_gpio_keys),
					whrhpg300n_gpio_keys);

	ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
	ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1);

	ath79_register_mdio(0, 0x0);

	/* LAN ports */
	ath79_register_eth(1);
	/* WAN port */
	ath79_register_eth(0);

	ap9x_pci_setup_wmac_led_pin(0, 1);

	ap91_pci_init(ee, mac);
}
Example #12
0
static void __init alfa_ap96_init(void)
{
	alfa_ap96_gpio_setup();

	ath79_register_mdio(0, ~ALFA_AP96_MDIO_PHYMASK);

	ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0);
	ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
	ath79_eth0_data.phy_mask = ALFA_AP96_WAN_PHYMASK;
	ath79_eth1_pll_data.pll_1000 = 0x110000;

	ath79_register_eth(0);

	ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1);
	ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
	ath79_eth1_data.phy_mask = ALFA_AP96_LAN_PHYMASK;
	ath79_eth1_pll_data.pll_1000 = 0x110000;

	ath79_register_eth(1);

	ath79_register_pci();
	ath79_register_spi(&alfa_ap96_spi_data, alfa_ap96_spi_info,
			   ARRAY_SIZE(alfa_ap96_spi_info));

	ath79_register_gpio_keys_polled(-1, ALFA_AP96_KEYS_POLL_INTERVAL,
					 ARRAY_SIZE(alfa_ap96_gpio_keys),
					 alfa_ap96_gpio_keys);
	ath79_register_usb();
}
Example #13
0
static void __init som9331_setup(void)
{
    u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
    u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);

    ath79_setup_ar933x_phy4_switch(true, true);

    ath79_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN |
                    AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN |
                    AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN |
                    AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN |
                    AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN);

    ath79_register_m25p80(&som9331_flash_data);
    ath79_register_leds_gpio(-1, ARRAY_SIZE(som9331_leds_gpio),
                 som9331_leds_gpio);
    ath79_register_gpio_keys_polled(-1, SOM9331_KEYS_POLL_INTERVAL,
                    ARRAY_SIZE(som9331_gpio_keys),
                    som9331_gpio_keys);

    ath79_register_usb();

    ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
    ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1);

    ath79_register_mdio(0, 0x0);

    /* LAN ports */
    ath79_register_eth(1);

    /* WAN port */
    ath79_register_eth(0);

    ath79_register_wmac(ee, mac);
}
Example #14
0
static void __init lima_setup(void)
{
	u8 *art = (u8 *) KSEG1ADDR(0x1f080000);

	ath79_register_m25p80(NULL);

	ath79_register_gpio_keys_polled(-1, LIMA_KEYS_POLL_INTERVAL,
					ARRAY_SIZE(lima_gpio_keys),
					lima_gpio_keys);

	ath79_setup_ar933x_phy4_switch(true, true);

	ath79_init_mac(ath79_eth0_data.mac_addr, art + LIMA_MAC0_OFFSET, 0);
	ath79_init_mac(ath79_eth1_data.mac_addr, art + LIMA_MAC1_OFFSET, 0);

	ath79_register_mdio(0, ~LIMA_ETH_PHYS);

	ath79_switch_data.phy4_mii_en = 1;

	ath79_switch_data.phy_poll_mask |= BIT(0);
	ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
	ath79_eth1_data.duplex = DUPLEX_FULL;
	ath79_eth1_data.phy_mask = BIT(1);
	ath79_register_eth(1);

	ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
	ath79_eth0_data.duplex = DUPLEX_FULL;
	ath79_eth0_data.speed = SPEED_100;
	ath79_eth0_data.phy_mask = BIT(0);
	ath79_register_eth(0);

	ath79_register_wmac(art + LIMA_CALDATA_OFFSET, NULL);
	ath79_register_usb();
	ath79_register_pci();
}
Example #15
0
static void __init tl_ap143_setup(void)
{
	u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
	u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
	u8 tmpmac[ETH_ALEN];

	ath79_register_m25p80(&tl_wr841n_v9_flash_data);

	ath79_setup_ar933x_phy4_switch(false, false);

	ath79_register_mdio(0, 0x0);

	/* LAN */
	ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
	ath79_register_eth(1);

	/* WAN */
	ath79_switch_data.phy4_mii_en = 1;
	ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
	ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
	ath79_register_eth(0);

	ath79_init_mac(tmpmac, mac, 0);
	ath79_register_wmac(ee, tmpmac);
}
Example #16
0
static void __init epmp_setup(void)
{
	u8 *art = (u8 *)KSEG1ADDR(0x1fff0000);
	u8 mac[6];
	u8 *cal_data;

	ath79_register_m25p80(&epmp_flash_data);
	
	ath79_init_mac(mac, art, 2);

	ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE|AR934X_ETH_CFG_SW_PHY_SWAP);
	ath79_register_mdio(1, 0x0);
	ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
	ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1);
	
	ath79_switch_data.phy4_mii_en = 1;
	ath79_switch_data.phy_poll_mask = BIT(0);
	ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
	ath79_eth0_data.phy_mask = BIT(0);
	ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev;
	ath79_register_eth(0);

	ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
	ath79_register_eth(1);

	cal_data=kmalloc(0x1000,GFP_KERNEL);
	memcpy(cal_data, art + EPMP_WMAC_CALDATA_OFFSET, 0x1000);
	memset(cal_data+0x1C,0x64,1);
	memset(cal_data+0x1D,0x00,1);
	ath79_register_wmac(cal_data, mac);
	kfree(cal_data);

	ath79_register_leds_gpio(-1, ARRAY_SIZE(epmp_leds_gpio) - 1,
				 epmp_leds_gpio);
}
Example #17
0
static void __init carambola2_common_setup(void)
{
	u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);

	/* Disable UART, enabling GPIO 9 and GPIO 10 */
	ath79_gpio_function_disable(AR933X_GPIO_FUNC_UART_EN);
	/* Enabling internal CS1, disable GPIO 9 */
	ath79_gpio_function_enable(AR933X_GPIO_FUNC_SPI_CS_EN1);

	ath79_register_m25p80i_multi(NULL);
	ath79_register_wmac(art + CARAMBOLA2_CALDATA_OFFSET,
			    art + CARAMBOLA2_WMAC_MAC_OFFSET);

	ath79_setup_ar933x_phy4_switch(true, true);

	ath79_init_mac(ath79_eth0_data.mac_addr, art + CARAMBOLA2_MAC0_OFFSET, 0);
	ath79_init_mac(ath79_eth1_data.mac_addr, art + CARAMBOLA2_MAC1_OFFSET, 0);

	ath79_register_mdio(0, 0x0);

	/* LAN ports */
	ath79_register_eth(1);

	/* WAN port */
	ath79_register_eth(0);

	// spi_register_board_info(ath79_spi_info, ARRAY_SIZE(ath79_spi_info));
}
Example #18
0
static void __init bsb_setup(void)
{
	u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);

	/* disable PHY_SWAP and PHY_ADDR_SWAP bits */
	ath79_setup_ar933x_phy4_switch(false,false);

	ath79_register_leds_gpio(-1, ARRAY_SIZE(bsb_leds_gpio),
				 bsb_leds_gpio);
	ath79_register_gpio_keys_polled(-1, BSB_KEYS_POLL_INTERVAL,
					ARRAY_SIZE(bsb_gpio_keys),
					bsb_gpio_keys);

	ath79_register_usb();

	ath79_register_m25p80(NULL);

	ath79_init_mac(ath79_eth0_data.mac_addr, art + BSB_MAC_OFFSET, 1);
	ath79_init_mac(ath79_eth1_data.mac_addr, art + BSB_MAC_OFFSET, 2);

	ath79_register_mdio(0, 0x0);

	ath79_register_eth(0);
	ath79_register_eth(1);

	ath79_register_wmac(art + BSB_CALDATA_OFFSET,
			    art + BSB_MAC_OFFSET);
}
Example #19
0
static void __init hornet_ub_setup(void)
{
	u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);

	hornet_ub_gpio_setup();

	ath79_register_m25p80(NULL);
	ath79_register_leds_gpio(-1, ARRAY_SIZE(hornet_ub_leds_gpio),
					hornet_ub_leds_gpio);
	ath79_register_gpio_keys_polled(-1, HORNET_UB_KEYS_POLL_INTERVAL,
					 ARRAY_SIZE(hornet_ub_gpio_keys),
					 hornet_ub_gpio_keys);

	ath79_init_mac(ath79_eth1_data.mac_addr,
			art + HORNET_UB_MAC0_OFFSET, 0);
	ath79_init_mac(ath79_eth0_data.mac_addr,
			art + HORNET_UB_MAC1_OFFSET, 0);

	ath79_register_mdio(0, 0x0);

	ath79_register_eth(1);
	ath79_register_eth(0);

	ath79_register_wmac(art + HORNET_UB_CALDATA_OFFSET, NULL);
	ath79_register_usb();
}
static void __init TL_WA901ND_V4_setup(void)
{
	u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
	u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);

	ath79_register_m25p80(&tl_wa901nd_v4_flash_data);

	ath79_register_leds_gpio(-1, ARRAY_SIZE(TL_WA901ND_V4_leds_gpio),
				 TL_WA901ND_V4_leds_gpio);

	ath79_register_gpio_keys_polled(-1, TL_WA901ND_V4_KEYS_POLL_INTERVAL,
					ARRAY_SIZE(TL_WA901ND_V4_gpio_keys),
					TL_WA901ND_V4_gpio_keys);

	ath79_register_mdio(0, 0x0);

	ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
	ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1);

	ath79_switch_data.phy4_mii_en = 1;

	ath79_register_eth(0);
	ath79_register_eth(1);

	ath79_register_wmac(ee, mac);

}
Example #21
0
static void __init gl_inet_setup(void)
{
	/* get the mac address which is stored in the 1st 64k uboot MTD */
	u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);

	/* get the art address, which is the last 64K. By using
	   0x1fff1000, it doesn't matter it is 4M, 8M or 16M flash */
	u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);

	/* disable PHY_SWAP and PHY_ADDR_SWAP bits */
	ath79_setup_ar933x_phy4_switch(false, false);

	/* register flash. MTD will use tp-link parser to parser MTD */
	ath79_register_m25p80(&gl_inet_flash_data);

	/* register gpio LEDs and keys */
	ath79_register_leds_gpio(-1, ARRAY_SIZE(gl_inet_leds_gpio),
				 gl_inet_leds_gpio);
	ath79_register_gpio_keys_polled(-1, GL_INET_KEYS_POLL_INTERVAL,
					ARRAY_SIZE(gl_inet_gpio_keys),
					gl_inet_gpio_keys);

	/* enable usb */
	ath79_register_usb();

	/* register eth0 as WAN, eth1 as LAN */
	ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
	ath79_register_mdio(0, 0x0);
	ath79_register_eth(0);
	ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
	ath79_register_eth(1);

	/* register wireless mac with cal data */
	ath79_register_wmac(ee, mac);
}
Example #22
0
static void __init gl_mifi_setup(void)
{

	/* ART base address */
	u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);

	/* disable PHY_SWAP and PHY_ADDR_SWAP bits */
	ath79_setup_ar933x_phy4_switch(false, false);

	/* register flash. */
	ath79_register_m25p80(NULL);

	/* register gpio LEDs and keys */
	ath79_register_leds_gpio(-1, ARRAY_SIZE(gl_mifi_leds_gpio),
				 gl_mifi_leds_gpio);
	ath79_register_gpio_keys_polled(-1, GL_MIFI_KEYS_POLL_INTERVAL,
					ARRAY_SIZE(gl_mifi_gpio_keys),
					gl_mifi_gpio_keys);

	/* enable usb */
	ath79_register_usb();

	/* register eth0 as WAN, eth1 as LAN */
	ath79_init_mac(ath79_eth0_data.mac_addr, art+GL_MIFI_MAC0_OFFSET, 0);
	ath79_init_mac(ath79_eth1_data.mac_addr, art+GL_MIFI_MAC1_OFFSET, 0);
	ath79_register_mdio(0, 0x0);
	ath79_register_eth(0);
	ath79_register_eth(1);

	/* register wireless mac with cal data */
	ath79_register_wmac(art + GL_MIFI_CALDATA_OFFSET, art + GL_MIFI_WMAC_MAC_OFFSET);
}
Example #23
0
static void __init alfa_nx_setup(void)
{
	u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);

	ath79_gpio_function_setup(AR724X_GPIO_FUNC_JTAG_DISABLE,
				  AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN |
				  AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN |
				  AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN |
				  AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN |
				  AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN);

	ath79_register_m25p80(&alfa_nx_flash_data);

	ath79_register_leds_gpio(0, ARRAY_SIZE(alfa_nx_leds_gpio),
				 alfa_nx_leds_gpio);

	ath79_register_gpio_keys_polled(-1, ALFA_NX_KEYS_POLL_INTERVAL,
					ARRAY_SIZE(alfa_nx_gpio_keys),
					alfa_nx_gpio_keys);

	ath79_register_mdio(0, 0x0);

	ath79_init_mac(ath79_eth0_data.mac_addr,
		       art + ALFA_NX_MAC0_OFFSET, 0);
	ath79_init_mac(ath79_eth1_data.mac_addr,
		       art + ALFA_NX_MAC1_OFFSET, 0);

	/* WAN port */
	ath79_register_eth(0);
	/* LAN port */
	ath79_register_eth(1);

	ap91_pci_init(art + ALFA_NX_CALDATA_OFFSET, NULL);
}
Example #24
0
static void __init dir825b1_wlan_init(void)
{
	u8 *caldata;
	u8 mac0[ETH_ALEN], mac1[ETH_ALEN];
	u8 wmac0[ETH_ALEN], wmac1[ETH_ALEN];

	caldata = (u8 *) KSEG1ADDR(DIR825B1_CAL_LOCATION_0);
	if (!dir825b1_is_caldata_valid(caldata)) {
		caldata = (u8 *)KSEG1ADDR(DIR825B1_CAL_LOCATION_1);
		if (!dir825b1_is_caldata_valid(caldata)) {
			pr_err("no calibration data found\n");
			return;
		}
	}

	ath79_parse_ascii_mac(caldata + DIR825B1_MAC0_OFFSET, mac0);
	ath79_parse_ascii_mac(caldata + DIR825B1_MAC1_OFFSET, mac1);

	ath79_init_mac(ath79_eth0_data.mac_addr, mac0, 0);
	ath79_init_mac(ath79_eth1_data.mac_addr, mac1, 0);
	ath79_init_mac(wmac0, mac0, 0);
	ath79_init_mac(wmac1, mac1, 1);

	ap9x_pci_setup_wmac_led_pin(0, 5);
	ap9x_pci_setup_wmac_led_pin(1, 5);

	ap94_pci_init(caldata + DIR825B1_CAL0_OFFSET, wmac0,
		      caldata + DIR825B1_CAL1_OFFSET, wmac1);
}
Example #25
0
static void __init cf_exxxn_qca953x_eth_setup(void)
{
	u8 *mac = (u8 *) KSEG1ADDR(0x1f010000);

	ath79_setup_ar933x_phy4_switch(false, false);

	ath79_register_mdio(0, 0x0);

	ath79_switch_data.phy4_mii_en = 1;
	ath79_switch_data.phy_poll_mask |= BIT(4);

	/* LAN */
	ath79_eth1_data.duplex = DUPLEX_FULL;
	ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
	ath79_eth1_data.speed = SPEED_1000;
	ath79_init_mac(ath79_eth1_data.mac_addr, mac, 2);
	ath79_register_eth(1);

	/* WAN */
	ath79_eth0_data.duplex = DUPLEX_FULL;
	ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
	ath79_eth0_data.speed = SPEED_100;
	ath79_eth0_data.phy_mask = BIT(4);
	ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
	ath79_register_eth(0);
}
Example #26
0
static void __init WPJ563_setup(void)
{
	u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
	u8 *mac = (u8 *) KSEG1ADDR(0x1f02e000);

	ath79_register_m25p80(NULL);

	ath79_register_leds_gpio(-1, ARRAY_SIZE(WPJ563_leds_gpio),
				 WPJ563_leds_gpio);
	ath79_register_gpio_keys_polled(-1, WPJ563_KEYS_POLL_INTERVAL,
					ARRAY_SIZE(WPJ563_gpio_keys),
					WPJ563_gpio_keys);

	ath79_register_usb();
	
	ath79_register_wmac(art + WPJ563_WMAC_CALDATA_OFFSET, NULL);
	
	ath79_register_pci();

	mdiobus_register_board_info(WPJ563_mdio0_info,
				    ARRAY_SIZE(WPJ563_mdio0_info));
	ath79_register_mdio(0, 0x0);

	ath79_init_mac(ath79_eth0_data.mac_addr, mac + WPJ563_MAC0_OFFSET, 0);
	ath79_init_mac(ath79_eth1_data.mac_addr, mac + WPJ563_MAC1_OFFSET, 0);

	/* GMAC0 is connected to an QCA8334 switch */
	ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
	ath79_eth0_data.speed = SPEED_1000;
	ath79_eth0_data.duplex = DUPLEX_FULL;
	ath79_eth0_data.phy_mask = BIT(0);
	ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;

	ath79_register_eth(0);
}
static void __init ds_common_setup(void)
{
	static u8 mac[6];

	u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
	ath79_register_m25p80(NULL);

	if (ar93xx_wmac_read_mac_address(mac)) {
		ath79_register_wmac(NULL, NULL);
	} else {
		ath79_register_wmac(art + DS_CALDATA_OFFSET,
				    art + DS_WMAC_MAC_OFFSET);
		memcpy(mac, art + DS_WMAC_MAC_OFFSET, sizeof(mac));
	}

	mac[3] |= 0x08;
	ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);

	mac[3] &= 0xF7;
	ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
	ath79_register_mdio(0, 0x0);

	/* LAN ports */
	ath79_register_eth(1);

	/* WAN port */
	ath79_register_eth(0);
}
static void __init tl_ap151_setup(void)
{
	u8 *mac = (u8 *) KSEG1ADDR(0x1f00fc00);
	u8 *ee = (u8 *) KSEG1ADDR(0x1fff0000);
	u8 tmpmac[ETH_ALEN];

	ath79_register_m25p80(&tl_wdr6500_v2_flash_data);

	ath79_setup_ar933x_phy4_switch(false, false);

	ath79_register_mdio(0, 0x0);

	/* WAN */
	ath79_switch_data.phy4_mii_en = 1;
	ath79_switch_data.phy_poll_mask = BIT(4);
	ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
	ath79_eth0_data.phy_mask = BIT(4);
	ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
	ath79_register_eth(0);

	/* LAN */
	ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
	ath79_eth1_data.duplex = DUPLEX_FULL;
	ath79_eth1_data.speed = SPEED_1000;
	ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
	ath79_register_eth(1);

	ath79_init_mac(tmpmac, mac, -1);
	ath79_register_wmac(ee + TL_WDR6500_V2_WMAC_CALDATA_OFFSET, tmpmac);

	ath79_register_pci();

	ath79_register_usb();
}
Example #29
0
static void __init common_setup(unsigned usb_power_gpio, bool sec_ethernet)
{
    u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);

    /* disable PHY_SWAP and PHY_ADDR_SWAP bits */
    ath79_setup_ar933x_phy4_switch(false, false);

    ath79_register_m25p80(&tl_wr703n_flash_data);
    ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr703n_leds_gpio),
                             tl_wr703n_leds_gpio);
    ath79_register_gpio_keys_polled(-1, TL_WR703N_KEYS_POLL_INTERVAL,
                                    ARRAY_SIZE(tl_wr703n_gpio_keys),
                                    tl_wr703n_gpio_keys);

    gpio_request_one(usb_power_gpio,
                     GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
                     "USB power");
    ath79_register_usb();

    ath79_register_mdio(0, 0x0);
    ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
    ath79_register_eth(0);

    if (sec_ethernet)
    {
        ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1);
        ath79_register_eth(1);
    }
    tplink_register_builtin_wmac1(0x1000, mac, 0);
}
Example #30
0
static void __init ja76pf_init(void)
{
	ath79_register_m25p80(&ja76pf_flash_data);

	ath79_register_mdio(0, ~JA76PF_MDIO_PHYMASK);

	ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0);
	ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
	ath79_eth0_data.phy_mask = JA76PF_LAN_PHYMASK;

	ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1);
	ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
	ath79_eth1_data.phy_mask = JA76PF_WAN_PHYMASK;
	ath79_eth1_data.speed = SPEED_1000;
	ath79_eth1_data.duplex = DUPLEX_FULL;

	ath79_register_eth(0);
	ath79_register_eth(1);

	platform_device_register(&ja76pf_i2c_gpio_device);

	ath79_register_leds_gpio(-1, ARRAY_SIZE(ja76pf_leds_gpio),
					ja76pf_leds_gpio);

	ath79_register_gpio_keys_polled(-1, JA76PF_KEYS_POLL_INTERVAL,
					 ARRAY_SIZE(ja76pf_gpio_keys),
					 ja76pf_gpio_keys);

	ath79_register_usb();
	ath79_register_pci();
}