static int malo_pci_detach(device_t dev) { int i; struct malo_pci_softc *psc = device_get_softc(dev); struct malo_softc *sc = &psc->malo_sc; /* check if device was removed */ sc->malo_invalid = !bus_child_present(dev); malo_detach(sc); bus_generic_detach(dev); if (psc->malo_msi == 0) bus_teardown_intr(dev, psc->malo_res_irq[0], psc->malo_intrhand[0]); else { for (i = 0; i < MALO_MSI_MESSAGES; i++) bus_teardown_intr(dev, psc->malo_res_irq[i], psc->malo_intrhand[i]); pci_release_msi(dev); } bus_release_resources(dev, psc->malo_irq_spec, psc->malo_res_irq); bus_dma_tag_destroy(sc->malo_dmat); bus_release_resources(dev, psc->malo_mem_spec, psc->malo_res_mem); return (0); }
/** * ti_gpio_detach - detach function for the driver * @dev: scm device handle * * Allocates and sets up the driver context, this simply entails creating a * bus mappings for the SCM register set. * * LOCKING: * None * * RETURNS: * Always returns 0 */ static int ti_gpio_detach(device_t dev) { struct ti_gpio_softc *sc = device_get_softc(dev); unsigned int i; KASSERT(mtx_initialized(&sc->sc_mtx), ("gpio mutex not initialized")); /* Disable all interrupts */ for (i = 0; i < MAX_GPIO_BANKS; i++) { if (sc->sc_mem_res[i] != NULL) ti_gpio_intr_clr(sc, i, 0xffffffff); } bus_generic_detach(dev); /* Release the memory and IRQ resources. */ ti_gpio_detach_intr(dev); bus_release_resources(dev, ti_gpio_irq_spec, sc->sc_irq_res); bus_release_resources(dev, ti_gpio_mem_spec, sc->sc_mem_res); TI_GPIO_LOCK_DESTROY(sc); return (0); }
static int aw_nmi_attach(device_t dev) { struct aw_nmi_softc *sc; phandle_t xref; sc = device_get_softc(dev); sc->dev = dev; if (bus_alloc_resources(dev, aw_nmi_res_spec, sc->res) != 0) { device_printf(dev, "can't allocate device resources\n"); return (ENXIO); } if ((bus_setup_intr(dev, sc->res[1], INTR_TYPE_MISC, aw_nmi_intr, NULL, sc, &sc->intrcookie))) { device_printf(dev, "unable to register interrupt handler\n"); bus_release_resources(dev, aw_nmi_res_spec, sc->res); return (ENXIO); } switch (ofw_bus_search_compatible(dev, compat_data)->ocd_data) { case A20_NMI: sc->enable_reg = A20_NMI_IRQ_ENABLE_REG; break; case A31_NMI: sc->enable_reg = A31_NMI_IRQ_ENABLE_REG; break; } /* Disable and clear interrupts */ SC_NMI_WRITE(sc, sc->enable_reg, !NMI_IRQ_ENABLE); SC_NMI_WRITE(sc, NMI_IRQ_PENDING_REG, NMI_IRQ_ACK); xref = OF_xref_from_node(ofw_bus_get_node(dev)); /* Register our isrc */ sc->intr.irq = 0; sc->intr.pol = INTR_POLARITY_CONFORM; sc->intr.tri = INTR_TRIGGER_CONFORM; if (intr_isrc_register(&sc->intr.isrc, sc->dev, 0, "%s,%u", device_get_nameunit(sc->dev), sc->intr.irq) != 0) goto error; if (intr_pic_register(dev, (intptr_t)xref) == NULL) { device_printf(dev, "could not register pic\n"); goto error; } return (0); error: bus_teardown_intr(dev, sc->res[1], sc->intrcookie); bus_release_resources(dev, aw_nmi_res_spec, sc->res); return (ENXIO); }
static int musbotg_detach(device_t dev) { struct musbotg_super_softc *sc = device_get_softc(dev); device_t bdev; int err; int i; for (i = 0; i < AM335X_USB_PORTS; i++) { if (sc->sc_otg[i].sc_bus.bdev) { bdev = sc->sc_otg[i].sc_bus.bdev; device_detach(bdev); device_delete_child(dev, bdev); } if (sc->sc_otg[i].sc_irq_res && sc->sc_otg[i].sc_intr_hdl) { /* * only call musbotg_uninit() after musbotg_init() */ musbotg_uninit(&sc->sc_otg[i]); err = bus_teardown_intr(dev, sc->sc_otg[i].sc_irq_res, sc->sc_otg[i].sc_intr_hdl); sc->sc_otg[i].sc_intr_hdl = NULL; } usb_bus_mem_free_all(&sc->sc_otg[i].sc_bus, NULL); } if (sc->sc_intr_hdl) { bus_teardown_intr(dev, sc->sc_irq_res[0], sc->sc_intr_hdl); sc->sc_intr_hdl = NULL; } /* Free resources if any */ if (sc->sc_mem_res[0]) bus_release_resources(dev, am335x_musbotg_mem_spec, sc->sc_mem_res); if (sc->sc_irq_res[0]) bus_release_resources(dev, am335x_musbotg_irq_spec, sc->sc_irq_res); /* during module unload there are lots of children leftover */ device_delete_children(dev); return (0); }
static int aml8726_gpio_attach(device_t dev) { struct aml8726_gpio_softc *sc = device_get_softc(dev); phandle_t node; pcell_t prop; sc->dev = dev; node = ofw_bus_get_node(dev); if (OF_getencprop(node, "pin-count", &prop, sizeof(prop)) <= 0) { device_printf(dev, "missing pin-count attribute in FDT\n"); return (ENXIO); } sc->npins = prop; if (sc->npins > 32) return (ENXIO); if (bus_alloc_resources(dev, aml8726_gpio_spec, sc->res)) { device_printf(dev, "can not allocate resources for device\n"); return (ENXIO); } /* * The GPIOAO OUT bits occupy the upper word of the OEN register. */ if (rman_get_start(sc->res[1]) == rman_get_start(sc->res[0])) if (sc->npins > 16) { device_printf(dev, "too many pins for overlapping OEN and OUT\n"); bus_release_resources(dev, aml8726_gpio_spec, sc->res); return (ENXIO); } AML_GPIO_LOCK_INIT(sc); sc->busdev = gpiobus_attach_bus(dev); if (sc->busdev == NULL) { AML_GPIO_LOCK_DESTROY(sc); bus_release_resources(dev, aml8726_gpio_spec, sc->res); return (ENXIO); } return (0); }
static int musbotg_detach(device_t dev) { struct musbotg_super_softc *sc = device_get_softc(dev); int err; /* during module unload there are lots of children leftover */ device_delete_children(dev); if (sc->sc_otg.sc_irq_res && sc->sc_otg.sc_intr_hdl) { /* * only call musbotg_uninit() after musbotg_init() */ musbotg_uninit(&sc->sc_otg); err = bus_teardown_intr(dev, sc->sc_otg.sc_irq_res, sc->sc_otg.sc_intr_hdl); sc->sc_otg.sc_intr_hdl = NULL; } usb_bus_mem_free_all(&sc->sc_otg.sc_bus, NULL); /* Free resources if any */ if (sc->sc_mem_res[0]) bus_release_resources(dev, am335x_musbotg_mem_spec, sc->sc_mem_res); if (sc->sc_otg.sc_irq_res) bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irq_rid, sc->sc_otg.sc_irq_res); return (0); }
static int exynos_xhci_detach(device_t dev) { struct exynos_xhci_softc *esc = device_get_softc(dev); int err; /* During module unload there are lots of children leftover */ device_delete_children(dev); xhci_halt_controller(&esc->base); if (esc->res[2] && esc->base.sc_intr_hdl) { err = bus_teardown_intr(dev, esc->res[2], esc->base.sc_intr_hdl); if (err) { device_printf(dev, "Could not tear down IRQ," " %d\n", err); return (err); } } bus_release_resources(dev, exynos_xhci_spec, esc->res); xhci_uninit(&esc->base); return (0); }
static int mv_cp110_icu_attach(device_t dev) { struct mv_cp110_icu_softc *sc; phandle_t node, msi_parent; sc = device_get_softc(dev); sc->dev = dev; node = ofw_bus_get_node(dev); if (OF_getencprop(node, "msi-parent", &msi_parent, sizeof(phandle_t)) <= 0) { device_printf(dev, "cannot find msi-parent property\n"); return (ENXIO); } if ((sc->parent = OF_device_from_xref(msi_parent)) == NULL) { device_printf(dev, "cannot find msi-parent device\n"); return (ENXIO); } if (bus_alloc_resources(dev, mv_cp110_icu_res_spec, &sc->res) != 0) { device_printf(dev, "cannot allocate resources for device\n"); return (ENXIO); } if (intr_pic_register(dev, OF_xref_from_node(node)) == NULL) { device_printf(dev, "Cannot register ICU\n"); goto fail; } return (0); fail: bus_release_resources(dev, mv_cp110_icu_res_spec, &sc->res); return (ENXIO); }
static int gem_sbus_attach(device_t dev) { struct gem_softc *sc; int burst; uint32_t val; sc = device_get_softc(dev); sc->sc_variant = GEM_SUN_GEM; sc->sc_dev = dev; /* All known SBus models use a SERDES. */ sc->sc_flags = GEM_SERDES; if (bus_alloc_resources(dev, gem_sbus_res_spec, sc->sc_res)) { device_printf(dev, "failed to allocate resources\n"); bus_release_resources(dev, gem_sbus_res_spec, sc->sc_res); return (ENXIO); } GEM_LOCK_INIT(sc, device_get_nameunit(dev)); OF_getetheraddr(dev, sc->sc_enaddr); burst = sbus_get_burstsz(dev); val = GEM_SBUS_CFG_PARITY; if ((burst & SBUS_BURST64_MASK) != 0) { val |= GEM_SBUS_CFG_64BIT; burst >>= SBUS_BURST64_SHIFT; }
static int schppm_attach(device_t dev) { struct schppm_softc *sc; sc = device_get_softc(dev); if (bus_alloc_resources(dev, schppm_res_spec, sc->sc_res)) { device_printf(dev, "failed to allocate resources\n"); bus_release_resources(dev, schppm_res_spec, sc->sc_res); return (ENXIO); } if (bootverbose) { device_printf(dev, "running at "); switch (SCHPPM_READ(sc, SCHPPM_ESTAR, SCHPPM_ESTAR_CTRL) & SCHPPM_ESTAR_CTRL_MASK) { case SCHPPM_ESTAR_CTRL_1: printf("full"); break; case SCHPPM_ESTAR_CTRL_2: printf("half"); break; case SCHPPM_ESTAR_CTRL_32: printf("1/32"); break; default: printf("unknown"); break; } printf(" speed\n"); } return (0); }
static int aw_ts_attach(device_t dev) { struct aw_ts_softc *sc; sc = device_get_softc(dev); sc->dev = dev; if (bus_alloc_resources(dev, aw_ts_spec, sc->res) != 0) { device_printf(dev, "could not allocate memory resource\n"); return (ENXIO); } if (bus_setup_intr(dev, sc->res[1], INTR_TYPE_MISC | INTR_MPSAFE, NULL, aw_ts_intr, sc, &sc->intrhand)) { bus_release_resources(dev, aw_ts_spec, sc->res); device_printf(dev, "cannot setup interrupt handler\n"); return (ENXIO); } /* * Thoses magic values were taken from linux which take them from * the allwinner SDK or found them by deduction */ switch (ofw_bus_search_compatible(dev, compat_data)->ocd_data) { case A10_TS: sc->temp_offset = 257000; sc->temp_step = 133; break; case A13_TS: sc->temp_offset = 144700; sc->temp_step = 100; break; } /* Enable clock and set divisers */ WRITE(sc, TP_CTRL0, TP_CTRL0_CLK_SELECT(0) | TP_CTRL0_CLK_DIV(2) | TP_CTRL0_FS_DIV(7) | TP_CTRL0_TACQ(63)); /* Enable TS module */ WRITE(sc, TP_CTRL1, TP_CTRL1_MODE_EN); /* Enable Temperature, period is ~2s */ WRITE(sc, TP_TPR, TP_TPR_TEMP_EN | TP_TPR_TEMP_PERIOD(1953)); /* Enable temp irq */ WRITE(sc, TP_FIFOC, TP_FIFOC_TEMP_IRQ_ENABLE); /* Add sysctl */ SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, "temperature", CTLTYPE_INT | CTLFLAG_RD, &sc->temp_data, 0, sysctl_handle_int, "IK3", "CPU Temperature"); return (0); }
static int aml8726_usb_phy_detach(device_t dev) { struct aml8726_usb_phy_softc *sc = device_get_softc(dev); uint32_t i; uint32_t value; /* * Disable by issuing a power on reset. */ value = CSR_READ_4(sc, AML_USB_PHY_CFG_REG); value |= (AML_USB_PHY_CFG_A_POR | AML_USB_PHY_CFG_B_POR); CSR_WRITE_4(sc, AML_USB_PHY_CFG_REG, value); CSR_BARRIER(sc, AML_USB_PHY_CFG_REG); /* Turn off power */ i = sc->npwr_en; while (i-- != 0) { (void)GPIO_PIN_SET(sc->pwr_en[i].dev, sc->pwr_en[i].pin, PIN_OFF_FLAG(sc->pwr_en[i].pol)); } free (sc->pwr_en, M_DEVBUF); sc->pwr_en = NULL; bus_release_resources(dev, aml8726_usb_phy_spec, sc->res); return (0); }
static int jz4780_dme_detach(device_t dev) { struct jz4780_dme_softc *sc = device_get_softc(dev); bus_release_resources(dev, jz4780_dme_spec, sc->res); return (0); }
static int mtk_pic_attach(device_t dev) { struct mtk_pic_softc *sc; intptr_t xref = pic_xref(dev); sc = device_get_softc(dev); if (bus_alloc_resources(dev, mtk_pic_spec, sc->pic_res)) { device_printf(dev, "could not allocate resources\n"); return (ENXIO); } sc->pic_dev = dev; /* Initialize mutex */ mtx_init(&sc->mutex, "PIC lock", "", MTX_SPIN); /* Set the number of interrupts */ sc->nirqs = nitems(sc->pic_irqs); /* Mask all interrupts */ WRITE4(sc, MTK_INTDIS, 0xFFFFFFFF); /* But enable interrupt generation/masking */ WRITE4(sc, MTK_INTENA, 0x00000000); /* Set all interrupts to type 0 */ WRITE4(sc, MTK_INTTYPE, 0xFFFFFFFF); /* Register the interrupts */ if (mtk_pic_register_isrcs(sc) != 0) { device_printf(dev, "could not register PIC ISRCs\n"); goto cleanup; } /* * Now, when everything is initialized, it's right time to * register interrupt controller to interrupt framefork. */ if (intr_pic_register(dev, xref) == NULL) { device_printf(dev, "could not register PIC\n"); goto cleanup; } if (bus_setup_intr(dev, sc->pic_res[1], INTR_TYPE_CLK, mtk_pic_intr, NULL, sc, &sc->pic_intrhand)) { device_printf(dev, "could not setup irq handler\n"); intr_pic_deregister(dev, xref); goto cleanup; } return (0); cleanup: bus_release_resources(dev, mtk_pic_spec, sc->pic_res); return(ENXIO); }
static int jzsmb_attach(device_t dev) { struct jzsmb_softc *sc; phandle_t node; int error; sc = device_get_softc(dev); node = ofw_bus_get_node(dev); mtx_init(&sc->mtx, device_get_nameunit(dev), "jzsmb", MTX_DEF); error = clk_get_by_ofw_index(dev, 0, 0, &sc->clk); if (error != 0) { device_printf(dev, "cannot get clock\n"); goto fail; } error = clk_enable(sc->clk); if (error != 0) { device_printf(dev, "cannot enable clock\n"); goto fail; } error = clk_get_freq(sc->clk, &sc->bus_freq); if (error != 0 || sc->bus_freq == 0) { device_printf(dev, "cannot get bus frequency\n"); return (error); } if (bus_alloc_resources(dev, jzsmb_spec, &sc->res) != 0) { device_printf(dev, "cannot allocate resources for device\n"); error = ENXIO; goto fail; } if (OF_getencprop(node, "clock-frequency", &sc->i2c_freq, sizeof(sc->i2c_freq)) != 0 || sc->i2c_freq == 0) sc->i2c_freq = 100000; /* Default to standard mode */ sc->iicbus = device_add_child(dev, "iicbus", -1); if (sc->iicbus == NULL) { device_printf(dev, "cannot add iicbus child device\n"); error = ENXIO; goto fail; } bus_generic_attach(dev); return (0); fail: bus_release_resources(dev, jzsmb_spec, &sc->res); if (sc->clk != NULL) clk_release(sc->clk); mtx_destroy(&sc->mtx); return (error); }
static int aml8726_rng_detach(device_t dev) { struct aml8726_rng_softc *sc = device_get_softc(dev); callout_drain(&sc->co); bus_release_resources(dev, aml8726_rng_spec, sc->res); return (0); }
static int pmsu_detach(device_t dev) { struct pmsu_softc *sc; sc = device_get_softc(dev); bus_release_resources(dev, pmsu_spec, &sc->res); return (0); }
static int fsl_ehci_detach(device_t self) { struct imx_ehci_softc *sc; ehci_softc_t *esc; int err, i; sc = device_get_softc(self); for (i = 0; i < FSL_EHCI_COUNT; i ++) { esc = &sc->ehci[i]; if (esc->sc_flags & EHCI_SCFLG_DONEINIT) continue; /* * only call ehci_detach() after ehci_init() */ if (esc->sc_flags & EHCI_SCFLG_DONEINIT) { ehci_detach(esc); esc->sc_flags &= ~EHCI_SCFLG_DONEINIT; } /* * Disable interrupts that might have been switched on in * ehci_init. */ if (esc->sc_io_tag && esc->sc_io_hdl) bus_space_write_4(esc->sc_io_tag, esc->sc_io_hdl, EHCI_USBINTR, 0); if (esc->sc_irq_res && esc->sc_intr_hdl) { err = bus_teardown_intr(self, esc->sc_irq_res, esc->sc_intr_hdl); if (err) { device_printf(self, "Could not tear down irq," " %d\n", err); return (err); } esc->sc_intr_hdl = NULL; } if (esc->sc_bus.bdev) { device_delete_child(self, esc->sc_bus.bdev); esc->sc_bus.bdev = NULL; } } /* During module unload there are lots of children leftover */ device_delete_children(self); if (sc->sc_res[0]) bus_release_resources(self, imx_ehci_spec, sc->sc_res); return (0); }
static int a10dmac_attach(device_t dev) { struct a10dmac_softc *sc; unsigned int index; int error; sc = device_get_softc(dev); if (bus_alloc_resources(dev, a10dmac_spec, sc->sc_res)) { device_printf(dev, "cannot allocate resources for device\n"); return (ENXIO); } mtx_init(&sc->sc_mtx, "a10 dmac", NULL, MTX_SPIN); /* Activate DMA controller clock */ a10_clk_dmac_activate(); /* Disable all interrupts and clear pending status */ DMA_WRITE(sc, AWIN_DMA_IRQ_EN_REG, 0); DMA_WRITE(sc, AWIN_DMA_IRQ_PEND_STA_REG, ~0); /* Initialize channels */ for (index = 0; index < NDMA_CHANNELS; index++) { sc->sc_ndma_channels[index].ch_sc = sc; sc->sc_ndma_channels[index].ch_index = index; sc->sc_ndma_channels[index].ch_type = CH_NDMA; sc->sc_ndma_channels[index].ch_callback = NULL; sc->sc_ndma_channels[index].ch_callbackarg = NULL; sc->sc_ndma_channels[index].ch_regoff = AWIN_NDMA_REG(index); DMACH_WRITE(&sc->sc_ndma_channels[index], AWIN_NDMA_CTL_REG, 0); } for (index = 0; index < DDMA_CHANNELS; index++) { sc->sc_ddma_channels[index].ch_sc = sc; sc->sc_ddma_channels[index].ch_index = index; sc->sc_ddma_channels[index].ch_type = CH_DDMA; sc->sc_ddma_channels[index].ch_callback = NULL; sc->sc_ddma_channels[index].ch_callbackarg = NULL; sc->sc_ddma_channels[index].ch_regoff = AWIN_DDMA_REG(index); DMACH_WRITE(&sc->sc_ddma_channels[index], AWIN_DDMA_CTL_REG, 0); } error = bus_setup_intr(dev, sc->sc_res[1], INTR_MPSAFE | INTR_TYPE_MISC, NULL, a10dmac_intr, sc, &sc->sc_ih); if (error != 0) { device_printf(dev, "could not setup interrupt handler\n"); bus_release_resources(dev, a10dmac_spec, sc->sc_res); mtx_destroy(&sc->sc_mtx); return (ENXIO); } return (0); }
static int aml8726_ccm_detach(device_t dev) { struct aml8726_ccm_softc *sc = device_get_softc(dev); AML_CCM_LOCK_DESTROY(sc); bus_release_resources(dev, aml8726_ccm_spec, sc->res); return (0); }
static int imx6_anatop_attach(device_t dev) { struct imx6_anatop_softc *sc; int err; sc = device_get_softc(dev); sc->dev = dev; /* Allocate bus_space resources. */ if (bus_alloc_resources(dev, imx6_anatop_spec, sc->res)) { device_printf(dev, "Cannot allocate resources\n"); err = ENXIO; goto out; } err = bus_setup_intr(dev, sc->res[IRQRES], INTR_TYPE_MISC | INTR_MPSAFE, tempmon_intr, NULL, sc, &sc->temp_intrhand); if (err != 0) goto out; SYSCTL_ADD_UINT(device_get_sysctl_ctx(sc->dev), SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev)), OID_AUTO, "cpu_voltage", CTLFLAG_RD, &sc->cpu_curmv, 0, "Current CPU voltage in millivolts"); imx6_anatop_sc = sc; /* * Other code seen on the net sets this SELFBIASOFF flag around the same * time the temperature sensor is set up, although it's unclear how the * two are related (if at all). */ imx6_anatop_write_4(IMX6_ANALOG_PMU_MISC0_SET, IMX6_ANALOG_PMU_MISC0_SELFBIASOFF); cpufreq_initialize(sc); initialize_tempmon(sc); if (bootverbose) { device_printf(sc->dev, "CPU %uMHz @ %umV\n", sc->cpu_curmhz, sc->cpu_curmv); } err = 0; out: if (err != 0) { bus_release_resources(dev, imx6_anatop_spec, sc->res); } return (err); }
static int vybrid_ehci_detach(device_t dev) { struct vybrid_ehci_softc *esc; ehci_softc_t *sc; int err; esc = device_get_softc(dev); sc = &esc->base; if (sc->sc_flags & EHCI_SCFLG_DONEINIT) return (0); /* * only call ehci_detach() after ehci_init() */ if (sc->sc_flags & EHCI_SCFLG_DONEINIT) { ehci_detach(sc); sc->sc_flags &= ~EHCI_SCFLG_DONEINIT; } /* * Disable interrupts that might have been switched on in * ehci_init. */ if (sc->sc_io_tag && sc->sc_io_hdl) bus_space_write_4(sc->sc_io_tag, sc->sc_io_hdl, EHCI_USBINTR, 0); if (esc->res[5] && sc->sc_intr_hdl) { err = bus_teardown_intr(dev, esc->res[5], sc->sc_intr_hdl); if (err) { device_printf(dev, "Could not tear down irq," " %d\n", err); return (err); } sc->sc_intr_hdl = NULL; } if (sc->sc_bus.bdev) { device_delete_child(dev, sc->sc_bus.bdev); sc->sc_bus.bdev = NULL; } /* During module unload there are lots of children leftover */ device_delete_children(dev); bus_release_resources(dev, vybrid_ehci_spec, esc->res); return (0); }
static int imx6_anatop_attach(device_t dev) { struct imx6_anatop_softc *sc; int err; sc = device_get_softc(dev); sc->dev = dev; /* Allocate bus_space resources. */ if (bus_alloc_resources(dev, imx6_anatop_spec, sc->res)) { device_printf(dev, "Cannot allocate resources\n"); err = ENXIO; goto out; } sc->intr_setup_hook.ich_func = intr_setup; sc->intr_setup_hook.ich_arg = sc; config_intrhook_establish(&sc->intr_setup_hook); SYSCTL_ADD_UINT(device_get_sysctl_ctx(sc->dev), SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev)), OID_AUTO, "cpu_voltage", CTLFLAG_RD, &sc->cpu_curmv, 0, "Current CPU voltage in millivolts"); imx6_anatop_sc = sc; /* * Other code seen on the net sets this SELFBIASOFF flag around the same * time the temperature sensor is set up, although it's unclear how the * two are related (if at all). */ imx6_anatop_write_4(IMX6_ANALOG_PMU_MISC0_SET, IMX6_ANALOG_PMU_MISC0_SELFBIASOFF); /* * Some day, when we're ready to deal with the actual anatop regulators * that are described in fdt data as children of this "bus", this would * be the place to invoke a simplebus helper routine to instantiate the * children from the fdt data. */ err = 0; out: if (err != 0) { bus_release_resources(dev, imx6_anatop_spec, sc->res); } return (err); }
static int aml8726_gpio_detach(device_t dev) { struct aml8726_gpio_softc *sc = device_get_softc(dev); gpiobus_detach_bus(dev); AML_GPIO_LOCK_DESTROY(sc); bus_release_resources(dev, aml8726_gpio_spec, sc->res); return (0); }
static int gem_pci_detach(device_t dev) { struct gem_softc *sc; sc = device_get_softc(dev); bus_teardown_intr(dev, sc->sc_res[GEM_RES_INTR], sc->sc_ih); gem_detach(sc); free(sc->sc_res[GEM_RES_BANK2], M_DEVBUF); GEM_LOCK_DESTROY(sc); bus_release_resources(dev, gem_pci_res_spec, sc->sc_res); return (0); }
static int mtk_gpio_detach(device_t dev) { struct mtk_gpio_softc *sc = device_get_softc(dev); phandle_t node; node = ofw_bus_get_node(dev); intr_pic_deregister(dev, OF_xref_from_node(node)); if (sc->intrhand != NULL) bus_teardown_intr(dev, sc->res[1], sc->intrhand); bus_release_resources(dev, mtk_gpio_spec, sc->res); MTK_GPIO_LOCK_DESTROY(sc); return (0); }
static int pcii_attach(device_t dev) { struct pcii_softc *sc; u_long start, count; int unit; int rid; int error = 0; unit = device_get_unit(dev); sc = device_get_softc(dev); memset(sc, 0, sizeof *sc); device_set_desc(dev, "PCII IEEE-4888 controller"); if (bus_get_resource(dev, SYS_RES_IRQ, 0, &start, &count) != 0) { printf("pcii_attach: cannot obtain IRQ number\n"); return ENXIO; } error = bus_alloc_resources(dev, pcii_res_spec, sc->res); if (error) return (error); error = bus_setup_intr(dev, sc->res[0], INTR_TYPE_MISC | INTR_MPSAFE, NULL, upd7210intr, &sc->upd7210, &sc->intr_handler); if (error) { bus_release_resources(dev, pcii_res_spec, sc->res); return (error); } for (rid = 0; rid < 8; rid++) { sc->upd7210.reg_res[rid] = sc->res[2 + rid]; sc->upd7210.reg_offset[rid] = 0; } sc->upd7210.irq_clear_res = sc->res[10]; sc->upd7210.use_fifo = 0; if (sc->res[1] == NULL) sc->upd7210.dmachan = -1; else sc->upd7210.dmachan = rman_get_start(sc->res[1]); upd7210attach(&sc->upd7210); device_printf(dev, "attached gpib%d\n", sc->upd7210.unit); return (0); }
static int tegra_lic_attach(device_t dev) { struct tegra_lic_sc *sc; phandle_t node; phandle_t parent_xref; int i, rv; sc = device_get_softc(dev); sc->dev = dev; node = ofw_bus_get_node(dev); rv = OF_getencprop(node, "interrupt-parent", &parent_xref, sizeof(parent_xref)); if (rv <= 0) { device_printf(dev, "Cannot read parent node property\n"); goto fail; } sc->parent = OF_device_from_xref(parent_xref); if (sc->parent == NULL) { device_printf(dev, "Cannott find parent controller\n"); goto fail; } if (bus_alloc_resources(dev, lic_spec, sc->mem_res)) { device_printf(dev, "Cannott allocate resources\n"); goto fail; } /* Disable all interrupts, route all to irq */ for (i = 0; i < nitems(lic_spec); i++) { if (sc->mem_res[i] == NULL) continue; WR4(sc, i, LIC_CPU_IER_CLR, 0xFFFFFFFF); WR4(sc, i, LIC_CPU_IEP_CLASS, 0); } if (intr_pic_register(dev, OF_xref_from_node(node)) == NULL) { device_printf(dev, "Cannot register PIC\n"); goto fail; } return (0); fail: bus_release_resources(dev, lic_spec, sc->mem_res); return (ENXIO); }
static int epic_detach(device_t dev) { struct epic_softc *sc; sc = device_get_softc(dev); led_destroy(sc->sc_led_dev_alert); led_destroy(sc->sc_led_dev_power); bus_release_resources(dev, epic_res_spec, sc->sc_res); EPIC_LOCK_DESTROY(sc); return (0); }
static int al_serdes_detach(device_t dev) { struct al_serdes_softc *sc; sc = device_get_softc(dev); bus_release_resources(dev, al_serdes_spec, &sc->res); for (int i = 0; i < nitems(alpine_serdes_eth_group_mode); i++) { mtx_destroy(&alpine_serdes_eth_group_mode[i].lock); alpine_serdes_eth_group_mode[i].mode_set = false; } return (0); }