void CEnv::Resume() { if (mniters == 0) { Rprintf( "Run method has to be called first. Ignored.\n"); return; } if (mncurrnetburnin < mnburnin) { Rprintf( "Resuming burnin at %d\n", mncurrnetburnin); for (; mncurrnetburnin < mnburnin; mncurrnetburnin++) { Update(); if (check_interrupt()) { throw interrupt_exception("The burnin stage was interrupted."); } } } if (mncurrentiter < mniters) { Rprintf( "Resuming mcmc at %d\n", mncurrentiter); for (; mncurrentiter < mniters; mncurrentiter++) { Update(); Rprintf( "iter = %d kstar = %d alpha = %g Nmis = %d\n", mncurrentiter, m->par->k_star,m->par->alpha, m->par->Nmis ) ; if ( mbEnableTracer && (mncurrentiter+1) % mnthinning == 0) { if (t->Trace(mnsaved,mncurrentiter)) { mnsaved++; } else { Rprintf( "Tracer is full.\n") ; } } if (check_interrupt()) { throw interrupt_exception("The mcmc iteration was interrupted."); } } } else{ Rprintf( "The last run was finished.\n") ; } }
void got_packet(u_char * useless, const struct pcap_pkthdr *pheader, const u_char * packet) { config.p_s.got_packets++; packetinfo pstruct = {0}; packetinfo *pi = &pstruct; pi->packet = packet; pi->pheader = pheader; set_pkt_end_ptr (pi); config.tstamp = pi->pheader->ts; // Global if (config.intr_flag != 0) { check_interrupt(); } config.inpacket = 1; prepare_eth(pi); check_vlan(pi); //parse_eth(pi); if (pi->eth_type == ETHERNET_TYPE_IP) { prepare_ip4(pi); parse_ip4(pi); } else if (pi->eth_type == ETHERNET_TYPE_IPV6) { prepare_ip6(pi); parse_ip6(pi); } else { config.p_s.otherl_recv++; //vlog(0x3, "[*] ETHERNET TYPE : %x\n",pi->eth_hdr->eth_ip_type); } config.inpacket = 0; return; }
void portfolio_state::trigger_interrupt(int level) { // set interrupt pending bit m_ip |= 1 << level; check_interrupt(); }
static WRITE8_HANDLER( cop_d_w ) { /* bit description D0 _TIMER INT D1 _DATA RDY INT D2 D3 */ if (!BIT(data, 0)) { timer_int = 0; } if (!BIT(data, 1)) { data_rdy_int = 0; } check_interrupt(space->machine); }
void newbrain_state::clclk() { if (LOG) logerror("%s %s CLCLK\n", machine().time().as_string(), machine().describe_context()); m_clkint = 1; check_interrupt(); }
void newbrain_state::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) { switch (id) { case TIMER_ID_RESET: if (LOG) logerror("%s %s RESET 1\n", machine().time().as_string(), machine().describe_context()); m_maincpu->set_input_line(INPUT_LINE_HALT, CLEAR_LINE); m_cop->set_input_line(INPUT_LINE_HALT, CLEAR_LINE); break; case TIMER_ID_PWRUP: if (LOG) logerror("%s %s PWRUP 1\n", machine().time().as_string(), machine().describe_context()); m_pwrup = 1; break; case TIMER_ID_CLKINT: if (LOG) logerror("%s CLKINT\n", machine().time().as_string()); m_clkint = 0; check_interrupt(); break; } }
static void set_inte2(i8255a_t *i8255a, int state) { if (LOG) logerror("8255A Port A INTE2: %u\n", state); i8255a->inte2 = state; check_interrupt(i8255a, PORT_A); }
static void set_inte(i8255a_t *i8255a, int port, int state) { if (LOG) logerror("8255A Port %c INTE: %u\n", 'A' + port, state); i8255a->inte[port] = state; check_interrupt(i8255a, port); }
static void set_obf(i8255a_t *i8255a, int port, int state) { if (LOG) logerror("8255A Port %c OBF: %u\n", 'A' + port, state); i8255a->obf[port] = state; check_interrupt(i8255a, port); }
inline void i8255_device::set_inte2(int state) { LOG("I8255 Port A INTE2: %u\n", state); m_inte2 = state; check_interrupt(PORT_A); }
void tms5501_device::set_interrupt(uint8_t mask) { m_irq |= mask; if (LOG) logerror("TMS5501 '%s' Interrupt %02x\n", tag(), mask); check_interrupt(); }
inline void i8255_device::set_obf(int port, int state) { LOG("I8255 Port %c OBF: %u\n", 'A' + port, state); m_obf[port] = state; check_interrupt(port); }
void wd11c00_17_device::device_reset() { m_status &= ~(STATUS_IRQ | STATUS_DRQ | STATUS_BUSY); m_mask = 0; m_ra = 0; check_interrupt(); }
inline void i8255_device::set_inte(int port, int state) { if (LOG) logerror("I8255 '%s' Port %c INTE: %u\n", tag(), 'A' + port, state); m_inte[port] = state; check_interrupt(port); }
inline void i8255_device::set_inte(int port, int state) { LOG("I8255 Port %c INTE: %u\n", 'A' + port, state); m_inte[port] = state; check_interrupt(port); }
void i8214_device::r_w(UINT8 data) { if (LOG) logerror("I8214 '%s' R: %02x\n", tag().c_str(), data); m_r = data; check_interrupt(); }
inline void i8255_device::set_inte2(int state) { if (LOG) logerror("I8255 '%s' Port A INTE2: %u\n", tag(), state); m_inte2 = state; check_interrupt(PORT_A); }
inline void mccs1850_device::write_register(offs_t offset, UINT8 data) { switch (offset) { case REGISTER_STATUS: // read only break; case REGISTER_CONTROL: if (LOG) logerror("MCCS1850 '%s' Counter %s\n", tag(), (data & CONTROL_STR_STP) ? "Start" : "Stop"); m_clock_timer->enable(data & CONTROL_STR_STP); if (data & CONTROL_PD) { if (LOG) logerror("MCCS1850 '%s' Power Down\n", tag()); set_pse_line(false); } if (data & CONTROL_AR) { if (LOG) logerror("MCCS1850 '%s' Auto Restart\n", tag()); } if (data & CONTROL_AC) { if (LOG) logerror("MCCS1850 '%s' Alarm Clear\n", tag()); m_ram[REGISTER_STATUS] &= ~STATUS_AI; } if (data & CONTROL_FTUC) { if (LOG) logerror("MCCS1850 '%s' First Time Up Clear\n", tag()); m_ram[REGISTER_STATUS] &= ~STATUS_FTU; } if (data & CONTROL_RPCD) { if (LOG) logerror("MCCS1850 '%s' Request to Power Down Clear\n", tag()); m_ram[REGISTER_STATUS] &= ~STATUS_RPD; } m_ram[REGISTER_CONTROL] = data & 0xb2; check_interrupt(); break; case REGISTER_TEST_1: case REGISTER_TEST_2: case REGISTER_TEST_KICK_START_COUNTER: case REGISTER_TEST_PRESCALE_COUNTER: case REGISTER_TEST_COUNTER_INCREMENT: logerror("MCCS1850 '%s' Unsupported write to test register %02x!\n", tag(), offset); break; default: m_ram[offset] = data; } }
void tms5501_device::device_reset() { receive_register_reset(); transmit_register_reset(); m_write_xmt(1); check_interrupt(); }
void i8214_device::r_w(int line, int state) { if (LOG) logerror("I8214 '%s' R%d: %d\n", tag(), line, state); m_r &= ~(1 << line); m_r |= (state << line); check_interrupt(); }
static void fuse_ll_process(void *data, const char *buf, size_t len, struct fuse_chan *ch) { struct fuse_ll *f = (struct fuse_ll *) data; struct fuse_in_header *in = (struct fuse_in_header *) buf; const void *inarg = buf + sizeof(struct fuse_in_header); struct fuse_req *req; /* Foxconn removed start pling 06/19/2009 */ #if 0 if (f->debug) fprintf(stderr, "unique: %llu, opcode: %s (%i), nodeid: %lu, insize: %zu\n", (unsigned long long) in->unique, opname((enum fuse_opcode) in->opcode), in->opcode, (unsigned long) in->nodeid, len); #endif /* Foxconn removed end pling 06/19/2009 */ req = (struct fuse_req *) calloc(1, sizeof(struct fuse_req)); if (req == NULL) { fprintf(stderr, "fuse: failed to allocate request\n"); return; } req->f = f; req->unique = in->unique; req->ctx.uid = in->uid; req->ctx.gid = in->gid; req->ctx.pid = in->pid; req->ch = ch; req->ctr = 1; list_init_req(req); fuse_mutex_init(&req->lock); if (!f->got_init && in->opcode != FUSE_INIT) fuse_reply_err(req, EIO); else if (f->allow_root && in->uid != f->owner && in->uid != 0 && in->opcode != FUSE_INIT && in->opcode != FUSE_READ && in->opcode != FUSE_WRITE && in->opcode != FUSE_FSYNC && in->opcode != FUSE_RELEASE && in->opcode != FUSE_READDIR && in->opcode != FUSE_FSYNCDIR && in->opcode != FUSE_RELEASEDIR) { fuse_reply_err(req, EACCES); } else if (in->opcode >= FUSE_MAXOP || !fuse_ll_ops[in->opcode].func) fuse_reply_err(req, ENOSYS); else { if (in->opcode != FUSE_INTERRUPT) { struct fuse_req *intr; pthread_mutex_lock(&f->lock); intr = check_interrupt(f, req); list_add_req(req, &f->list); pthread_mutex_unlock(&f->lock); if (intr) fuse_reply_err(intr, EAGAIN); } fuse_ll_ops[in->opcode].func(req, in->nodeid, inarg); } }
void i8214_device::r_w(int line, int state) { LOG("I8214 R%d: %d\n", line, state); m_r &= ~(1 << line); m_r |= (state << line); check_interrupt(); }
void CEnv::Run(int burnin, int iter, int thining) { mnburnin = burnin; if (mniters == 0) { //only do Initialize once if mniters was not set Rprintf( "Initializing...\n"); if (burnin == 1) { Initialize(1); // for short testing } else { Initialize(500); } t->PrepareTrace(); Rprintf( "iter = %d kstar = %d alpha = %g Nmis = %d\n", mniters, m->par->k_star,m->par->alpha, m->par->Nmis ) ; mnsaved = 0; //just for consistance } else { Rprintf( "Continuing MCMC from previous run(s)...\n"); } mniters = mncurrentiter + iter; //prepare tracing if (thining <=0) { thining = 1; } mnthinning = thining; for (mncurrnetburnin = 0; mncurrnetburnin < mnburnin; mncurrnetburnin++) { Update(); if (check_interrupt()) { throw interrupt_exception("The burnin stage was interrupted."); } } for (; mncurrentiter < mniters; mncurrentiter++) { Update(); Rprintf( "iter = %d kstar = %d alpha = %g Nmis = %d\n", mncurrentiter, m->par->k_star,m->par->alpha, m->par->Nmis ) ; if ( mbEnableTracer && (mncurrentiter+1) % mnthinning == 0) { if (t->Trace(mnsaved,mncurrentiter)) { mnsaved++; } else { Rprintf( "Tracer is full.\n") ; } } if (check_interrupt()) { throw interrupt_exception("The mcmc iteration was interrupted."); } } }
static void cb_interrupt(struct libusb_transfer *transfer) { struct aura_node *node = transfer->user_data; struct usb_dev_info *inf = aura_get_transportdata(node); if (0 != check_interrupt(transfer)) return; struct usb_interrupt_packet *pck = (struct usb_interrupt_packet *) inf->ibuffer; inf->pending = (int) pck->pending_evts; itransfer_enable(node, inf->itransfer_enabled); }
FLOPPY_QL_FORMAT FLOPPY_FORMATS_END //------------------------------------------------- // centronics //------------------------------------------------- WRITE_LINE_MEMBER( sandy_super_disk_t::busy_w ) { m_busy = state; check_interrupt(); }
void i8214_device::b_w(uint8_t data) { m_current_status = data & 0x07; LOG("I8214 B: %01x\n", m_current_status); // enable interrupts m_int_dis = 0; // enable next level group m_write_enlg(1); check_interrupt(); }
void i8214_device::b_w(UINT8 data) { m_b = data & 0x07; if (LOG) logerror("I8214 '%s' B: %01x\n", tag().c_str(), m_b); // enable interrupts m_int_dis = 0; // enable next level group m_write_enlg(1); check_interrupt(); }
void thayers_state::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) { switch (id) { case TIMER_INTRQ_TICK: m_maincpu->set_input_line(INPUT_LINE_IRQ0, CLEAR_LINE); break; case TIMER_SSI263_PHONEME_TICK: m_ssi_data_request = 0; check_interrupt(); break; default: assert_always(FALSE, "Unknown id in thayers_state::device_timer"); } }
static u16 get_buf_bsize(u16 pipenum) { u16 buf_bsize = 0; if (pipenum == 0) buf_bsize = 3; else if (check_bulk_or_isoc(pipenum)) buf_bsize = R8A66597_BUF_BSIZE - 1; else if (check_interrupt(pipenum)) buf_bsize = 0; else printk(KERN_ERR "r8a66597: Illegal pipenum (%d)\n", pipenum); return buf_bsize; }
static u16 get_bufnum(u16 pipenum) { u16 bufnum = 0; if (pipenum == 0) bufnum = 0; else if (check_bulk_or_isoc(pipenum)) bufnum = 8 + (pipenum - 1) * R8A66597_BUF_BSIZE*2; else if (check_interrupt(pipenum)) bufnum = 4 + (pipenum - 6); else printk(KERN_ERR "r8a66597: Illegal pipenum (%d)\n", pipenum); return bufnum; }