static int mxc_audmux_v1_init(void) { #ifdef CONFIG_MACH_MX21 if (cpu_is_mx21()) audmux_base = MX21_IO_ADDRESS(MX21_AUDMUX_BASE_ADDR); else #endif #ifdef CONFIG_MACH_MX27 if (cpu_is_mx27()) audmux_base = MX27_IO_ADDRESS(MX27_AUDMUX_BASE_ADDR); else #endif (void)0; return 0; }
/* MX21, MX27 */ static unsigned int spi_imx_clkdiv_1(unsigned int fin, unsigned int fspi) { int i, max; if (cpu_is_mx21()) max = 18; else max = 16; for (i = 2; i < max; i++) if (fspi * mxc_clkdivs[i] >= fin) return i; return max; }
static int imx_iomuxv1_init(void) { #ifdef CONFIG_ARCH_MX1 if (cpu_is_mx1()) { imx_iomuxv1_baseaddr = MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR); imx_iomuxv1_numports = MX1_NUM_GPIO_PORT; } else #endif #ifdef CONFIG_MACH_MX21 if (cpu_is_mx21()) { imx_iomuxv1_baseaddr = MX21_IO_ADDRESS(MX21_GPIO_BASE_ADDR); imx_iomuxv1_numports = MX21_NUM_GPIO_PORT; } else #endif #ifdef CONFIG_MACH_MX27 if (cpu_is_mx27()) { imx_iomuxv1_baseaddr = MX27_IO_ADDRESS(MX27_GPIO_BASE_ADDR); imx_iomuxv1_numports = MX27_NUM_GPIO_PORT; } else #endif return -ENODEV; return 0; }
static int __devinit spi_imx_probe(struct platform_device *pdev) { struct spi_imx_master *mxc_platform_info; struct spi_master *master; struct spi_imx_data *spi_imx; struct resource *res; int i, ret; mxc_platform_info = dev_get_platdata(&pdev->dev); if (!mxc_platform_info) { dev_err(&pdev->dev, "can't get the platform data\n"); return -EINVAL; } master = spi_alloc_master(&pdev->dev, sizeof(struct spi_imx_data)); if (!master) return -ENOMEM; platform_set_drvdata(pdev, master); master->bus_num = pdev->id; master->num_chipselect = mxc_platform_info->num_chipselect; spi_imx = spi_master_get_devdata(master); spi_imx->bitbang.master = spi_master_get(master); spi_imx->chipselect = mxc_platform_info->chipselect; for (i = 0; i < master->num_chipselect; i++) { if (spi_imx->chipselect[i] < 0) continue; ret = gpio_request(spi_imx->chipselect[i], DRIVER_NAME); if (ret) { while (i > 0) { i--; if (spi_imx->chipselect[i] >= 0) gpio_free(spi_imx->chipselect[i]); } dev_err(&pdev->dev, "can't get cs gpios\n"); goto out_master_put; } } spi_imx->bitbang.chipselect = spi_imx_chipselect; spi_imx->bitbang.setup_transfer = spi_imx_setupxfer; spi_imx->bitbang.txrx_bufs = spi_imx_transfer; spi_imx->bitbang.master->setup = spi_imx_setup; spi_imx->bitbang.master->cleanup = spi_imx_cleanup; spi_imx->bitbang.master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; init_completion(&spi_imx->xfer_done); res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!res) { dev_err(&pdev->dev, "can't get platform resource\n"); ret = -ENOMEM; goto out_gpio_free; } if (!request_mem_region(res->start, resource_size(res), pdev->name)) { dev_err(&pdev->dev, "request_mem_region failed\n"); ret = -EBUSY; goto out_gpio_free; } spi_imx->base = ioremap(res->start, resource_size(res)); if (!spi_imx->base) { ret = -EINVAL; goto out_release_mem; } spi_imx->irq = platform_get_irq(pdev, 0); if (spi_imx->irq <= 0) { ret = -EINVAL; goto out_iounmap; } ret = request_irq(spi_imx->irq, spi_imx_isr, 0, DRIVER_NAME, spi_imx); if (ret) { dev_err(&pdev->dev, "can't get irq%d: %d\n", spi_imx->irq, ret); goto out_iounmap; } if (cpu_is_mx25() || cpu_is_mx31() || cpu_is_mx35()) { spi_imx->intctrl = mx31_intctrl; spi_imx->config = mx31_config; spi_imx->trigger = mx31_trigger; spi_imx->rx_available = mx31_rx_available; } else if (cpu_is_mx27() || cpu_is_mx21()) { spi_imx->intctrl = mx27_intctrl; spi_imx->config = mx27_config; spi_imx->trigger = mx27_trigger; spi_imx->rx_available = mx27_rx_available; } else if (cpu_is_mx1()) { spi_imx->intctrl = mx1_intctrl; spi_imx->config = mx1_config; spi_imx->trigger = mx1_trigger; spi_imx->rx_available = mx1_rx_available; } else BUG(); spi_imx->clk = clk_get(&pdev->dev, NULL); if (IS_ERR(spi_imx->clk)) { dev_err(&pdev->dev, "unable to get clock\n"); ret = PTR_ERR(spi_imx->clk); goto out_free_irq; } clk_enable(spi_imx->clk); spi_imx->spi_clk = clk_get_rate(spi_imx->clk); if (cpu_is_mx1() || cpu_is_mx21() || cpu_is_mx27()) writel(1, spi_imx->base + MXC_RESET); /* drain receive buffer */ if (cpu_is_mx25() || cpu_is_mx31() || cpu_is_mx35()) while (readl(spi_imx->base + MX3_CSPISTAT) & MX3_CSPISTAT_RR) readl(spi_imx->base + MXC_CSPIRXDATA); spi_imx->intctrl(spi_imx, 0); ret = spi_bitbang_start(&spi_imx->bitbang); if (ret) { dev_err(&pdev->dev, "bitbang start failed with %d\n", ret); goto out_clk_put; } dev_info(&pdev->dev, "probed\n"); return ret; out_clk_put: clk_disable(spi_imx->clk); clk_put(spi_imx->clk); out_free_irq: free_irq(spi_imx->irq, spi_imx); out_iounmap: iounmap(spi_imx->base); out_release_mem: release_mem_region(res->start, resource_size(res)); out_gpio_free: for (i = 0; i < master->num_chipselect; i++) if (spi_imx->chipselect[i] >= 0) gpio_free(spi_imx->chipselect[i]); out_master_put: spi_master_put(master); kfree(master); platform_set_drvdata(pdev, NULL); return ret; }
static int __devinit spi_imx_probe(struct platform_device *pdev) { struct spi_imx_master *mxc_platform_info; struct spi_master *master; struct spi_imx_data *spi_imx; struct resource *res; int i, ret; mxc_platform_info = dev_get_platdata(&pdev->dev); if (!mxc_platform_info) { dev_err(&pdev->dev, "can't get the platform data\n"); return -EINVAL; } master = spi_alloc_master(&pdev->dev, sizeof(struct spi_imx_data)); if (!master) return -ENOMEM; platform_set_drvdata(pdev, master); master->bus_num = pdev->id; master->num_chipselect = mxc_platform_info->num_chipselect; spi_imx = spi_master_get_devdata(master); spi_imx->bitbang.master = spi_master_get(master); spi_imx->chipselect = mxc_platform_info->chipselect; for (i = 0; i < master->num_chipselect; i++) { if (spi_imx->chipselect[i] < 0) continue; ret = gpio_request(spi_imx->chipselect[i], DRIVER_NAME); if (ret) { while (i > 0) { i--; if (spi_imx->chipselect[i] >= 0) gpio_free(spi_imx->chipselect[i]); } dev_err(&pdev->dev, "can't get cs gpios\n"); goto out_master_put; } } spi_imx->bitbang.chipselect = spi_imx_chipselect; spi_imx->bitbang.setup_transfer = spi_imx_setupxfer; spi_imx->bitbang.txrx_bufs = spi_imx_transfer; spi_imx->bitbang.master->setup = spi_imx_setup; spi_imx->bitbang.master->cleanup = spi_imx_cleanup; spi_imx->bitbang.master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; init_completion(&spi_imx->xfer_done); if (pdev->id_entry->driver_data == SPI_IMX_VER_AUTODETECT) { if (cpu_is_mx25() || cpu_is_mx35()) spi_imx->devtype_data = spi_imx_devtype_data[SPI_IMX_VER_0_7]; else if (cpu_is_mx25() || cpu_is_mx31() || cpu_is_mx35()) spi_imx->devtype_data = spi_imx_devtype_data[SPI_IMX_VER_0_4]; else if (cpu_is_mx27() || cpu_is_mx21()) spi_imx->devtype_data = spi_imx_devtype_data[SPI_IMX_VER_0_0]; else if (cpu_is_mx1()) spi_imx->devtype_data = spi_imx_devtype_data[SPI_IMX_VER_IMX1]; else BUG(); } else spi_imx->devtype_data = spi_imx_devtype_data[pdev->id_entry->driver_data]; if (!spi_imx->devtype_data.intctrl) { dev_err(&pdev->dev, "no support for this device compiled in\n"); ret = -ENODEV; goto out_gpio_free; } res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!res) { dev_err(&pdev->dev, "can't get platform resource\n"); ret = -ENOMEM; goto out_gpio_free; } if (!request_mem_region(res->start, resource_size(res), pdev->name)) { dev_err(&pdev->dev, "request_mem_region failed\n"); ret = -EBUSY; goto out_gpio_free; } spi_imx->base = ioremap(res->start, resource_size(res)); if (!spi_imx->base) { ret = -EINVAL; goto out_release_mem; } spi_imx->irq = platform_get_irq(pdev, 0); if (spi_imx->irq <= 0) { ret = -EINVAL; goto out_iounmap; } ret = request_irq(spi_imx->irq, spi_imx_isr, 0, DRIVER_NAME, spi_imx); if (ret) { dev_err(&pdev->dev, "can't get irq%d: %d\n", spi_imx->irq, ret); goto out_iounmap; } spi_imx->clk = clk_get(&pdev->dev, NULL); if (IS_ERR(spi_imx->clk)) { dev_err(&pdev->dev, "unable to get clock\n"); ret = PTR_ERR(spi_imx->clk); goto out_free_irq; } clk_enable(spi_imx->clk); spi_imx->spi_clk = clk_get_rate(spi_imx->clk); spi_imx->devtype_data.reset(spi_imx); spi_imx->devtype_data.intctrl(spi_imx, 0); ret = spi_bitbang_start(&spi_imx->bitbang); if (ret) { dev_err(&pdev->dev, "bitbang start failed with %d\n", ret); goto out_clk_put; } dev_info(&pdev->dev, "probed\n"); return ret; out_clk_put: clk_disable(spi_imx->clk); clk_put(spi_imx->clk); out_free_irq: free_irq(spi_imx->irq, spi_imx); out_iounmap: iounmap(spi_imx->base); out_release_mem: release_mem_region(res->start, resource_size(res)); out_gpio_free: for (i = 0; i < master->num_chipselect; i++) if (spi_imx->chipselect[i] >= 0) gpio_free(spi_imx->chipselect[i]); out_master_put: spi_master_put(master); kfree(master); platform_set_drvdata(pdev, NULL); return ret; }