static int cs42l73_probe(struct snd_soc_codec *codec) { int ret; struct cs42l73_private *cs42l73 = snd_soc_codec_get_drvdata(codec); codec->control_data = cs42l73->regmap; ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_REGMAP); if (ret < 0) { dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); return ret; } cs42l73_set_bias_level(codec, SND_SOC_BIAS_STANDBY); /* Set Charge Pump Frequency */ if (cs42l73->pdata.chgfreq) snd_soc_update_bits(codec, CS42L73_CPFCHC, CS42L73_CHARGEPUMP_MASK, cs42l73->pdata.chgfreq << 4); /* MCLK1 as master clk */ cs42l73->mclksel = CS42L73_CLKID_MCLK1; cs42l73->mclk = 0; return ret; }
static int cs42l73_probe(struct snd_soc_codec *codec) { int ret; unsigned int devid = 0; struct cs42l73_private *cs42l73 = snd_soc_codec_get_drvdata(codec); ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_I2C); if (ret < 0) { dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); return ret; } cs42l73_set_bias_level(codec, SND_SOC_BIAS_OFF); codec->dapm.idle_bias_off = 1; /* initialize codec */ ret = snd_soc_read(codec, CS42L73_DEVID_AB); devid = (ret & 0xFF) << 12; ret = snd_soc_read(codec, CS42L73_DEVID_CD); devid |= (ret & 0xFF) << 4; ret = snd_soc_read(codec, CS42L73_DEVID_E); devid |= (ret & 0xF0) >> 4; if (devid != CS42L73_DEVID) { dev_err(codec->dev, "CS42L73 Device ID (%X). Expected %X\n", devid, CS42L73_DEVID); return ret; } ret = snd_soc_read(codec, CS42L73_REVID); if (ret < 0) { dev_err(codec->dev, "Get Revision ID failed\n"); return ret; } dev_info(codec->dev, "Cirrus Logic CS42L73, Revision: %02X\n", ret & 0xFF); cs42l73->mclksel = CS42L73_CLKID_MCLK1; /* MCLK1 as master clk */ cs42l73->mclk = 0; dev_err(codec->dev, "completed probe, testing read write\n"); return ret; }
static int cs42l73_probe(struct snd_soc_codec *codec) { struct cs42l73_private *cs42l73 = snd_soc_codec_get_drvdata(codec); cs42l73_set_bias_level(codec, SND_SOC_BIAS_STANDBY); /* Set Charge Pump Frequency */ if (cs42l73->pdata.chgfreq) snd_soc_update_bits(codec, CS42L73_CPFCHC, CS42L73_CHARGEPUMP_MASK, cs42l73->pdata.chgfreq << 4); /* MCLK1 as master clk */ cs42l73->mclksel = CS42L73_CLKID_MCLK1; cs42l73->mclk = 0; return 0; }
static int cs42l73_probe(struct snd_soc_codec *codec) { int ret; struct cs42l73_private *cs42l73 = snd_soc_codec_get_drvdata(codec); codec->control_data = cs42l73->regmap; ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_REGMAP); if (ret < 0) { dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); return ret; } regcache_cache_only(cs42l73->regmap, true); cs42l73_set_bias_level(codec, SND_SOC_BIAS_STANDBY); cs42l73->mclksel = CS42L73_CLKID_MCLK1; /* MCLK1 as master clk */ cs42l73->mclk = 0; return ret; }
static int cs42l73_remove(struct snd_soc_codec *codec) { cs42l73_set_bias_level(codec, SND_SOC_BIAS_OFF); return 0; }
static int cs42l73_resume(struct snd_soc_codec *codec) { cs42l73_set_bias_level(codec, SND_SOC_BIAS_STANDBY); return 0; }
static int cs42l73_suspend(struct snd_soc_codec *codec, pm_message_t state) { cs42l73_set_bias_level(codec, SND_SOC_BIAS_OFF); return 0; }