static TIMER_DEVICE_CALLBACK( ddragon3_scanline ) { ddragon3_state *state = timer.machine().driver_data<ddragon3_state>(); int scanline = param; /* An interrupt is generated every 16 scanlines */ if (scanline % 16 == 0) { if (scanline > 0) timer.machine().primary_screen->update_partial(scanline - 1); device_set_input_line(state->m_maincpu, 5, ASSERT_LINE); } /* Vblank is raised on scanline 248 */ if (scanline == 248) { timer.machine().primary_screen->update_partial(scanline - 1); device_set_input_line(state->m_maincpu, 6, ASSERT_LINE); } }
static WRITE_LINE_DEVICE_HANDLER( pcjr_pic8259_set_int_line ) { if ( cpu_get_reg( device->machine().firstcpu, STATE_GENPC ) == 0xF0454 ) { pc_int_delay_timer->adjust( device->machine().firstcpu->cycles_to_attotime(1), state ); } else { device_set_input_line(device->machine().firstcpu, 0, state ? ASSERT_LINE : CLEAR_LINE); } }
ADDRESS_MAP_END /****************************************************************************** Input Ports ******************************************************************************/ static INPUT_CHANGED( fidelz80_trigger_reset ) { fidelz80_state *state = field->port->machine().driver_data<fidelz80_state>(); device_set_input_line(state->m_maincpu, INPUT_LINE_RESET, newval ? CLEAR_LINE : ASSERT_LINE); }
static WRITE8_HANDLER( lkage_sh_nmi_enable_w ) { lkage_state *state = space->machine().driver_data<lkage_state>(); state->m_sound_nmi_enable = 1; if (state->m_pending_nmi) { /* probably wrong but commands may go lost otherwise */ device_set_input_line(state->m_audiocpu, INPUT_LINE_NMI, PULSE_LINE); state->m_pending_nmi = 0; } }
static WRITE8_HANDLER( beast_p1_w ) { djboy_state *state = space->machine().driver_data<djboy_state>(); if (data == 0xff) { state->m_beast_int0_l = 1; device_set_input_line(state->m_beast, INPUT_LINE_IRQ0, CLEAR_LINE); } state->m_beast_p1 = data; }
static WRITE16_HANDLER( sound_command_w ) { dcheese_state *state = space->machine().driver_data<dcheese_state>(); if (ACCESSING_BITS_0_7) { /* write the latch and set the IRQ */ state->m_soundlatch_full = 1; device_set_input_line(state->m_audiocpu, 0, ASSERT_LINE); soundlatch_w(space, 0, data & 0xff); } }
static WRITE8_HANDLER( mermaid_p1_w ) { hvyunit_state *state = space->machine().driver_data<hvyunit_state>(); if (data == 0xff) { state->m_mermaid_int0_l = 1; device_set_input_line(state->m_mermaid, INPUT_LINE_IRQ0, CLEAR_LINE); } state->m_mermaid_p[1] = data; }
static WRITE8_HANDLER( brkthru_1803_w ) { brkthru_state *state = space->machine().driver_data<brkthru_state>(); /* bit 0 = NMI enable */ state->m_nmi_mask = ~data & 1; if(data & 2) device_set_input_line(state->m_maincpu, 0, CLEAR_LINE); /* bit 1 = ? maybe IRQ acknowledge */ }
AM_RANGE(0xff0000, 0xff3fff) AM_MIRROR(0xc000) AM_RAM ADDRESS_MAP_END static READ8_HANDLER(irq_latch_r) { dblewing_state *state = space->machine().driver_data<dblewing_state>(); /* bit 1 of dblewing_sound_irq specifies IRQ command writes */ state->m_sound_irq &= ~0x02; device_set_input_line(state->m_audiocpu, 0, (state->m_sound_irq != 0) ? ASSERT_LINE : CLEAR_LINE); return state->m_sound_irq; }
void abc77_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) { switch (id) { case TIMER_SERIAL: serial_clock(); break; case TIMER_RESET: device_set_input_line(m_maincpu, INPUT_LINE_RESET, CLEAR_LINE); break; } }
/*********************************************************** GFX DECODING ***********************************************************/ static const gfx_layout tilelayout = { 16,16, /* 16*16 sprites */ RGN_FRAC(1,1), 4, /* 4 bits per pixel */ { 0, 1, 2, 3 }, { 3*4, 2*4, 11*4, 10*4, 1*4, 0*4, 9*4, 8*4, 7*4, 6*4, 15*4, 14*4, 5*4, 4*4, 13*4, 12*4 }, { 0*64, 1*64, 2*64, 3*64, 4*64, 5*64, 6*64, 7*64, 8*64, 9*64, 10*64, 11*64, 12*64, 13*64, 14*64, 15*64 }, 128*8 /* every sprite takes 128 consecutive bytes */ }; static const gfx_layout charlayout = { 8,8, /* 8*8 characters */ RGN_FRAC(1,1), 4, /* 4 bits per pixel */ { 0, 1, 2, 3 }, { 2*4, 3*4, 0*4, 1*4, 6*4, 7*4, 4*4, 5*4 }, { 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32 }, 32*8 /* every sprite takes 32 consecutive bytes */ }; static GFXDECODE_START( warriorb ) GFXDECODE_ENTRY( "gfx2", 0, tilelayout, 0, 256 ) /* sprites */ GFXDECODE_ENTRY( "gfx1", 0, charlayout, 0, 256 ) /* scr tiles (screen 1) */ GFXDECODE_ENTRY( "gfx3", 0, charlayout, 0, 256 ) /* scr tiles (screen 2) */ GFXDECODE_END /************************************************************** YM2610 (SOUND) **************************************************************/ /* handler called by the YM2610 emulator when the internal timers cause an IRQ */ static void irqhandler( device_t *device, int irq ) { warriorb_state *state = device->machine().driver_data<warriorb_state>(); device_set_input_line(state->m_audiocpu, 0, irq ? ASSERT_LINE : CLEAR_LINE); }
static void namco_50xx_irq_set(device_t *device) { namco_50xx_state *state = get_safe_token(device); device_set_input_line(state->m_cpu, 0, ASSERT_LINE); // The execution time of one instruction is ~4us, so we must make sure to // give the cpu time to poll the /IRQ input before we clear it. // The input clock to the 06XX interface chip is 64H, that is // 18432000/6/64 = 48kHz, so it makes sense for the irq line to be // asserted for one clock cycle ~= 21us. device->machine().scheduler().timer_set(attotime::from_usec(21), FUNC(namco_50xx_irq_clear), 0, (void *)device); }
INPUT_PORTS_END /*************************************************************************** Machine Drivers ***************************************************************************/ static INTERRUPT_GEN( unknown_interrupt ) { lastfght_state *state = device->machine().driver_data<lastfght_state>(); device_set_input_line(state->m_maincpu, H8_METRO_TIMER_HACK, HOLD_LINE); }
INPUT_PORTS_END static void sound_irq( device_t *device, int state ) { dblewing_state *driver_state = device->machine().driver_data<dblewing_state>(); /* bit 0 of dblewing_sound_irq specifies IRQ from sound chip */ if (state) driver_state->m_sound_irq |= 0x01; else driver_state->m_sound_irq &= ~0x01; device_set_input_line(driver_state->m_audiocpu, 0, (driver_state->m_sound_irq != 0) ? ASSERT_LINE : CLEAR_LINE); }
GFXDECODE_END /************************************* * * Sound Interfaces * *************************************/ static void dd3_ymirq_handler(device_t *device, int irq) { ddragon3_state *state = device->machine().driver_data<ddragon3_state>(); device_set_input_line(state->m_audiocpu, 0 , irq ? ASSERT_LINE : CLEAR_LINE ); }
static WRITE8_HANDLER( bking_soundlatch_w ) { bking_state *state = space->machine().driver_data<bking_state>(); int i, code = 0; for (i = 0;i < 8;i++) if (data & (1 << i)) code |= 0x80 >> i; soundlatch_w(space, offset, code); if (state->m_sound_nmi_enable) device_set_input_line(state->m_audiocpu, INPUT_LINE_NMI, PULSE_LINE); }
static TIMER_CALLBACK( nmi_generate ) { namco_06xx_state *state = get_safe_token((device_t *)ptr); if (!state->m_nmicpu->suspended(SUSPEND_REASON_HALT | SUSPEND_REASON_RESET | SUSPEND_REASON_DISABLE)) { LOG(("NMI cpu '%s'\n",state->m_nmicpu->tag())); device_set_input_line(state->m_nmicpu, INPUT_LINE_NMI, PULSE_LINE); } else LOG(("NMI not generated because cpu '%s' is suspended\n",state->m_nmicpu->tag())); }
static WRITE8_HANDLER( sonson_sh_irqtrigger_w ) { sonson_state *state = space->machine().driver_data<sonson_state>(); data &= 1; if (state->m_last_irq == 0 && data == 1) { /* setting bit 0 low then high triggers IRQ on the sound CPU */ device_set_input_line(state->m_audiocpu, M6809_FIRQ_LINE, HOLD_LINE); } state->m_last_irq = data; }
static INTERRUPT_GEN (megaplay_bios_irq) { int sline; sline = device->machine().primary_screen->vpos(); if (sline ==0) { hintcount = segae_vdp_regs[0][10]; } if (sline <= 192) { // if (sline != 192) segae_drawscanline(sline,1,1); if (sline == 192) segae_vintpending = 1; if (hintcount == 0) { hintcount = segae_vdp_regs[0][10]; segae_hintpending = 1; if ((segae_vdp_regs[0][0] & 0x10)) { device_set_input_line(device, 0, HOLD_LINE); return; } } else { hintcount--; } } if (sline > 192) { hintcount = segae_vdp_regs[0][10]; if ( (sline<0xe0) && (segae_vintpending) ) { device_set_input_line(device, 0, HOLD_LINE); } } }
void ngp_state::machine_reset() { m_old_to3 = 0; m_tlcs900 = machine().device( "maincpu" ); m_z80 = machine().device( "soundcpu" ); m_t6w28 = machine().device( "t6w28" ); m_dac_l = machine().device( "dac_l" ); m_dac_r = machine().device( "dac_r" ); m_k1ge = machine().device( "k1ge" ); device_suspend( m_z80, SUSPEND_REASON_HALT, 1 ); device_set_input_line( m_z80, 0, CLEAR_LINE ); }
ADDRESS_MAP_END static INPUT_CHANGED( power_callback ) { ngp_state *state = field.machine().driver_data<ngp_state>(); if ( state->m_io_reg[0x33] & 0x04 ) { device_set_input_line( state->m_tlcs900, TLCS900_NMI, (input_port_read(field.machine(), "Power") & 0x01 ) ? CLEAR_LINE : ASSERT_LINE ); } }
GFXDECODE_END /****************************************************************************** Sound definitions ******************************************************************************/ static void irqhandler( device_t *device, int irq ) { inufuku_state *state = device->machine().driver_data<inufuku_state>(); device_set_input_line(state->m_audiocpu, 0, irq ? ASSERT_LINE : CLEAR_LINE); }
// interrupt generation is NOT understood // but the order must be something like this, // if it is incorrect jchan2 will crash when // certain characters win/lose but no finish // move was performed static TIMER_DEVICE_CALLBACK( jchan_vblank ) { jchan_state *state = timer.machine().driver_data<jchan_state>(); int scanline = param; if(scanline == 240) device_set_input_line(state->m_maincpu, 1, HOLD_LINE); if(scanline == 11) device_set_input_line(state->m_maincpu, 2, HOLD_LINE); if (state->m_irq_sub_enable) { if(scanline == 240) device_set_input_line(state->m_subcpu, 1, HOLD_LINE); if(scanline == 249) device_set_input_line(state->m_subcpu, 2, HOLD_LINE); if(scanline == 11) device_set_input_line(state->m_subcpu, 3, HOLD_LINE); } }
// Road Lines gfxdecodable ? GFXDECODE_END /************************************************************** YM2151 (SOUND) **************************************************************/ /* handler called by the YM2151 emulator when the internal timers cause an IRQ */ static void irq_handler( device_t *device, int irq ) /* assumes Z80 sandwiched between 68Ks */ { topspeed_state *state = device->machine().driver_data<topspeed_state>(); device_set_input_line(state->m_audiocpu, 0, irq ? ASSERT_LINE : CLEAR_LINE); }
GFXDECODE_END /*************************************************************************** Machine Drivers ***************************************************************************/ static void metlclsh_irqhandler(device_t *device, int linestate) { metlclsh_state *state = device->machine().driver_data<metlclsh_state>(); device_set_input_line(state->m_maincpu, M6809_IRQ_LINE, linestate); }
static WRITE8_HANDLER( boxer_pot_w ) { boxer_state *state = space->machine().driver_data<boxer_state>(); /* BIT0 => HPOT1 */ /* BIT1 => VPOT1 */ /* BIT2 => RPOT1 */ /* BIT3 => HPOT2 */ /* BIT4 => VPOT2 */ /* BIT5 => RPOT2 */ state->m_pot_latch = data & 0x3f; device_set_input_line(state->m_maincpu, INPUT_LINE_NMI, CLEAR_LINE); }
static IRQ_CALLBACK(hunchbkg_irq_callback) { //galaxold_state *state = device->machine().driver_data<galaxold_state>(); /* for some reason a call to cputag_set_input_line * is significantly delayed .... * * cputag_set_input_line(device->machine(), "maincpu", 0, CLEAR_LINE); * * Therefore we reset the line without any detour .... */ device_set_input_line(device->machine().firstcpu, 0, CLEAR_LINE); //cpu_set_info(device->machine().firstcpu, CPUINFO_INT_INPUT_STATE + state->m_irq_line, CLEAR_LINE); return 0x03; }
static WRITE16_HANDLER( inufuku_soundcommand_w ) { inufuku_state *state = space->machine().driver_data<inufuku_state>(); if (ACCESSING_BITS_0_7) { /* hack... sound doesn't work otherwise */ if (data == 0x08) return; state->m_pending_command = 1; soundlatch_w(space, 0, data & 0xff); device_set_input_line(state->m_audiocpu, INPUT_LINE_NMI, PULSE_LINE); } }
GFXDECODE_END /************************************* * * Sound interface * *************************************/ static void irqhandler(device_t *device, int irq) { fromanc2_state *state = device->machine().driver_data<fromanc2_state>(); device_set_input_line(state->m_audiocpu, 0, irq ? ASSERT_LINE : CLEAR_LINE); }
INPUT_PORTS_END /*************************************************************************** Machine Driver ***************************************************************************/ static INTERRUPT_GEN( vendetta_irq ) { vendetta_state *state = device->machine().driver_data<vendetta_state>(); if (state->m_irq_enabled) device_set_input_line(device, KONAMI_IRQ_LINE, HOLD_LINE); }