static int __init atmel_pwm_bl_probe(struct platform_device *pdev) { struct backlight_properties props; const struct atmel_pwm_bl_platform_data *pdata; struct backlight_device *bldev; struct atmel_pwm_bl *pwmbl; int retval; pwmbl = devm_kzalloc(&pdev->dev, sizeof(struct atmel_pwm_bl), GFP_KERNEL); if (!pwmbl) return -ENOMEM; pwmbl->pdev = pdev; pdata = pdev->dev.platform_data; if (!pdata) { retval = -ENODEV; goto err_free_mem; } if (pdata->pwm_compare_max < pdata->pwm_duty_max || pdata->pwm_duty_min > pdata->pwm_duty_max || pdata->pwm_frequency == 0) { retval = -EINVAL; goto err_free_mem; } pwmbl->pdata = pdata; pwmbl->gpio_on = pdata->gpio_on; retval = pwm_channel_alloc(pdata->pwm_channel, &pwmbl->pwmc); if (retval) goto err_free_mem; if (pwmbl->gpio_on != -1) { retval = devm_gpio_request(&pdev->dev, pwmbl->gpio_on, "gpio_atmel_pwm_bl"); if (retval) { pwmbl->gpio_on = -1; goto err_free_pwm; } /* Turn display off by default. */ retval = gpio_direction_output(pwmbl->gpio_on, 0 ^ pdata->on_active_low); if (retval) goto err_free_pwm; } memset(&props, 0, sizeof(struct backlight_properties)); props.type = BACKLIGHT_RAW; props.max_brightness = pdata->pwm_duty_max - pdata->pwm_duty_min; bldev = backlight_device_register("atmel-pwm-bl", &pdev->dev, pwmbl, &atmel_pwm_bl_ops, &props); if (IS_ERR(bldev)) { retval = PTR_ERR(bldev); goto err_free_pwm; } pwmbl->bldev = bldev; platform_set_drvdata(pdev, pwmbl); /* Power up the backlight by default at middle intesity. */ bldev->props.power = FB_BLANK_UNBLANK; bldev->props.brightness = bldev->props.max_brightness / 2; retval = atmel_pwm_bl_init_pwm(pwmbl); if (retval) goto err_free_bl_dev; atmel_pwm_bl_set_intensity(bldev); return 0; err_free_bl_dev: platform_set_drvdata(pdev, NULL); backlight_device_unregister(bldev); err_free_pwm: pwm_channel_free(&pwmbl->pwmc); err_free_mem: return retval; }
static struct mii_bus *mdio_gpio_bus_init(struct device *dev, struct mdio_gpio_platform_data *pdata, int bus_id) { struct mii_bus *new_bus; struct mdio_gpio_info *bitbang; int i; bitbang = devm_kzalloc(dev, sizeof(*bitbang), GFP_KERNEL); if (!bitbang) goto out; bitbang->ctrl.ops = &mdio_gpio_ops; bitbang->ctrl.reset = pdata->reset; bitbang->mdc = pdata->mdc; bitbang->mdc_active_low = pdata->mdc_active_low; bitbang->mdio = pdata->mdio; bitbang->mdio_active_low = pdata->mdio_active_low; bitbang->mdo = pdata->mdo; bitbang->mdo_active_low = pdata->mdo_active_low; new_bus = alloc_mdio_bitbang(&bitbang->ctrl); if (!new_bus) goto out; new_bus->name = "GPIO Bitbanged MDIO", new_bus->phy_mask = pdata->phy_mask; new_bus->irq = pdata->irqs; new_bus->parent = dev; if (new_bus->phy_mask == ~0) goto out_free_bus; for (i = 0; i < PHY_MAX_ADDR; i++) if (!new_bus->irq[i]) new_bus->irq[i] = PHY_POLL; snprintf(new_bus->id, MII_BUS_ID_SIZE, "gpio-%x", bus_id); if (devm_gpio_request(dev, bitbang->mdc, "mdc")) goto out_free_bus; if (devm_gpio_request(dev, bitbang->mdio, "mdio")) goto out_free_bus; if (bitbang->mdo) { if (devm_gpio_request(dev, bitbang->mdo, "mdo")) goto out_free_bus; gpio_direction_output(bitbang->mdo, 1); gpio_direction_input(bitbang->mdio); } gpio_direction_output(bitbang->mdc, 0); dev_set_drvdata(dev, new_bus); return new_bus; out_free_bus: free_mdio_bitbang(new_bus); out: return NULL; }
static int pps_gpio_probe(struct platform_device *pdev) { struct pps_gpio_device_data *data; const char *gpio_label; int ret; int pps_default_params; const struct pps_gpio_platform_data *pdata = pdev->dev.platform_data; struct device_node *np = pdev->dev.of_node; /* allocate space for device info */ data = devm_kzalloc(&pdev->dev, sizeof(struct pps_gpio_device_data), GFP_KERNEL); if (!data) return -ENOMEM; if (pdata) { data->gpio_pin = pdata->gpio_pin; gpio_label = pdata->gpio_label; data->assert_falling_edge = pdata->assert_falling_edge; data->capture_clear = pdata->capture_clear; } else { ret = of_get_gpio(np, 0); if (ret < 0) { dev_err(&pdev->dev, "failed to get GPIO from device tree\n"); return ret; } data->gpio_pin = ret; gpio_label = PPS_GPIO_NAME; if (of_get_property(np, "assert-falling-edge", NULL)) data->assert_falling_edge = true; } /* GPIO setup */ ret = devm_gpio_request(&pdev->dev, data->gpio_pin, gpio_label); if (ret) { dev_err(&pdev->dev, "failed to request GPIO %u\n", data->gpio_pin); return ret; } ret = gpio_direction_input(data->gpio_pin); if (ret) { dev_err(&pdev->dev, "failed to set pin direction\n"); return -EINVAL; } /* IRQ setup */ ret = gpio_to_irq(data->gpio_pin); if (ret < 0) { dev_err(&pdev->dev, "failed to map GPIO to IRQ: %d\n", ret); return -EINVAL; } data->irq = ret; /* initialize PPS specific parts of the bookkeeping data structure. */ data->info.mode = PPS_CAPTUREASSERT | PPS_OFFSETASSERT | PPS_ECHOASSERT | PPS_CANWAIT | PPS_TSFMT_TSPEC; if (data->capture_clear) data->info.mode |= PPS_CAPTURECLEAR | PPS_OFFSETCLEAR | PPS_ECHOCLEAR; data->info.owner = THIS_MODULE; snprintf(data->info.name, PPS_MAX_NAME_LEN - 1, "%s.%d", pdev->name, pdev->id); /* register PPS source */ pps_default_params = PPS_CAPTUREASSERT | PPS_OFFSETASSERT; if (data->capture_clear) pps_default_params |= PPS_CAPTURECLEAR | PPS_OFFSETCLEAR; data->pps = pps_register_source(&data->info, pps_default_params); if (data->pps == NULL) { dev_err(&pdev->dev, "failed to register IRQ %d as PPS source\n", data->irq); return -EINVAL; } /* register IRQ interrupt handler */ ret = devm_request_irq(&pdev->dev, data->irq, pps_gpio_irq_handler, get_irqf_trigger_flags(data), data->info.name, data); if (ret) { pps_unregister_source(data->pps); dev_err(&pdev->dev, "failed to acquire IRQ %d\n", data->irq); return -EINVAL; } platform_set_drvdata(pdev, data); dev_info(data->pps->dev, "Registered IRQ %d as PPS source\n", data->irq); return 0; }
static int spi_imx_probe(struct platform_device *pdev) { struct device_node *np = pdev->dev.of_node; const struct of_device_id *of_id = of_match_device(spi_imx_dt_ids, &pdev->dev); struct spi_imx_master *mxc_platform_info = dev_get_platdata(&pdev->dev); struct spi_master *master; struct spi_imx_data *spi_imx; struct resource *res; int i, ret, num_cs; if (!np && !mxc_platform_info) { dev_err(&pdev->dev, "can't get the platform data\n"); return -EINVAL; } ret = of_property_read_u32(np, "fsl,spi-num-chipselects", &num_cs); if (ret < 0) { if (mxc_platform_info) num_cs = mxc_platform_info->num_chipselect; else return ret; } master = spi_alloc_master(&pdev->dev, sizeof(struct spi_imx_data) + sizeof(int) * num_cs); if (!master) return -ENOMEM; platform_set_drvdata(pdev, master); master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32); master->bus_num = pdev->id; master->num_chipselect = num_cs; spi_imx = spi_master_get_devdata(master); spi_imx->bitbang.master = master; for (i = 0; i < master->num_chipselect; i++) { int cs_gpio = of_get_named_gpio(np, "cs-gpios", i); if (!gpio_is_valid(cs_gpio) && mxc_platform_info) cs_gpio = mxc_platform_info->chipselect[i]; spi_imx->chipselect[i] = cs_gpio; if (!gpio_is_valid(cs_gpio)) continue; ret = devm_gpio_request(&pdev->dev, spi_imx->chipselect[i], DRIVER_NAME); if (ret) { dev_err(&pdev->dev, "can't get cs gpios\n"); goto out_master_put; } } spi_imx->bitbang.chipselect = spi_imx_chipselect; spi_imx->bitbang.setup_transfer = spi_imx_setupxfer; spi_imx->bitbang.txrx_bufs = spi_imx_transfer; spi_imx->bitbang.master->setup = spi_imx_setup; spi_imx->bitbang.master->cleanup = spi_imx_cleanup; spi_imx->bitbang.master->prepare_message = spi_imx_prepare_message; spi_imx->bitbang.master->unprepare_message = spi_imx_unprepare_message; spi_imx->bitbang.master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; init_completion(&spi_imx->xfer_done); spi_imx->devtype_data = of_id ? of_id->data : (struct spi_imx_devtype_data *) pdev->id_entry->driver_data; res = platform_get_resource(pdev, IORESOURCE_MEM, 0); spi_imx->base = devm_ioremap_resource(&pdev->dev, res); if (IS_ERR(spi_imx->base)) { ret = PTR_ERR(spi_imx->base); goto out_master_put; } spi_imx->irq = platform_get_irq(pdev, 0); if (spi_imx->irq < 0) { ret = spi_imx->irq; goto out_master_put; } ret = devm_request_irq(&pdev->dev, spi_imx->irq, spi_imx_isr, 0, dev_name(&pdev->dev), spi_imx); if (ret) { dev_err(&pdev->dev, "can't get irq%d: %d\n", spi_imx->irq, ret); goto out_master_put; } spi_imx->clk_ipg = devm_clk_get(&pdev->dev, "ipg"); if (IS_ERR(spi_imx->clk_ipg)) { ret = PTR_ERR(spi_imx->clk_ipg); goto out_master_put; } spi_imx->clk_per = devm_clk_get(&pdev->dev, "per"); if (IS_ERR(spi_imx->clk_per)) { ret = PTR_ERR(spi_imx->clk_per); goto out_master_put; } ret = clk_prepare_enable(spi_imx->clk_per); if (ret) goto out_master_put; ret = clk_prepare_enable(spi_imx->clk_ipg); if (ret) goto out_put_per; spi_imx->spi_clk = clk_get_rate(spi_imx->clk_per); /* * Only validated on i.mx6 now, can remove the constrain if validated on * other chips. */ if (spi_imx->devtype_data == &imx51_ecspi_devtype_data && spi_imx_sdma_init(&pdev->dev, spi_imx, master, res)) dev_err(&pdev->dev, "dma setup error,use pio instead\n"); spi_imx->devtype_data->reset(spi_imx); spi_imx->devtype_data->intctrl(spi_imx, 0); master->dev.of_node = pdev->dev.of_node; ret = spi_bitbang_start(&spi_imx->bitbang); if (ret) { dev_err(&pdev->dev, "bitbang start failed with %d\n", ret); goto out_clk_put; } dev_info(&pdev->dev, "probed\n"); clk_disable(spi_imx->clk_ipg); clk_disable(spi_imx->clk_per); return ret; out_clk_put: clk_disable_unprepare(spi_imx->clk_ipg); out_put_per: clk_disable_unprepare(spi_imx->clk_per); out_master_put: spi_master_put(master); return ret; }
static int axp288_extcon_probe(struct platform_device *pdev) { struct axp288_extcon_info *info; struct axp20x_dev *axp20x = dev_get_drvdata(pdev->dev.parent); int ret, i, pirq, gpio; info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL); if (!info) return -ENOMEM; info->dev = &pdev->dev; info->regmap = axp20x->regmap; info->regmap_irqc = axp20x->regmap_irqc; info->pdata = pdev->dev.platform_data; if (!info->pdata) { /* Try ACPI provided pdata via device properties */ if (!device_property_present(&pdev->dev, "axp288_extcon_data\n")) dev_err(&pdev->dev, "failed to get platform data\n"); return -ENODEV; } platform_set_drvdata(pdev, info); axp288_extcon_log_rsi(info); /* Initialize extcon device */ info->edev = devm_extcon_dev_allocate(&pdev->dev, axp288_extcon_cables); if (IS_ERR(info->edev)) { dev_err(&pdev->dev, "failed to allocate memory for extcon\n"); return PTR_ERR(info->edev); } /* Register extcon device */ ret = devm_extcon_dev_register(&pdev->dev, info->edev); if (ret) { dev_err(&pdev->dev, "failed to register extcon device\n"); return ret; } /* Get otg transceiver phy */ info->otg = devm_usb_get_phy(&pdev->dev, USB_PHY_TYPE_USB2); if (IS_ERR(info->otg)) { dev_err(&pdev->dev, "failed to get otg transceiver\n"); return PTR_ERR(info->otg); } /* Set up gpio control for USB Mux */ if (info->pdata->gpio_mux_cntl) { gpio = desc_to_gpio(info->pdata->gpio_mux_cntl); ret = devm_gpio_request(&pdev->dev, gpio, "USB_MUX"); if (ret < 0) { dev_err(&pdev->dev, "failed to request the gpio=%d\n", gpio); return ret; } gpiod_direction_output(info->pdata->gpio_mux_cntl, EXTCON_GPIO_MUX_SEL_PMIC); } for (i = 0; i < EXTCON_IRQ_END; i++) { pirq = platform_get_irq(pdev, i); info->irq[i] = regmap_irq_get_virq(info->regmap_irqc, pirq); if (info->irq[i] < 0) { dev_err(&pdev->dev, "failed to get virtual interrupt=%d\n", pirq); ret = info->irq[i]; return ret; } ret = devm_request_threaded_irq(&pdev->dev, info->irq[i], NULL, axp288_extcon_isr, IRQF_ONESHOT | IRQF_NO_SUSPEND, pdev->name, info); if (ret) { dev_err(&pdev->dev, "failed to request interrupt=%d\n", info->irq[i]); return ret; } } /* Enable interrupts */ axp288_extcon_enable_irq(info); return 0; }
static int exynos_usbswitch_parse_dt(struct exynos_usb_switch *usb_switch, struct device *dev) { struct device_node *node; struct platform_device *pdev; struct pinctrl *pinctrl; int ret; /* Host detection */ usb_switch->gpio_host_detect = of_get_named_gpio(dev->of_node, "samsung,id-gpio", 0); if (!gpio_is_valid(usb_switch->gpio_host_detect)) { dev_info(dev, "host detect gpio is not available\n"); } else { ret = devm_gpio_request(dev, usb_switch->gpio_host_detect, "usbswitch_id_gpio"); if (ret) dev_err(dev, "failed to request host detect gpio"); else usb_switch->host_detect_irq = gpio_to_irq(usb_switch->gpio_host_detect); } /* Device detection */ usb_switch->gpio_device_detect = of_get_named_gpio(dev->of_node, "samsung,bsess-gpio", 0); if (!gpio_is_valid(usb_switch->gpio_device_detect)) { dev_info(dev, "device detect gpio is not available\n"); } else { ret = devm_gpio_request(dev, usb_switch->gpio_device_detect, "usbswitch_b_sess_gpio"); if (ret) dev_err(dev, "failed to request host detect gpio"); else usb_switch->device_detect_irq = gpio_to_irq(usb_switch->gpio_device_detect); } /* VBus control */ usb_switch->gpio_host_vbus = of_get_named_gpio(dev->of_node, "samsung,vbus-gpio", 0); if (gpio_is_valid(usb_switch->gpio_host_vbus)) { ret = devm_gpio_request(dev, usb_switch->gpio_host_vbus, "usbswitch_vbus_gpio"); if (ret) dev_err(dev, "failed to request vbus control gpio"); } else { /* fallback to regulator */ usb_switch->vbus_reg = devm_regulator_get(dev, "uhost-vbus"); if (IS_ERR(usb_switch->vbus_reg)) dev_info(dev, "vbus control is not available\n"); } pinctrl = devm_pinctrl_get_select_default(dev); if (IS_ERR(pinctrl)) dev_info(dev, "failed to configure pins\n"); /* EHCI */ node = of_parse_phandle(dev->of_node, "ehci", 0); if (!node) { dev_info(dev, "ehci device is not available\n"); } else { pdev = of_find_device_by_node(node); if (!pdev) dev_err(dev, "failed to find ehci device\n"); else usb_switch->ehci_dev = &pdev->dev; of_node_put(node); } /* OHCI */ node = of_parse_phandle(dev->of_node, "ohci", 0); if (!node) { dev_info(dev, "ohci device is not available\n"); } else { pdev = of_find_device_by_node(node); if (!pdev) dev_err(dev, "failed to find ohci device\n"); else usb_switch->ohci_dev = &pdev->dev; of_node_put(node); } /* UDC */ node = of_parse_phandle(dev->of_node, "udc", 0); if (!node) { dev_info(dev, "udc device is not available\n"); } else { pdev = of_find_device_by_node(node); if (!pdev) dev_err(dev, "failed to find udc device\n"); else usb_switch->s3c_udc_dev = &pdev->dev; of_node_put(node); } return 0; }
static int dw_spi_mmio_probe(struct platform_device *pdev) { struct dw_spi_mmio *dwsmmio; struct dw_spi *dws; struct resource *mem; int ret; int num_cs; dwsmmio = devm_kzalloc(&pdev->dev, sizeof(struct dw_spi_mmio), GFP_KERNEL); if (!dwsmmio) return -ENOMEM; dws = &dwsmmio->dws; /* Get basic io resource and map it */ mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!mem) { dev_err(&pdev->dev, "no mem resource?\n"); return -EINVAL; } dws->regs = devm_ioremap_resource(&pdev->dev, mem); if (IS_ERR(dws->regs)) { dev_err(&pdev->dev, "SPI region map failed\n"); return PTR_ERR(dws->regs); } dws->irq = platform_get_irq(pdev, 0); if (dws->irq < 0) { dev_err(&pdev->dev, "no irq resource?\n"); return dws->irq; /* -ENXIO */ } dwsmmio->clk = devm_clk_get(&pdev->dev, NULL); if (IS_ERR(dwsmmio->clk)) return PTR_ERR(dwsmmio->clk); ret = clk_prepare_enable(dwsmmio->clk); if (ret) return ret; dws->bus_num = pdev->id; dws->max_freq = clk_get_rate(dwsmmio->clk); num_cs = 4; if (pdev->dev.of_node) of_property_read_u32(pdev->dev.of_node, "num-cs", &num_cs); dws->num_cs = num_cs; if (pdev->dev.of_node) { int i; for (i = 0; i < dws->num_cs; i++) { int cs_gpio = of_get_named_gpio(pdev->dev.of_node, "cs-gpios", i); if (cs_gpio == -EPROBE_DEFER) { ret = cs_gpio; goto out; } if (gpio_is_valid(cs_gpio)) { ret = devm_gpio_request(&pdev->dev, cs_gpio, dev_name(&pdev->dev)); if (ret) goto out; } } } ret = dw_spi_add_host(&pdev->dev, dws); if (ret) goto out; platform_set_drvdata(pdev, dwsmmio); return 0; out: clk_disable_unprepare(dwsmmio->clk); return ret; }
static int cs4271_probe(struct snd_soc_codec *codec) { struct cs4271_private *cs4271 = snd_soc_codec_get_drvdata(codec); struct cs4271_platform_data *cs4271plat = codec->dev->platform_data; int ret; int gpio_nreset = -EINVAL; #ifdef CONFIG_OF if (of_match_device(cs4271_dt_ids, codec->dev)) gpio_nreset = of_get_named_gpio(codec->dev->of_node, "reset-gpio", 0); #endif if (cs4271plat && gpio_is_valid(cs4271plat->gpio_nreset)) gpio_nreset = cs4271plat->gpio_nreset; if (gpio_nreset >= 0) if (devm_gpio_request(codec->dev, gpio_nreset, "CS4271 Reset")) gpio_nreset = -EINVAL; if (gpio_nreset >= 0) { /* Reset codec */ gpio_direction_output(gpio_nreset, 0); udelay(1); gpio_set_value(gpio_nreset, 1); /* Give the codec time to wake up */ udelay(1); } cs4271->gpio_nreset = gpio_nreset; /* * In case of I2C, chip address specified in board data. * So cache IO operations use 8 bit codec register address. * In case of SPI, chip address and register address * passed together as 16 bit value. * Anyway, register address is masked with 0xFF inside * soc-cache code. */ if (cs4271->bus_type == SND_SOC_SPI) ret = snd_soc_codec_set_cache_io(codec, 16, 8, cs4271->bus_type); else ret = snd_soc_codec_set_cache_io(codec, 8, 8, cs4271->bus_type); if (ret) { dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); return ret; } ret = snd_soc_update_bits(codec, CS4271_MODE2, CS4271_MODE2_PDN | CS4271_MODE2_CPEN, CS4271_MODE2_PDN | CS4271_MODE2_CPEN); if (ret < 0) return ret; ret = snd_soc_update_bits(codec, CS4271_MODE2, CS4271_MODE2_PDN, 0); if (ret < 0) return ret; /* Power-up sequence requires 85 uS */ udelay(85); return snd_soc_add_codec_controls(codec, cs4271_snd_controls, ARRAY_SIZE(cs4271_snd_controls)); }
static int s3c24xx_spi_probe(struct platform_device *pdev) { struct s3c2410_spi_info *pdata; struct s3c24xx_spi *hw; struct spi_master *master; struct resource *res; int err = 0; master = spi_alloc_master(&pdev->dev, sizeof(struct s3c24xx_spi)); if (master == NULL) { dev_err(&pdev->dev, "No memory for spi_master\n"); return -ENOMEM; } hw = spi_master_get_devdata(master); memset(hw, 0, sizeof(struct s3c24xx_spi)); hw->master = master; hw->pdata = pdata = dev_get_platdata(&pdev->dev); hw->dev = &pdev->dev; if (pdata == NULL) { dev_err(&pdev->dev, "No platform data supplied\n"); err = -ENOENT; goto err_no_pdata; } platform_set_drvdata(pdev, hw); init_completion(&hw->done); /* initialise fiq handler */ s3c24xx_spi_initfiq(hw); /* setup the master state. */ /* the spi->mode bits understood by this driver: */ master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; master->num_chipselect = hw->pdata->num_cs; master->bus_num = pdata->bus_num; master->bits_per_word_mask = SPI_BPW_MASK(8); /* setup the state for the bitbang driver */ hw->bitbang.master = hw->master; hw->bitbang.setup_transfer = s3c24xx_spi_setupxfer; hw->bitbang.chipselect = s3c24xx_spi_chipsel; hw->bitbang.txrx_bufs = s3c24xx_spi_txrx; hw->master->setup = s3c24xx_spi_setup; dev_dbg(hw->dev, "bitbang at %p\n", &hw->bitbang); /* find and map our resources */ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); hw->regs = devm_ioremap_resource(&pdev->dev, res); if (IS_ERR(hw->regs)) { err = PTR_ERR(hw->regs); goto err_no_pdata; } hw->irq = platform_get_irq(pdev, 0); if (hw->irq < 0) { dev_err(&pdev->dev, "No IRQ specified\n"); err = -ENOENT; goto err_no_pdata; } err = devm_request_irq(&pdev->dev, hw->irq, s3c24xx_spi_irq, 0, pdev->name, hw); if (err) { dev_err(&pdev->dev, "Cannot claim IRQ\n"); goto err_no_pdata; } hw->clk = devm_clk_get(&pdev->dev, "spi"); if (IS_ERR(hw->clk)) { dev_err(&pdev->dev, "No clock for device\n"); err = PTR_ERR(hw->clk); goto err_no_pdata; } /* setup any gpio we can */ if (!pdata->set_cs) { if (pdata->pin_cs < 0) { dev_err(&pdev->dev, "No chipselect pin\n"); err = -EINVAL; goto err_register; } err = devm_gpio_request(&pdev->dev, pdata->pin_cs, dev_name(&pdev->dev)); if (err) { dev_err(&pdev->dev, "Failed to get gpio for cs\n"); goto err_register; } hw->set_cs = s3c24xx_spi_gpiocs; gpio_direction_output(pdata->pin_cs, 1); } else hw->set_cs = pdata->set_cs; s3c24xx_spi_initialsetup(hw); /* register our spi controller */ err = spi_bitbang_start(&hw->bitbang); if (err) { dev_err(&pdev->dev, "Failed to register SPI master\n"); goto err_register; } return 0; err_register: clk_disable(hw->clk); err_no_pdata: spi_master_put(hw->master); return err; }
static int bq24735_charger_probe(struct i2c_client *client, const struct i2c_device_id *id) { int ret; struct bq24735 *charger; struct power_supply_desc *supply_desc; struct power_supply_config psy_cfg = {}; char *name; charger = devm_kzalloc(&client->dev, sizeof(*charger), GFP_KERNEL); if (!charger) return -ENOMEM; charger->pdata = client->dev.platform_data; if (IS_ENABLED(CONFIG_OF) && !charger->pdata && client->dev.of_node) charger->pdata = bq24735_parse_dt_data(client); if (!charger->pdata) { dev_err(&client->dev, "no platform data provided\n"); return -EINVAL; } name = (char *)charger->pdata->name; if (!name) { name = kasprintf(GFP_KERNEL, "bq24735@%s", dev_name(&client->dev)); if (!name) { dev_err(&client->dev, "Failed to alloc device name\n"); return -ENOMEM; } } charger->client = client; supply_desc = &charger->charger_desc; supply_desc->name = name; supply_desc->type = POWER_SUPPLY_TYPE_MAINS; supply_desc->properties = bq24735_charger_properties; supply_desc->num_properties = ARRAY_SIZE(bq24735_charger_properties); supply_desc->get_property = bq24735_charger_get_property; psy_cfg.supplied_to = charger->pdata->supplied_to; psy_cfg.num_supplicants = charger->pdata->num_supplicants; psy_cfg.of_node = client->dev.of_node; psy_cfg.drv_data = charger; i2c_set_clientdata(client, charger); ret = bq24735_read_word(client, BQ24735_MANUFACTURER_ID); if (ret < 0) { dev_err(&client->dev, "Failed to read manufacturer id : %d\n", ret); goto err_free_name; } else if (ret != 0x0040) { dev_err(&client->dev, "manufacturer id mismatch. 0x0040 != 0x%04x\n", ret); ret = -ENODEV; goto err_free_name; } ret = bq24735_read_word(client, BQ24735_DEVICE_ID); if (ret < 0) { dev_err(&client->dev, "Failed to read device id : %d\n", ret); goto err_free_name; } else if (ret != 0x000B) { dev_err(&client->dev, "device id mismatch. 0x000b != 0x%04x\n", ret); ret = -ENODEV; goto err_free_name; } if (gpio_is_valid(charger->pdata->status_gpio)) { ret = devm_gpio_request(&client->dev, charger->pdata->status_gpio, name); if (ret) { dev_err(&client->dev, "Failed GPIO request for GPIO %d: %d\n", charger->pdata->status_gpio, ret); } charger->pdata->status_gpio_valid = !ret; } ret = bq24735_config_charger(charger); if (ret < 0) { dev_err(&client->dev, "failed in configuring charger"); goto err_free_name; } /* check for AC adapter presence */ if (bq24735_charger_is_present(charger)) { ret = bq24735_enable_charging(charger); if (ret < 0) { dev_err(&client->dev, "Failed to enable charging\n"); goto err_free_name; } } charger->charger = power_supply_register(&client->dev, supply_desc, &psy_cfg); if (IS_ERR(charger->charger)) { ret = PTR_ERR(charger->charger); dev_err(&client->dev, "Failed to register power supply: %d\n", ret); goto err_free_name; } if (client->irq) { ret = devm_request_threaded_irq(&client->dev, client->irq, NULL, bq24735_charger_isr, IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING | IRQF_ONESHOT, supply_desc->name, charger->charger); if (ret) { dev_err(&client->dev, "Unable to register IRQ %d err %d\n", client->irq, ret); goto err_unregister_supply; } } return 0; err_unregister_supply: power_supply_unregister(charger->charger); err_free_name: if (name != charger->pdata->name) kfree(name); return ret; }
static int w1_gpio_probe(struct platform_device *pdev) { struct w1_bus_master *master; struct w1_gpio_platform_data *pdata; int err; if (of_have_populated_dt()) { err = w1_gpio_probe_dt(pdev); if (err < 0) return err; } pdata = dev_get_platdata(&pdev->dev); if (!pdata) { dev_err(&pdev->dev, "No configuration data\n"); return -ENXIO; } master = devm_kzalloc(&pdev->dev, sizeof(struct w1_bus_master), GFP_KERNEL); if (!master) { dev_err(&pdev->dev, "Out of memory\n"); return -ENOMEM; } err = devm_gpio_request(&pdev->dev, pdata->pin, "w1"); if (err) { dev_err(&pdev->dev, "gpio_request (pin) failed\n"); return err; } if (gpio_is_valid(pdata->ext_pullup_enable_pin)) { err = devm_gpio_request_one(&pdev->dev, pdata->ext_pullup_enable_pin, GPIOF_INIT_LOW, "w1 pullup"); if (err < 0) { dev_err(&pdev->dev, "gpio_request_one " "(ext_pullup_enable_pin) failed\n"); return err; } } master->data = pdata; master->read_bit = w1_gpio_read_bit; if (pdata->is_open_drain) { gpio_direction_output(pdata->pin, 1); master->write_bit = w1_gpio_write_bit_val; } else { gpio_direction_input(pdata->pin); master->write_bit = w1_gpio_write_bit_dir; master->set_pullup = w1_gpio_set_pullup; } err = w1_add_master_device(master); if (err) { dev_err(&pdev->dev, "w1_add_master device failed\n"); return err; } if (pdata->enable_external_pullup) pdata->enable_external_pullup(1); if (gpio_is_valid(pdata->ext_pullup_enable_pin)) gpio_set_value(pdata->ext_pullup_enable_pin, 1); platform_set_drvdata(pdev, master); return 0; }
/********** end of rk3036 usb detections **********/ static int rk_usb_control_probe(struct platform_device *pdev) { int gpio, err; struct device_node *np = pdev->dev.of_node; int ret = 0; control_usb = devm_kzalloc(&pdev->dev, sizeof(*control_usb), GFP_KERNEL); if (!control_usb) { dev_err(&pdev->dev, "unable to alloc memory for control usb\n"); ret = -ENOMEM; goto out; } control_usb->chip_id = RK3036_USB_CTLR; control_usb->remote_wakeup = of_property_read_bool(np, "rockchip,remote_wakeup"); control_usb->usb_irq_wakeup = of_property_read_bool(np, "rockchip,usb_irq_wakeup"); INIT_DELAYED_WORK(&control_usb->usb_charger_det_work, usb_battery_charger_detect_work); control_usb->host_gpios = devm_kzalloc(&pdev->dev, sizeof(struct gpio), GFP_KERNEL); if (!control_usb->host_gpios) { dev_err(&pdev->dev, "unable to alloc memory for host_gpios\n"); ret = -ENOMEM; goto out; } gpio = of_get_named_gpio(np, "host_drv_gpio", 0); control_usb->host_gpios->gpio = gpio; if (!gpio_is_valid(gpio)) { dev_err(&pdev->dev, "invalid host gpio%d\n", gpio); } else { err = devm_gpio_request(&pdev->dev, gpio, "host_drv_gpio"); if (err) { dev_err(&pdev->dev, "failed to request GPIO%d for host_drv\n", gpio); ret = err; goto out; } gpio_direction_output(control_usb->host_gpios->gpio, 1); } control_usb->otg_gpios = devm_kzalloc(&pdev->dev, sizeof(struct gpio), GFP_KERNEL); if (!control_usb->otg_gpios) { dev_err(&pdev->dev, "unable to alloc memory for otg_gpios\n"); ret = -ENOMEM; goto out; } gpio = of_get_named_gpio(np, "otg_drv_gpio", 0); control_usb->otg_gpios->gpio = gpio; if (!gpio_is_valid(gpio)) { dev_err(&pdev->dev, "invalid otg gpio%d\n", gpio); } else { err = devm_gpio_request(&pdev->dev, gpio, "otg_drv_gpio"); if (err) { dev_err(&pdev->dev, "failed to request GPIO%d for otg_drv\n", gpio); ret = err; goto out; } gpio_direction_output(control_usb->otg_gpios->gpio, 0); } out: return ret; }
static int sirfsoc_uart_probe(struct platform_device *pdev) { struct device_node *np = pdev->dev.of_node; struct sirfsoc_uart_port *sirfport; struct uart_port *port; struct resource *res; int ret; struct dma_slave_config slv_cfg = { .src_maxburst = 1, }; struct dma_slave_config tx_slv_cfg = { .dst_maxburst = 2, }; const struct of_device_id *match; match = of_match_node(sirfsoc_uart_ids, np); sirfport = devm_kzalloc(&pdev->dev, sizeof(*sirfport), GFP_KERNEL); if (!sirfport) { ret = -ENOMEM; goto err; } sirfport->port.line = of_alias_get_id(np, "serial"); sirf_ports[sirfport->port.line] = sirfport; sirfport->port.iotype = UPIO_MEM; sirfport->port.flags = UPF_BOOT_AUTOCONF; port = &sirfport->port; port->dev = &pdev->dev; port->private_data = sirfport; sirfport->uart_reg = (struct sirfsoc_uart_register *)match->data; sirfport->hw_flow_ctrl = of_property_read_bool(np, "uart-has-rtscts") || of_property_read_bool(np, "sirf,uart-has-rtscts") /* deprecated */; if (of_device_is_compatible(np, "sirf,prima2-uart") || of_device_is_compatible(np, "sirf,atlas7-uart")) sirfport->uart_reg->uart_type = SIRF_REAL_UART; if (of_device_is_compatible(np, "sirf,prima2-usp-uart") || of_device_is_compatible(np, "sirf,atlas7-usp-uart")) { sirfport->uart_reg->uart_type = SIRF_USP_UART; if (!sirfport->hw_flow_ctrl) goto usp_no_flow_control; if (of_find_property(np, "cts-gpios", NULL)) sirfport->cts_gpio = of_get_named_gpio(np, "cts-gpios", 0); else sirfport->cts_gpio = -1; if (of_find_property(np, "rts-gpios", NULL)) sirfport->rts_gpio = of_get_named_gpio(np, "rts-gpios", 0); else sirfport->rts_gpio = -1; if ((!gpio_is_valid(sirfport->cts_gpio) || !gpio_is_valid(sirfport->rts_gpio))) { ret = -EINVAL; dev_err(&pdev->dev, "Usp flow control must have cts and rts gpio"); goto err; } ret = devm_gpio_request(&pdev->dev, sirfport->cts_gpio, "usp-cts-gpio"); if (ret) { dev_err(&pdev->dev, "Unable request cts gpio"); goto err; } gpio_direction_input(sirfport->cts_gpio); ret = devm_gpio_request(&pdev->dev, sirfport->rts_gpio, "usp-rts-gpio"); if (ret) { dev_err(&pdev->dev, "Unable request rts gpio"); goto err; } gpio_direction_output(sirfport->rts_gpio, 1); } usp_no_flow_control: if (of_device_is_compatible(np, "sirf,atlas7-uart") || of_device_is_compatible(np, "sirf,atlas7-usp-uart")) sirfport->is_atlas7 = true; if (of_property_read_u32(np, "fifosize", &port->fifosize)) { dev_err(&pdev->dev, "Unable to find fifosize in uart node.\n"); ret = -EFAULT; goto err; } res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (res == NULL) { dev_err(&pdev->dev, "Insufficient resources.\n"); ret = -EFAULT; goto err; } port->mapbase = res->start; port->membase = devm_ioremap(&pdev->dev, res->start, resource_size(res)); if (!port->membase) { dev_err(&pdev->dev, "Cannot remap resource.\n"); ret = -ENOMEM; goto err; } res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); if (res == NULL) { dev_err(&pdev->dev, "Insufficient resources.\n"); ret = -EFAULT; goto err; } port->irq = res->start; sirfport->clk = devm_clk_get(&pdev->dev, NULL); if (IS_ERR(sirfport->clk)) { ret = PTR_ERR(sirfport->clk); goto err; } port->uartclk = clk_get_rate(sirfport->clk); port->ops = &sirfsoc_uart_ops; spin_lock_init(&port->lock); platform_set_drvdata(pdev, sirfport); ret = uart_add_one_port(&sirfsoc_uart_drv, port); if (ret != 0) { dev_err(&pdev->dev, "Cannot add UART port(%d).\n", pdev->id); goto err; } sirfport->rx_dma_chan = dma_request_slave_channel(port->dev, "rx"); sirfport->rx_dma_items.xmit.buf = dma_alloc_coherent(port->dev, SIRFSOC_RX_DMA_BUF_SIZE, &sirfport->rx_dma_items.dma_addr, GFP_KERNEL); if (!sirfport->rx_dma_items.xmit.buf) { dev_err(port->dev, "Uart alloc bufa failed\n"); ret = -ENOMEM; goto alloc_coherent_err; } sirfport->rx_dma_items.xmit.head = sirfport->rx_dma_items.xmit.tail = 0; if (sirfport->rx_dma_chan) dmaengine_slave_config(sirfport->rx_dma_chan, &slv_cfg); sirfport->tx_dma_chan = dma_request_slave_channel(port->dev, "tx"); if (sirfport->tx_dma_chan) dmaengine_slave_config(sirfport->tx_dma_chan, &tx_slv_cfg); if (sirfport->rx_dma_chan) { hrtimer_init(&sirfport->hrt, CLOCK_MONOTONIC, HRTIMER_MODE_REL); sirfport->hrt.function = sirfsoc_uart_rx_dma_hrtimer_callback; sirfport->is_hrt_enabled = false; } return 0; alloc_coherent_err: dma_free_coherent(port->dev, SIRFSOC_RX_DMA_BUF_SIZE, sirfport->rx_dma_items.xmit.buf, sirfport->rx_dma_items.dma_addr); dma_release_channel(sirfport->rx_dma_chan); err: return ret; } static int sirfsoc_uart_remove(struct platform_device *pdev) { struct sirfsoc_uart_port *sirfport = platform_get_drvdata(pdev); struct uart_port *port = &sirfport->port; uart_remove_one_port(&sirfsoc_uart_drv, port); if (sirfport->rx_dma_chan) { dmaengine_terminate_all(sirfport->rx_dma_chan); dma_release_channel(sirfport->rx_dma_chan); dma_free_coherent(port->dev, SIRFSOC_RX_DMA_BUF_SIZE, sirfport->rx_dma_items.xmit.buf, sirfport->rx_dma_items.dma_addr); } if (sirfport->tx_dma_chan) { dmaengine_terminate_all(sirfport->tx_dma_chan); dma_release_channel(sirfport->tx_dma_chan); } return 0; } #ifdef CONFIG_PM_SLEEP static int sirfsoc_uart_suspend(struct device *pdev) { struct sirfsoc_uart_port *sirfport = dev_get_drvdata(pdev); struct uart_port *port = &sirfport->port; uart_suspend_port(&sirfsoc_uart_drv, port); return 0; } static int sirfsoc_uart_resume(struct device *pdev) { struct sirfsoc_uart_port *sirfport = dev_get_drvdata(pdev); struct uart_port *port = &sirfport->port; uart_resume_port(&sirfsoc_uart_drv, port); return 0; } #endif static const struct dev_pm_ops sirfsoc_uart_pm_ops = { SET_SYSTEM_SLEEP_PM_OPS(sirfsoc_uart_suspend, sirfsoc_uart_resume) }; static struct platform_driver sirfsoc_uart_driver = { .probe = sirfsoc_uart_probe, .remove = sirfsoc_uart_remove, .driver = { .name = SIRFUART_PORT_NAME, .of_match_table = sirfsoc_uart_ids, .pm = &sirfsoc_uart_pm_ops, }, }; static int __init sirfsoc_uart_init(void) { int ret = 0; ret = uart_register_driver(&sirfsoc_uart_drv); if (ret) goto out; ret = platform_driver_register(&sirfsoc_uart_driver); if (ret) uart_unregister_driver(&sirfsoc_uart_drv); out: return ret; } module_init(sirfsoc_uart_init); static void __exit sirfsoc_uart_exit(void) { platform_driver_unregister(&sirfsoc_uart_driver); uart_unregister_driver(&sirfsoc_uart_drv); }
/* * Note: Please do not modify the below sequence, as it is as per the spec */ static int apb_ctrl_init_seq(struct platform_device *pdev, struct arche_apb_ctrl_drvdata *apb) { struct device *dev = &pdev->dev; int ret; /* Hold APB in reset state */ ret = devm_gpio_request(dev, apb->resetn_gpio, "apb-reset"); if (ret) { dev_err(dev, "Failed requesting reset gpio %d\n", apb->resetn_gpio); return ret; } ret = gpio_direction_output(apb->resetn_gpio, 0); if (ret) { dev_err(dev, "failed to set reset gpio dir:%d\n", ret); return ret; } ret = devm_gpio_request(dev, apb->pwroff_gpio, "pwroff_n"); if (ret) { dev_err(dev, "Failed requesting pwroff_n gpio %d\n", apb->pwroff_gpio); return ret; } ret = gpio_direction_input(apb->pwroff_gpio); if (ret) { dev_err(dev, "failed to set pwroff gpio dir:%d\n", ret); return ret; } /* Enable power to APB */ if (!IS_ERR(apb->vcore)) { ret = regulator_enable(apb->vcore); if (ret) { dev_err(dev, "failed to enable core regulator\n"); return ret; } } if (!IS_ERR(apb->vio)) { ret = regulator_enable(apb->vio); if (ret) { dev_err(dev, "failed to enable IO regulator\n"); goto out_vcore_disable; } } ret = devm_gpio_request_one(dev, apb->boot_ret_gpio, GPIOF_OUT_INIT_LOW, "boot retention"); if (ret) { dev_err(dev, "Failed requesting bootret gpio %d\n", apb->boot_ret_gpio); goto out_vio_disable; } gpio_set_value(apb->boot_ret_gpio, 0); /* On DB3 clock was not mandatory */ if (gpio_is_valid(apb->clk_en_gpio)) { ret = devm_gpio_request(dev, apb->clk_en_gpio, "apb_clk_en"); if (ret) { dev_warn(dev, "Failed requesting APB clock en gpio %d\n", apb->clk_en_gpio); } else { ret = gpio_direction_output(apb->clk_en_gpio, 1); if (ret) dev_warn(dev, "failed to set APB clock en gpio dir:%d\n", ret); } } usleep_range(100, 200); return 0; out_vio_disable: if (!IS_ERR(apb->vio)) regulator_disable(apb->vio); out_vcore_disable: if (!IS_ERR(apb->vcore)) regulator_disable(apb->vcore); return ret; }
static int wl1251_sdio_probe(struct sdio_func *func, const struct sdio_device_id *id) { int ret; struct wl1251 *wl; struct ieee80211_hw *hw; struct wl1251_sdio *wl_sdio; const struct wl1251_platform_data *wl1251_board_data; hw = wl1251_alloc_hw(); if (IS_ERR(hw)) return PTR_ERR(hw); wl = hw->priv; wl_sdio = kzalloc(sizeof(*wl_sdio), GFP_KERNEL); if (wl_sdio == NULL) { ret = -ENOMEM; goto out_free_hw; } sdio_claim_host(func); ret = sdio_enable_func(func); if (ret) goto release; sdio_set_block_size(func, 512); sdio_release_host(func); SET_IEEE80211_DEV(hw, &func->dev); wl_sdio->func = func; wl->if_priv = wl_sdio; wl->if_ops = &wl1251_sdio_ops; wl1251_board_data = wl1251_get_platform_data(); if (!IS_ERR(wl1251_board_data)) { wl->power_gpio = wl1251_board_data->power_gpio; wl->irq = wl1251_board_data->irq; wl->use_eeprom = wl1251_board_data->use_eeprom; } if (gpio_is_valid(wl->power_gpio)) { #if 0 /* Not in RHEL */ ret = devm_gpio_request(&func->dev, wl->power_gpio, "wl1251 power"); #else ret = gpio_request(wl->power_gpio, "wl1251 power"); #endif if (ret) { wl1251_error("Failed to request gpio: %d\n", ret); goto disable; } } if (wl->irq) { irq_set_status_flags(wl->irq, IRQ_NOAUTOEN); ret = request_irq(wl->irq, wl1251_line_irq, 0, "wl1251", wl); if (ret < 0) { wl1251_error("request_irq() failed: %d", ret); goto disable; } irq_set_irq_type(wl->irq, IRQ_TYPE_EDGE_RISING); wl1251_sdio_ops.enable_irq = wl1251_enable_line_irq; wl1251_sdio_ops.disable_irq = wl1251_disable_line_irq; wl1251_info("using dedicated interrupt line"); } else { wl1251_sdio_ops.enable_irq = wl1251_sdio_enable_irq; wl1251_sdio_ops.disable_irq = wl1251_sdio_disable_irq; wl1251_info("using SDIO interrupt"); } ret = wl1251_init_ieee80211(wl); if (ret) goto out_free_irq; sdio_set_drvdata(func, wl); /* Tell PM core that we don't need the card to be powered now */ pm_runtime_put_noidle(&func->dev); return ret; out_free_irq: if (wl->irq) free_irq(wl->irq, wl); disable: sdio_claim_host(func); sdio_disable_func(func); release: sdio_release_host(func); kfree(wl_sdio); out_free_hw: wl1251_free_hw(wl); return ret; }
static int at91_cf_probe(struct platform_device *pdev) { struct at91_cf_socket *cf; struct at91_cf_data *board = pdev->dev.platform_data; struct resource *io; int status; if (!board) { status = at91_cf_dt_init(pdev); if (status) return status; board = pdev->dev.platform_data; } if (!gpio_is_valid(board->det_pin) || !gpio_is_valid(board->rst_pin)) return -ENODEV; io = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!io) return -ENODEV; cf = devm_kzalloc(&pdev->dev, sizeof(*cf), GFP_KERNEL); if (!cf) return -ENOMEM; cf->board = board; cf->pdev = pdev; cf->phys_baseaddr = io->start; platform_set_drvdata(pdev, cf); /* must be a GPIO; ergo must trigger on both edges */ status = devm_gpio_request(&pdev->dev, board->det_pin, "cf_det"); if (status < 0) return status; status = devm_request_irq(&pdev->dev, gpio_to_irq(board->det_pin), at91_cf_irq, 0, "at91_cf detect", cf); if (status < 0) return status; device_init_wakeup(&pdev->dev, 1); status = devm_gpio_request(&pdev->dev, board->rst_pin, "cf_rst"); if (status < 0) goto fail0a; if (gpio_is_valid(board->vcc_pin)) { status = devm_gpio_request(&pdev->dev, board->vcc_pin, "cf_vcc"); if (status < 0) goto fail0a; } /* * The card driver will request this irq later as needed. * but it causes lots of "irqNN: nobody cared" messages * unless we report that we handle everything (sigh). * (Note: DK board doesn't wire the IRQ pin...) */ if (gpio_is_valid(board->irq_pin)) { status = devm_gpio_request(&pdev->dev, board->irq_pin, "cf_irq"); if (status < 0) goto fail0a; status = devm_request_irq(&pdev->dev, gpio_to_irq(board->irq_pin), at91_cf_irq, IRQF_SHARED, "at91_cf", cf); if (status < 0) goto fail0a; cf->socket.pci_irq = gpio_to_irq(board->irq_pin); } else cf->socket.pci_irq = nr_irqs + 1; /* pcmcia layer only remaps "real" memory not iospace */ cf->socket.io_offset = (unsigned long) devm_ioremap(&pdev->dev, cf->phys_baseaddr + CF_IO_PHYS, SZ_2K); if (!cf->socket.io_offset) { status = -ENXIO; goto fail0a; } /* reserve chip-select regions */ if (!devm_request_mem_region(&pdev->dev, io->start, resource_size(io), "at91_cf")) { status = -ENXIO; goto fail0a; } dev_info(&pdev->dev, "irqs det #%d, io #%d\n", gpio_to_irq(board->det_pin), gpio_to_irq(board->irq_pin)); cf->socket.owner = THIS_MODULE; cf->socket.dev.parent = &pdev->dev; cf->socket.ops = &at91_cf_ops; cf->socket.resource_ops = &pccard_static_ops; cf->socket.features = SS_CAP_PCCARD | SS_CAP_STATIC_MAP | SS_CAP_MEM_ALIGN; cf->socket.map_size = SZ_2K; cf->socket.io[0].res = io; status = pcmcia_register_socket(&cf->socket); if (status < 0) goto fail0a; return 0; fail0a: device_init_wakeup(&pdev->dev, 0); return status; }
static int tas5086_i2c_probe(struct i2c_client *i2c, const struct i2c_device_id *id) { struct tas5086_private *priv; struct device *dev = &i2c->dev; int gpio_nreset = -EINVAL; int i, ret; priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); if (!priv) return -ENOMEM; for (i = 0; i < ARRAY_SIZE(supply_names); i++) priv->supplies[i].supply = supply_names[i]; ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(priv->supplies), priv->supplies); if (ret < 0) { dev_err(dev, "Failed to get regulators: %d\n", ret); return ret; } priv->regmap = devm_regmap_init(dev, NULL, i2c, &tas5086_regmap); if (IS_ERR(priv->regmap)) { ret = PTR_ERR(priv->regmap); dev_err(&i2c->dev, "Failed to create regmap: %d\n", ret); return ret; } i2c_set_clientdata(i2c, priv); if (of_match_device(of_match_ptr(tas5086_dt_ids), dev)) { struct device_node *of_node = dev->of_node; gpio_nreset = of_get_named_gpio(of_node, "reset-gpio", 0); } if (gpio_is_valid(gpio_nreset)) if (devm_gpio_request(dev, gpio_nreset, "TAS5086 Reset")) gpio_nreset = -EINVAL; priv->gpio_nreset = gpio_nreset; ret = regulator_bulk_enable(ARRAY_SIZE(priv->supplies), priv->supplies); if (ret < 0) { dev_err(dev, "Failed to enable regulators: %d\n", ret); return ret; } tas5086_reset(priv); /* The TAS5086 always returns 0x03 in its TAS5086_DEV_ID register */ ret = regmap_read(priv->regmap, TAS5086_DEV_ID, &i); if (ret == 0 && i != 0x3) { dev_err(dev, "Failed to identify TAS5086 codec (got %02x)\n", i); ret = -ENODEV; } /* * The chip has been identified, so we can turn off the power * again until the dai link is set up. */ regulator_bulk_disable(ARRAY_SIZE(priv->supplies), priv->supplies); if (ret == 0) ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_tas5086, &tas5086_dai, 1); return ret; }
static int s2mps16_pmic_probe(struct platform_device *pdev) { struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent); struct sec_platform_data *pdata = iodev->pdata; struct regulator_config config = { }; struct s2mps16_info *s2mps16; int i, ret, delta_sel; unsigned int temp; unsigned int s2mps16_desc_type; unsigned int buck2_temp = 0; ret = sec_reg_read(iodev, S2MPS16_REG_ID, &SEC_PMIC_REV(iodev)); if (ret < 0) return ret; s2mps16_desc_type = S2MPS16_DESC_TYPE0; if (iodev->dev->of_node) { ret = s2mps16_pmic_dt_parse_pdata(iodev, pdata); if (ret) return ret; } if (!pdata) { dev_err(pdev->dev.parent, "Platform data not supplied\n"); return -ENODEV; } s2mps16 = devm_kzalloc(&pdev->dev, sizeof(struct s2mps16_info), GFP_KERNEL); if (!s2mps16) return -ENOMEM; s2mps16->desc_type = s2mps16_desc_type; s2mps16->iodev = iodev; s2mps16->buck11_en = (const char *)of_find_property(iodev->dev->of_node, "buck11_en", NULL); mutex_init(&s2mps16->lock); static_info = s2mps16; s2mps16->dvs_en = pdata->dvs_en; s2mps16->g3d_en = pdata->g3d_en; s2mps16->cache_data = pdata->cache_data; s2mps16->int_max = 0; s2mps16->buck_dvs_on = pdata->buck_dvs_on; if (s2mps16->buck_dvs_on) dev_info(&pdev->dev, "Buck dvs mode enabled \n"); if (gpio_is_valid(pdata->dvs_pin)) { ret = devm_gpio_request(&pdev->dev, pdata->dvs_pin, "S2MPS16 DVS_PIN"); if (ret < 0) return ret; if (pdata->dvs_en) { /* Set DVS Regulator Voltage 0x20 - 0.5 voltage */ ret = sec_reg_write(iodev, S2MPS16_REG_B6CTRL2, 0x20); if (ret < 0) return ret; s2m_init_dvs(); s2mps16->dvs_pin = pdata->dvs_pin; } else dev_err(&pdev->dev, "g3d dvs is not enabled.\n"); } platform_set_drvdata(pdev, s2mps16); for (i = 0; i < pdata->num_regulators; i++) { int id = pdata->regulators[i].id; config.dev = &pdev->dev; config.regmap = iodev->regmap; config.init_data = pdata->regulators[i].initdata; config.driver_data = s2mps16; config.of_node = pdata->regulators[i].reg_node; s2mps16->opmode[id] = regulators[s2mps16_desc_type][id].enable_mask; s2mps16->rdev[i] = regulator_register( ®ulators[s2mps16_desc_type][id], &config); if (IS_ERR(s2mps16->rdev[i])) { ret = PTR_ERR(s2mps16->rdev[i]); dev_err(&pdev->dev, "regulator init failed for %d\n", i); s2mps16->rdev[i] = NULL; goto err; } if ((id == S2MPS16_BUCK1 || id == S2MPS16_BUCK2 || id == S2MPS16_BUCK3 || id == S2MPS16_LDO8) && s2mps16->buck_dvs_on) { mutex_lock(&s2mps16->lock); ret = s2m_set_ldo_dvs_control(s2mps16->rdev[i]); if (ret < 0) dev_err(&pdev->dev, "failed vth/delta init, id(%d)\n", id); mutex_unlock(&s2mps16->lock); } } s2mps16->num_regulators = pdata->num_regulators; if (s2mps16->buck_dvs_on) { delta_sel = 0; if (s2mps16->buck2_dvs == 0) delta_sel = 100000; else if (s2mps16->buck2_dvs == 1) delta_sel = 0; else if (s2mps16->buck2_dvs == 2) delta_sel = 75000; else if (s2mps16->buck2_dvs == 3) delta_sel = 50000; else delta_sel = 0; delta_sel = delta_sel / S2MPS16_BUCK_STEP1; /* Read BUCK2_OUT value */ ret = sec_reg_read(iodev, S2MPS16_REG_B2CTRL2, &temp); if (ret < 0) goto err; buck2_temp = temp; /* Check tar_volt+delta range (0x98 means 1250000uV) */ s2mps16->buck2_sync = (temp + delta_sel > 0x98) ? false : true; if (!s2mps16->buck2_sync) { /* Set BUCK2 output voltage 1150000uV */ ret = sec_reg_write(s2mps16->iodev, S2MPS16_REG_B2CTRL2, 0x88); if (ret < 0) goto err; /* Disable buck2 dvs mode */ ret = sec_reg_update(s2mps16->iodev, S2MPS16_REG_LDO7_DVS, 0 << 2, 0x1 << 2); if (ret < 0) goto err; /* Set buck previous target voltage */ ret = sec_reg_write(s2mps16->iodev, S2MPS16_REG_B2CTRL2, buck2_temp); if (ret < 0) goto err; } ret = sec_reg_read(iodev, S2MPS16_REG_LDO7_DVS, &temp); if (ret < 0) goto err; ret = sec_reg_read(iodev, S2MPS16_REG_B4CTRL2, &s2mps16->buck4_sel); if (ret < 0) goto err; ret = sec_reg_read(iodev, S2MPS16_REG_B5CTRL2, &s2mps16->buck5_sel); if (ret < 0) goto err; dev_info(&pdev->dev, "S2MPS16_REG_LDO7_DVS : %8.x \n", temp); dev_info(&pdev->dev, "S2MPS16_REG_B4CTRL2 : %8.x \n", s2mps16->buck4_sel); dev_info(&pdev->dev, "S2MPS16_REG_B5CTRL2 : %8.x \n", s2mps16->buck5_sel); s2mps16->int_max = s2m_get_max_int_voltage(s2mps16); } if (pdata->g3d_en) { /* for buck6 gpio control, disable i2c control */ ret = sec_reg_update(iodev, S2MPS16_REG_B6CTRL1, 0x80, 0xC0); if (ret) { dev_err(&pdev->dev, "buck6 gpio control error\n"); goto err; } if (!s2mps16->buck11_en) { ret = sec_reg_update(iodev, S2MPS16_REG_L11CTRL, 0x00, 0xC0); if (ret) { dev_err(&pdev->dev, "regulator sync enable error\n"); goto err; } } else { /* for buck11 gpio control, disable i2c control */ ret = sec_reg_update(iodev, S2MPS16_REG_B11CTRL1, 0x80, 0xC0); if (ret) { dev_err(&pdev->dev, "buck11 gpio control error\n"); goto err; } } } if (pdata->smpl_warn_en) { ret = sec_reg_update(iodev, S2MPS16_REG_CTRL2, pdata->smpl_warn_vth, 0xe0); if (ret) { dev_err(&pdev->dev, "set smpl_warn configuration i2c write error\n"); goto err; } pr_info("%s: smpl_warn vth is 0x%x\n", __func__, pdata->smpl_warn_vth); ret = sec_reg_update(iodev, S2MPS16_REG_CTRL2, pdata->smpl_warn_hys, 0x18); if (ret) { dev_err(&pdev->dev, "set smpl_warn configuration i2c write error\n"); goto err; } pr_info("%s: smpl_warn hysteresis is 0x%x\n", __func__, pdata->smpl_warn_hys); } /* RTC Low jitter mode */ ret = sec_reg_update(iodev, S2MPS16_REG_RTC_BUF, 0x10, 0x10); if (ret) { dev_err(&pdev->dev, "set low jitter mode i2c write error\n"); goto err; } /* SELMIF set LDO2,4,5,6,8,9,12,13 controlled by PWREN_MIF */ ret = sec_reg_write(iodev, S2MPS16_REG_SELMIF, 0xFF); if (ret) { dev_err(&pdev->dev, "set selmif sel error\n"); goto err; } sec_reg_update(iodev, S2MPS16_REG_B4CTRL1, 0x00, 0x10); ret = sec_reg_write(iodev, 0x9B, 0x10); if (ret) { dev_err(&pdev->dev, "BUCK8, BUCK9 DVS setting failed\n"); goto err; } /* On sequence Config for PWREN_MIF */ sec_reg_write(iodev, 0x70, 0xB4); /* seq. Buck2, Buck1 */ sec_reg_write(iodev, 0x71, 0x2C); /* seq. Buck4, Buck3 */ sec_reg_write(iodev, 0x72, 0xD4); /* seq. Buck6, Buck5 */ sec_reg_write(iodev, 0x73, 0x11); /* seq. Buck8, Buck7 */ sec_reg_write(iodev, 0x74, 0xE0); /* seq. Buck10, Buck9 */ if (s2mps16->buck11_en) sec_reg_write(iodev, 0x75, 0x27); /* seq. BB, Buck11 */ else sec_reg_write(iodev, 0x75, 0x20); sec_reg_write(iodev, 0x76, 0x93); /* seq. LDO2, LDO1 */ sec_reg_write(iodev, 0x77, 0x60); /* Seq. LDO4, LDO3 */ sec_reg_write(iodev, 0x78, 0x87); /* seq. LDO6, LDO5 */ sec_reg_write(iodev, 0x79, pdata->ldo8_7_seq); /* Seq. LDO8, LDO7 */ sec_reg_write(iodev, 0x7A, pdata->ldo10_9_seq); /* Seq. LDO10, LDO9 */ if (s2mps16->buck11_en) sec_reg_write(iodev, 0x7B, 0x50); /* Seq. LDO12, LDO11 */ else sec_reg_write(iodev, 0x7B, 0x57); sec_reg_write(iodev, 0x7C, 0x75); /* Seq. LDO14, LDO13 */ sec_reg_write(iodev, 0x7D, 0x98); /* Seq. LDO16, LDO15 */ sec_reg_write(iodev, 0x7E, 0x00); /* Seq. LDO18, LDO17 */ sec_reg_write(iodev, 0x7F, 0x00); /* Seq. LDO20, LDO19 */ sec_reg_write(iodev, 0x80, 0x21); /* Seq. LDO22, LDO21 */ sec_reg_write(iodev, 0x81, 0x3F); /* Seq. LDO24, LDO23 */ sec_reg_write(iodev, 0x82, 0x00); /* Seq. LDO26, LDO25 */ sec_reg_write(iodev, 0x83, 0x40); /* Seq. B1~B8*/ sec_reg_write(iodev, 0x84, 0x40); /* Seq. B9~B11, BB, LDO1~4 */ sec_reg_write(iodev, 0x85, 0x00); /* Seq. LDO5~12 */ sec_reg_write(iodev, 0x86, 0x0E); /* Seq. LDO13~20 */ sec_reg_write(iodev, 0x87, 0x00); /* Seq. LDO26~21 */ return 0; err: for (i = 0; i < S2MPS16_REGULATOR_MAX; i++) regulator_unregister(s2mps16->rdev[i]); return ret; }
static int ehci_msm2_probe(struct platform_device *pdev) { struct usb_hcd *hcd; struct resource *res; struct msm_hcd *mhcd; struct pinctrl_state *set_state; const struct msm_usb_host_platform_data *pdata; char pdev_name[PDEV_NAME_LEN]; int ret; dev_dbg(&pdev->dev, "ehci_msm2 probe\n"); /* * Fail probe in case of uicc till userspace activates driver through * sysfs entry. */ if (!uicc_card_present && pdev->dev.of_node && of_property_read_bool( pdev->dev.of_node, "qcom,usb2-enable-uicc")) return -ENODEV; hcd = usb_create_hcd(&ehci_msm2_hc_driver, &pdev->dev, dev_name(&pdev->dev)); if (!hcd) { dev_err(&pdev->dev, "Unable to create HCD\n"); return -ENOMEM; } mhcd = hcd_to_mhcd(hcd); mhcd->dev = &pdev->dev; mhcd->xo_clk = clk_get(&pdev->dev, "xo"); if (IS_ERR(mhcd->xo_clk)) { ret = PTR_ERR(mhcd->xo_clk); mhcd->xo_clk = NULL; if (ret == -EPROBE_DEFER) goto put_hcd; } ret = msm_ehci_init_clocks(mhcd, 1); if (ret) goto xo_put; if (pdev->dev.of_node) { dev_dbg(&pdev->dev, "device tree enabled\n"); pdev->dev.platform_data = ehci_msm2_dt_to_pdata(pdev); } if (!pdev->dev.platform_data) dev_dbg(&pdev->dev, "No platform data given\n"); pdata = pdev->dev.platform_data; if (!pdev->dev.dma_mask) pdev->dev.dma_mask = &ehci_msm_dma_mask; if (!pdev->dev.coherent_dma_mask) pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32); hcd_to_bus(hcd)->skip_resume = true; hcd->irq = platform_get_irq(pdev, 0); if (hcd->irq < 0) { dev_err(&pdev->dev, "Unable to get IRQ resource\n"); ret = hcd->irq; goto deinit_clocks; } res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!res) { dev_err(&pdev->dev, "Unable to get memory resource\n"); ret = -ENODEV; goto deinit_clocks; } hcd->rsrc_start = res->start; hcd->rsrc_len = resource_size(res); hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len); if (!hcd->regs) { dev_err(&pdev->dev, "ioremap failed\n"); ret = -ENOMEM; goto deinit_clocks; } spin_lock_init(&mhcd->wakeup_lock); mhcd->async_irq = platform_get_irq_byname(pdev, "async_irq"); if (mhcd->async_irq < 0) { dev_dbg(&pdev->dev, "platform_get_irq for async_int failed\n"); mhcd->async_irq = 0; } else { ret = request_irq(mhcd->async_irq, msm_async_irq, IRQF_TRIGGER_RISING, "msm_ehci_host", mhcd); if (ret) { dev_err(&pdev->dev, "request irq failed (ASYNC INT)\n"); goto unmap; } disable_irq(mhcd->async_irq); } snprintf(pdev_name, PDEV_NAME_LEN, "%s.%d", pdev->name, pdev->id); if (mhcd->xo_clk) ret = clk_prepare_enable(mhcd->xo_clk); if (ret) { dev_err(&pdev->dev, "%s failed to vote for TCXO %d\n", __func__, ret); goto free_xo_handle; } /* Get pinctrl if target uses pinctrl */ mhcd->hsusb_pinctrl = devm_pinctrl_get(&pdev->dev); if (IS_ERR(mhcd->hsusb_pinctrl)) { if (of_property_read_bool(pdev->dev.of_node, "pinctrl-names")) { dev_err(&pdev->dev, "Error encountered while getting pinctrl"); ret = PTR_ERR(mhcd->hsusb_pinctrl); goto devote_xo_handle; } pr_debug("Target does not use pinctrl\n"); mhcd->hsusb_pinctrl = NULL; } if (mhcd->hsusb_pinctrl) { set_state = pinctrl_lookup_state(mhcd->hsusb_pinctrl, "ehci_active"); if (IS_ERR(set_state)) { pr_err("cannot get hsusb pinctrl active state\n"); ret = PTR_ERR(set_state); goto devote_xo_handle; } ret = pinctrl_select_state(mhcd->hsusb_pinctrl, set_state); if (ret) { pr_err("cannot set hsusb pinctrl active state\n"); goto devote_xo_handle; } } if (pdata && gpio_is_valid(pdata->resume_gpio)) { mhcd->resume_gpio = pdata->resume_gpio; ret = devm_gpio_request(&pdev->dev, mhcd->resume_gpio, "hsusb_resume"); if (ret) { dev_err(&pdev->dev, "resume gpio(%d) request failed:%d\n", mhcd->resume_gpio, ret); mhcd->resume_gpio = -EINVAL; } else { /* to override ehci_bus_resume from ehci-hcd library */ ehci_bus_resume_func = ehci_msm2_hc_driver.bus_resume; ehci_msm2_hc_driver.bus_resume = msm_ehci_bus_resume_with_gpio; } } if (pdata && gpio_is_valid(pdata->ext_hub_reset_gpio)) { ret = devm_gpio_request(&pdev->dev, pdata->ext_hub_reset_gpio, "hsusb_reset"); if (ret) { dev_err(&pdev->dev, "reset gpio(%d) request failed:%d\n", pdata->ext_hub_reset_gpio, ret); goto pinctrl_sleep; } else { /* reset external hub */ gpio_direction_output(pdata->ext_hub_reset_gpio, 0); /* * Hub reset should be asserted for minimum 5microsec * before deasserting. */ usleep_range(5, 1000); gpio_direction_output(pdata->ext_hub_reset_gpio, 1); } } spin_lock_init(&mhcd->wakeup_lock); ret = msm_ehci_init_vddcx(mhcd, 1); if (ret) { dev_err(&pdev->dev, "unable to initialize VDDCX\n"); ret = -ENODEV; goto pinctrl_sleep; } ret = msm_ehci_config_vddcx(mhcd, 1); if (ret) { dev_err(&pdev->dev, "hsusb vddcx configuration failed\n"); goto deinit_vddcx; } ret = msm_ehci_ldo_init(mhcd, 1); if (ret) { dev_err(&pdev->dev, "hsusb vreg configuration failed\n"); goto deinit_vddcx; } ret = msm_ehci_ldo_enable(mhcd, 1); if (ret) { dev_err(&pdev->dev, "hsusb vreg enable failed\n"); goto deinit_ldo; } ret = msm_ehci_init_vbus(mhcd, 1); if (ret) goto disable_ldo; hcd->phy = devm_usb_get_phy_by_phandle(&pdev->dev, "usb-phy", 0); if (IS_ERR(hcd->phy)) { if (PTR_ERR(hcd->phy) == -EPROBE_DEFER) { dev_dbg(&pdev->dev, "usb-phy not probed yet\n"); ret = -EPROBE_DEFER; goto vbus_deinit; } hcd->phy = NULL; } if (hcd->phy) usb_phy_init(hcd->phy); else if (pdata && pdata->use_sec_phy) mhcd->usb_phy_ctrl_reg = USB_PHY_CTRL2; else mhcd->usb_phy_ctrl_reg = USB_PHY_CTRL; ret = msm_hsusb_reset(mhcd); if (ret) { dev_err(&pdev->dev, "hsusb PHY initialization failed\n"); goto vbus_deinit; } ret = usb_add_hcd(hcd, hcd->irq, IRQF_SHARED); if (ret) { dev_err(&pdev->dev, "unable to register HCD\n"); goto vbus_deinit; } pdata = mhcd->dev->platform_data; if (pdata && (!pdata->dock_connect_irq || !irq_read_line(pdata->dock_connect_irq))) msm_ehci_vbus_power(mhcd, 1); /* For peripherals directly conneted to downstream port of root hub * and require to drive suspend and resume by controller driver instead * of root hub. */ if (pdata) mhcd->ehci.no_selective_suspend = pdata->no_selective_suspend; mhcd->wakeup_irq = platform_get_irq_byname(pdev, "wakeup_irq"); if (mhcd->wakeup_irq > 0) { dev_dbg(&pdev->dev, "wakeup irq:%d\n", mhcd->wakeup_irq); irq_set_status_flags(mhcd->wakeup_irq, IRQ_NOAUTOEN); ret = request_irq(mhcd->wakeup_irq, msm_hsusb_wakeup_irq, IRQF_TRIGGER_HIGH, "msm_hsusb_wakeup", mhcd); if (ret) { dev_err(&pdev->dev, "request_irq(%d) failed:%d\n", mhcd->wakeup_irq, ret); mhcd->wakeup_irq = 0; } } else { mhcd->wakeup_irq = 0; } device_init_wakeup(&pdev->dev, 1); wakeup_source_init(&mhcd->ws, dev_name(&pdev->dev)); pm_stay_awake(mhcd->dev); INIT_WORK(&mhcd->phy_susp_fail_work, msm_ehci_phy_susp_fail_work); /* * This pdev->dev is assigned parent of root-hub by USB core, * hence, runtime framework automatically calls this driver's * runtime APIs based on root-hub's state. */ /* configure pmic_gpio_irq for D+ change */ if (pdata && pdata->pmic_gpio_dp_irq) mhcd->pmic_gpio_dp_irq = pdata->pmic_gpio_dp_irq; if (mhcd->pmic_gpio_dp_irq) { ret = request_threaded_irq(mhcd->pmic_gpio_dp_irq, NULL, msm_ehci_host_wakeup_irq, IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, "msm_ehci_host_wakeup", mhcd); if (!ret) { disable_irq_nosync(mhcd->pmic_gpio_dp_irq); } else { dev_err(&pdev->dev, "request_irq(%d) failed: %d\n", mhcd->pmic_gpio_dp_irq, ret); mhcd->pmic_gpio_dp_irq = 0; } } pm_runtime_set_active(&pdev->dev); pm_runtime_enable(&pdev->dev); if (ehci_debugfs_init(mhcd) < 0) dev_err(mhcd->dev, "%s: debugfs init failed\n", __func__); return 0; vbus_deinit: msm_ehci_init_vbus(mhcd, 0); disable_ldo: msm_ehci_ldo_enable(mhcd, 0); deinit_ldo: msm_ehci_ldo_init(mhcd, 0); deinit_vddcx: msm_ehci_init_vddcx(mhcd, 0); pinctrl_sleep: if (mhcd->hsusb_pinctrl) { set_state = pinctrl_lookup_state(mhcd->hsusb_pinctrl, "ehci_sleep"); if (IS_ERR(set_state)) pr_err("cannot get hsusb pinctrl sleep state\n"); else pinctrl_select_state(mhcd->hsusb_pinctrl, set_state); } devote_xo_handle: if (mhcd->xo_clk) clk_disable_unprepare(mhcd->xo_clk); free_xo_handle: if (mhcd->xo_clk) { clk_put(mhcd->xo_clk); mhcd->xo_clk = NULL; } if (mhcd->async_irq) free_irq(mhcd->async_irq, mhcd); unmap: iounmap(hcd->regs); deinit_clocks: msm_ehci_init_clocks(mhcd, 0); xo_put: if (mhcd->xo_clk) clk_put(mhcd->xo_clk); put_hcd: usb_put_hcd(hcd); return ret; }
static void led_set(struct s2mu003_led_data *led_data) { int ret, boost_mode; struct s2mu003_led *data = led_data->data; int id = data->id; u8 mask = 0, reg = 0; #ifdef CONFIG_S2MU003_LED_GPIO int gpio_pin; #else u8 enable_mask, value; #endif if (id == S2MU003_FLASH_LED) { pr_info("%s led mode is flash\n", __func__); reg = S2MU003_FLED_CH1_CTRL0; mask = S2MU003_FLASH_IOUT_MASK; boost_mode = 0x0; #ifdef CONFIG_S2MU003_LED_GPIO pr_info("%s gpio_flash mode\n", __func__); gpio_pin = led_data->flash_pin; #endif } else { pr_info("%s led mode is torch\n", __func__); reg = S2MU003_FLED_CH1_CTRL1; mask = S2MU003_TORCH_IOUT_MASK; boost_mode = 0x4; #ifdef CONFIG_S2MU003_LED_GPIO pr_info("%s gpio_torch mode\n", __func__); gpio_pin = led_data->torch_pin; #endif } #ifdef CONFIG_S2MU003_LED_GPIO if (gpio_is_valid(gpio_pin)) { ret = devm_gpio_request(led_data->cdev.dev, gpio_pin, "s2mu003_gpio"); if (ret) { pr_err("%s : fail to assignment gpio\n", __func__); goto gpio_free_data; } } #endif pr_info("%s start led_set\n", __func__); if (led_data->test_brightness == LED_OFF) { ret = s2mu003_assign_bits(led_data->i2c, reg, mask, led_data->data->brightness); if (ret < 0) goto error_set_bits; #ifdef CONFIG_S2MU003_LED_GPIO gpio_direction_output(gpio_pin, 0); goto gpio_free_data; #else value = S2MU003_FLASH_TORCH_OFF; #endif } else { pr_info("%s led on\n", __func__); ret = s2mu003_assign_bits(led_data->i2c, S2MU003_FLED_CTRL1, S2MU003_BOOST_FLASH_MODE_MASK, boost_mode); if (ret < 0) goto error_set_bits; ret = s2mu003_assign_bits(led_data->i2c, reg, mask, led_data->test_brightness); if (ret < 0) goto error_set_bits; #ifdef CONFIG_S2MU003_LED_GPIO gpio_direction_output(gpio_pin, 1); goto gpio_free_data; #else value = id ? S2MU003_TORCH_ON_I2C : S2MU003_FLASH_ON_I2C; #endif } #ifndef CONFIG_S2MU003_LED_GPIO enable_mask = id ? S2MU003_TORCH_ENABLE_MASK : S2MU003_FLASH_ENABLE_MASK; ret = s2mu003_assign_bits(led_data->i2c, S2MU003_FLED_CH1_CTRL4, enable_mask, value); if (ret < 0) goto error_set_bits; #endif return; #ifdef CONFIG_S2MU003_LED_GPIO gpio_free_data: gpio_free(gpio_pin); pr_info("%s : gpio free\n", __func__); return; #endif error_set_bits: pr_err("%s: can't set led level %d\n", __func__, ret); return; }
static int ltq_pci_startup(struct platform_device *pdev) { struct device_node *node = pdev->dev.of_node; const __be32 *req_mask, *bus_clk; u32 temp_buffer; /* get our clocks */ clk_pci = clk_get(&pdev->dev, NULL); if (IS_ERR(clk_pci)) { dev_err(&pdev->dev, "failed to get pci clock\n"); return PTR_ERR(clk_pci); } clk_external = clk_get(&pdev->dev, "external"); if (IS_ERR(clk_external)) { clk_put(clk_pci); dev_err(&pdev->dev, "failed to get external pci clock\n"); return PTR_ERR(clk_external); } /* read the bus speed that we want */ bus_clk = of_get_property(node, "lantiq,bus-clock", NULL); if (bus_clk) clk_set_rate(clk_pci, *bus_clk); /* and enable the clocks */ clk_enable(clk_pci); if (of_find_property(node, "lantiq,external-clock", NULL)) clk_enable(clk_external); else clk_disable(clk_external); /* setup reset gpio used by pci */ reset_gpio = of_get_named_gpio(node, "gpio-reset", 0); if (gpio_is_valid(reset_gpio)) { int ret = devm_gpio_request(&pdev->dev, reset_gpio, "pci-reset"); if (ret) { dev_err(&pdev->dev, "failed to request gpio %d\n", reset_gpio); return ret; } gpio_direction_output(reset_gpio, 1); } /* enable auto-switching between PCI and EBU */ ltq_pci_w32(0xa, PCI_CR_CLK_CTRL); /* busy, i.e. configuration is not done, PCI access has to be retried */ ltq_pci_w32(ltq_pci_r32(PCI_CR_PCI_MOD) & ~(1 << 24), PCI_CR_PCI_MOD); wmb(); /* BUS Master/IO/MEM access */ ltq_pci_cfg_w32(ltq_pci_cfg_r32(PCI_CS_STS_CMD) | 7, PCI_CS_STS_CMD); /* enable external 2 PCI masters */ temp_buffer = ltq_pci_r32(PCI_CR_PC_ARB); /* setup the request mask */ req_mask = of_get_property(node, "req-mask", NULL); if (req_mask) temp_buffer &= ~((*req_mask & 0xf) << 16); else temp_buffer &= ~0xf0000; /* enable internal arbiter */ temp_buffer |= (1 << INTERNAL_ARB_ENABLE_BIT); /* enable internal PCI master reqest */ temp_buffer &= (~(3 << PCI_MASTER0_REQ_MASK_2BITS)); /* enable EBU request */ temp_buffer &= (~(3 << PCI_MASTER1_REQ_MASK_2BITS)); /* enable all external masters request */ temp_buffer &= (~(3 << PCI_MASTER2_REQ_MASK_2BITS)); ltq_pci_w32(temp_buffer, PCI_CR_PC_ARB); wmb(); /* setup BAR memory regions */ ltq_pci_w32(0x18000000, PCI_CR_FCI_ADDR_MAP0); ltq_pci_w32(0x18400000, PCI_CR_FCI_ADDR_MAP1); ltq_pci_w32(0x18800000, PCI_CR_FCI_ADDR_MAP2); ltq_pci_w32(0x18c00000, PCI_CR_FCI_ADDR_MAP3); ltq_pci_w32(0x19000000, PCI_CR_FCI_ADDR_MAP4); ltq_pci_w32(0x19400000, PCI_CR_FCI_ADDR_MAP5); ltq_pci_w32(0x19800000, PCI_CR_FCI_ADDR_MAP6); ltq_pci_w32(0x19c00000, PCI_CR_FCI_ADDR_MAP7); ltq_pci_w32(0x1ae00000, PCI_CR_FCI_ADDR_MAP11hg); ltq_pci_w32(ltq_calc_bar11mask(), PCI_CR_BAR11MASK); ltq_pci_w32(0, PCI_CR_PCI_ADDR_MAP11); ltq_pci_w32(0, PCI_CS_BASE_ADDR1); /* both TX and RX endian swap are enabled */ ltq_pci_w32(ltq_pci_r32(PCI_CR_PCI_EOI) | 3, PCI_CR_PCI_EOI); wmb(); ltq_pci_w32(ltq_pci_r32(PCI_CR_BAR12MASK) | 0x80000000, PCI_CR_BAR12MASK); ltq_pci_w32(ltq_pci_r32(PCI_CR_BAR13MASK) | 0x80000000, PCI_CR_BAR13MASK); /*use 8 dw burst length */ ltq_pci_w32(0x303, PCI_CR_FCI_BURST_LENGTH); ltq_pci_w32(ltq_pci_r32(PCI_CR_PCI_MOD) | (1 << 24), PCI_CR_PCI_MOD); wmb(); /* setup irq line */ ltq_ebu_w32(ltq_ebu_r32(LTQ_EBU_PCC_CON) | 0xc, LTQ_EBU_PCC_CON); ltq_ebu_w32(ltq_ebu_r32(LTQ_EBU_PCC_IEN) | 0x10, LTQ_EBU_PCC_IEN); /* toggle reset pin */ if (gpio_is_valid(reset_gpio)) { __gpio_set_value(reset_gpio, 0); wmb(); mdelay(1); __gpio_set_value(reset_gpio, 1); } return 0; }
/* * Probe for NAND controller */ static int lpc32xx_nand_probe(struct platform_device *pdev) { struct lpc32xx_nand_host *host; struct mtd_info *mtd; struct nand_chip *chip; struct resource *rc; struct mtd_part_parser_data ppdata = {}; int res; rc = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (rc == NULL) { dev_err(&pdev->dev, "No memory resource found for device\n"); return -EBUSY; } /* Allocate memory for the device structure (and zero it) */ host = devm_kzalloc(&pdev->dev, sizeof(*host), GFP_KERNEL); if (!host) return -ENOMEM; host->io_base_dma = rc->start; host->io_base = devm_ioremap_resource(&pdev->dev, rc); if (IS_ERR(host->io_base)) return PTR_ERR(host->io_base); if (pdev->dev.of_node) host->ncfg = lpc32xx_parse_dt(&pdev->dev); if (!host->ncfg) { dev_err(&pdev->dev, "Missing or bad NAND config from device tree\n"); return -ENOENT; } if (host->ncfg->wp_gpio == -EPROBE_DEFER) return -EPROBE_DEFER; if (gpio_is_valid(host->ncfg->wp_gpio) && devm_gpio_request(&pdev->dev, host->ncfg->wp_gpio, "NAND WP")) { dev_err(&pdev->dev, "GPIO not available\n"); return -EBUSY; } lpc32xx_wp_disable(host); host->pdata = dev_get_platdata(&pdev->dev); mtd = &host->mtd; chip = &host->nand_chip; chip->priv = host; mtd->priv = chip; mtd->owner = THIS_MODULE; mtd->dev.parent = &pdev->dev; /* Get NAND clock */ host->clk = devm_clk_get(&pdev->dev, NULL); if (IS_ERR(host->clk)) { dev_err(&pdev->dev, "Clock failure\n"); res = -ENOENT; goto err_exit1; } clk_enable(host->clk); /* Set NAND IO addresses and command/ready functions */ chip->IO_ADDR_R = SLC_DATA(host->io_base); chip->IO_ADDR_W = SLC_DATA(host->io_base); chip->cmd_ctrl = lpc32xx_nand_cmd_ctrl; chip->dev_ready = lpc32xx_nand_device_ready; chip->chip_delay = 20; /* 20us command delay time */ /* Init NAND controller */ lpc32xx_nand_setup(host); platform_set_drvdata(pdev, host); /* NAND callbacks for LPC32xx SLC hardware */ chip->ecc.mode = NAND_ECC_HW_SYNDROME; chip->read_byte = lpc32xx_nand_read_byte; chip->read_buf = lpc32xx_nand_read_buf; chip->write_buf = lpc32xx_nand_write_buf; chip->ecc.read_page_raw = lpc32xx_nand_read_page_raw_syndrome; chip->ecc.read_page = lpc32xx_nand_read_page_syndrome; chip->ecc.write_page_raw = lpc32xx_nand_write_page_raw_syndrome; chip->ecc.write_page = lpc32xx_nand_write_page_syndrome; chip->ecc.write_oob = lpc32xx_nand_write_oob_syndrome; chip->ecc.read_oob = lpc32xx_nand_read_oob_syndrome; chip->ecc.calculate = lpc32xx_nand_ecc_calculate; chip->ecc.correct = nand_correct_data; chip->ecc.strength = 1; chip->ecc.hwctl = lpc32xx_nand_ecc_enable; /* bitflip_threshold's default is defined as ecc_strength anyway. * Unfortunately, it is set only later at add_mtd_device(). Meanwhile * being 0, it causes bad block table scanning errors in * nand_scan_tail(), so preparing it here already. */ mtd->bitflip_threshold = chip->ecc.strength; /* * Allocate a large enough buffer for a single huge page plus * extra space for the spare area and ECC storage area */ host->dma_buf_len = LPC32XX_DMA_DATA_SIZE + LPC32XX_ECC_SAVE_SIZE; host->data_buf = devm_kzalloc(&pdev->dev, host->dma_buf_len, GFP_KERNEL); if (host->data_buf == NULL) { res = -ENOMEM; goto err_exit2; } res = lpc32xx_nand_dma_setup(host); if (res) { res = -EIO; goto err_exit2; } /* Find NAND device */ if (nand_scan_ident(mtd, 1, NULL)) { res = -ENXIO; goto err_exit3; } /* OOB and ECC CPU and DMA work areas */ host->ecc_buf = (uint32_t *)(host->data_buf + LPC32XX_DMA_DATA_SIZE); /* * Small page FLASH has a unique OOB layout, but large and huge * page FLASH use the standard layout. Small page FLASH uses a * custom BBT marker layout. */ if (mtd->writesize <= 512) chip->ecc.layout = &lpc32xx_nand_oob_16; /* These sizes remain the same regardless of page size */ chip->ecc.size = 256; chip->ecc.bytes = LPC32XX_SLC_DEV_ECC_BYTES; chip->ecc.prepad = chip->ecc.postpad = 0; /* Avoid extra scan if using BBT, setup BBT support */ if (host->ncfg->use_bbt) { chip->bbt_options |= NAND_BBT_USE_FLASH; /* * Use a custom BBT marker setup for small page FLASH that * won't interfere with the ECC layout. Large and huge page * FLASH use the standard layout. */ if (mtd->writesize <= 512) { chip->bbt_td = &bbt_smallpage_main_descr; chip->bbt_md = &bbt_smallpage_mirror_descr; } } /* * Fills out all the uninitialized function pointers with the defaults */ if (nand_scan_tail(mtd)) { res = -ENXIO; goto err_exit3; } mtd->name = "nxp_lpc3220_slc"; ppdata.of_node = pdev->dev.of_node; res = mtd_device_parse_register(mtd, NULL, &ppdata, host->ncfg->parts, host->ncfg->num_parts); if (!res) return res; nand_release(mtd); err_exit3: dma_release_channel(host->dma_chan); err_exit2: clk_disable(host->clk); err_exit1: lpc32xx_wp_enable(host); return res; }
static int msm_hsic_hub_init_gpio(struct hsic_hub *hub, int init) { int ret; struct smsc_hub_platform_data *pdata = hub->pdata; if (!init) { if (!IS_ERR(smsc_hub->int_pad_reg)) { regulator_disable(smsc_hub->int_pad_reg); regulator_set_voltage(smsc_hub->int_pad_reg, 0, HSIC_HUB_INT_VOL_MAX); } return 0; } ret = devm_gpio_request(hub->dev, pdata->hub_reset, "HSIC_HUB_RESET"); if (ret < 0) { dev_err(hub->dev, "gpio request failed for GPIO%d\n", pdata->hub_reset); return ret; } if (pdata->refclk_gpio) { ret = devm_gpio_request(hub->dev, pdata->refclk_gpio, "HSIC_HUB_CLK"); if (ret < 0) dev_err(hub->dev, "gpio request failed (CLK GPIO)\n"); } if (pdata->xo_clk_gpio) { ret = devm_gpio_request(hub->dev, pdata->xo_clk_gpio, "HSIC_HUB_XO_CLK"); if (ret < 0) { dev_err(hub->dev, "gpio request failed(XO CLK GPIO)\n"); return ret; } } if (pdata->int_gpio) { ret = devm_gpio_request(hub->dev, pdata->int_gpio, "HSIC_HUB_INT"); if (ret < 0) { dev_err(hub->dev, "gpio request failed (INT GPIO)\n"); return ret; } smsc_hub->int_pad_reg = devm_regulator_get(hub->dev, "hub-int"); if (IS_ERR(smsc_hub->int_pad_reg)) { dev_dbg(hub->dev, "unable to get ext hub_int reg\n"); } else { ret = regulator_set_voltage(smsc_hub->int_pad_reg, HSIC_HUB_INT_VOL_MIN, HSIC_HUB_INT_VOL_MAX); if (ret) { dev_err(hub->dev, "unable to set the voltage\n" " for hsic hub int reg\n"); return ret; } ret = regulator_enable(smsc_hub->int_pad_reg); if (ret) { dev_err(hub->dev, "unable to enable int reg\n"); regulator_set_voltage(smsc_hub->int_pad_reg, 0, HSIC_HUB_INT_VOL_MAX); return ret; } } } return 0; }
static int w1_gpio_probe(struct platform_device *pdev) { struct w1_bus_master *master; struct w1_gpio_platform_data *pdata = pdev->dev.platform_data; int err; if(pdata == NULL) { if (of_have_populated_dt()) { err = w1_gpio_probe_dt(pdev); if (err < 0) return err; } } pdata = dev_get_platdata(&pdev->dev); if (!pdata) { dev_err(&pdev->dev, "No configuration data\n"); return -ENXIO; } master = devm_kzalloc(&pdev->dev, sizeof(struct w1_bus_master), GFP_KERNEL); if (!master) { dev_err(&pdev->dev, "Out of memory\n"); return -ENOMEM; } w1_gpio_pin_orig = pdata->pin; w1_gpio_pullup_pin_orig = pdata->ext_pullup_enable_pin; w1_gpio_pullup_orig = pdata->parasitic_power; if(gpio_is_valid(w1_gpio_pin)) { pdata->pin = w1_gpio_pin; pdata->ext_pullup_enable_pin = -1; pdata->parasitic_power = -1; } pdata->parasitic_power |= w1_gpio_pullup; if(gpio_is_valid(w1_gpio_pullup_pin)) { pdata->ext_pullup_enable_pin = w1_gpio_pullup_pin; } dev_info(&pdev->dev, "gpio pin %d, external pullup pin %d, parasitic power %d\n", pdata->pin, pdata->ext_pullup_enable_pin, pdata->parasitic_power); err = devm_gpio_request(&pdev->dev, pdata->pin, "w1"); if (err) { dev_err(&pdev->dev, "gpio_request (pin) failed\n"); return err; } if (gpio_is_valid(pdata->ext_pullup_enable_pin)) { err = devm_gpio_request_one(&pdev->dev, pdata->ext_pullup_enable_pin, GPIOF_INIT_LOW, "w1 pullup"); if (err < 0) { dev_err(&pdev->dev, "gpio_request_one " "(ext_pullup_enable_pin) failed\n"); return err; } } master->data = pdata; master->read_bit = w1_gpio_read_bit; if (pdata->is_open_drain) { gpio_direction_output(pdata->pin, 1); master->write_bit = w1_gpio_write_bit_val; } else { gpio_direction_input(pdata->pin); master->write_bit = w1_gpio_write_bit_dir; master->set_pullup = w1_gpio_set_pullup; } if (pdata->parasitic_power) { if (pdata->is_open_drain) printk(KERN_ERR "w1-gpio 'pullup'(parasitic power) " "option doesn't work with open drain GPIO\n"); else master->bitbang_pullup = w1_gpio_bitbang_pullup; } err = w1_add_master_device(master); if (err) { dev_err(&pdev->dev, "w1_add_master device failed\n"); return err; } if (pdata->enable_external_pullup) pdata->enable_external_pullup(1); if (gpio_is_valid(pdata->ext_pullup_enable_pin)) gpio_set_value(pdata->ext_pullup_enable_pin, 1); platform_set_drvdata(pdev, master); return 0; }
static int sirfsoc_uart_probe(struct platform_device *pdev) { struct sirfsoc_uart_port *sirfport; struct uart_port *port; struct resource *res; int ret; const struct of_device_id *match; match = of_match_node(sirfsoc_uart_ids, pdev->dev.of_node); if (of_property_read_u32(pdev->dev.of_node, "cell-index", &pdev->id)) { dev_err(&pdev->dev, "Unable to find cell-index in uart node.\n"); ret = -EFAULT; goto err; } if (of_device_is_compatible(pdev->dev.of_node, "sirf,prima2-usp-uart")) pdev->id += ((struct sirfsoc_uart_register *) match->data)->uart_param.register_uart_nr; sirfport = &sirfsoc_uart_ports[pdev->id]; port = &sirfport->port; port->dev = &pdev->dev; port->private_data = sirfport; sirfport->uart_reg = (struct sirfsoc_uart_register *)match->data; sirfport->hw_flow_ctrl = of_property_read_bool(pdev->dev.of_node, "sirf,uart-has-rtscts"); if (of_device_is_compatible(pdev->dev.of_node, "sirf,prima2-uart")) { sirfport->uart_reg->uart_type = SIRF_REAL_UART; if (of_property_read_u32(pdev->dev.of_node, "sirf,uart-dma-rx-channel", &sirfport->rx_dma_no)) sirfport->rx_dma_no = UNVALID_DMA_CHAN; if (of_property_read_u32(pdev->dev.of_node, "sirf,uart-dma-tx-channel", &sirfport->tx_dma_no)) sirfport->tx_dma_no = UNVALID_DMA_CHAN; } if (of_device_is_compatible(pdev->dev.of_node, "sirf,prima2-usp-uart")) { sirfport->uart_reg->uart_type = SIRF_USP_UART; if (of_property_read_u32(pdev->dev.of_node, "sirf,usp-dma-rx-channel", &sirfport->rx_dma_no)) sirfport->rx_dma_no = UNVALID_DMA_CHAN; if (of_property_read_u32(pdev->dev.of_node, "sirf,usp-dma-tx-channel", &sirfport->tx_dma_no)) sirfport->tx_dma_no = UNVALID_DMA_CHAN; if (!sirfport->hw_flow_ctrl) goto usp_no_flow_control; if (of_find_property(pdev->dev.of_node, "cts-gpios", NULL)) sirfport->cts_gpio = of_get_named_gpio( pdev->dev.of_node, "cts-gpios", 0); else sirfport->cts_gpio = -1; if (of_find_property(pdev->dev.of_node, "rts-gpios", NULL)) sirfport->rts_gpio = of_get_named_gpio( pdev->dev.of_node, "rts-gpios", 0); else sirfport->rts_gpio = -1; if ((!gpio_is_valid(sirfport->cts_gpio) || !gpio_is_valid(sirfport->rts_gpio))) { ret = -EINVAL; dev_err(&pdev->dev, "Usp flow control must have cts and rts gpio"); goto err; } ret = devm_gpio_request(&pdev->dev, sirfport->cts_gpio, "usp-cts-gpio"); if (ret) { dev_err(&pdev->dev, "Unable request cts gpio"); goto err; } gpio_direction_input(sirfport->cts_gpio); ret = devm_gpio_request(&pdev->dev, sirfport->rts_gpio, "usp-rts-gpio"); if (ret) { dev_err(&pdev->dev, "Unable request rts gpio"); goto err; } gpio_direction_output(sirfport->rts_gpio, 1); } usp_no_flow_control: if (of_device_is_compatible(pdev->dev.of_node, "sirf,marco-uart")) sirfport->is_marco = true; if (of_property_read_u32(pdev->dev.of_node, "fifosize", &port->fifosize)) { dev_err(&pdev->dev, "Unable to find fifosize in uart node.\n"); ret = -EFAULT; goto err; } res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (res == NULL) { dev_err(&pdev->dev, "Insufficient resources.\n"); ret = -EFAULT; goto err; } spin_lock_init(&sirfport->rx_lock); spin_lock_init(&sirfport->tx_lock); tasklet_init(&sirfport->rx_dma_complete_tasklet, sirfsoc_uart_rx_dma_complete_tl, (unsigned long)sirfport); tasklet_init(&sirfport->rx_tmo_process_tasklet, sirfsoc_rx_tmo_process_tl, (unsigned long)sirfport); port->mapbase = res->start; port->membase = devm_ioremap(&pdev->dev, res->start, resource_size(res)); if (!port->membase) { dev_err(&pdev->dev, "Cannot remap resource.\n"); ret = -ENOMEM; goto err; } res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); if (res == NULL) { dev_err(&pdev->dev, "Insufficient resources.\n"); ret = -EFAULT; goto err; } port->irq = res->start; sirfport->clk = clk_get(&pdev->dev, NULL); if (IS_ERR(sirfport->clk)) { ret = PTR_ERR(sirfport->clk); goto err; } clk_prepare_enable(sirfport->clk); port->uartclk = clk_get_rate(sirfport->clk); port->ops = &sirfsoc_uart_ops; spin_lock_init(&port->lock); platform_set_drvdata(pdev, sirfport); ret = uart_add_one_port(&sirfsoc_uart_drv, port); if (ret != 0) { dev_err(&pdev->dev, "Cannot add UART port(%d).\n", pdev->id); goto port_err; } return 0; port_err: clk_disable_unprepare(sirfport->clk); clk_put(sirfport->clk); err: return ret; }
static int sdhci_s3c_parse_dt(struct device *dev, struct sdhci_host *host, struct s3c_sdhci_platdata *pdata) { struct device_node *node = dev->of_node; struct sdhci_s3c *ourhost = to_s3c(host); u32 max_width; int gpio, cnt, ret; /* if the bus-width property is not specified, assume width as 1 */ if (of_property_read_u32(node, "bus-width", &max_width)) max_width = 1; pdata->max_width = max_width; ourhost->gpios = devm_kzalloc(dev, NUM_GPIOS(pdata->max_width) * sizeof(int), GFP_KERNEL); if (!ourhost->gpios) return -ENOMEM; /* get the card detection method */ if (of_get_property(node, "broken-cd", NULL)) { pdata->cd_type = S3C_SDHCI_CD_NONE; goto setup_bus; } if (of_get_property(node, "non-removable", NULL)) { pdata->cd_type = S3C_SDHCI_CD_PERMANENT; goto setup_bus; } gpio = of_get_named_gpio(node, "cd-gpios", 0); if (gpio_is_valid(gpio)) { pdata->cd_type = S3C_SDHCI_CD_GPIO; goto found_cd; } else if (gpio != -ENOENT) { dev_err(dev, "invalid card detect gpio specified\n"); return -EINVAL; } gpio = of_get_named_gpio(node, "samsung,cd-pinmux-gpio", 0); if (gpio_is_valid(gpio)) { pdata->cd_type = S3C_SDHCI_CD_INTERNAL; goto found_cd; } else if (gpio != -ENOENT) { dev_err(dev, "invalid card detect gpio specified\n"); return -EINVAL; } /* assuming internal card detect that will be configured by pinctrl */ pdata->cd_type = S3C_SDHCI_CD_INTERNAL; goto setup_bus; found_cd: if (pdata->cd_type == S3C_SDHCI_CD_GPIO) { pdata->ext_cd_gpio = gpio; ourhost->ext_cd_gpio = -1; if (of_get_property(node, "cd-inverted", NULL)) pdata->ext_cd_gpio_invert = 1; } else if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { ret = devm_gpio_request(dev, gpio, "sdhci-cd"); if (ret) { dev_err(dev, "card detect gpio request failed\n"); return -EINVAL; } ourhost->ext_cd_gpio = gpio; } setup_bus: if (!IS_ERR(ourhost->pctrl)) return 0; /* get the gpios for command, clock and data lines */ for (cnt = 0; cnt < NUM_GPIOS(pdata->max_width); cnt++) { gpio = of_get_gpio(node, cnt); if (!gpio_is_valid(gpio)) { dev_err(dev, "invalid gpio[%d]\n", cnt); return -EINVAL; } ourhost->gpios[cnt] = gpio; } for (cnt = 0; cnt < NUM_GPIOS(pdata->max_width); cnt++) { ret = devm_gpio_request(dev, ourhost->gpios[cnt], "sdhci-gpio"); if (ret) { dev_err(dev, "gpio[%d] request failed\n", cnt); return -EINVAL; } } return 0; }
static int mt2701_cs42448_machine_probe(struct platform_device *pdev) { struct snd_soc_card *card = &mt2701_cs42448_soc_card; int ret; int i; struct device_node *platform_node, *codec_node, *codec_node_bt_mrg; struct mt2701_cs42448_private *priv = devm_kzalloc(&pdev->dev, sizeof(struct mt2701_cs42448_private), GFP_KERNEL); struct device *dev = &pdev->dev; if (!priv) return -ENOMEM; platform_node = of_parse_phandle(pdev->dev.of_node, "mediatek,platform", 0); if (!platform_node) { dev_err(&pdev->dev, "Property 'platform' missing or invalid\n"); return -EINVAL; } for (i = 0; i < card->num_links; i++) { if (mt2701_cs42448_dai_links[i].platform_name) continue; mt2701_cs42448_dai_links[i].platform_of_node = platform_node; } card->dev = dev; codec_node = of_parse_phandle(pdev->dev.of_node, "mediatek,audio-codec", 0); if (!codec_node) { dev_err(&pdev->dev, "Property 'audio-codec' missing or invalid\n"); return -EINVAL; } for (i = 0; i < card->num_links; i++) { if (mt2701_cs42448_dai_links[i].codec_name) continue; mt2701_cs42448_dai_links[i].codec_of_node = codec_node; } codec_node_bt_mrg = of_parse_phandle(pdev->dev.of_node, "mediatek,audio-codec-bt-mrg", 0); if (!codec_node_bt_mrg) { dev_err(&pdev->dev, "Property 'audio-codec-bt-mrg' missing or invalid\n"); return -EINVAL; } mt2701_cs42448_dai_links[DAI_LINK_BE_MRG_BT].codec_of_node = codec_node_bt_mrg; ret = snd_soc_of_parse_audio_routing(card, "audio-routing"); if (ret) { dev_err(&pdev->dev, "failed to parse audio-routing: %d\n", ret); return ret; } priv->i2s1_in_mux_gpio_sel_1 = of_get_named_gpio(dev->of_node, "i2s1-in-sel-gpio1", 0); if (gpio_is_valid(priv->i2s1_in_mux_gpio_sel_1)) { ret = devm_gpio_request(dev, priv->i2s1_in_mux_gpio_sel_1, "i2s1_in_mux_gpio_sel_1"); if (ret) dev_warn(&pdev->dev, "%s devm_gpio_request fail %d\n", __func__, ret); gpio_direction_output(priv->i2s1_in_mux_gpio_sel_1, 0); } priv->i2s1_in_mux_gpio_sel_2 = of_get_named_gpio(dev->of_node, "i2s1-in-sel-gpio2", 0); if (gpio_is_valid(priv->i2s1_in_mux_gpio_sel_2)) { ret = devm_gpio_request(dev, priv->i2s1_in_mux_gpio_sel_2, "i2s1_in_mux_gpio_sel_2"); if (ret) dev_warn(&pdev->dev, "%s devm_gpio_request fail2 %d\n", __func__, ret); gpio_direction_output(priv->i2s1_in_mux_gpio_sel_2, 0); } snd_soc_card_set_drvdata(card, priv); ret = devm_snd_soc_register_card(&pdev->dev, card); if (ret) dev_err(&pdev->dev, "%s snd_soc_register_card fail %d\n", __func__, ret); return ret; }
static int spi_clps711x_probe(struct platform_device *pdev) { struct spi_clps711x_data *hw; struct spi_clps711x_pdata *pdata = dev_get_platdata(&pdev->dev); struct spi_master *master; struct resource *res; int i, irq, ret; if (!pdata) { dev_err(&pdev->dev, "No platform data supplied\n"); return -EINVAL; } if (pdata->num_chipselect < 1) { dev_err(&pdev->dev, "At least one CS must be defined\n"); return -EINVAL; } irq = platform_get_irq(pdev, 0); if (irq < 0) return irq; master = spi_alloc_master(&pdev->dev, sizeof(*hw)); if (!master) return -ENOMEM; master->cs_gpios = devm_kzalloc(&pdev->dev, sizeof(int) * pdata->num_chipselect, GFP_KERNEL); if (!master->cs_gpios) { ret = -ENOMEM; goto err_out; } master->bus_num = pdev->id; master->mode_bits = SPI_CPHA | SPI_CS_HIGH; master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 8); master->num_chipselect = pdata->num_chipselect; master->setup = spi_clps711x_setup; master->prepare_message = spi_clps711x_prepare_message; master->transfer_one = spi_clps711x_transfer_one; hw = spi_master_get_devdata(master); for (i = 0; i < master->num_chipselect; i++) { master->cs_gpios[i] = pdata->chipselect[i]; ret = devm_gpio_request(&pdev->dev, master->cs_gpios[i], DRIVER_NAME); if (ret) { dev_err(&pdev->dev, "Can't get CS GPIO %i\n", i); goto err_out; } } hw->spi_clk = devm_clk_get(&pdev->dev, "spi"); if (IS_ERR(hw->spi_clk)) { dev_err(&pdev->dev, "Can't get clocks\n"); ret = PTR_ERR(hw->spi_clk); goto err_out; } master->max_speed_hz = clk_get_rate(hw->spi_clk); platform_set_drvdata(pdev, master); hw->syscon = syscon_regmap_lookup_by_pdevname("syscon.3"); if (IS_ERR(hw->syscon)) { ret = PTR_ERR(hw->syscon); goto err_out; } hw->syscon1 = syscon_regmap_lookup_by_pdevname("syscon.1"); if (IS_ERR(hw->syscon1)) { ret = PTR_ERR(hw->syscon1); goto err_out; } res = platform_get_resource(pdev, IORESOURCE_MEM, 0); hw->syncio = devm_ioremap_resource(&pdev->dev, res); if (IS_ERR(hw->syncio)) { ret = PTR_ERR(hw->syncio); goto err_out; } /* Disable extended mode due hardware problems */ regmap_update_bits(hw->syscon, SYSCON_OFFSET, SYSCON3_ADCCON, 0); /* Clear possible pending interrupt */ readl(hw->syncio); ret = devm_request_irq(&pdev->dev, irq, spi_clps711x_isr, 0, dev_name(&pdev->dev), master); if (ret) goto err_out; ret = devm_spi_register_master(&pdev->dev, master); if (!ret) { dev_info(&pdev->dev, "SPI bus driver initialized. Master clock %u Hz\n", master->max_speed_hz); return 0; } dev_err(&pdev->dev, "Failed to register master\n"); err_out: spi_master_put(master); return ret; }
static int sirfsoc_uart_probe(struct platform_device *pdev) { struct sirfsoc_uart_port *sirfport; struct uart_port *port; struct resource *res; int ret; int i, j; struct dma_slave_config slv_cfg = { .src_maxburst = 2, }; struct dma_slave_config tx_slv_cfg = { .dst_maxburst = 2, }; const struct of_device_id *match; match = of_match_node(sirfsoc_uart_ids, pdev->dev.of_node); if (of_property_read_u32(pdev->dev.of_node, "cell-index", &pdev->id)) { dev_err(&pdev->dev, "Unable to find cell-index in uart node.\n"); ret = -EFAULT; goto err; } if (of_device_is_compatible(pdev->dev.of_node, "sirf,prima2-usp-uart")) pdev->id += ((struct sirfsoc_uart_register *) match->data)->uart_param.register_uart_nr; sirfport = &sirfsoc_uart_ports[pdev->id]; port = &sirfport->port; port->dev = &pdev->dev; port->private_data = sirfport; sirfport->uart_reg = (struct sirfsoc_uart_register *)match->data; sirfport->hw_flow_ctrl = of_property_read_bool(pdev->dev.of_node, "sirf,uart-has-rtscts"); if (of_device_is_compatible(pdev->dev.of_node, "sirf,prima2-uart")) sirfport->uart_reg->uart_type = SIRF_REAL_UART; if (of_device_is_compatible(pdev->dev.of_node, "sirf,prima2-usp-uart")) { sirfport->uart_reg->uart_type = SIRF_USP_UART; if (!sirfport->hw_flow_ctrl) goto usp_no_flow_control; if (of_find_property(pdev->dev.of_node, "cts-gpios", NULL)) sirfport->cts_gpio = of_get_named_gpio( pdev->dev.of_node, "cts-gpios", 0); else sirfport->cts_gpio = -1; if (of_find_property(pdev->dev.of_node, "rts-gpios", NULL)) sirfport->rts_gpio = of_get_named_gpio( pdev->dev.of_node, "rts-gpios", 0); else sirfport->rts_gpio = -1; if ((!gpio_is_valid(sirfport->cts_gpio) || !gpio_is_valid(sirfport->rts_gpio))) { ret = -EINVAL; dev_err(&pdev->dev, "Usp flow control must have cts and rts gpio"); goto err; } ret = devm_gpio_request(&pdev->dev, sirfport->cts_gpio, "usp-cts-gpio"); if (ret) { dev_err(&pdev->dev, "Unable request cts gpio"); goto err; } gpio_direction_input(sirfport->cts_gpio); ret = devm_gpio_request(&pdev->dev, sirfport->rts_gpio, "usp-rts-gpio"); if (ret) { dev_err(&pdev->dev, "Unable request rts gpio"); goto err; } gpio_direction_output(sirfport->rts_gpio, 1); } usp_no_flow_control: if (of_device_is_compatible(pdev->dev.of_node, "sirf,atlas7-uart")) sirfport->is_atlas7 = true; if (of_property_read_u32(pdev->dev.of_node, "fifosize", &port->fifosize)) { dev_err(&pdev->dev, "Unable to find fifosize in uart node.\n"); ret = -EFAULT; goto err; } res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (res == NULL) { dev_err(&pdev->dev, "Insufficient resources.\n"); ret = -EFAULT; goto err; } tasklet_init(&sirfport->rx_dma_complete_tasklet, sirfsoc_uart_rx_dma_complete_tl, (unsigned long)sirfport); tasklet_init(&sirfport->rx_tmo_process_tasklet, sirfsoc_rx_tmo_process_tl, (unsigned long)sirfport); port->mapbase = res->start; port->membase = devm_ioremap(&pdev->dev, res->start, resource_size(res)); if (!port->membase) { dev_err(&pdev->dev, "Cannot remap resource.\n"); ret = -ENOMEM; goto err; } res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); if (res == NULL) { dev_err(&pdev->dev, "Insufficient resources.\n"); ret = -EFAULT; goto err; } port->irq = res->start; sirfport->clk = devm_clk_get(&pdev->dev, NULL); if (IS_ERR(sirfport->clk)) { ret = PTR_ERR(sirfport->clk); goto err; } port->uartclk = clk_get_rate(sirfport->clk); if (of_device_is_compatible(pdev->dev.of_node, "sirf,atlas7-bt-uart")) { sirfport->clk_general = devm_clk_get(&pdev->dev, "general"); if (IS_ERR(sirfport->clk_general)) { ret = PTR_ERR(sirfport->clk_general); goto err; } sirfport->clk_noc = devm_clk_get(&pdev->dev, "noc"); if (IS_ERR(sirfport->clk_noc)) { ret = PTR_ERR(sirfport->clk_noc); goto err; } sirfport->is_bt_uart = true; } else sirfport->is_bt_uart = false; port->ops = &sirfsoc_uart_ops; spin_lock_init(&port->lock); platform_set_drvdata(pdev, sirfport); ret = uart_add_one_port(&sirfsoc_uart_drv, port); if (ret != 0) { dev_err(&pdev->dev, "Cannot add UART port(%d).\n", pdev->id); goto err; } sirfport->rx_dma_chan = dma_request_slave_channel(port->dev, "rx"); for (i = 0; sirfport->rx_dma_chan && i < SIRFSOC_RX_LOOP_BUF_CNT; i++) { sirfport->rx_dma_items[i].xmit.buf = dma_alloc_coherent(port->dev, SIRFSOC_RX_DMA_BUF_SIZE, &sirfport->rx_dma_items[i].dma_addr, GFP_KERNEL); if (!sirfport->rx_dma_items[i].xmit.buf) { dev_err(port->dev, "Uart alloc bufa failed\n"); ret = -ENOMEM; goto alloc_coherent_err; } sirfport->rx_dma_items[i].xmit.head = sirfport->rx_dma_items[i].xmit.tail = 0; } if (sirfport->rx_dma_chan) dmaengine_slave_config(sirfport->rx_dma_chan, &slv_cfg); sirfport->tx_dma_chan = dma_request_slave_channel(port->dev, "tx"); if (sirfport->tx_dma_chan) dmaengine_slave_config(sirfport->tx_dma_chan, &tx_slv_cfg); return 0; alloc_coherent_err: for (j = 0; j < i; j++) dma_free_coherent(port->dev, SIRFSOC_RX_DMA_BUF_SIZE, sirfport->rx_dma_items[j].xmit.buf, sirfport->rx_dma_items[j].dma_addr); dma_release_channel(sirfport->rx_dma_chan); err: return ret; } static int sirfsoc_uart_remove(struct platform_device *pdev) { struct sirfsoc_uart_port *sirfport = platform_get_drvdata(pdev); struct uart_port *port = &sirfport->port; uart_remove_one_port(&sirfsoc_uart_drv, port); if (sirfport->rx_dma_chan) { int i; dmaengine_terminate_all(sirfport->rx_dma_chan); dma_release_channel(sirfport->rx_dma_chan); for (i = 0; i < SIRFSOC_RX_LOOP_BUF_CNT; i++) dma_free_coherent(port->dev, SIRFSOC_RX_DMA_BUF_SIZE, sirfport->rx_dma_items[i].xmit.buf, sirfport->rx_dma_items[i].dma_addr); } if (sirfport->tx_dma_chan) { dmaengine_terminate_all(sirfport->tx_dma_chan); dma_release_channel(sirfport->tx_dma_chan); } return 0; } #ifdef CONFIG_PM_SLEEP static int sirfsoc_uart_suspend(struct device *pdev) { struct sirfsoc_uart_port *sirfport = dev_get_drvdata(pdev); struct uart_port *port = &sirfport->port; uart_suspend_port(&sirfsoc_uart_drv, port); return 0; } static int sirfsoc_uart_resume(struct device *pdev) { struct sirfsoc_uart_port *sirfport = dev_get_drvdata(pdev); struct uart_port *port = &sirfport->port; uart_resume_port(&sirfsoc_uart_drv, port); return 0; } #endif static const struct dev_pm_ops sirfsoc_uart_pm_ops = { SET_SYSTEM_SLEEP_PM_OPS(sirfsoc_uart_suspend, sirfsoc_uart_resume) }; static struct platform_driver sirfsoc_uart_driver = { .probe = sirfsoc_uart_probe, .remove = sirfsoc_uart_remove, .driver = { .name = SIRFUART_PORT_NAME, .of_match_table = sirfsoc_uart_ids, .pm = &sirfsoc_uart_pm_ops, }, }; static int __init sirfsoc_uart_init(void) { int ret = 0; ret = uart_register_driver(&sirfsoc_uart_drv); if (ret) goto out; ret = platform_driver_register(&sirfsoc_uart_driver); if (ret) uart_unregister_driver(&sirfsoc_uart_drv); out: return ret; } module_init(sirfsoc_uart_init); static void __exit sirfsoc_uart_exit(void) { platform_driver_unregister(&sirfsoc_uart_driver); uart_unregister_driver(&sirfsoc_uart_drv); }
static int spi_imx_probe(struct platform_device *pdev) { struct device_node *np = pdev->dev.of_node; const struct of_device_id *of_id = of_match_device(spi_imx_dt_ids, &pdev->dev); struct spi_imx_master *mxc_platform_info = dev_get_platdata(&pdev->dev); struct spi_master *master; struct spi_imx_data *spi_imx; struct resource *res; int i, ret, irq; if (!np && !mxc_platform_info) { dev_err(&pdev->dev, "can't get the platform data\n"); return -EINVAL; } master = spi_alloc_master(&pdev->dev, sizeof(struct spi_imx_data)); if (!master) return -ENOMEM; platform_set_drvdata(pdev, master); master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32); master->bus_num = np ? -1 : pdev->id; spi_imx = spi_master_get_devdata(master); spi_imx->bitbang.master = master; spi_imx->dev = &pdev->dev; spi_imx->devtype_data = of_id ? of_id->data : (struct spi_imx_devtype_data *)pdev->id_entry->driver_data; if (mxc_platform_info) { master->num_chipselect = mxc_platform_info->num_chipselect; master->cs_gpios = devm_kzalloc(&master->dev, sizeof(int) * master->num_chipselect, GFP_KERNEL); if (!master->cs_gpios) return -ENOMEM; for (i = 0; i < master->num_chipselect; i++) master->cs_gpios[i] = mxc_platform_info->chipselect[i]; } spi_imx->bitbang.chipselect = spi_imx_chipselect; spi_imx->bitbang.setup_transfer = spi_imx_setupxfer; spi_imx->bitbang.txrx_bufs = spi_imx_transfer; spi_imx->bitbang.master->setup = spi_imx_setup; spi_imx->bitbang.master->cleanup = spi_imx_cleanup; spi_imx->bitbang.master->prepare_message = spi_imx_prepare_message; spi_imx->bitbang.master->unprepare_message = spi_imx_unprepare_message; spi_imx->bitbang.master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; if (is_imx35_cspi(spi_imx) || is_imx51_ecspi(spi_imx)) spi_imx->bitbang.master->mode_bits |= SPI_LOOP; init_completion(&spi_imx->xfer_done); res = platform_get_resource(pdev, IORESOURCE_MEM, 0); spi_imx->base = devm_ioremap_resource(&pdev->dev, res); if (IS_ERR(spi_imx->base)) { ret = PTR_ERR(spi_imx->base); goto out_master_put; } spi_imx->base_phys = res->start; irq = platform_get_irq(pdev, 0); if (irq < 0) { ret = irq; goto out_master_put; } ret = devm_request_irq(&pdev->dev, irq, spi_imx_isr, 0, dev_name(&pdev->dev), spi_imx); if (ret) { dev_err(&pdev->dev, "can't get irq%d: %d\n", irq, ret); goto out_master_put; } spi_imx->clk_ipg = devm_clk_get(&pdev->dev, "ipg"); if (IS_ERR(spi_imx->clk_ipg)) { ret = PTR_ERR(spi_imx->clk_ipg); goto out_master_put; } spi_imx->clk_per = devm_clk_get(&pdev->dev, "per"); if (IS_ERR(spi_imx->clk_per)) { ret = PTR_ERR(spi_imx->clk_per); goto out_master_put; } ret = clk_prepare_enable(spi_imx->clk_per); if (ret) goto out_master_put; ret = clk_prepare_enable(spi_imx->clk_ipg); if (ret) goto out_put_per; spi_imx->spi_clk = clk_get_rate(spi_imx->clk_per); /* * Only validated on i.mx6 now, can remove the constrain if validated on * other chips. */ if (is_imx51_ecspi(spi_imx)) { ret = spi_imx_sdma_init(&pdev->dev, spi_imx, master); if (ret == -EPROBE_DEFER) goto out_clk_put; if (ret < 0) dev_err(&pdev->dev, "dma setup error %d, use pio\n", ret); } spi_imx->devtype_data->reset(spi_imx); spi_imx->devtype_data->intctrl(spi_imx, 0); master->dev.of_node = pdev->dev.of_node; ret = spi_bitbang_start(&spi_imx->bitbang); if (ret) { dev_err(&pdev->dev, "bitbang start failed with %d\n", ret); goto out_clk_put; } if (!master->cs_gpios) { dev_err(&pdev->dev, "No CS GPIOs available\n"); ret = -EINVAL; goto out_clk_put; } for (i = 0; i < master->num_chipselect; i++) { if (!gpio_is_valid(master->cs_gpios[i])) continue; ret = devm_gpio_request(&pdev->dev, master->cs_gpios[i], DRIVER_NAME); if (ret) { dev_err(&pdev->dev, "Can't get CS GPIO %i\n", master->cs_gpios[i]); goto out_clk_put; } } dev_info(&pdev->dev, "probed\n"); clk_disable(spi_imx->clk_ipg); clk_disable(spi_imx->clk_per); return ret; out_clk_put: clk_disable_unprepare(spi_imx->clk_ipg); out_put_per: clk_disable_unprepare(spi_imx->clk_per); out_master_put: spi_master_put(master); return ret; }