XStatus init_ll_fifo(struct xemac_s *xemac) { xlltemacif_s *xlltemacif = (xlltemacif_s *)(xemac->state); #if NO_SYS struct xtopology_t *xtopologyp = &xtopology[xemac->topology_index]; #endif /* initialize ll fifo */ XLlFifo_Initialize(&xlltemacif->llfifo, XLlTemac_LlDevBaseAddress(&xlltemacif->lltemac)); /* Clear any pending FIFO interrupts */ XLlFifo_IntClear(&xlltemacif->llfifo, XLLF_INT_ALL_MASK); /* enable fifo interrupts */ XLlFifo_IntEnable(&xlltemacif->llfifo, XLLF_INT_ALL_MASK); #if NO_SYS /* Register temac interrupt with interrupt controller */ XIntc_RegisterHandler(xtopologyp->intc_baseaddr, xlltemacif->lltemac.Config.TemacIntr, (XInterruptHandler)xlltemac_error_handler, &xlltemacif->lltemac); /* connect & enable FIFO interrupt */ XIntc_RegisterHandler(xtopologyp->intc_baseaddr, xlltemacif->lltemac.Config.LLFifoIntr, (XInterruptHandler)xllfifo_intr_handler, xemac); /* Enable EMAC interrupts in the interrupt controller */ do { /* read current interrupt enable mask */ unsigned int cur_mask = XIntc_In32(xtopologyp->intc_baseaddr + XIN_IER_OFFSET); /* form new mask enabling SDMA & ll_temac interrupts */ cur_mask = cur_mask | (1 << xlltemacif->lltemac.Config.LLFifoIntr) | (1 << xlltemacif->lltemac.Config.TemacIntr); /* set new mask */ XIntc_mEnableIntr(xtopologyp->intc_baseaddr, cur_mask); } while (0); #else /* connect & enable TEMAC interrupts */ register_int_handler(xlltemacif->lltemac.Config.TemacIntr, (XInterruptHandler)xlltemac_error_handler, &xlltemacif->lltemac); enable_interrupt(xlltemacif->lltemac.Config.TemacIntr); /* connect & enable FIFO interrupts */ register_int_handler(xlltemacif->lltemac.Config.LLFifoIntr, (XInterruptHandler)xllfifo_intr_handler, xemac); enable_interrupt(xlltemacif->lltemac.Config.LLFifoIntr); #endif return 0; }
static ssize_t store_host_en(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { struct platform_device *pdev = to_platform_device(dev); struct tegra_otg_data *tegra = platform_get_drvdata(pdev); unsigned long host; int err; err = kstrtoul(buf, 10, &host); if (err < 0) { return err; } if (host) { enable_interrupt(tegra, false); tegra_change_otg_state(tegra, OTG_STATE_A_SUSPEND); tegra_change_otg_state(tegra, OTG_STATE_A_HOST); tegra->interrupt_mode = false; } else { tegra->interrupt_mode = true; tegra_change_otg_state(tegra, OTG_STATE_A_SUSPEND); enable_interrupt(tegra, true); } return count; }
int main(void) { u8 cnt; board_setup(); configure_leds(C); light_leds(C, 0x0); enable_interrupt(0, IT_RAISING_EDGE); enable_interrupt(1, IT_LEVEL); usart_init(9600); sei(); light_leds(C, 0x1); { u8 hw[] = "HELLO WORLD\n"; usart_write(hw, sizeof(hw)-1); } for (;;) { int_clear_ack(0); int_clear_ack(1); led_cbk[cur_led_cbk](); _delay_ms(1000); } return 0; }
/* 游戏主循环。 * 在初始化工作结束后,main函数就跳转到主循环执行。 * 在主循环执行期间随时会插入异步的中断。时钟中断最终调用timer_event, * 键盘中断最终调用keyboard_event。中断处理完成后将返回主循环原位置继续执行。 * * tick是时钟中断中维护的信号,数值含义是“系统到当前时刻已经发生过的时钟中断数” * HZ是时钟控制器硬件每秒产生的中断数,在include/device/timer.h中定义 * now是主循环已经正确处理的时钟中断数,即游戏已经处理到的物理时间点 * * 由于qemu-kvm在访问内存映射IO区域时每次都会产生陷入,在30FPS时, * 对显存区域每秒会产生30*320*200/4次陷入,从而消耗过多时间导致跳帧的产生(实际FPS<30)。 * 在CFLAGS中增加-DSLOW可以在此情况下提升FPS。如果FPS仍太小,可以尝试 * -DTOOSLOW,此时将会采用隔行扫描的方式更新屏幕(可能会降低显示效果)。 * 这些机制的实现在device/video.c中。 * */ void main_loop(void) { int now = 0, target; int num_draw = 0; bool redraw; while (TRUE) { wait_for_interrupt(); disable_interrupt(); if (now == tick) { enable_interrupt(); continue; } assert(now < tick); target = tick; /* now总是小于tick,因此我们需要“追赶”当前的时间 */ enable_interrupt(); redraw = FALSE; while (update_keypress()) ; /* 依次模拟已经错过的时钟中断。一次主循环如果执行时间长,期间可能到来多次时钟中断, * 从而主循环中维护的时钟可能与实际时钟相差较多。为了维持游戏的正常运行,必须补上 * 期间错过的每一帧游戏逻辑。 */ while (now < target) { /* 每隔一定时间产生一个新的字符 */ if (now % (HZ / CHARACTER_PER_SECOND) == 0) { create_new_letter(); } /* 每隔一定时间更新屏幕上字符的位置 */ if (now % (HZ / UPDATE_PER_SECOND) == 0) { update_letter_pos(); } /* 每隔一定时间需要刷新屏幕。注意到这里实现了“跳帧”的机制:假设 * HZ = 1000, FPS = 100, now = 10, target = 1000 * 即我们要模拟990个时钟中断之间发生的事件,其中包含了9次屏幕更新, * 但redraw flag只被置一次。 */ if (now % (HZ / FPS) == 0) { redraw = TRUE; } /* 更新fps统计信息 */ if (now % (HZ / 2) == 0) { int now_fps = num_draw * 2 + 1; if (now_fps > FPS) now_fps = FPS; set_fps(now_fps); num_draw = 0; } now ++; } if (redraw) { /* 当需要重新绘图时重绘 */ num_draw ++; redraw_screen(); } } }
static int tegra_otg_set_peripheral(struct otg_transceiver *otg, struct usb_gadget *gadget) { struct tegra_otg_data *tegra; unsigned long val; tegra = container_of(otg, struct tegra_otg_data, otg); otg->gadget = gadget; val = enable_interrupt(tegra, true); if ((val & USB_ID_STATUS) && (val & USB_VBUS_STATUS)) { val |= USB_VBUS_INT_STATUS; } else if (!(val & USB_ID_STATUS)) { val |= USB_ID_INT_STATUS; #ifdef CONFIG_MACH_SAMSUNG_VARIATION_TEGRA val &= ~USB_VBUS_INT_STATUS; #endif } else { val &= ~(USB_ID_INT_STATUS | USB_VBUS_INT_STATUS); } if ((val & USB_ID_INT_STATUS) || (val & USB_VBUS_INT_STATUS)) { tegra->int_status = val; tegra->detect_vbus = false; schedule_work (&tegra->work); } return 0; }
void pre_init(void) { morecore_area = core_buf; morecore_size = SERVER_CORE_SIZE; serial_lock(); // Initialize the serial port set_dlab(0); // we always assume the dlab is 0 unless we explicitly change it disable_interrupt(); disable_fifo(); reset_lcr(); reset_mcr(); clear_iir(); set_baud_rate(BAUD_RATE); reset_state(); enable_fifo(); enable_interrupt(); clear_iir(); // all done init_colours(); /* query what getchar clients exist */ num_getchar_clients = getchar_num_badges(); getchar_clients = calloc(num_getchar_clients, sizeof(getchar_client_t)); for (int i = 0; i < num_getchar_clients; i++) { unsigned int badge = getchar_enumerate_badge(i); assert(badge <= num_getchar_clients); getchar_clients[badge].client_id = badge; getchar_clients[badge].buf = getchar_buf(badge); getchar_clients[badge].last_head = -1; } set_putchar(serial_putchar); serial_irq_reg_callback(serial_irq, 0); /* Start regular heartbeat of 500ms */ timeout_periodic(0, 500000000); serial_unlock(); }
/* Lab-specific initialization goes here */ void labinit( void ) { // defining the int pointer, trise, volatile because you //don't want the c compiler to optimise volatile int * E = (volatile int *) 0xbf886100; // volatile int * portE = (volatile int *) 0xbf886110; * portE = 0x0; // for LED outputs // only for the last 8 bits * E = * E & 0xFF00; // initialising port D as input // using the pic32mx system TRISD = TRISD & 0x0FE0; PR2 = TMR2PERIOD; T2CON = 0x0; // clearing the clock T2CONSET = 0x70; // setting the prescale TMR2 = 0; // reset timer to 0 T2CONSET = 0x8000; // turn timer on, set bit 15 to 1 // enabling interupts from Timer 2 // IPC(2) = 7; IPC(2) = IPC(2) | 0x10; // set bit no 8 to enable interupt IEC(0) = 0x100; // calling interupt from labwork.S enable_interrupt(); return; }
int main(void) { int i; /* TODO: run test_printk() */ /* test_printk(); */ disable_interrupt(); init_pcbs(); setup_irq(8, irq0_handle); setup_irq(0x80, irq1_handle); setup_irq(9, keyboard_int); /* kthread_create(test1_a, stack1+KSTACK_SIZE); kthread_create(test1_b, stack2+KSTACK_SIZE); kthread_create(test1_c, stack3+KSTACK_SIZE); kthread_create(test_thread_a, stack1+KSTACK_SIZE); kthread_create(test_thread_b, stack2+KSTACK_SIZE); kthread_create(test_msg_c, stack1+KSTACK_SIZE); kthread_create(test_msg_d, stack2+KSTACK_SIZE); kthread_create(test_thread_in_thread, stack1+KSTACK_SIZE); */ UserThread_create(0x2000); kthread_create(tty_driver, stack2+KSTACK_SIZE); enable_interrupt(); while (1) { idle_cpu(); } }
bool init(void) { LPC_GPIO1->FIODIR &= ~(1<<9); LPC_I2C2->I2MASK0 = 0x1F; LPC_I2C2->I2CONSET = 0x40; LPC_SC->PCONP |= (1<<25); //Peripheral clock select LPC_SC->PCLKSEL1 &= ~(3<<18); LPC_SC->PCLKSEL1 |= (1<<18); //Selecting TXD3, RXD3 LPC_PINCON->PINSEL9 &= ~((3<<24)|(3<<26)); LPC_PINCON->PINSEL9 |= ((3<<24)|(3<<26)); //set DLM and DLL for desired baudrate set_baud_rate(9600); //Enable Interrupt for UART3 enable_interrupt(); return true; }
static void tegra_otg_resume(struct device *dev) { struct platform_device *pdev = to_platform_device(dev); struct tegra_otg_data *tegra = platform_get_drvdata(pdev); int val; unsigned long flags; DBG("%s(%d) BEGIN\n", __func__, __LINE__); if (!tegra->suspended) return; /* Clear pending interrupts */ clk_enable(tegra->clk); val = otg_readl(tegra, USB_PHY_WAKEUP); otg_writel(tegra, val, USB_PHY_WAKEUP); DBG("%s(%d) PHY WAKEUP register : 0x%x\n", __func__, __LINE__, val); clk_disable(tegra->clk); /* Enable interrupt and call work to set to appropriate state */ spin_lock_irqsave(&tegra->lock, flags); if (tegra->builtin_host) tegra->int_status = val | USB_INT_EN; else tegra->int_status = val | USB_VBUS_INT_EN | USB_VBUS_WAKEUP_EN | USB_ID_PIN_WAKEUP_EN; spin_unlock_irqrestore(&tegra->lock, flags); schedule_work(&tegra->work); enable_interrupt(tegra, true); tegra->suspended = false; DBG("%s(%d) END\n", __func__, __LINE__); }
/** * Run all kernel module initializers. */ void exec_init_array(void) { extern void dyndebug_early_boot_init(void); extern void kmem_init(void); extern void dynmem_init(void); extern void vralloc_init(void); int n; #ifdef configDYNDEBUG dyndebug_early_boot_init(); #endif kputs("\n\nZeKe PreInit\n"); n = __hw_preinit_array_end - __hw_preinit_array_start; exec_array(__hw_preinit_array_start, n); /* * Memory allocator initializers. */ kmem_init(); dynmem_init(); vralloc_init(); kputs("SubsysInit\n"); n = __init_array_end - __init_array_start; exec_array(__init_array_start, n); kputs("PostInit\n"); disable_interrupt(); n = __hw_postinit_array_end - __hw_postinit_array_start; exec_array(__hw_postinit_array_start, n); enable_interrupt(); }
void i2c_setup_interrupt(const hw_module_t *port, bool state) { if (state) { // register the IRQ sub-routine register_interrupt_routine(port->irq_id, port->irq_subroutine); // enable the IRQ at the ARM core level enable_interrupt(port->irq_id, CPU_0, 0); // clear the status register HW_I2C_I2SR_WR(port->instance, 0); // and enable the interrupts in the I2C controller HW_I2C_I2CR(port->instance).B.IIEN = 1; } else { // disable the IRQ at the ARM core level disable_interrupt(port->irq_id, CPU_0); // and disable the interrupts in the I2C controller HW_I2C_I2CR(port->instance).B.IIEN = 0; // clear the status register HW_I2C_I2SR_WR(port->instance, 0); } }
size_t tty_read(char *buf, size_t len) { enable_interrupt(); size_t i = 0; while (i != len) { uint16_t scan_code; while (!cirqueue_serve(&kb_buf, &scan_code)) /*nothing here*/; uint16_t key = KEYMAP[scan_code & 0xff]; if ((scan_code & 0xFF) < 0xE0) { /* it's a normal key */ if (key == KB_ENTER) { tty_putchar('\n'); break; } else if (key == KB_BACKSPACE) { if (i != 0) { tty_putchar('\b'); i -= 1; } } else { buf[i] = key & 0xFF; tty_putchar(buf[i]); i += 1; } } else { /* extended key */ } } buf[i] = '\0'; return i; }
static void tegra_otg_resume(struct device *dev) { struct platform_device *pdev = to_platform_device(dev); struct tegra_otg_data *tegra = platform_get_drvdata(pdev); struct otg_transceiver *otg = &tegra->otg; int val; unsigned long flags; DBG("%s(%d) BEGIN\n", __func__, __LINE__); /* Clear pending interrupts */ clk_enable(tegra->clk); val = otg_readl(tegra, USB_PHY_WAKEUP); otg_writel(tegra, val, USB_PHY_WAKEUP); DBG("%s(%d) PHY WAKEUP register : 0x%x\n", __func__, __LINE__, val); clk_disable(tegra->clk); /* Handle if host cable is replaced with device during suspend state */ if (otg->state == OTG_STATE_A_HOST && (val & USB_ID_STATUS)) tegra_change_otg_state(tegra, OTG_STATE_A_SUSPEND); /* Enable interrupt and call work to set to appropriate state */ spin_lock_irqsave(&tegra->lock, flags); tegra->int_status = (val | USB_INT_EN); spin_unlock_irqrestore(&tegra->lock, flags); irq_work(&tegra->work); enable_interrupt(tegra, true); DBG("%s(%d) END\n", __func__, __LINE__); }
/* Lab-specific initialization goes here */ void labinit( void ) { * portE = 0x0; // for LED outputs // only for the last 8 bits * E = * E & 0xFF00; // initialising port D as input // using the pic32mx system TRISD = TRISD & 0x0FE0; PR2 = TMR2PERIOD; T2CON = 0x0; // clearing the clock T2CONSET = 0x70; // setting the prescale TMR2 = 0; // reset timer to 0 T2CONSET = 0x8000; // turn timer on, set bit 15 to 1 // configuring the priority level IPC(2) = 7; // enabling bit 8 for the interupt IEC(0) = 0x100; // configuring the priority IPC(1) = 0x1C000000 ; // enabling bit 7 fot interrupt IEC(0) = IEC(0) | 0x80; // calling interupt from labwork.S enable_interrupt(); return; }
static int tegra_otg_set_peripheral(struct otg_transceiver *otg, struct usb_gadget *gadget) { struct tegra_otg_data *tegra; unsigned long val; DBG("%s(%d) BEGIN\n", __func__, __LINE__); tegra = container_of(otg, struct tegra_otg_data, otg); otg->gadget = gadget; val = enable_interrupt(tegra, true); if ((val & USB_ID_STATUS) && (val & USB_VBUS_STATUS)) val |= USB_VBUS_INT_STATUS; else if (!(val & USB_ID_STATUS)) { if(!tegra->builtin_host) val &= ~USB_ID_INT_STATUS; else val |= USB_ID_INT_STATUS; } else val &= ~(USB_ID_INT_STATUS | USB_VBUS_INT_STATUS); if ((val & USB_ID_INT_STATUS) || (val & USB_VBUS_INT_STATUS)) { tegra->int_status = val; schedule_work(&tegra->work); } DBG("%s(%d) END\n", __func__, __LINE__); return 0; }
/* 主循环,bootloader载入game二进制文件后,就跳转到这里执行 */ void game_init(void) { init_timer(); init_idt(); init_intr(); enable_interrupt(); play(); /* 这里是演示代码,显示浮动的文字和键盘扫描码 */ assert(0); /* 此处永远不应该返回,为什么? */ }
void kernelUpdateCursor(int x,int y){ uint16_t cursorLocation = y * 80 + x; disable_interrupt(); outportb(0x3D4, 14); outportb(0x3D5, cursorLocation >> 8); outportb(0x3D4, 15); outportb(0x3D5, cursorLocation); enable_interrupt(); }
bool update_keypress(void){ disable_interrupt(); move_by_key('a',y,-4,SCR_WIDTH - 8); move_by_key('d',y,4,SCR_WIDTH - 8); move_by_key('w',x,-4,SCR_HEIGHT - 8); move_by_key('s',x,4,SCR_HEIGHT - 8); enable_interrupt(); return false; }
bool wait_restart(void){ disable_interrupt(); if ( query_key('r' - 'a') ){ release_key('r' - 'a'); return true; } enable_interrupt(); return false; }
void _changeIntRamVect (char vector, void (* funct)(void)) { short int i; if (vector >= sizeof(vector_it_NearRAM)/sizeof(*vector_it_NearRAM) ) return; i = _readFlg(); /// store Interrupt flag disable_interrupt (); /// disable interrupt vector_it_NearRAM [vector] = funct; /// change vector in Ram Table if (i & (1<<6)) /// restore interrupt flag enable_interrupt (); }
void sys_init(void) { #if defined(UART_ENABLE) uart_init(); deg_str("power on\n"); #endif SYS_POWER_OFF(); core_power_on(); OTP_CLK_DIV2(); DECODER_DIV2(); SYSTEM_CLK_DIV4(); #if (NO_DISP != monitor) init_display(); #endif sd_speed_init(0,100); //#if SDMMC_CMD_MODE // sd_chk_ctl(SET_SD_H_CHK); //#endif init_port_sd(); //kv_init(); ///按键音初始化函数 #if RTC_ENABLE rtc_init(); //RTC初始化,检测是否闹钟开机 //{ //work_mode = RTC_MODE; //} #else { u8 rtc_reg = read_rtc_reg(); if (rtc_reg & BIT(7)) //检测是否掉电 { rtc_reg &= ~BIT(7); //清零PDFLAG write_rtc_reg(rtc_reg); #if USE_RTC_RAM reset_rtc_ram(); #endif } } #endif SYS_POWER_OFF(); key_init(); bsp_init(); SYS_POWER_OFF(); //interrupt_init(15, rtcisr); interrupt_init(3, timer3isr); interrupt_init(0, timer0isr); #if defined(BLUE_TOOTH_UART_FUNC) interrupt_init(7, uart_isr); #endif enable_interrupt(); /// flashled(3); }
/** * Enables notifications on tap or double tap events * * @param Pointer to sensor structure * @param which event to get notifications for * * @return 0 on success, non-zero on failure */ static int adxl345_sensor_set_notification(struct sensor * sensor, sensor_event_type_t sensor_event_type) { #if MYNEWT_VAL(ADXL345_INT_ENABLE) struct adxl345 * adxl345; uint8_t ints_to_enable = 0; struct adxl345_private_driver_data *pdd; int rc; ADXL345_LOG(ERROR, "Enabling notifications\n"); if ((sensor_event_type & ~(SENSOR_EVENT_TYPE_DOUBLE_TAP | SENSOR_EVENT_TYPE_SINGLE_TAP)) != 0) { return SYS_EINVAL; } /*XXX for now we do not support registering for both events */ if (sensor_event_type == (SENSOR_EVENT_TYPE_DOUBLE_TAP | SENSOR_EVENT_TYPE_SINGLE_TAP)) { return SYS_EINVAL; } adxl345 = (struct adxl345 *)SENSOR_GET_DEVICE(sensor); pdd = &adxl345->pdd; if (pdd->registered_mask & ADXL345_NOTIFY_MASK) { return SYS_EBUSY; } /* Enable tap event*/ if(sensor_event_type == SENSOR_EVENT_TYPE_DOUBLE_TAP) { ints_to_enable |= ADXL345_INT_DOUBLE_TAP_BIT; } if(sensor_event_type == SENSOR_EVENT_TYPE_SINGLE_TAP) { ints_to_enable |= ADXL345_INT_SINGLE_TAP_BIT; } rc = enable_interrupt(sensor, ints_to_enable); if (rc) { return rc; } pdd->notify_ctx.snec_evtype |= sensor_event_type; pdd->registered_mask |= ADXL345_NOTIFY_MASK; ADXL345_LOG(ERROR, "Enabled notifications\n"); return 0; #else return SYS_ENODEV; #endif }
/* * Register a function to be called when an interrupt fires. There is one interrupt per timer, * so the handler will need to check what caused the interrupt if multiple interrupts have been enabled. * * @param timer - A timer module (e.g. TIMER_0) * @param ab - Select timer A or timer B. * @param handler - A function to call (in interrupt context) * @param p_context - A pointer argument supplied to the handler * @param n_context - An integer argument supplied to the handler */ void timer_register_handler( timer_module_t timer, timer_ab_t ab, timer_interrupt_handler_t handler, void *p_context, uint32_t n_context) { timer_interrupt_list_t *p = &interrupt_handlers[timer][ab]; p->handler_fn = handler; p->p_context = p_context; p->n_context = n_context; enable_interrupt(timer_int_map[timer][ab]); }
main() { reset(); enable_interrupt(); while() { elegir_luz(); encender_luz(); } /***** rutina de interrupcion *****/ if (scan_inter () != 1) { if (shift_reg == FLAG) { switch (p_buffer) { case (0) : comienzo = 1; break; case (1) : if (comienzo==1) { p_buffer = 0; device = gchar(); if ( device == IDENTIFICATIVO) { acknowledge(); p_out = 0; wserial( gout () ); more = 1; } } break; default : if ( device == IDENTIFICATIVO ) { if (verificar() == NAK) no_acknowledge (); else { ack_nak = interpretar (); if ( ack_nak == ACK ) acknowledge (); else no_acknowledge (); } p_out = 0; wserial( gout () ); more = 1; } break; } p_buffer = 0; } else pchar(shift_reg); } else { if (more == 0) goto RTI; wserial( gout () ); if (shift_reg == 'f') { p_out = 1; more = 0; } } RTI (); }
void archi_init() { // Prefetch-cache: Enable prefetch for PFM (any PFM instructions or data) PRECONbits.PREFEN = 3; // Flash PM Wait States: MZ Flash runs at 2 wait states @ 200 MHz PRECONbits.PFMWS = 2; // enable multiple vector interrupts INTCONSET = _INTCON_MVEC_MASK; PRISS = 0x76543210; enable_interrupt(); }
void uart_setup_interrupt(uint32_t instance, void (*irq_subroutine)(void), uint8_t state) { uint32_t irq_id = UART_IRQS(instance); if (state == TRUE) { /* register the IRQ sub-routine */ register_interrupt_routine(irq_id, irq_subroutine); /* enable the IRQ */ enable_interrupt(irq_id, CPU_0, 0); } else /* disable the IRQ */ disable_interrupt(irq_id, CPU_0); }
static ssize_t store_host_en(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { struct platform_device *pdev = to_platform_device(dev); struct tegra_otg_data *tegra = platform_get_drvdata(pdev); unsigned long host; if (sscanf(buf, "%d", &host) != 1 || host < 0 || host > 1) return -EINVAL; if (host) { enable_interrupt(tegra, false); tegra_change_otg_state(tegra, OTG_STATE_A_SUSPEND); tegra_change_otg_state(tegra, OTG_STATE_A_HOST); tegra->interrupt_mode = false; } else { tegra->interrupt_mode = true; tegra_change_otg_state(tegra, OTG_STATE_A_SUSPEND); enable_interrupt(tegra, true); } return count; }
void init_timer_interrupt(void) { TimerRegs.T16PWM0CMP0DAT.all = 390; //approx 50KHz. by spec//15.6MHz/312=50kHz//[Ken Zhang]change to 40kHz,25us TimerRegs.T16PWM0CMP1DAT.all = 0xffff; TimerRegs.T16PWM0CMPCTRL.all = 2; TimerRegs.T16PWM0CNTCTRL.all = 0x00c; disable_fast_interrupt(); //make sure fast interrupt is disabled disable_interrupt(); write_firqpr (0x02000000); //make them all irqs except FAULT_INT write_reqmask(0x02020000); //enable FAULT_INT and PWM0_INT enable_interrupt(); enable_fast_interrupt(); //make sure fast interrupt is enabled for OVP shutdown }
void game_init(void) { init_serial(); init_timer(); init_idt(); init_intr(); set_timer_intr_handler(timer_event); set_keyboard_intr_handler(keyboard_event); printk("game start!\n"); enable_interrupt(); main_loop(); assert(0); /* main_loop是死循环,永远无法返回这里 */ }