int lpc_emac_hw_init(void)
{
rt_event_init(&tx_event, "tx_event", RT_IPC_FLAG_FIFO);
rt_sem_init(&sem_lock, "eth_lock", 1, RT_IPC_FLAG_FIFO);
/* set autonegotiation mode */
lpc_emac_device.phy_mode = EMAC_PHY_AUTO;
// OUI 00-60-37 NXP Semiconductors
lpc_emac_device.dev_addr[0] = 0x00;
lpc_emac_device.dev_addr[1] = 0x60;
lpc_emac_device.dev_addr[2] = 0x37;
/* set mac address: (only for test) */
lpc_emac_device.dev_addr[3] = 0x12;
lpc_emac_device.dev_addr[4] = 0x34;
lpc_emac_device.dev_addr[5] = 0x56;
lpc_emac_device.parent.parent.init = lpc_emac_init;
lpc_emac_device.parent.parent.open = lpc_emac_open;
lpc_emac_device.parent.parent.close = lpc_emac_close;
lpc_emac_device.parent.parent.read = lpc_emac_read;
lpc_emac_device.parent.parent.write = lpc_emac_write;
lpc_emac_device.parent.parent.control = lpc_emac_control;
lpc_emac_device.parent.parent.user_data = RT_NULL;
lpc_emac_device.parent.eth_rx = lpc_emac_rx;
lpc_emac_device.parent.eth_tx = lpc_emac_tx;
eth_device_init(&(lpc_emac_device.parent), "e0");
return 0;
}
void rt_hw_skeleton_init()
{
/* set default MAC address */
_skeleton_device.dev_addr[0] = 0x00;
_skeleton_device.dev_addr[1] = 0x60;
_skeleton_device.dev_addr[2] = 0x6E;
_skeleton_device.dev_addr[3] = 0x11;
_skeleton_device.dev_addr[4] = 0x22;
_skeleton_device.dev_addr[5] = 0x33;
/* set RT-Thread device interface */
_skeleton_device.parent.parent.init = rt_skeleton_init;
_skeleton_device.parent.parent.open = rt_skeleton_open;
_skeleton_device.parent.parent.close = rt_skeleton_close;
_skeleton_device.parent.parent.read = rt_skeleton_read;
_skeleton_device.parent.parent.write = rt_skeleton_write;
_skeleton_device.parent.parent.control = rt_skeleton_control;
_skeleton_device.parent.parent.user_data = RT_NULL;
/* set ethernet interface */
_skeleton_device.parent.eth_rx = rt_skeleton_rx;
_skeleton_device.parent.eth_tx = rt_skeleton_tx;
eth_device_init(&(_skeleton_device.parent), "e0");
}
int rt_wlan_init(void)
{
rt_int32_t value=0;
rt_err_t error=RT_EOK;
/*
* SRAM Tx/Rx pointer automatically return to start address,
* Packet Transmitted, Packet Received
*/
wlan_eth.parent.parent.init = rt_wlan_dev_init;
wlan_eth.parent.parent.open = rt_wlan_dev_open;
wlan_eth.parent.parent.close = rt_wlan_dev_close;
wlan_eth.parent.parent.read = rt_wlan_dev_read;
wlan_eth.parent.parent.write = rt_wlan_dev_write;
wlan_eth.parent.parent.control = rt_wlan_dev_control;
wlan_eth.parent.parent.user_data =(void *)&wlan_eth ;
wlan_eth.parent.eth_rx = rt_wlan_dev_rx;
wlan_eth.parent.eth_tx = rt_wlan_dev_tx;
if (WlanInitPhase1(&wlan_eth) == 0)
{
WlanInitPhase2();
WlanInitPhase3();
eth_device_init(&(wlan_eth.parent), "w0");
}
done:
return error;
}
void pcap_netif_hw_init(void)
{
rt_sem_init(&sem_lock, "eth_lock", 1, RT_IPC_FLAG_FIFO);
pcap_netif_device.dev_addr[0] = 0x00;
pcap_netif_device.dev_addr[1] = 0x60;
pcap_netif_device.dev_addr[2] = 0x37;
/* set mac address: (only for test) */
pcap_netif_device.dev_addr[3] = 0x12;
pcap_netif_device.dev_addr[4] = 0x34;
pcap_netif_device.dev_addr[5] = 0x56;
pcap_netif_device.parent.parent.init = pcap_netif_init;
pcap_netif_device.parent.parent.open = pcap_netif_open;
pcap_netif_device.parent.parent.close = pcap_netif_close;
pcap_netif_device.parent.parent.read = pcap_netif_read;
pcap_netif_device.parent.parent.write = pcap_netif_write;
pcap_netif_device.parent.parent.control = pcap_netif_control;
pcap_netif_device.parent.parent.user_data = RT_NULL;
pcap_netif_device.parent.eth_rx = pcap_netif_rx;
pcap_netif_device.parent.eth_tx = pcap_netif_tx;
eth_device_init(&(pcap_netif_device.parent), "e0");
}
int rt_hw_luminaryif_init(void)
{
rt_err_t result;
unsigned long ulUser0, ulUser1;
/* Enable and Reset the Ethernet Controller. */
SysCtlPeripheralEnable(SYSCTL_PERIPH_ETH);
SysCtlPeripheralReset(SYSCTL_PERIPH_ETH);
/*
Enable Port F for Ethernet LEDs.
LED0 Bit 3 Output
LED1 Bit 2 Output
*/
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF);
/* GPIODirModeSet and GPIOPadConfigSet */
GPIOPinTypeEthernetLED(GPIO_PORTF_BASE, GPIO_PIN_2 | GPIO_PIN_3);
GPIOPinConfigure(GPIO_PF2_LED1);
GPIOPinConfigure(GPIO_PF3_LED0);
FlashUserSet(0x00371200, 0x00563412); /* OUI:00-12-37 (hex) Texas Instruments, only for test */
/* Configure the hardware MAC address */
FlashUserGet(&ulUser0, &ulUser1);
if((ulUser0 == 0xffffffff) || (ulUser1 == 0xffffffff))
{
rt_kprintf("Fatal error in geting MAC address\n");
}
/* init rt-thread device interface */
luminaryif_dev_entry.parent.parent.init = luminaryif_init;
luminaryif_dev_entry.parent.parent.open = luminaryif_open;
luminaryif_dev_entry.parent.parent.close = luminaryif_close;
luminaryif_dev_entry.parent.parent.read = luminaryif_read;
luminaryif_dev_entry.parent.parent.write = luminaryif_write;
luminaryif_dev_entry.parent.parent.control = luminaryif_control;
luminaryif_dev_entry.parent.eth_rx = luminaryif_rx;
luminaryif_dev_entry.parent.eth_tx = luminaryif_tx;
/*
Convert the 24/24 split MAC address from NV ram into a 32/16 split MAC
address needed to program the hardware registers, then program the MAC
address into the Ethernet Controller registers.
*/
luminaryif_dev_entry.dev_addr[0] = ((ulUser0 >> 0) & 0xff);
luminaryif_dev_entry.dev_addr[1] = ((ulUser0 >> 8) & 0xff);
luminaryif_dev_entry.dev_addr[2] = ((ulUser0 >> 16) & 0xff);
luminaryif_dev_entry.dev_addr[3] = ((ulUser1 >> 0) & 0xff);
luminaryif_dev_entry.dev_addr[4] = ((ulUser1 >> 8) & 0xff);
luminaryif_dev_entry.dev_addr[5] = ((ulUser1 >> 16) & 0xff);
/* Program the hardware with it's MAC address (for filtering). */
EthernetMACAddrSet(ETH_BASE, luminaryif_dev_entry.dev_addr);
rt_sem_init(&tx_sem, "emac", 1, RT_IPC_FLAG_FIFO);
result = eth_device_init(&(luminaryif_dev->parent), "E0");
return result;
}
int cme_m7_eth_init(void)
{
// /* PHY RESET: PA4 */
// {
// GPIO_ResetBits(GPIOA, GPIO_Pin_4);
// rt_thread_delay(2);
// GPIO_SetBits(GPIOA, GPIO_Pin_4);
// rt_thread_delay(2);
// }
// GPIO_Configuration();
NVIC_Configuration();
// cme_eth_device.ETH_Speed = ETH_Speed_100M;
// cme_eth_device.ETH_Mode = ETH_Mode_FullDuplex;
/* OUI 00-80-E1 STMICROELECTRONICS. */
cme_eth_device.dev_addr[0] = 0x00;
cme_eth_device.dev_addr[1] = 0x80;
cme_eth_device.dev_addr[2] = 0xE1;
/* generate MAC addr from 96bit unique ID (only for test). */
// cme_eth_device.dev_addr[3] = *(rt_uint8_t*)(0x1FFF7A10+4);
// cme_eth_device.dev_addr[4] = *(rt_uint8_t*)(0x1FFF7A10+2);
// cme_eth_device.dev_addr[5] = *(rt_uint8_t*)(0x1FFF7A10+0);
cme_eth_device.dev_addr[3] = 12;
cme_eth_device.dev_addr[4] = 34;
cme_eth_device.dev_addr[5] = 56;
cme_eth_device.parent.parent.init = rt_cme_eth_init;
cme_eth_device.parent.parent.open = rt_cme_eth_open;
cme_eth_device.parent.parent.close = rt_cme_eth_close;
cme_eth_device.parent.parent.read = rt_cme_eth_read;
cme_eth_device.parent.parent.write = rt_cme_eth_write;
cme_eth_device.parent.parent.control = rt_cme_eth_control;
cme_eth_device.parent.parent.user_data = RT_NULL;
cme_eth_device.parent.eth_rx = rt_cme_eth_rx;
cme_eth_device.parent.eth_tx = rt_cme_eth_tx;
/* init EMAC lock */
rt_mutex_init(&cme_eth_device.lock, "emac0", RT_IPC_FLAG_PRIO);
/* init tx buffer free semaphore */
rt_sem_init(&cme_eth_device.tx_buf_free,
"tx_buf",
ETH_TXBUFNB,
RT_IPC_FLAG_FIFO);
/* register eth device */
eth_device_init(&(cme_eth_device.parent), "e0");
return RT_EOK;
}
int net_device_init(struct netdev_s *netdev)
{
net_device_compose_name(netdev);
switch(netdev->if_type) {
case IF_TYPE_ETH:
return eth_device_init(netdev);
case IF_TYPE_FDDI:
break;
case IF_TYPE_TR:
break;
}
return 0;
}
void rt_hw_lpc1788_eth_init(void)
{
/* PHY RESET */
lpc1788_ethe_device.parent.init = lpc1788_ethe_init;
lpc1788_ethe_device.parent.open = lpc1788_ethe_open;
lpc1788_ethe_device.parent.close = lpc1788_ethe_close;
lpc1788_ethe_device.parent.read = lpc1788_ethe_read;
lpc1788_ethe_device.parent.write = lpc1788_ethe_write;
lpc1788_ethe_device.parent.control = lpc1788_ethe_control;
lpc1788_ethe_device.parent.user_data = RT_NULL;
/* register eth device */
eth_device_init(&lpc1788_ethe_device, "ethe0");
/* start phy monitor */
}
rt_err_t rt_wlan_device_init(struct rt_wlan_device* device, const struct rt_wlan_device_ops* ops, char* name)
{
rt_err_t result = RT_EOK;
device->status = WLAN_STATUS_IDLE;
device->channel = 1;
device->mode = WLAN_MODE_INFRA;
device->security = WLAN_SECURITY_OPEN;
device->rssi = 0;
device->ops = ops;
rt_memset(device->ssid, 0x00, sizeof(device->ssid));
rt_memset(device->password, 0x00, sizeof(device->password));
rt_memset(device->bs_addr, 0x00, sizeof(device->bs_addr));
eth_device_init((struct eth_device *)device, name);
return result;
}
void lpc17xx_emac_hw_init(void)
{
rt_event_init(&tx_event, "tx_event", RT_IPC_FLAG_FIFO);
rt_sem_init(&sem_lock, "eth_lock", 1, RT_IPC_FLAG_FIFO);
/* set autonegotiation mode */
lpc17xx_emac_device.phy_mode = EMAC_PHY_AUTO;
// OUI 00-60-37 NXP Semiconductors
lpc17xx_emac_device.dev_addr[0] = 0x00;
lpc17xx_emac_device.dev_addr[1] = 0x60;
lpc17xx_emac_device.dev_addr[2] = 0x37;
/* set mac address: (only for test) */
#if 1
{
unsigned int tmpmac = devguid[0];
int i = 0 ;
for(i = 1 ; i < 4 ;i++){
tmpmac ^= devguid[i];
}
rt_memcpy(lpc17xx_emac_device.dev_addr+3,&tmpmac,3);
}
#else
lpc17xx_emac_device.dev_addr[3] = 0x12;
lpc17xx_emac_device.dev_addr[4] = 0x34;
lpc17xx_emac_device.dev_addr[5] = 0x56;
#endif
lpc17xx_emac_device.parent.parent.init = lpc17xx_emac_init;
lpc17xx_emac_device.parent.parent.open = lpc17xx_emac_open;
lpc17xx_emac_device.parent.parent.close = lpc17xx_emac_close;
lpc17xx_emac_device.parent.parent.read = lpc17xx_emac_read;
lpc17xx_emac_device.parent.parent.write = lpc17xx_emac_write;
lpc17xx_emac_device.parent.parent.control = lpc17xx_emac_control;
lpc17xx_emac_device.parent.parent.user_data = RT_NULL;
lpc17xx_emac_device.parent.eth_rx = lpc17xx_emac_rx;
lpc17xx_emac_device.parent.eth_tx = lpc17xx_emac_tx;
eth_device_init(&(lpc17xx_emac_device.parent), "e0");
}
void rt_hw_stm32_eth_init(void)
{
GPIO_Configuration();
NVIC_Configuration();
ETH_MACDMA_Config();
stm32_eth_device.dev_addr[0] = 0x00;
stm32_eth_device.dev_addr[1] = 0x60;
stm32_eth_device.dev_addr[2] = 0x6e;
{
uint32_t cpu_id[3] = {0};
cpu_id[2] = DevID_SNo2; cpu_id[1] = DevID_SNo1; cpu_id[0] = DevID_SNo0;
// generate MAC addr from 96bit unique ID (only for test)
stm32_eth_device.dev_addr[3] = (uint8_t)((cpu_id[0]>>16)&0xFF);
stm32_eth_device.dev_addr[4] = (uint8_t)((cpu_id[0]>>8)&0xFF);
stm32_eth_device.dev_addr[5] = (uint8_t)(cpu_id[0]&0xFF);
// stm32_eth_device.dev_addr[3] = *(rt_uint8_t*)(0x1FFF7A10+7);
// stm32_eth_device.dev_addr[4] = *(rt_uint8_t*)(0x1FFF7A10+8);
// stm32_eth_device.dev_addr[5] = *(rt_uint8_t*)(0x1FFF7A10+9);
}
stm32_eth_device.parent.parent.init = rt_stm32_eth_init;
stm32_eth_device.parent.parent.open = rt_stm32_eth_open;
stm32_eth_device.parent.parent.close = rt_stm32_eth_close;
stm32_eth_device.parent.parent.read = rt_stm32_eth_read;
stm32_eth_device.parent.parent.write = rt_stm32_eth_write;
stm32_eth_device.parent.parent.control = rt_stm32_eth_control;
stm32_eth_device.parent.parent.user_data = RT_NULL;
stm32_eth_device.parent.eth_rx = rt_stm32_eth_rx;
stm32_eth_device.parent.eth_tx = rt_stm32_eth_tx;
/* init tx semaphore */
rt_sem_init(&tx_wait, "tx_wait", 1, RT_IPC_FLAG_FIFO);
/* register eth device */
eth_device_init(&(stm32_eth_device.parent), "e0");
}
void rt_hw_eth_init(void)
{
u64 base_addr = Gmac_base;
struct synopGMACNetworkAdapter * synopGMACadapter;
static u8 mac_addr0[6] = DEFAULT_MAC_ADDRESS;
rt_sem_init(&sem_ack, "tx_ack", 1, RT_IPC_FLAG_FIFO);
rt_sem_init(&sem_lock, "eth_lock", 1, RT_IPC_FLAG_FIFO);
memset(ð_dev, 0, sizeof(eth_dev));
synopGMACadapter = (struct synopGMACNetworkAdapter * )plat_alloc_memory(sizeof (struct synopGMACNetworkAdapter));
if(!synopGMACadapter){
rt_kprintf("Error in Memory Allocataion, Founction : %s \n", __FUNCTION__);
}
memset((char *)synopGMACadapter ,0, sizeof (struct synopGMACNetworkAdapter));
synopGMACadapter->synopGMACdev = NULL;
synopGMACadapter->synopGMACdev = (synopGMACdevice *) plat_alloc_memory(sizeof (synopGMACdevice));
if(!synopGMACadapter->synopGMACdev){
rt_kprintf("Error in Memory Allocataion, Founction : %s \n", __FUNCTION__);
}
memset((char *)synopGMACadapter->synopGMACdev ,0, sizeof (synopGMACdevice));
/*
* Attach the device to MAC struct This will configure all the required base addresses
* such as Mac base, configuration base, phy base address(out of 32 possible phys)
* */
synopGMAC_attach(synopGMACadapter->synopGMACdev,(regbase + MACBASE), regbase + DMABASE, DEFAULT_PHY_BASE, mac_addr0);
init_phy(synopGMACadapter->synopGMACdev);
synopGMAC_reset(synopGMACadapter->synopGMACdev);
/* MII setup */
synopGMACadapter->mii.phy_id_mask = 0x1F;
synopGMACadapter->mii.reg_num_mask = 0x1F;
synopGMACadapter->mii.dev = synopGMACadapter;
synopGMACadapter->mii.mdio_read = mdio_read;
synopGMACadapter->mii.mdio_write = mdio_write;
synopGMACadapter->mii.phy_id = synopGMACadapter->synopGMACdev->PhyBase;
synopGMACadapter->mii.supports_gmii = mii_check_gmii_support(&synopGMACadapter->mii);
eth_dev.iobase = base_addr;
eth_dev.name = "e0";
eth_dev.priv = synopGMACadapter;
eth_dev.dev_addr[0] = mac_addr0[0];
eth_dev.dev_addr[1] = mac_addr0[1];
eth_dev.dev_addr[2] = mac_addr0[2];
eth_dev.dev_addr[3] = mac_addr0[3];
eth_dev.dev_addr[4] = mac_addr0[4];
eth_dev.dev_addr[5] = mac_addr0[5];
eth_dev.parent.parent.type = RT_Device_Class_NetIf;
eth_dev.parent.parent.init = eth_init;
eth_dev.parent.parent.open = eth_open;
eth_dev.parent.parent.close = eth_close;
eth_dev.parent.parent.read = eth_read;
eth_dev.parent.parent.write = eth_write;
eth_dev.parent.parent.control = eth_control;
eth_dev.parent.parent.user_data = RT_NULL;
eth_dev.parent.eth_tx = rt_eth_tx;
eth_dev.parent.eth_rx = rt_eth_rx;
eth_device_init(&(eth_dev.parent), "e0");
}
int rt_hw_eth_init(void)
{
u64 base_addr = Gmac_base;
struct synopGMACNetworkAdapter *synopGMACadapter;
static u8 mac_addr0[6] = DEFAULT_MAC_ADDRESS;
int index;
rt_sem_init(&sem_ack, "tx_ack", 1, RT_IPC_FLAG_FIFO);
rt_sem_init(&sem_lock, "eth_lock", 1, RT_IPC_FLAG_FIFO);
for (index = 21; index <= 30; index++)
{
pin_set_purpose(index, PIN_PURPOSE_OTHER);
pin_set_remap(index, PIN_REMAP_DEFAULT);
}
pin_set_purpose(35, PIN_PURPOSE_OTHER);
pin_set_remap(35, PIN_REMAP_DEFAULT);
*((volatile unsigned int *)0xbfd00424) &= ~(7 << 28);
*((volatile unsigned int *)0xbfd00424) |= (1 << 30); //wl rmii
memset(ð_dev, 0, sizeof(eth_dev));
synopGMACadapter = (struct synopGMACNetworkAdapter *)plat_alloc_memory(sizeof(struct synopGMACNetworkAdapter));
if (!synopGMACadapter)
{
rt_kprintf("Error in Memory Allocataion, Founction : %s \n", __FUNCTION__);
}
memset((char *)synopGMACadapter, 0, sizeof(struct synopGMACNetworkAdapter));
synopGMACadapter->synopGMACdev = NULL;
synopGMACadapter->synopGMACdev = (synopGMACdevice *) plat_alloc_memory(sizeof(synopGMACdevice));
if (!synopGMACadapter->synopGMACdev)
{
rt_kprintf("Error in Memory Allocataion, Founction : %s \n", __FUNCTION__);
}
memset((char *)synopGMACadapter->synopGMACdev, 0, sizeof(synopGMACdevice));
/*
* Attach the device to MAC struct This will configure all the required base addresses
* such as Mac base, configuration base, phy base address(out of 32 possible phys)
* */
synopGMAC_attach(synopGMACadapter->synopGMACdev, (regbase + MACBASE), regbase + DMABASE, DEFAULT_PHY_BASE, mac_addr0);
init_phy(synopGMACadapter->synopGMACdev);
synopGMAC_reset(synopGMACadapter->synopGMACdev);
/* MII setup */
synopGMACadapter->mii.phy_id_mask = 0x1F;
synopGMACadapter->mii.reg_num_mask = 0x1F;
synopGMACadapter->mii.dev = synopGMACadapter;
synopGMACadapter->mii.mdio_read = mdio_read;
synopGMACadapter->mii.mdio_write = mdio_write;
synopGMACadapter->mii.phy_id = synopGMACadapter->synopGMACdev->PhyBase;
synopGMACadapter->mii.supports_gmii = mii_check_gmii_support(&synopGMACadapter->mii);
eth_dev.iobase = base_addr;
eth_dev.name = "e0";
eth_dev.priv = synopGMACadapter;
eth_dev.dev_addr[0] = mac_addr0[0];
eth_dev.dev_addr[1] = mac_addr0[1];
eth_dev.dev_addr[2] = mac_addr0[2];
eth_dev.dev_addr[3] = mac_addr0[3];
eth_dev.dev_addr[4] = mac_addr0[4];
eth_dev.dev_addr[5] = mac_addr0[5];
eth_dev.parent.parent.type = RT_Device_Class_NetIf;
eth_dev.parent.parent.init = eth_init;
eth_dev.parent.parent.open = eth_open;
eth_dev.parent.parent.close = eth_close;
eth_dev.parent.parent.read = eth_read;
eth_dev.parent.parent.write = eth_write;
eth_dev.parent.parent.control = eth_control;
eth_dev.parent.parent.user_data = RT_NULL;
eth_dev.parent.eth_tx = rt_eth_tx;
eth_dev.parent.eth_rx = rt_eth_rx;
eth_device_init(&(eth_dev.parent), "e0");
eth_device_linkchange(ð_dev.parent, RT_TRUE); //linkup the e0 for lwip to check
return 0;
}