BOOL SmartPtr_IRQ::GetState(void* context)
{
    UINT32 Cp;
	
    Cp = get_imask();
    
    return (Cp != DISABLE_STATE);
}
void CPU_Sleep(SLEEP_LEVEL level, UINT64 wakeEvents)
{
    UINT16 iprUsart = 0;
    UINT16 iprSocket = 0;
    
    int return_value;
    
/* Detecting if Keypad is pushed.*/
#if 0
    return_value = g_GPIO_KEYPAD_Driver.KeyPad_Search();
    if(return_value != -1 ) trapa(32);
#endif
/* */

    
    if (0 != (wakeEvents & SYSTEM_EVENT_FLAG_COM_IN))
    {
        iprUsart = IPR16; 
        IPR16 |= 0xDDD0;
    }

    if (0 != (wakeEvents & SYSTEM_EVENT_FLAG_SOCKET))
    {
        iprSocket = IPR19;

        IPR19 |= 0x00D0;
    }
    
    
    switch(level)
    {
        case SLEEP_LEVEL__DEEP_SLEEP:
            STBCR = 8;
            break;
        default:
            STBCR = 0;
            break;
    }

    UINT8 mask = get_imask();

    set_imask(0xC);
    
    sleep();

    set_imask( mask );

    if (0 != (wakeEvents & SYSTEM_EVENT_FLAG_COM_IN))
    {
        IPR16 = iprUsart;
    }

    if (0 != (wakeEvents & SYSTEM_EVENT_FLAG_SOCKET))
    {
        IPR19 = iprSocket;
    }
    
}
BOOL SmartPtr_IRQ::ForceDisabled(void* context)
{
    UINT32 Cp;

    Cp = get_imask();
    set_imask(DISABLE_STATE);

    return (Cp != DISABLE_STATE);
}
void SmartPtr_IRQ::Disable()
{
    UINT32 Cp;

    Cp = get_imask();

    set_imask(DISABLE_STATE);

    m_state = Cp;
}
void CPU_Sleep(SLEEP_LEVEL level, UINT64 wakeEvents)
{
    UINT16 iprUsart = 0;
    UINT16 iprSocket = 0;
    
    int return_value;
    
    /* Detecting if Keypad is pushed.*/

    return_value = g_SH7264_Keypad_Driver.Key_Press();
    
    if(return_value != -1 ) trapa(32);
    
    if (0 != (wakeEvents & SYSTEM_EVENT_FLAG_COM_IN))
    {
        iprUsart = IPR17; 
        IPR17 |= 0xDDDD;
    }

    if (0 != (wakeEvents & SYSTEM_EVENT_FLAG_SOCKET)){
        iprSocket = IPR01; 
        IPR01 |= 0x0D00;
    }    
    
    switch(level)
    {
        case SLEEP_LEVEL__DEEP_SLEEP:
            STBCR = 8;
            break;
        default:
            STBCR = 0;
            break;
    }

    UINT8 mask = get_imask();

    set_imask(0xC);
    
    sleep();

    set_imask( mask );

    if (0 != (wakeEvents & SYSTEM_EVENT_FLAG_COM_IN))
    {
        IPR17 = iprUsart;
    }

    if (0 != (wakeEvents & SYSTEM_EVENT_FLAG_SOCKET)){        
        IPR01 = iprSocket;
    }
    
}
Example #6
0
void vPortYield( void )
{
long lInterruptMask;

	/* Ensure the yield trap runs at the same priority as the other interrupts
	that can cause a context switch. */
	lInterruptMask = get_imask();

	/* taskYIELD() can only be called from a task, not an interrupt, so the
	current interrupt mask can only be 0 or portKERNEL_INTERRUPT_PRIORITY and
	the mask can be set without risk of accidentally lowering the mask value. */	
	set_imask( portKERNEL_INTERRUPT_PRIORITY );
	
	trapa( portYIELD_TRAP_NO );
	
	/* Restore the interrupt mask to whatever it was previously (when the
	function was entered). */
	set_imask( ( int ) lInterruptMask );
}
BOOL SH7216_INTERNAL_FLASH_Driver::Action_EnterPEMode(volatile CHIP_WORD BaseAddress)
{
    volatile unsigned char *flash_addr;
    BOOL result = TRUE;
    
    /* FENTRYR must be 0x0000 before bit FENTRY0 or FENTRYD can be set to 1 */
    if( FENTRYR != 0x0000)
    {
        FENTRYR = 0xAA00;
        FENTRYR;    // Dummy Read is needed to enter Read Mode
        nop();      // To keep compiler optimization form re-ordering
    }

    if( BaseAddress <= (CHIP_WORD)0x000FFFFF )
    {
        /* ROM */
        /* Disable Interrupts because the interrupt vector table will not be accessible */
        imask_value = get_imask();
        set_imask(0xF);

        FENTRYR = 0xAA01;   // Set FENTRY0 bit(Bit 0) and FKEY (B8-15 = 0xAA)
        flash_addr = (unsigned char *)ROM_PE_ADDR;
    }
    else 
    {
        /* FLD */
        FENTRYR = 0xAA80;   // Set FENTRYD bit(Bit 7) and FKEY (B8-15 = 0xAA)
        flash_addr = (unsigned char *)FLD_ADDRESS;

        // First clear the status of the FCU before doing FLD programming.
        // This is to clear out any previous errors that may have occured.
        // For example, if you attempt to read the Data Flash area 
        // before you make it readable using FlashFLDAreaAccess().
        /* Check if ILGERR (bit 6) is set */
        if( FSTATR0 & 0x40 )
        {
            if(FASTAT != 0x10)
            {
                FASTAT = 0x10;
            }
        }
        *flash_addr = 0x50;
    }

    /* Send the 'Normal mode transition' (0xFF) command 
       by writing to address 0x80800000 (or 0x80100000) */
    *flash_addr = 0xFF;

    /* Check 'ILGLERR' (bit 6) in 'Flash Status Register 0' (FSTATR0) */
    if( FSTATR0 & 0x40 )
    {
        /* Restore the imask value (ROM PE Mode only) */
        if( BaseAddress <= (CHIP_WORD )0x000FFFFF )
        {
            set_imask(imask_value); // Restore the previous imask
        }

        FENTRYR = 0xAA00;
        FENTRYR;    // Dummy Read is needed to enter Read Mode
        nop();      // To keep compiler optimization form re-ordering
        result = FALSE; // ERROR
    }

    return result;

}