static void dump_all(int fd, int fn, int mfc, u_int mask)
{
int addr;
if (mask & PRESENT_OPTION) {
if (dump_option(fd, fn, mfc) != 0)
return;
}
if (mask & PRESENT_STATUS)
dump_status(fd, fn);
if (mask & PRESENT_PIN_REPLACE)
dump_pin(fd, fn);
if (mask & PRESENT_COPY)
dump_copy(fd, fn);
if (mask & PRESENT_EXT_STATUS)
dump_ext_status(fd, fn);
if (mask & PRESENT_IOBASE_0) {
addr = get_reg(fd, fn, CISREG_IOBASE_0);
addr += get_reg(fd, fn, CISREG_IOBASE_1) << 8;
printf(" IO base = 0x%04x\n", addr);
}
if (mask & PRESENT_IOSIZE)
printf(" IO size = %d\n", get_reg(fd, fn, CISREG_IOSIZE));
if (mask == 0)
printf(" no config registers\n\n");
else
printf("\n");
}
int ptrace_set_bpt(struct task_struct *child)
{
unsigned long pc,next;
unsigned short insn;
pc = get_reg(child,PT_PC);
next = insn_length((unsigned char *)pc) + pc;
get_user(insn,(unsigned short *)pc);
if (insn == 0x5470) {
/* rts */
unsigned long sp;
sp = get_reg(child,PT_USP);
get_user(next,(unsigned long *)sp);
} else if ((insn & 0xfb00) != 0x5800) {
/* jmp / jsr */
int regs;
const short reg_tbl[]={PT_ER0,PT_ER1,PT_ER2,PT_ER3,
PT_ER4,PT_ER5,PT_ER6,PT_USP};
switch(insn & 0xfb00) {
case 0x5900:
regs = (insn & 0x0070) >> 8;
next = get_reg(child,reg_tbl[regs]);
break;
case 0x5a00:
get_user(next,(unsigned long *)(pc+2));
next &= 0x00ffffff;
break;
case 0x5b00:
/* unneccessary? */
next = *(unsigned long *)(insn & 0xff);
break;
}
} else if (((insn & 0xf000) == 0x4000) || ((insn &0xff00) == 0x5500)) {
static Bit32u calculate_sib(unsigned char **lina, Bit8u mod)
{
Bit8u sib = **lina;
int ss = SCALE(sib);
int index = INDEX(sib);
int base = BASE(sib);
u_int addr = 0;
(*lina) ++; /* past SIB */
if (index != 4) {
addr = (1<<ss) * get_reg(index, 4);
}
if (base == 5) {
addr += *(Bit32u*)(*lina);
(*lina) += 4; /* past disp32 */
if (mod != 0) {
addr += get_reg(REGNO_EBP, 4);
}
} else {
addr += get_reg(base, 4);
}
return addr;
}
int decode_and_or_EG(unsigned char **lina, Bit32u *src, Bit32u *dst,
u_int *bytes, u_int *srcmem, u_int *dstmem, Bit8u op)
{
int reg;
decode_rm(dst, dstmem, ®, lina); /* past r/m */
if (op==0x08 || op==0x20) {
*bytes = 1;
} else {
*bytes = opa.opb;
}
*srcmem = 0; /* not strictly true; what if we OR mem and reg? */
if (*dstmem) {
if (get_memory(opa.seg, *dst, src, *bytes) != 0)
return -1;
} else {
*src = get_reg(*dst, *bytes);
}
if (op == 0x08 || op == 0x09) {
*src |= get_reg(reg, *bytes);
} else {
*src &= (get_reg(reg, *bytes) | ~masks[*bytes]);
}
return 0;
}
static void copy_register_rules(StackFrameRegisters * dst, StackFrameRegisters * src) {
int n;
dst->regs_cnt = 0;
for (n = 0; n < src->regs_cnt; n++) {
*get_reg(dst, n) = *get_reg(src, n);
}
}
static int pipe3_phy_probe(struct udevice *dev)
{
fdt_addr_t addr;
fdt_size_t sz;
struct omap_pipe3 *pipe3 = dev_get_priv(dev);
addr = devfdt_get_addr_size_index(dev, 2, &sz);
if (addr == FDT_ADDR_T_NONE) {
pr_err("missing pll ctrl address\n");
return -EINVAL;
}
pipe3->pll_ctrl_base = map_physmem(addr, sz, MAP_NOCACHE);
if (!pipe3->pll_ctrl_base) {
pr_err("unable to remap pll ctrl\n");
return -EINVAL;
}
pipe3->power_reg = get_reg(dev, "syscon-phy-power");
if (!pipe3->power_reg)
return -EINVAL;
pipe3->pll_reset_reg = get_reg(dev, "syscon-pllreset");
if (!pipe3->pll_reset_reg)
return -EINVAL;
pipe3->dpll_map = (struct pipe3_dpll_map *)dev_get_driver_data(dev);
return 0;
}
void cs8900_get_enetaddr (void)
{
int i;
uchar enetaddr[6];
/* if the env is setup, then bail */
if (eth_getenv_enetaddr("ethaddr", enetaddr))
return;
/* verify chip id */
if (get_reg_init_bus (PP_ChipID) != 0x630e)
return;
eth_reset ();
if ((get_reg (PP_SelfSTAT) & (PP_SelfSTAT_EEPROM | PP_SelfSTAT_EEPROM_OK)) ==
(PP_SelfSTAT_EEPROM | PP_SelfSTAT_EEPROM_OK)) {
/* Load the MAC from EEPROM */
for (i = 0; i < 6 / 2; i++) {
unsigned int Addr;
Addr = get_reg (PP_IA + i * 2);
enetaddr[i * 2] = Addr & 0xFF;
enetaddr[i * 2 + 1] = Addr >> 8;
}
eth_setenv_enetaddr("ethaddr", enetaddr);
debug("### Set environment from HW MAC addr = \"%pM\"\n", enetaddr);
}
}
static void cpu_read_registers(struct GDBState *s, char *buf)
{
size_t i;
uint32_t fpa_len;
uint32_t regs[CPU_GP_REGS];
uint32_t cpsr;
uint8_t *regptr = (uint8_t*)®s[0];
uint8_t tmp;
for (i = 0; i < CPU_GP_REGS; ++i) { /* general purpose r0-r15 */
regs[i] = get_reg(s->env, i);
}
for (i = 0; i < sizeof(regs); ++i) {
tmp = *regptr++;
*buf++ = tohex(tmp >> 4);
*buf++ = tohex(tmp & 0x0f);
}
fpa_len = (((CPU_FPA_REGS * 12) + 4) * 2);
memset(buf, '0', fpa_len);
buf += fpa_len;
cpsr = get_reg(s->env, 16);
regptr = (uint8_t*)&cpsr;
for (i = 0; i < sizeof(cpsr); ++i) { /* CPSR */
tmp = *regptr++;
*buf++ = tohex(tmp >> 4);
*buf++ = tohex(tmp & 0x0f);
}
*buf = '\0';
}
uint16_t *GetValue(uint16_t operand)
{
// 0x00-0x07: register (A, B, C, X, Y, Z, I or J, in that order)
if (operand <= 0x7)
return r + get_reg(operand);
// 0x08-0x0f: [register]
else if (operand <= 0xf)
return m + r[get_reg(operand)];
// 0x10-0x17: [next word + register]
else if (operand <= 0x17)
return m + ((r[get_reg(operand)] + m[pc++]) & 0xFFFF);
else switch (operand)
{
case 0x18:
return m + sp++; // POP / [SP++]
case 0x19:
return m + sp; // PEEK [SP]
case 0x1a:
return m + (--sp); // PUSH [--SP]
case 0x1b:
return &sp; // SP
case 0x1c:
return &pc; // PC
case 0x1d:
return &o; // O
case 0x1e:
return m + m[pc++]; // [next word]
case 0x1f:
return m + pc++; // next word (literal)
default:
return m + 0x3f - operand; // literal value 0x00-0x1f (literal)
}
}
static void cs8900_get_enetaddr (uchar * addr)
{
int i;
unsigned char env_enetaddr[6];
char *tmp = getenv ("ethaddr");
char *end;
for (i=0; i<6; i++) {
env_enetaddr[i] = tmp ? simple_strtoul(tmp, &end, 16) : 0;
if (tmp)
tmp = (*end) ? end+1 : end;
}
/* verify chip id */
if (get_reg_init_bus (PP_ChipID) != 0x630e)
return;
eth_reset ();
if ((get_reg (PP_SelfST) & (PP_SelfSTAT_EEPROM | PP_SelfSTAT_EEPROM_OK)) ==
(PP_SelfSTAT_EEPROM | PP_SelfSTAT_EEPROM_OK)) {
/* Load the MAC from EEPROM */
for (i = 0; i < 6 / 2; i++) {
unsigned int Addr;
Addr = get_reg (PP_IA + i * 2);
addr[i * 2] = Addr & 0xFF;
addr[i * 2 + 1] = Addr >> 8;
}
if (memcmp(env_enetaddr, "\0\0\0\0\0\0", 6) != 0 &&
memcmp(env_enetaddr, addr, 6) != 0) {
printf ("\nWarning: MAC addresses don't match:\n");
printf ("\tHW MAC address: "
"%02X:%02X:%02X:%02X:%02X:%02X\n",
addr[0], addr[1],
addr[2], addr[3],
addr[4], addr[5] );
printf ("\t\"ethaddr\" value: "
"%02X:%02X:%02X:%02X:%02X:%02X\n",
env_enetaddr[0], env_enetaddr[1],
env_enetaddr[2], env_enetaddr[3],
env_enetaddr[4], env_enetaddr[5]) ;
debug ("### Set MAC addr from environment\n");
memcpy (addr, env_enetaddr, 6);
}
if (!tmp) {
char ethaddr[20];
sprintf (ethaddr, "%02X:%02X:%02X:%02X:%02X:%02X",
addr[0], addr[1],
addr[2], addr[3],
addr[4], addr[5]) ;
debug ("### Set environment from HW MAC addr = \"%s\"\n", ethaddr);
setenv ("ethaddr", ethaddr);
}
}
}
static void copy_register_rules(StackFrameRegisters * dst, StackFrameRegisters * src) {
int n;
clear_frame_registers(dst);
dst->cfa_rule = src->cfa_rule;
dst->cfa_offset = src->cfa_offset;
dst->cfa_register = src->cfa_register;
dst->cfa_expression = src->cfa_expression;
for (n = 0; n < src->regs_cnt; n++) {
*get_reg(dst, n) = *get_reg(src, n);
}
}
static int
arg (int bytes)
{
int rv = 0;
argp++;
if (A16)
{
switch (argp)
{
case 1:
if (bytes == 1)
return get_reg (r1l);
if (bytes == 2)
return get_reg (r1);
break;
case 2:
if (bytes == 2)
return get_reg (r2);
break;
}
}
else
{
switch (argp)
{
case 1:
if (bytes == 1)
return get_reg (r0l);
if (bytes == 2)
return get_reg (r0);
break;
}
}
if (bytes == 0)
bytes = 2;
switch (bytes)
{
case 1:
rv = mem_get_qi (get_reg (sp) + stackp);
if (A24)
stackp++;
break;
case 2:
rv = mem_get_hi (get_reg (sp) + stackp);
break;
case 3:
rv = mem_get_psi (get_reg (sp) + stackp);
if (A24)
stackp++;
break;
case 4:
rv = mem_get_si (get_reg (sp) + stackp);
break;
}
stackp += bytes;
return rv;
}
static int
arg ()
{
int rv = 0;
argp++;
if (argp < 4)
return get_reg (argp);
rv = mem_get_si (get_reg (sp) + stackp);
stackp += 4;
return rv;
}
/* Send a data block via Ethernet. */
extern int eth_send (volatile void *packet, int length)
{
volatile unsigned short *addr;
int tmo;
unsigned short s;
retry:
/* initiate a transmit sequence */
CS8900_TxCMD = PP_TxCmd_TxStart_Full;
CS8900_TxLEN = length;
/* Test to see if the chip has allocated memory for the packet */
if ((get_reg (PP_BusSTAT) & (PP_BusSTAT_TxRDY)) == 0) {
/* Oops... this should not happen! */
#ifdef DEBUG
printf ("cs: unable to send packet; retrying...\n");
#endif
for (tmo = get_timer (0) + 5 * CFG_HZ; get_timer (0) < tmo;)
/*NOP*/;
eth_reset ();
eth_reginit ();
goto retry;
}
/* Write the contents of the packet */
/* assume even number of bytes */
for (addr = packet; length > 0; length -= 2)
{
unsigned short data = *addr;
CS8900_RTDATA = SW(data);
addr++;
}
/* wait for transfer to succeed */
tmo = get_timer (0) + 5 * CFG_HZ;
while ((s = get_reg (PP_TER) & ~0x1F) == 0) {
if (get_timer (0) >= tmo)
break;
}
/* nothing */ ;
if ((s & (PP_TER_CRS | PP_TER_TxOK)) != PP_TER_TxOK) {
#ifdef DEBUG
printf ("\ntransmission error %#x\n", s);
#endif
}
return 0;
}
/* XXX: handle long long case */
ST_FUNC void gen_cvt_ftoi(int t)
{
int r, r2, size;
Sym *sym;
CType ushort_type;
ushort_type.t = VT_SHORT | VT_UNSIGNED;
ushort_type.ref = 0;
gv(RC_FLOAT);
if (t != VT_INT)
size = 8;
else
size = 4;
o(0x2dd9); /* ldcw xxx */
sym = external_global_sym(TOK___tcc_int_fpu_control,
&ushort_type, VT_LVAL);
greloc(cur_text_section, sym,
ind, R_386_32);
gen_le32(0);
oad(0xec81, size); /* sub $xxx, %esp */
if (size == 4)
o(0x1cdb); /* fistpl */
else
o(0x3cdf); /* fistpll */
o(0x24);
o(0x2dd9); /* ldcw xxx */
sym = external_global_sym(TOK___tcc_fpu_control,
&ushort_type, VT_LVAL);
greloc(cur_text_section, sym,
ind, R_386_32);
gen_le32(0);
r = get_reg(RC_INT);
o(0x58 + r); /* pop r */
if (size == 8) {
if (t == VT_LLONG) {
vtop->r = r; /* mark reg as used */
r2 = get_reg(RC_INT);
o(0x58 + r2); /* pop r2 */
vtop->r2 = r2;
} else {
o(0x04c483); /* add $4, %esp */
}
}
vtop->r = r;
}
void user_enable_single_step(struct task_struct *child)
{
unsigned long tmp;
/*
* Set up SPC if not set already (in which case we have no other
* choice but to trust it).
*/
if (!get_reg(child, PT_SPC)) {
/* In case we're stopped in a delay slot. */
tmp = get_reg(child, PT_ERP) & ~1;
put_reg(child, PT_SPC, tmp);
}
tmp = get_reg(child, PT_CCS) | SBIT_USER;
put_reg(child, PT_CCS, tmp);
}
void print_opnd_type(Opnd o) {
if(is_reg(o)) {
if(is_hard_reg(o)) {
std::cout << "(is hard reg)";
}
else if(is_virtual_reg(o)) {
std::cout << "(is virtual reg)[$vr"<<get_reg(o)<<"]";
}
else {
std::cout << "(is undeterminate reg)";
}
}
else if(is_immed(o)) {
if(is_immed_integer(o)) {
std::cout << "(is immed integer)";
}
else if(is_immed_string(o)) {
std::cout << "(is immed string)";
}
else {
std::cout << "(is undeterminate immed)";
}
}
else if(is_addr(o)) {
if(is_addr_sym(o)) {
FormattedText ft;
Sym *symbol = get_sym(o);
symbol->print(ft);
char* addr_name;
addr_name = (char*)(symbol->get_name()).c_str();
std::cout << "(is addr sym)["<<addr_name<<"]";
}
else if(is_addr_exp(o)) {
std::cout << "(is addr exp)";
}
else {
std::cout << "(is undeterminate addr)";
}
}
else if(is_var(o)) {
FormattedText ft;
VarSym *vsym = get_var(o);
vsym->print(ft);
char* var_name;
var_name = (char*)(vsym->get_name()).c_str();
std::cout << "(is var)["<<var_name<<"]";
}
else if(is_null(o)) {
std::cout << "(is null)";
}
else {
std::cout << "(I don't know) !!!)";
}
return;
}
HL_API void *hl_debug_read_register( int pid, int thread, int reg, bool is64 ) {
# if defined(HL_WIN)
# ifdef HL_64
if( !is64 ) {
WOW64_CONTEXT c;
c.ContextFlags = CONTEXT_FULL | CONTEXT_DEBUG_REGISTERS;
if( !Wow64GetThreadContext(OpenTID(thread),&c) )
return NULL;
if( reg == 3 )
return (void*)(int_val)c.EFlags;
return (void*)(int_val)*GetContextReg32(&c,reg);
}
# else
if( is64 ) return NULL;
# endif
CONTEXT c;
c.ContextFlags = CONTEXT_FULL | CONTEXT_DEBUG_REGISTERS;
if( !GetThreadContext(OpenTID(thread),&c) )
return NULL;
if( reg == 3 )
return (void*)(int_val)c.EFlags;
return (void*)*GetContextReg(&c,reg);
# elif defined(USE_PTRACE)
return (void*)ptrace(PTRACE_PEEKUSER,thread,get_reg(reg),0);
# else
return NULL;
# endif
}
int
condition_true (RL78_Condition cond_id, int val)
{
int psw = get_reg (RL78_Reg_PSW);
int z = (psw & RL78_PSW_Z) ? 1 : 0;
int cy = (psw & RL78_PSW_CY) ? 1 : 0;
switch (cond_id)
{
case RL78_Condition_T:
return val != 0;
case RL78_Condition_F:
return val == 0;
case RL78_Condition_C:
return cy;
case RL78_Condition_NC:
return !cy;
case RL78_Condition_H:
return !(z | cy);
case RL78_Condition_NH:
return z | cy;
case RL78_Condition_Z:
return z;
case RL78_Condition_NZ:
return !z;
default:
abort ();
}
}
/* Get a data block via Ethernet */
int eth_rx (void)
{
int i;
unsigned short rxlen;
unsigned short *addr;
unsigned short status;
status = get_reg (PP_RER);
if ((status & PP_RER_RxOK) == 0)
return 0;
status = CS8900_RTDATA; /* stat */
rxlen = CS8900_RTDATA; /* len */
#ifdef DEBUG
if (rxlen > PKTSIZE_ALIGN + PKTALIGN)
printf ("packet too big!\n");
#endif
for (addr = (unsigned short *) NetRxPackets[0], i = rxlen >> 1; i > 0;
i--)
*addr++ = CS8900_RTDATA;
if (rxlen & 1)
*addr++ = CS8900_RTDATA;
/* Pass the packet up to the protocol layers. */
NetReceive (NetRxPackets[0], rxlen);
return rxlen;
}
HL_API bool hl_debug_write_register( int pid, int thread, int reg, void *value, bool is64 ) {
# if defined(HL_WIN)
# ifdef HL_64
if( !is64 ) {
WOW64_CONTEXT c;
c.ContextFlags = CONTEXT_FULL | CONTEXT_DEBUG_REGISTERS;
if( !Wow64GetThreadContext(OpenTID(thread),&c) )
return false;
if( reg == 3 )
c.EFlags = (int)(int_val)value;
else
*GetContextReg32(&c,reg) = (DWORD)(int_val)value;
return (bool)Wow64SetThreadContext(OpenTID(thread),&c);
}
# else
if( is64 ) return false;
# endif
CONTEXT c;
c.ContextFlags = CONTEXT_FULL | CONTEXT_DEBUG_REGISTERS;
if( !GetThreadContext(OpenTID(thread),&c) )
return false;
if( reg == 3 )
c.EFlags = (int)(int_val)value;
else
*GetContextReg(&c,reg) = (REGDATA)value;
return (bool)SetThreadContext(OpenTID(thread),&c);
# elif defined(USE_PTRACE)
return ptrace(PTRACE_POKEUSER,thread,get_reg(reg),value) >= 0;
# else
return false;
# endif
}
/*
* Get task register contents
*/
SYSCALL ER _tk_get_reg( ID tskid,
T_REGS *pk_regs, T_EIT *pk_eit, T_CREGS *pk_cregs )
{
TCB *tcb;
ER ercd = E_OK;
CHECK_INTSK();
CHECK_TSKID(tskid);
CHECK_NONSELF(tskid);
tcb = get_tcb(tskid);
BEGIN_CRITICAL_SECTION;
if ( tcb->state == TS_NONEXIST ) {
ercd = E_NOEXS;
} else {
ercd = mp_check_domain_and_protection(tskid, tcb->tskid, tcb->tskatr);
if ( ercd == E_OK ) {
if ( is_ctxtsk(tcb) ) {
ercd = E_OBJ;
} else {
get_reg(tcb, pk_regs, pk_eit, pk_cregs);
}
}
}
END_CRITICAL_NO_DISPATCH;
return ercd;
}
static struct brw_reg get_src_reg(struct brw_wm_compile *c,
struct prog_src_register *src, int index, int nr)
{
int component = GET_SWZ(src->Swizzle, index);
return get_reg(c, src->File, src->Index, component, nr,
src->NegateBase, src->Abs);
}
static void set_reg_mask(struct asill_s *A, int r, int mask, int v)
{
int nv = get_reg(A, r) & ~mask;
nv |= v;
set_reg(A, r, nv);
}
/*
* Called by kernel/ptrace.c when detaching..
*
* Make sure the single step bit is not set.
*/
void ptrace_disable(struct task_struct *child)
{
unsigned long tmp;
/* make sure the single step bit is not set. */
tmp = get_reg(child, PT_SYSCFG) & ~TRACE_BITS;
put_reg(child, PT_SYSCFG, tmp);
}
/*
* Set breakpoint.
*/
int
ptrace_set_bpt(struct task_struct * child)
{
int displ, i, res, reg_b, nsaved = 0;
unsigned int insn, op_code;
unsigned long pc;
pc = get_reg(child, REG_PC);
res = read_int(child, pc, (int *) &insn);
if (res < 0)
return res;
op_code = insn >> 26;
if (op_code >= 0x30) {
/*
* It's a branch: instead of trying to figure out
* whether the branch will be taken or not, we'll put
* a breakpoint at either location. This is simpler,
* more reliable, and probably not a whole lot slower
* than the alternative approach of emulating the
* branch (emulation can be tricky for fp branches).
*/
displ = ((s32)(insn << 11)) >> 9;
task_thread_info(child)->bpt_addr[nsaved++] = pc + 4;
if (displ) /* guard against unoptimized code */
task_thread_info(child)->bpt_addr[nsaved++]
= pc + 4 + displ;
DBG(DBG_BPT, ("execing branch\n"));
} else if (op_code == 0x1a) {
/* Get a data block via Ethernet */
static int cs8900_recv(struct eth_device *dev)
{
int i;
u16 rxlen;
u16 *addr;
u16 status;
struct cs8900_priv *priv = (struct cs8900_priv *)(dev->priv);
status = get_reg(dev, PP_RER);
if ((status & PP_RER_RxOK) == 0)
return 0;
status = REG_READ(&priv->regs->rtdata);
rxlen = REG_READ(&priv->regs->rtdata);
if (rxlen > PKTSIZE_ALIGN + PKTALIGN)
debug("packet too big!\n");
for (addr = (u16 *)net_rx_packets[0], i = rxlen >> 1; i > 0; i--)
*addr++ = REG_READ(&priv->regs->rtdata);
if (rxlen & 1)
*addr++ = REG_READ(&priv->regs->rtdata);
/* Pass the packet up to the protocol layers. */
net_process_received_packet(net_rx_packets[0], rxlen);
return rxlen;
}
virtual void set_bit(sys_bus_addr addr, int pos, bool enable) {
uint32_t reg = get_reg(addr);
if (enable) {
set_reg(addr, (reg | (1 << pos)));
} else {
set_reg(addr, (reg & ~(1 << pos)));
}
}
static void dump_ext_status(int fd, int fn)
{
int v = get_reg(fd, fn, CISREG_ESR);
printf(" Extended status register = %#2.2x\n", v);
printf(" ");
if (v & ESR_REQ_ATTN_ENA) printf(" [req_attn_ena]");
if (v & ESR_REQ_ATTN) printf(" [req_attn]");
printf("\n");
}
static void dump_copy(int fd, int fn)
{
int v = get_reg(fd, fn, CISREG_SCR);
printf(" Socket and copy register = %#2.2x\n", v);
printf(" [socket = %d] [copy = %d]\n",
v & SCR_SOCKET_NUM,
(v & SCR_COPY_NUM) >> 4);
}
