static void goldfish_switch_write(void *opaque, target_phys_addr_t offset, uint32_t value)
{
struct switch_state *s = (struct switch_state *)opaque;
switch(offset) {
case SW_NAME_PTR:
safe_memory_rw_debug(cpu_single_env, value, (void*)s->name, strlen(s->name), 1);
break;
case SW_STATE:
if(s->writefn) {
uint32_t new_state;
new_state = s->writefn(s->writeopaque, value);
if(new_state != s->state) {
goldfish_switch_set_state(s, new_state);
}
}
else
cpu_abort (cpu_single_env, "goldfish_switch_write: write to SW_STATE on input\n");
break;
case SW_INT_ENABLE:
value &= 1;
if(s->state_changed && s->int_enable != value)
goldfish_device_set_irq(&s->dev, 0, value);
s->int_enable = value;
break;
default:
cpu_abort (cpu_single_env, "goldfish_switch_write: Bad offset %x\n", offset);
}
}
static void android_arm_init_(ram_addr_t ram_size,
const char *boot_device,
const char *kernel_filename,
const char *kernel_cmdline,
const char *initrd_filename,
const char *cpu_model)
{
CPUState *env;
qemu_irq *cpu_pic;
qemu_irq *goldfish_pic;
int i;
struct arm_boot_info info;
ram_addr_t ram_offset;
DisplayState* ds = get_displaystate();
if (!cpu_model)
cpu_model = "arm926";
env = cpu_init(cpu_model);
register_savevm( "cpu", 0, ARM_CPU_SAVE_VERSION, cpu_save, cpu_load, env );
ram_offset = qemu_ram_alloc(ram_size);
cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
cpu_pic = arm_pic_init_cpu(env);
goldfish_pic = goldfish_interrupt_init(0xff000000, cpu_pic[ARM_PIC_CPU_IRQ], cpu_pic[ARM_PIC_CPU_FIQ]);
goldfish_device_init(goldfish_pic, 0xff010000, 0x7f0000, 10, 22);
goldfish_device_bus_init(0xff001000, 1);
goldfish_timer_and_rtc_init(0xff003000, 3);
goldfish_tty_add(serial_hds[0], 0, 0xff002000, 4);
for(i = 1; i < MAX_SERIAL_PORTS; i++) {
//printf("android_arm_init serial %d %x\n", i, serial_hds[i]);
if(serial_hds[i]) {
goldfish_tty_add(serial_hds[i], i, 0, 0);
}
}
for(i = 0; i < MAX_NICS; i++) {
if (nd_table[i].vlan) {
if (nd_table[i].model == NULL
|| strcmp(nd_table[i].model, "smc91c111") == 0) {
struct goldfish_device *smc_device;
smc_device = qemu_mallocz(sizeof(*smc_device));
smc_device->name = "smc91x";
smc_device->id = i;
smc_device->size = 0x1000;
smc_device->irq_count = 1;
goldfish_add_device_no_io(smc_device);
smc91c111_init(&nd_table[i], smc_device->base, goldfish_pic[smc_device->irq]);
} else {
fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd_table[0].model);
exit (1);
}
}
}
goldfish_fb_init(ds, 0);
#ifdef HAS_AUDIO
goldfish_audio_init(0xff004000, 0, audio_input_source);
#endif
{
int idx = drive_get_index( IF_IDE, 0, 0 );
if (idx >= 0)
goldfish_mmc_init(0xff005000, 0, drives_table[idx].bdrv);
}
goldfish_memlog_init(0xff006000);
if (android_hw->hw_battery)
goldfish_battery_init();
goldfish_sensor_init();
goldfish_add_device_no_io(&event0_device);
events_dev_init(event0_device.base, goldfish_pic[event0_device.irq]);
#ifdef CONFIG_NAND
goldfish_add_device_no_io(&nand_device);
nand_dev_init(nand_device.base);
#endif
#ifdef CONFIG_TRACE
extern const char *trace_filename;
/* Init trace device if either tracing, or memory checking is enabled. */
if (trace_filename != NULL
#ifdef CONFIG_MEMCHECK
|| memcheck_enabled
#endif // CONFIG_MEMCHECK
) {
trace_dev_init();
}
if (trace_filename != NULL) {
D( "Trace file name is set to %s\n", trace_filename );
} else {
D("Trace file name is not set\n");
}
#endif
#if TEST_SWITCH
{
void *sw;
sw = goldfish_switch_add("test", NULL, NULL, 0);
goldfish_switch_set_state(sw, 1);
goldfish_switch_add("test2", switch_test_write, sw, 1);
}
#endif
memset(&info, 0, sizeof info);
info.ram_size = ram_size;
info.kernel_filename = kernel_filename;
info.kernel_cmdline = kernel_cmdline;
info.initrd_filename = initrd_filename;
info.nb_cpus = 1;
info.board_id = 1441;
arm_load_kernel(env, &info);
}
uint32_t switch_test_write(void *opaque, uint32_t state)
{
goldfish_switch_set_state(opaque, state);
return state;
}
static void android_arm_init_(ram_addr_t ram_size,
const char *boot_device,
const char *kernel_filename,
const char *kernel_cmdline,
const char *initrd_filename,
const char *cpu_model)
{
CPUState *env;
qemu_irq *cpu_pic;
ram_addr_t ram_offset;
DeviceState *gf_int;
int i;
if (!cpu_model)
cpu_model = "arm926";
env = cpu_init(cpu_model);
ram_offset = qemu_ram_alloc(NULL,"android_arm",ram_size);
cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
cpu_pic = arm_pic_init_cpu(env);
GoldfishBus *gbus = goldfish_bus_init(0xff001000, 1);
gf_int = goldfish_int_create(gbus, 0xff000000, cpu_pic[ARM_PIC_CPU_IRQ], cpu_pic[ARM_PIC_CPU_FIQ]);
goldfish_device_init(gf_int, 0xff010000, 10);
goldfish_timer_create(gbus, 0xff003000, 3);
goldfish_rtc_create(gbus);
goldfish_tty_create(gbus, serial_hds[0], 0, 0xff002000, 4);
for(i = 1; i < MAX_SERIAL_PORTS; i++) {
printf("android_arm_init serial %d %x\n", i, serial_hds[i]);
if(serial_hds[i]) {
printf("serial_hds: %d\n",i);
goldfish_tty_create(gbus, serial_hds[i], i, 0, 0);
}
}
for(i = 0; i < MAX_NICS; i++) {
if (nd_table[i].vlan) {
if (nd_table[i].model == NULL
|| strcmp(nd_table[i].model, "smc91c111") == 0) {
GoldfishDevice *smc_device;
smc_device = g_malloc0(sizeof(*smc_device));
smc_device->name = (char *)"smc91x";
smc_device->id = i;
smc_device->size = 0x1000;
smc_device->irq_count = 1;
goldfish_add_device_no_io(smc_device);
smc91c111_init(&nd_table[i], smc_device->base, qdev_get_gpio_in(gf_int, smc_device->irq));
} else {
fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd_table[0].model);
exit (1);
}
}
}
goldfish_fb_create(gbus, 0);
#ifdef HAS_AUDIO
//goldfish_audio_init(0xff004000, 0, audio_input_source);
#endif
goldfish_mmc_create(gbus, 0xff005000, 0);
goldfish_memlog_create(gbus, 0xff006000);
goldfish_battery_create(gbus);
goldfish_events_create(gbus, gf_int);
goldfish_nand_create(gbus);
goldfish_pipe_create(gbus);
#if TEST_SWITCH
{
void *sw;
sw = goldfish_switch_create(gbus, "test", NULL, NULL, 0);
goldfish_switch_set_state(sw, 1);
goldfish_switch_create(gbus, "test2", switch_test_write, sw, 1);
}
#endif
info.ram_size = ram_size;
info.kernel_filename = kernel_filename;
info.kernel_cmdline = kernel_cmdline;
info.initrd_filename = initrd_filename;
info.nb_cpus = 1;
arm_load_kernel(env, &info);
android_emulation_setup();
}
static void android_mips_init_(ram_addr_t ram_size,
const char *boot_device,
const char *kernel_filename,
const char *kernel_cmdline,
const char *initrd_filename,
const char *cpu_model)
{
CPUState *env;
qemu_irq *goldfish_pic;
int i;
ram_addr_t ram_offset;
if (!cpu_model)
cpu_model = "24Kf";
env = cpu_init(cpu_model);
register_savevm( "cpu", 0, MIPS_CPU_SAVE_VERSION, cpu_save, cpu_load, env );
if (ram_size > GOLDFISH_IO_SPACE)
ram_size = GOLDFISH_IO_SPACE; /* avoid overlap of ram and IO regs */
ram_offset = qemu_ram_alloc(NULL, "android_mips", ram_size);
cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
/* Init internal devices */
cpu_mips_irq_init_cpu(env);
cpu_mips_clock_init(env);
goldfish_pic = goldfish_interrupt_init(GOLDFISH_INTERRUPT,
env->irq[2], env->irq[3]);
goldfish_device_init(goldfish_pic, GOLDFISH_DEVICES, 0x7f0000, 10, 22);
goldfish_device_bus_init(GOLDFISH_DEVICEBUS, 1);
goldfish_timer_and_rtc_init(GOLDFISH_RTC, 3);
goldfish_tty_add(serial_hds[0], 0, GOLDFISH_TTY, 4);
for(i = 1; i < MAX_SERIAL_PORTS; i++) {
if(serial_hds[i]) {
goldfish_tty_add(serial_hds[i], i, 0, 0);
}
}
for(i = 0; i < MAX_NICS; i++) {
if (nd_table[i].vlan) {
if (nd_table[i].model == NULL
|| strcmp(nd_table[i].model, "smc91c111") == 0) {
struct goldfish_device *smc_device;
smc_device = qemu_mallocz(sizeof(*smc_device));
smc_device->name = "smc91x";
smc_device->id = i;
smc_device->size = 0x1000;
smc_device->irq_count = 1;
goldfish_add_device_no_io(smc_device);
smc91c111_init(&nd_table[i], smc_device->base, goldfish_pic[smc_device->irq]);
} else {
fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd_table[0].model);
exit (1);
}
}
}
goldfish_fb_init(0);
#ifdef HAS_AUDIO
goldfish_audio_init(GOLDFISH_AUDIO, 0, audio_input_source);
#endif
{
DriveInfo* info = drive_get( IF_IDE, 0, 0 );
if (info != NULL) {
goldfish_mmc_init(GOLDFISH_MMC, 0, info->bdrv);
}
}
goldfish_memlog_init(GOLDFISH_MEMLOG);
if (android_hw->hw_battery)
goldfish_battery_init();
goldfish_add_device_no_io(&event0_device);
events_dev_init(event0_device.base, goldfish_pic[event0_device.irq]);
#ifdef CONFIG_NAND
goldfish_add_device_no_io(&nand_device);
nand_dev_init(nand_device.base);
#endif
#ifdef CONFIG_TRACE
extern const char *trace_filename;
/* Init trace device if either tracing, or memory checking is enabled. */
if (trace_filename != NULL
#ifdef CONFIG_MEMCHECK
|| memcheck_enabled
#endif // CONFIG_MEMCHECK
|| 1 /* XXX: ALWAYS AVAILABLE FOR QEMUD PIPES */
) {
trace_dev_init();
}
if (trace_filename != NULL) {
D( "Trace file name is set to %s\n", trace_filename );
} else {
D("Trace file name is not set\n");
}
#endif
pipe_dev_init();
#if TEST_SWITCH
{
void *sw;
sw = goldfish_switch_add("test", NULL, NULL, 0);
goldfish_switch_set_state(sw, 1);
goldfish_switch_add("test2", switch_test_write, sw, 1);
}
#endif
android_load_kernel(env, ram_size, kernel_filename, kernel_cmdline, initrd_filename);
}
static void android_arm_init_(ram_addr_t ram_size,
const char *boot_device,
const char *kernel_filename,
const char *kernel_cmdline,
const char *initrd_filename,
const char *cpu_model)
{
CPUARMState *env;
qemu_irq *cpu_pic;
qemu_irq *goldfish_pic;
int i;
struct arm_boot_info info;
ram_addr_t ram_offset;
if (!cpu_model)
cpu_model = "arm926";
env = cpu_init(cpu_model);
ram_offset = qemu_ram_alloc(NULL,"android_arm",ram_size);
cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
cpu_pic = arm_pic_init_cpu(env);
goldfish_pic = goldfish_interrupt_init(0xff000000, cpu_pic[ARM_PIC_CPU_IRQ], cpu_pic[ARM_PIC_CPU_FIQ]);
goldfish_device_init(goldfish_pic, 0xff010000, 0x7f0000, 10, 22);
goldfish_device_bus_init(0xff001000, 1);
goldfish_timer_and_rtc_init(0xff003000, 3);
goldfish_tty_add(serial_hds[0], 0, 0xff002000, 4);
for(i = 1; i < MAX_SERIAL_PORTS; i++) {
//printf("android_arm_init serial %d %x\n", i, serial_hds[i]);
if(serial_hds[i]) {
goldfish_tty_add(serial_hds[i], i, 0, 0);
}
}
for(i = 0; i < MAX_NICS; i++) {
if (nd_table[i].vlan) {
if (nd_table[i].model == NULL
|| strcmp(nd_table[i].model, "smc91c111") == 0) {
struct goldfish_device *smc_device;
smc_device = g_malloc0(sizeof(*smc_device));
smc_device->name = "smc91x";
smc_device->id = i;
smc_device->size = 0x1000;
smc_device->irq_count = 1;
goldfish_add_device_no_io(smc_device);
smc91c111_init(&nd_table[i], smc_device->base, goldfish_pic[smc_device->irq]);
} else {
fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd_table[0].model);
exit (1);
}
}
}
goldfish_fb_init(0);
#ifdef HAS_AUDIO
goldfish_audio_init(0xff004000, 0, audio_input_source);
#endif
{
DriveInfo* info = drive_get( IF_IDE, 0, 0 );
if (info != NULL) {
goldfish_mmc_init(0xff005000, 0, info->bdrv);
}
}
goldfish_memlog_init(0xff006000);
goldfish_battery_init(android_hw->hw_battery);
goldfish_add_device_no_io(&event0_device);
events_dev_init(event0_device.base, goldfish_pic[event0_device.irq]);
#ifdef CONFIG_NAND
goldfish_add_device_no_io(&nand_device);
nand_dev_init(nand_device.base);
#endif
#ifdef CONFIG_MEMCHECK
if (memcheck_enabled) {
trace_dev_init();
}
#endif // CONFIG_MEMCHECK
bool newDeviceNaming =
(androidHwConfig_getKernelDeviceNaming(android_hw) >= 1);
pipe_dev_init(newDeviceNaming);
#if TEST_SWITCH
{
void *sw;
sw = goldfish_switch_add("test", NULL, NULL, 0);
goldfish_switch_set_state(sw, 1);
goldfish_switch_add("test2", switch_test_write, sw, 1);
}
#endif
memset(&info, 0, sizeof info);
info.ram_size = ram_size;
info.kernel_filename = kernel_filename;
info.kernel_cmdline = kernel_cmdline;
info.initrd_filename = initrd_filename;
info.nb_cpus = 1;
info.board_id = 1441;
arm_load_kernel(env, &info);
}