void mali_gp_hard_reset(struct mali_gp_core *core)
{
const int reset_finished_loop_count = 15;
const u32 reset_wait_target_register = MALIGP2_REG_ADDR_MGMT_WRITE_BOUND_LOW;
const u32 reset_invalid_value = 0xC0FFE000;
const u32 reset_check_value = 0xC01A0000;
const u32 reset_default_value = 0;
int i;
MALI_DEBUG_ASSERT_POINTER(core);
MALI_DEBUG_PRINT(4, ("Mali GP: Hard reset of core %s\n", core->hw_core.description));
MALI_ASSERT_GROUP_LOCKED(core->group);
mali_gp_post_process_job(core, MALI_FALSE);
mali_hw_core_register_write(&core->hw_core, reset_wait_target_register, reset_invalid_value);
mali_hw_core_register_write(&core->hw_core, MALIGP2_REG_ADDR_MGMT_CMD, MALIGP2_REG_VAL_CMD_RESET);
for (i = 0; i < reset_finished_loop_count; i++)
{
mali_hw_core_register_write(&core->hw_core, reset_wait_target_register, reset_check_value);
if (reset_check_value == mali_hw_core_register_read(&core->hw_core, reset_wait_target_register))
{
break;
}
}
if (i == reset_finished_loop_count)
{
MALI_PRINT_ERROR(("Mali GP: The hard reset loop didn't work, unable to recover\n"));
}
mali_hw_core_register_write(&core->hw_core, reset_wait_target_register, reset_default_value);
mali_hw_core_register_write(&core->hw_core, MALIGP2_REG_ADDR_MGMT_INT_CLEAR, MALIGP2_REG_VAL_IRQ_MASK_ALL);
mali_hw_core_register_write(&core->hw_core, MALIGP2_REG_ADDR_MGMT_INT_MASK, MALIGP2_REG_VAL_IRQ_MASK_USED);
}
static void mali_gp_bottom_half(void *data)
{
struct mali_gp_core *core = (struct mali_gp_core *)data;
u32 irq_readout;
u32 irq_errors;
#if MALI_TIMELINE_PROFILING_ENABLED
#if 0
_mali_osk_profiling_add_event( MALI_PROFILING_EVENT_TYPE_START| MALI_PROFILING_EVENT_CHANNEL_SOFTWARE , _mali_osk_get_pid(), _mali_osk_get_tid()+11000, 0, 0, 0);
#endif
#endif
mali_group_lock(core->group);
if ( MALI_FALSE == mali_group_power_is_on(core->group) )
{
MALI_PRINT_ERROR(("Interrupt bottom half of %s when core is OFF.", core->hw_core.description));
mali_group_unlock(core->group);
return;
}
irq_readout = mali_hw_core_register_read(&core->hw_core, MALIGP2_REG_ADDR_MGMT_INT_RAWSTAT) & MALIGP2_REG_VAL_IRQ_MASK_USED;
MALI_DEBUG_PRINT(4, ("Mali GP: Bottom half IRQ 0x%08X from core %s\n", irq_readout, core->hw_core.description));
if (irq_readout & (MALIGP2_REG_VAL_IRQ_VS_END_CMD_LST|MALIGP2_REG_VAL_IRQ_PLBU_END_CMD_LST))
{
u32 core_status = mali_hw_core_register_read(&core->hw_core, MALIGP2_REG_ADDR_MGMT_STATUS);
if (0 == (core_status & MALIGP2_REG_VAL_STATUS_MASK_ACTIVE))
{
mali_gp_post_process_job(core, MALI_FALSE);
MALI_DEBUG_PRINT(4, ("Mali GP: Job completed, calling group handler\n"));
mali_group_bottom_half(core->group, GROUP_EVENT_GP_JOB_COMPLETED);
return;
}
}
irq_errors = irq_readout & ~(MALIGP2_REG_VAL_IRQ_VS_END_CMD_LST|MALIGP2_REG_VAL_IRQ_PLBU_END_CMD_LST|MALIGP2_REG_VAL_IRQ_HANG|MALIGP2_REG_VAL_IRQ_PLBU_OUT_OF_MEM);
if (0 != irq_errors)
{
mali_gp_post_process_job(core, MALI_FALSE);
MALI_PRINT_ERROR(("Mali GP: Unknown interrupt 0x%08X from core %s, aborting job\n", irq_readout, core->hw_core.description));
mali_group_bottom_half(core->group, GROUP_EVENT_GP_JOB_FAILED);
return;
}
else if (MALI_TRUE == core->core_timed_out)
{
if (core->timeout_job_id == mali_gp_job_get_id(core->running_job))
{
mali_gp_post_process_job(core, MALI_FALSE);
MALI_DEBUG_PRINT(2, ("Mali GP: Job %d timed out\n", mali_gp_job_get_id(core->running_job)));
mali_group_bottom_half(core->group, GROUP_EVENT_GP_JOB_TIMED_OUT);
}
else
{
MALI_DEBUG_PRINT(2, ("Mali GP: Job %d timed out but current job is %d\n", core->timeout_job_id, mali_gp_job_get_id(core->running_job)));
mali_group_unlock(core->group);
}
core->core_timed_out = MALI_FALSE;
return;
}
else if (irq_readout & MALIGP2_REG_VAL_IRQ_PLBU_OUT_OF_MEM)
{
mali_gp_post_process_job(core, MALI_TRUE);
MALI_DEBUG_PRINT(3, ("Mali GP: PLBU needs more heap memory\n"));
mali_group_bottom_half(core->group, GROUP_EVENT_GP_OOM);
return;
}
else if (irq_readout & MALIGP2_REG_VAL_IRQ_HANG)
{
mali_hw_core_register_write(&core->hw_core, MALIGP2_REG_ADDR_MGMT_INT_CLEAR, MALIGP2_REG_VAL_IRQ_HANG);
}
mali_hw_core_register_write(&core->hw_core, MALIGP2_REG_ADDR_MGMT_INT_MASK, MALIGP2_REG_VAL_IRQ_MASK_USED);
mali_group_unlock(core->group);
#if MALI_TIMELINE_PROFILING_ENABLED
#if 0
_mali_osk_profiling_add_event( MALI_PROFILING_EVENT_TYPE_STOP| MALI_PROFILING_EVENT_CHANNEL_SOFTWARE , _mali_osk_get_pid(), _mali_osk_get_tid()+11000, 0, 0, 0);
#endif
#endif
}
_mali_osk_errcode_t mali_gp_reset(struct mali_gp_core *core)
{
int i;
const int request_loop_count = 20;
MALI_DEBUG_ASSERT_POINTER(core);
MALI_DEBUG_PRINT(4, ("Mali GP: Reset of core %s\n", core->hw_core.description));
MALI_ASSERT_GROUP_LOCKED(core->group);
mali_gp_post_process_job(core, MALI_FALSE);
mali_hw_core_register_write(&core->hw_core, MALIGP2_REG_ADDR_MGMT_INT_MASK, 0);
#if defined(USING_MALI200)
mali_hw_core_register_write(&core->hw_core, MALIGP2_REG_ADDR_MGMT_CMD, MALIGP2_REG_VAL_CMD_STOP_BUS);
for (i = 0; i < request_loop_count; i++)
{
if (mali_hw_core_register_read(&core->hw_core, MALIGP2_REG_ADDR_MGMT_STATUS) & MALIGP2_REG_VAL_STATUS_BUS_STOPPED)
{
break;
}
_mali_osk_time_ubusydelay(10);
}
if (request_loop_count == i)
{
MALI_PRINT_ERROR(("Mali GP: Failed to stop bus for core %s, unable to recover\n", core->hw_core.description));
return _MALI_OSK_ERR_FAULT;
}
mali_gp_hard_reset(core);
#elif defined(USING_MALI400)
mali_hw_core_register_write(&core->hw_core, MALIGP2_REG_ADDR_MGMT_INT_CLEAR, MALI400GP_REG_VAL_IRQ_RESET_COMPLETED);
mali_hw_core_register_write(&core->hw_core, MALIGP2_REG_ADDR_MGMT_CMD, MALI400GP_REG_VAL_CMD_SOFT_RESET);
for (i = 0; i < request_loop_count; i++)
{
if (mali_hw_core_register_read(&core->hw_core, MALIGP2_REG_ADDR_MGMT_INT_RAWSTAT) & MALI400GP_REG_VAL_IRQ_RESET_COMPLETED)
{
break;
}
_mali_osk_time_ubusydelay(10);
}
if (request_loop_count == i)
{
MALI_PRINT_ERROR(("Mali GP: Failed to reset core %s, unable to recover\n", core->hw_core.description));
return _MALI_OSK_ERR_FAULT;
}
#else
#error "no supported mali core defined"
#endif
mali_hw_core_register_write(&core->hw_core, MALIGP2_REG_ADDR_MGMT_INT_CLEAR, MALIGP2_REG_VAL_IRQ_MASK_ALL);
mali_hw_core_register_write(&core->hw_core, MALIGP2_REG_ADDR_MGMT_INT_MASK, MALIGP2_REG_VAL_IRQ_MASK_USED);
return _MALI_OSK_ERR_OK;
}
static void mali_gp_bottom_half(void *data)
{
struct mali_gp_core *core = (struct mali_gp_core *)data;
u32 irq_readout;
u32 irq_errors;
#if MALI_TIMELINE_PROFILING_ENABLED
_mali_osk_profiling_add_event(MALI_PROFILING_EVENT_TYPE_START|MALI_PROFILING_EVENT_CHANNEL_SOFTWARE|MALI_PROFILING_EVENT_REASON_START_STOP_BOTTOM_HALF, 0, _mali_osk_get_tid(), MALI_PROFILING_MAKE_EVENT_DATA_CORE_GP(0), 0, 0);
#endif
mali_group_lock(core->group); /* Group lock grabbed in core handlers, but released in common group handler */
if ( MALI_FALSE == mali_group_power_is_on(core->group) )
{
MALI_PRINT_ERROR(("Interrupt bottom half of %s when core is OFF.", core->hw_core.description));
mali_group_unlock(core->group);
#if MALI_TIMELINE_PROFILING_ENABLED
_mali_osk_profiling_add_event(MALI_PROFILING_EVENT_TYPE_STOP|MALI_PROFILING_EVENT_CHANNEL_SOFTWARE|MALI_PROFILING_EVENT_REASON_START_STOP_BOTTOM_HALF, 0, _mali_osk_get_tid(), 0, 0, 0);
#endif
return;
}
irq_readout = mali_hw_core_register_read(&core->hw_core, MALIGP2_REG_ADDR_MGMT_INT_RAWSTAT) & MALIGP2_REG_VAL_IRQ_MASK_USED;
MALI_DEBUG_PRINT(4, ("Mali GP: Bottom half IRQ 0x%08X from core %s\n", irq_readout, core->hw_core.description));
if (irq_readout & (MALIGP2_REG_VAL_IRQ_VS_END_CMD_LST|MALIGP2_REG_VAL_IRQ_PLBU_END_CMD_LST))
{
u32 core_status = mali_hw_core_register_read(&core->hw_core, MALIGP2_REG_ADDR_MGMT_STATUS);
if (0 == (core_status & MALIGP2_REG_VAL_STATUS_MASK_ACTIVE))
{
mali_gp_post_process_job(core, MALI_FALSE);
MALI_DEBUG_PRINT(4, ("Mali GP: Job completed, calling group handler\n"));
mali_group_bottom_half(core->group, GROUP_EVENT_GP_JOB_COMPLETED); /* Will release group lock */
#if MALI_TIMELINE_PROFILING_ENABLED
_mali_osk_profiling_add_event(MALI_PROFILING_EVENT_TYPE_STOP|MALI_PROFILING_EVENT_CHANNEL_SOFTWARE|MALI_PROFILING_EVENT_REASON_START_STOP_BOTTOM_HALF, 0, _mali_osk_get_tid(), 0, 0, 0);
#endif
return;
}
}
/*
* Now lets look at the possible error cases (IRQ indicating error or timeout)
* END_CMD_LST, HANG and PLBU_OOM interrupts are not considered error.
*/
irq_errors = irq_readout & ~(MALIGP2_REG_VAL_IRQ_VS_END_CMD_LST|MALIGP2_REG_VAL_IRQ_PLBU_END_CMD_LST|MALIGP2_REG_VAL_IRQ_HANG|MALIGP2_REG_VAL_IRQ_PLBU_OUT_OF_MEM);
if (0 != irq_errors)
{
mali_gp_post_process_job(core, MALI_FALSE);
MALI_PRINT_ERROR(("Mali GP: Unknown interrupt 0x%08X from core %s, aborting job\n", irq_readout, core->hw_core.description));
mali_group_bottom_half(core->group, GROUP_EVENT_GP_JOB_FAILED); /* Will release group lock */
#if MALI_TIMELINE_PROFILING_ENABLED
_mali_osk_profiling_add_event(MALI_PROFILING_EVENT_TYPE_STOP|MALI_PROFILING_EVENT_CHANNEL_SOFTWARE|MALI_PROFILING_EVENT_REASON_START_STOP_BOTTOM_HALF, 0, _mali_osk_get_tid(), 0, 0, 0);
#endif
return;
}
else if (MALI_TRUE == core->core_timed_out) /* SW timeout */
{
if (core->timeout_job_id == mali_gp_job_get_id(core->running_job))
{
mali_gp_post_process_job(core, MALI_FALSE);
MALI_DEBUG_PRINT(2, ("Mali GP: Job %d timed out\n", mali_gp_job_get_id(core->running_job)));
mali_group_bottom_half(core->group, GROUP_EVENT_GP_JOB_TIMED_OUT);
}
core->core_timed_out = MALI_FALSE;
#if MALI_TIMELINE_PROFILING_ENABLED
_mali_osk_profiling_add_event(MALI_PROFILING_EVENT_TYPE_STOP|MALI_PROFILING_EVENT_CHANNEL_SOFTWARE|MALI_PROFILING_EVENT_REASON_START_STOP_BOTTOM_HALF, 0, _mali_osk_get_tid(), 0, 0, 0);
#endif
return;
}
else if (irq_readout & MALIGP2_REG_VAL_IRQ_PLBU_OUT_OF_MEM)
{
/* GP wants more memory in order to continue.
*
* This must be handled prior to HANG because this actually can
* generate a HANG while waiting for more memory.
* And it must be handled before the completion interrupts,
* since the PLBU can run out of memory after VS is complete;
* in which case the OOM must be handled before to complete the
* PLBU work.
*/
mali_gp_post_process_job(core, MALI_TRUE);
MALI_DEBUG_PRINT(3, ("Mali GP: PLBU needs more heap memory\n"));
mali_group_bottom_half(core->group, GROUP_EVENT_GP_OOM); /* Will release group lock */
#if MALI_TIMELINE_PROFILING_ENABLED
_mali_osk_profiling_add_event(MALI_PROFILING_EVENT_TYPE_STOP|MALI_PROFILING_EVENT_CHANNEL_SOFTWARE|MALI_PROFILING_EVENT_REASON_START_STOP_BOTTOM_HALF, 0, _mali_osk_get_tid(), 0, 0, 0);
#endif
return;
}
else if (irq_readout & MALIGP2_REG_VAL_IRQ_HANG)
{
/* we mask hang interrupts, so this should never happen... */
MALI_DEBUG_ASSERT( 0 );
}
/* The only way to get here is if we only got one of two needed END_CMD_LST
* interrupts. Disable the interrupt that has been received and continue to
* run. */
mali_hw_core_register_write(&core->hw_core, MALIGP2_REG_ADDR_MGMT_INT_MASK,
MALIGP2_REG_VAL_IRQ_MASK_USED &
((irq_readout & MALIGP2_REG_VAL_IRQ_PLBU_END_CMD_LST)
? ~MALIGP2_REG_VAL_IRQ_PLBU_END_CMD_LST
: ~MALIGP2_REG_VAL_IRQ_VS_END_CMD_LST
));
mali_group_unlock(core->group);
#if MALI_TIMELINE_PROFILING_ENABLED
_mali_osk_profiling_add_event(MALI_PROFILING_EVENT_TYPE_STOP|MALI_PROFILING_EVENT_CHANNEL_SOFTWARE|MALI_PROFILING_EVENT_REASON_START_STOP_BOTTOM_HALF, 0, _mali_osk_get_tid(), 0, 0, 0);
#endif
}
