static int __init mdp4_dma_s_panel_init(void) { int ret = 0; struct platform_disp_info info = { .id = DISPLAY_TERTIARY, .dest = DISPLAY_4 }; if (!msm_fb_detect_client("mipi_dsi_i2c_video_wvga", &info)) ret = mipi_dsi_i2c_video_wvga_device_register(&info); else if (!msm_fb_detect_client("mipi_dsi_i2c_video_xga", &info)) ret = mipi_dsi_i2c_video_xga_device_register(&info); return ret; }
static int __init mddi_toshiba_wvga_pt_init(void) { int ret; struct msm_panel_info pinfo; #ifdef CONFIG_FB_MSM_MDDI_AUTO_DETECT if (msm_fb_detect_client("mddi_toshiba_wvga_pt")) return 0; #endif pinfo.xres = 480; pinfo.yres = 800; pinfo.type = MDDI_PANEL; pinfo.pdest = DISPLAY_1; pinfo.mddi.vdopkt = MDDI_DEFAULT_PRIM_PIX_ATTR; pinfo.wait_cycle = 0; pinfo.bpp = 18; pinfo.lcd.vsync_enable = FALSE; pinfo.bl_max = 15; pinfo.bl_min = 1; pinfo.clk_rate = 192000000; pinfo.clk_min = 190000000; pinfo.clk_max = 200000000; pinfo.fb_num = 2; ret = mddi_toshiba_device_register(&pinfo, TOSHIBA_VGA_PRIM, LCD_TOSHIBA_2P4_WVGA_PT); if (ret) printk(KERN_ERR "%s: failed to register device!\n", __func__); return ret; }
static int __init mipi_cmd_novatek_blue_qhd_pt_init(void) { int ret; #ifdef CONFIG_FB_MSM_MIPI_PANEL_DETECT if (msm_fb_detect_client("mipi_cmd_novatek_qhd")) return 0; #endif pinfo.xres = 540; pinfo.yres = 960; pinfo.type = MIPI_CMD_PANEL; pinfo.pdest = DISPLAY_1; pinfo.wait_cycle = 0; pinfo.bpp = 24; pinfo.lcdc.h_back_porch = 50; pinfo.lcdc.h_front_porch = 50; pinfo.lcdc.h_pulse_width = 20; pinfo.lcdc.v_back_porch = 11; pinfo.lcdc.v_front_porch = 10; pinfo.lcdc.v_pulse_width = 5; pinfo.lcdc.border_clr = 0; /* blk */ pinfo.lcdc.underflow_clr = 0xff; /* blue */ pinfo.lcdc.hsync_skew = 0; pinfo.bl_max = 255; pinfo.bl_min = 1; pinfo.fb_num = 2; pinfo.clk_rate = 454000000; pinfo.is_3d_panel = FB_TYPE_3D_PANEL; pinfo.lcd.vsync_enable = TRUE; pinfo.lcd.hw_vsync_mode = TRUE; pinfo.lcd.refx100 = 6000; /* adjust refx100 to prevent tearing */ pinfo.mipi.mode = DSI_CMD_MODE; pinfo.mipi.dst_format = DSI_CMD_DST_FORMAT_RGB888; pinfo.mipi.vc = 0; pinfo.mipi.rgb_swap = DSI_RGB_SWAP_BGR; pinfo.mipi.data_lane0 = TRUE; #if defined(NOVATEK_TWO_LANE) pinfo.mipi.data_lane1 = TRUE; #endif pinfo.mipi.t_clk_post = 0x22; pinfo.mipi.t_clk_pre = 0x3f; pinfo.mipi.stream = 0; /* dma_p */ pinfo.mipi.mdp_trigger = DSI_CMD_TRIGGER_SW; pinfo.mipi.dma_trigger = DSI_CMD_TRIGGER_SW; pinfo.mipi.te_sel = 1; /* TE from vsycn gpio */ pinfo.mipi.interleave_max = 1; pinfo.mipi.insert_dcs_cmd = TRUE; pinfo.mipi.wr_mem_continue = 0x3c; pinfo.mipi.wr_mem_start = 0x2c; pinfo.mipi.dsi_phy_db = &dsi_cmd_mode_phy_db; ret = mipi_novatek_device_register(&pinfo, MIPI_DSI_PRIM, MIPI_DSI_PANEL_WVGA_PT); if (ret) pr_err("%s: failed to register device!\n", __func__); return ret; }
static int __init lcdc_qrdc_init(void) { int ret; struct msm_panel_info pinfo; if (msm_fb_detect_client("lcdc_qrdc")) return 0; pinfo.xres = 1366; pinfo.yres = 768; pinfo.type = LCDC_PANEL; pinfo.pdest = DISPLAY_1; pinfo.wait_cycle = 0; pinfo.bpp = 24; pinfo.fb_num = 2; pinfo.clk_rate = 43192000; pinfo.lcdc.h_back_porch = 120; pinfo.lcdc.h_front_porch = 20; pinfo.lcdc.h_pulse_width = 40; pinfo.lcdc.v_back_porch = 25; pinfo.lcdc.v_front_porch = 1; pinfo.lcdc.v_pulse_width = 7; pinfo.lcdc.border_clr = 0; /* blk */ pinfo.lcdc.underflow_clr = 0xff; /* blue */ pinfo.lcdc.hsync_skew = 0; ret = lcdc_device_register(&pinfo); if (ret) printk(KERN_ERR "%s: failed to register device\n", __func__); return ret; }
static int __init lcdc_wxga_init(void) { int ret; struct msm_panel_info pinfo; #ifdef CONFIG_FB_MSM_MDDI_AUTO_DETECT if (msm_fb_detect_client("lcdc_wxga")) return 0; #endif pinfo.xres = 1280; pinfo.yres = 720; pinfo.type = LCDC_PANEL; pinfo.pdest = DISPLAY_1; pinfo.wait_cycle = 0; pinfo.bpp = 24; pinfo.fb_num = 2; pinfo.clk_rate = 74250000; pinfo.lcdc.h_back_porch = 124; pinfo.lcdc.h_front_porch = 110; pinfo.lcdc.h_pulse_width = 136; pinfo.lcdc.v_back_porch = 19; pinfo.lcdc.v_front_porch = 5; pinfo.lcdc.v_pulse_width = 6; pinfo.lcdc.border_clr = 0; pinfo.lcdc.underflow_clr = 0xff; pinfo.lcdc.hsync_skew = 0; ret = lcdc_device_register(&pinfo); if (ret) printk(KERN_ERR "%s: failed to register device!\n", __func__); return ret; }
static int __init mipi_cmd_nt35510_boe_wvga_pt_init(void) { int ret; if (msm_fb_detect_client("mipi_cmd_nt35510_boe_wvga")) return 0; pinfo.xres = 480; pinfo.yres = 800; pinfo.type = MIPI_CMD_PANEL; pinfo.pdest = DISPLAY_1; pinfo.wait_cycle = 0; pinfo.bpp = 24; pinfo.lcdc.h_back_porch = 100; pinfo.lcdc.h_front_porch = 100; pinfo.lcdc.h_pulse_width = 8; pinfo.lcdc.v_back_porch = 20; pinfo.lcdc.v_front_porch = 20; pinfo.lcdc.v_pulse_width = 1; pinfo.lcdc.border_clr = 0; /* blk */ pinfo.lcdc.underflow_clr = 0xff; /* blue */ pinfo.lcdc.hsync_skew = 0; pinfo.bl_max = 32; pinfo.bl_min = 0; pinfo.fb_num = 2; pinfo.clk_rate = 499000000; pinfo.lcd.vsync_enable = TRUE; pinfo.lcd.hw_vsync_mode = TRUE; pinfo.lcd.refx100 = 6100; /* adjust refx100 to prevent tearing */ pinfo.mipi.mode = DSI_CMD_MODE; pinfo.mipi.dst_format = DSI_CMD_DST_FORMAT_RGB888; pinfo.mipi.vc = 0; pinfo.mipi.rgb_swap = DSI_RGB_SWAP_RGB; pinfo.mipi.data_lane0 = TRUE; pinfo.mipi.data_lane1 = TRUE; pinfo.mipi.t_clk_post = 0x20; pinfo.mipi.t_clk_pre = 0x2F; pinfo.mipi.stream = 0; /* dma_p */ pinfo.mipi.mdp_trigger = DSI_CMD_TRIGGER_SW; pinfo.mipi.dma_trigger = DSI_CMD_TRIGGER_SW; pinfo.mipi.te_sel = 1; /* TE from vsync gpio */ pinfo.mipi.interleave_max = 1; pinfo.mipi.insert_dcs_cmd = TRUE; pinfo.mipi.wr_mem_continue = 0x3c; pinfo.mipi.wr_mem_start = 0x2c; pinfo.mipi.dsi_phy_db = &dsi_cmd_mode_phy_db; pinfo.mipi.tx_eot_append = 0x01; pinfo.mipi.rx_eot_ignore = 0x0; pinfo.mipi.dlane_swap = 0x01; ret = mipi_nt35510_boe_device_register(&pinfo, MIPI_DSI_PRIM, MIPI_DSI_PANEL_WVGA_PT); if (ret) pr_err("%s: failed to register device!\n", __func__); return ret; }
static int __init mipi_video_toshiba_wsvga_pt_init(void) { int ret; if (msm_fb_detect_client("mipi_video_toshiba_wsvga")) return 0; pinfo.xres = 600; pinfo.yres = 1024; pinfo.lcdc.xres_pad = 200; pinfo.lcdc.yres_pad = 0; pinfo.type = MIPI_VIDEO_PANEL; pinfo.pdest = DISPLAY_1; pinfo.wait_cycle = 0; pinfo.bpp = 24; pinfo.lcdc.h_back_porch = 16; pinfo.lcdc.h_front_porch = 23; pinfo.lcdc.h_pulse_width = 8; pinfo.lcdc.v_back_porch = 3; pinfo.lcdc.v_front_porch = 45; pinfo.lcdc.v_pulse_width = 2; pinfo.lcdc.border_clr = 0; pinfo.lcdc.underflow_clr = 0xff; pinfo.lcdc.hsync_skew = 0; pinfo.bl_max = MIPI_TOSHIBA_PWM_LEVEL; pinfo.bl_min = 1; pinfo.fb_num = 2; pinfo.mipi.mode = DSI_VIDEO_MODE; pinfo.mipi.pulse_mode_hsa_he = FALSE; pinfo.mipi.hfp_power_stop = FALSE; pinfo.mipi.hbp_power_stop = FALSE; pinfo.mipi.hsa_power_stop = FALSE; pinfo.mipi.eof_bllp_power_stop = FALSE; pinfo.mipi.bllp_power_stop = FALSE; pinfo.mipi.traffic_mode = DSI_NON_BURST_SYNCH_EVENT; pinfo.mipi.dst_format = DSI_VIDEO_DST_FORMAT_RGB888; pinfo.mipi.vc = 0; pinfo.mipi.rgb_swap = DSI_RGB_SWAP_RGB; pinfo.mipi.data_lane0 = TRUE; pinfo.mipi.data_lane1 = TRUE; pinfo.mipi.data_lane2 = TRUE; pinfo.mipi.t_clk_post = 0x04; pinfo.mipi.t_clk_pre = 0x1a; pinfo.mipi.esc_byte_ratio = 4; pinfo.mipi.stream = 0; pinfo.mipi.mdp_trigger = 0; pinfo.mipi.dma_trigger = DSI_CMD_TRIGGER_SW; pinfo.mipi.frame_rate = 55; pinfo.mipi.dsi_phy_db = &dsi_video_mode_phy_db; pinfo.mipi.tx_eot_append = TRUE; ret = mipi_toshiba_device_register(&pinfo, MIPI_DSI_PRIM, MIPI_DSI_PANEL_WSVGA_PT); if (ret) printk(KERN_ERR "%s: failed to register device!\n", __func__); return ret; }
static int __init lcdc_auo_init(void) { int ret; struct msm_panel_info *pinfo; #ifdef CONFIG_FB_MSM_LCDC_AUTO_DETECT if (msm_fb_detect_client(LCDC_AUO_PANEL_NAME)) { pr_err("%s: detect failed\n", __func__); return 0; } #endif ret = platform_driver_register(&this_driver); if (ret) { pr_err("%s: driver register failed, rc=%d\n", __func__, ret); return ret; } pinfo = &lcdc_auo_panel_data.panel_info; pinfo->xres = 480; pinfo->yres = 800; pinfo->type = LCDC_PANEL; pinfo->pdest = DISPLAY_1; pinfo->wait_cycle = 0; pinfo->bpp = 16; //3 buffers need this action (RomzesRover) #ifdef CONFIG_FB_MSM_TRIPLE_BUFFER pinfo->fb_num = 3; #else pinfo->fb_num = 2; #endif pinfo->clk_rate = 24576000; //pinfo->bl_max = MAX_BACKLIGHT_LEVEL; //pinfo->bl_min = 1; //disable vsync pinfo->lcd.hw_vsync_mode = 0; // here edited to beat display flickering ([ray, RomzesRover) pinfo->lcdc.h_back_porch = 12; pinfo->lcdc.h_front_porch = 16; pinfo->lcdc.h_pulse_width = 40; pinfo->lcdc.v_back_porch = 4; pinfo->lcdc.v_front_porch = 3; pinfo->lcdc.v_pulse_width = 40; pinfo->lcdc.border_clr = 0; /* blk */ pinfo->lcdc.underflow_clr = 0xff; /* blue */ pinfo->lcdc.hsync_skew = 0; pinfo->lcdc.border_clr = 0; pinfo->lcdc.underflow_clr = 0xff; pinfo->lcdc.hsync_skew = 0; ret = platform_device_register(&this_device); if (ret) { pr_err("%s: device register failed, rc=%d\n", __func__, ret); } return ret; }
static int __init mipi_cmd_samsung_oled_qhd_pt_init(void) { int ret; #ifdef CONFIG_FB_MSM_MIPI_PANEL_DETECT if (msm_fb_detect_client("mipi_cmd_samsung_oled_qhd")) return 0; #endif pinfo.xres = 540; pinfo.yres = 960; pinfo.mode2_xres = 0; pinfo.mode2_yres = 0; pinfo.mode2_bpp = 0; pinfo.type = MIPI_VIDEO_PANEL; pinfo.pdest = DISPLAY_1; pinfo.wait_cycle = 0; pinfo.bpp = 24; pinfo.lcdc.h_pulse_width = 12; pinfo.lcdc.h_back_porch = 38; pinfo.lcdc.h_front_porch = 38; pinfo.lcdc.v_pulse_width = 2; pinfo.lcdc.v_back_porch = 2; pinfo.lcdc.v_front_porch = 13; pinfo.lcdc.border_clr = 0; /* blk */ pinfo.lcdc.underflow_clr = 0xff;/* blue */ pinfo.lcdc.hsync_skew = 0; pinfo.bl_max = 255; pinfo.bl_min = 1; pinfo.fb_num = 2; pinfo.clk_rate = 450000000; pinfo.mipi.mode = DSI_VIDEO_MODE; pinfo.mipi.pulse_mode_hsa_he = TRUE; pinfo.mipi.hfp_power_stop = FALSE; pinfo.mipi.hbp_power_stop = FALSE; pinfo.mipi.hsa_power_stop = FALSE; pinfo.mipi.eof_bllp_power_stop = TRUE; pinfo.mipi.bllp_power_stop = TRUE; pinfo.mipi.traffic_mode = DSI_NON_BURST_SYNCH_PULSE; pinfo.mipi.dst_format = DSI_VIDEO_DST_FORMAT_RGB888; pinfo.mipi.vc = 0; pinfo.mipi.rgb_swap = DSI_RGB_SWAP_RGB; pinfo.mipi.data_lane0 = TRUE; pinfo.mipi.data_lane1 = TRUE; pinfo.mipi.tx_eot_append = FALSE; pinfo.mipi.t_clk_post = 0x19; pinfo.mipi.t_clk_pre = 0x2D; pinfo.mipi.stream = 0; /* dma_p */ pinfo.mipi.mdp_trigger = DSI_CMD_TRIGGER_SW; pinfo.mipi.dma_trigger = DSI_CMD_TRIGGER_SW; pinfo.mipi.frame_rate = 60; pinfo.mipi.force_clk_lane_hs = 1; pinfo.mipi.dsi_phy_db = &dsi_video_mode_phy_db; ret = mipi_samsung_device_register(&pinfo, MIPI_DSI_PRIM, MIPI_DSI_PANEL_WVGA_PT, &mipi_pd); if (ret) pr_err("%s: failed to register device!\n", __func__); return ret; }
static int __init mipi_video_toshiba_wvga_pt_init(void) { int ret; struct platform_disp_info info = { .id = DISPLAY_PRIMARY, .dest = DISPLAY_1 }; if (msm_fb_detect_client("mipi_video_toshiba_wvga", &info)) return 0; pinfo.xres = 480; pinfo.yres = 864; /* 856 for V1 surf */ pinfo.type = MIPI_VIDEO_PANEL; pinfo.pdest = info.dest; pinfo.disp_id = info.id; pinfo.wait_cycle = 0; pinfo.bpp = 24; pinfo.lcdc.h_back_porch = 64; pinfo.lcdc.h_front_porch = 64; pinfo.lcdc.h_pulse_width = 16; pinfo.lcdc.v_back_porch = 8; pinfo.lcdc.v_front_porch = 4; pinfo.lcdc.v_pulse_width = 1; pinfo.lcdc.border_clr = 0; /* blk */ pinfo.lcdc.underflow_clr = 0xff; /* blue */ pinfo.lcdc.hsync_skew = 0; pinfo.bl_max = 15; pinfo.bl_min = 1; pinfo.fb_num = 2; pinfo.mipi.mode = DSI_VIDEO_MODE; pinfo.mipi.pulse_mode_hsa_he = TRUE; pinfo.mipi.hfp_power_stop = FALSE; pinfo.mipi.hbp_power_stop = FALSE; pinfo.mipi.hsa_power_stop = FALSE; pinfo.mipi.eof_bllp_power_stop = TRUE; pinfo.mipi.bllp_power_stop = TRUE; pinfo.mipi.traffic_mode = DSI_NON_BURST_SYNCH_PULSE; pinfo.mipi.dst_format = DSI_VIDEO_DST_FORMAT_RGB888; pinfo.mipi.vc = 0; pinfo.mipi.rgb_swap = DSI_RGB_SWAP_BGR; pinfo.mipi.data_lane0 = TRUE; pinfo.mipi.data_lane1 = TRUE; pinfo.mipi.t_clk_post = 0x04; pinfo.mipi.t_clk_pre = 0x17; pinfo.mipi.stream = 0; /* dma_p */ pinfo.mipi.mdp_trigger = DSI_CMD_TRIGGER_SW; pinfo.mipi.dma_trigger = DSI_CMD_TRIGGER_SW; pinfo.mipi.frame_rate = 60; pinfo.mipi.dsi_phy_db = &dsi_video_mode_phy_db; ret = mipi_toshiba_device_register(&pinfo, MIPI_DSI_PRIM, MIPI_DSI_PANEL_WVGA_PT); if (ret) printk(KERN_ERR "%s: failed to register device!\n", __func__); return ret; }
static int __init mipi_cmd_orise_720p_pt_init(void) { int ret; if (msm_fb_detect_client("mipi_cmd_orise_720p")) return 0; pinfo.xres = 720; pinfo.yres = 1280; pinfo.type = MIPI_CMD_PANEL; pinfo.pdest = DISPLAY_1; pinfo.wait_cycle = 0; pinfo.bpp = 24; pinfo.lcdc.h_back_porch = 160; pinfo.lcdc.h_front_porch = 160; pinfo.lcdc.h_pulse_width = 8; pinfo.lcdc.v_back_porch = 32; pinfo.lcdc.v_front_porch = 32; pinfo.lcdc.v_pulse_width = 1; pinfo.lcdc.border_clr = 0; pinfo.lcdc.underflow_clr = 0xff; pinfo.lcdc.hsync_skew = 0; pinfo.bl_max = 200; pinfo.bl_min = 1; pinfo.fb_num = 2; pinfo.clk_rate = 507000000; pinfo.lcd.vsync_enable = TRUE; pinfo.lcd.hw_vsync_mode = TRUE; pinfo.lcd.refx100 = 6000; pinfo.lcd.v_back_porch = 32; pinfo.lcd.v_front_porch = 32; pinfo.lcd.v_pulse_width = 1; pinfo.mipi.mode = DSI_CMD_MODE; pinfo.mipi.dst_format = DSI_CMD_DST_FORMAT_RGB888; pinfo.mipi.vc = 0; pinfo.mipi.data_lane0 = TRUE; pinfo.mipi.data_lane1 = TRUE; pinfo.mipi.data_lane2 = TRUE; pinfo.mipi.data_lane3 = TRUE; pinfo.mipi.t_clk_post = 0x04; pinfo.mipi.t_clk_pre = 0x1e; pinfo.mipi.stream = 0; pinfo.mipi.mdp_trigger = DSI_CMD_TRIGGER_NONE; pinfo.mipi.dma_trigger = DSI_CMD_TRIGGER_SW; pinfo.mipi.te_sel = 1; pinfo.mipi.interleave_max = 1; pinfo.mipi.insert_dcs_cmd = TRUE; pinfo.mipi.wr_mem_continue = 0x3c; pinfo.mipi.wr_mem_start = 0x2c; pinfo.mipi.dsi_phy_db = &dsi_cmd_mode_phy_db; ret = mipi_orise_device_register(&pinfo, MIPI_DSI_PRIM, MIPI_DSI_PANEL_720P_PT); if (ret) pr_err("%s: failed to register device!\n", __func__); return ret; }
static int __init lcdc_ld9040_panel_init(void) { int ret; struct msm_panel_info *pinfo; #ifdef CONFIG_FB_MSM_MDDI_AUTO_DETECT if (msm_fb_detect_client("lcdc_ld9040_wvga")) { printk(KERN_ERR "%s: msm_fb_detect_client failed!\n", __func__); return 0; } #endif DPRINT("start %s\n", __func__); ret = platform_driver_register(&this_driver); if (ret) { printk(KERN_ERR "%s: platform_driver_register failed! ret=%d\n", __func__, ret); return ret; } DPRINT("platform_driver_register(&this_driver) is done \n"); pinfo = &ld9040_panel_data.panel_info; pinfo->xres = LCDC_FB_XRES; pinfo->yres = LCDC_FB_YRES; MSM_FB_SINGLE_MODE_PANEL(pinfo); pinfo->type = LCDC_PANEL; pinfo->pdest = DISPLAY_1; pinfo->wait_cycle = 0; pinfo->bpp = 32; pinfo->fb_num = 2; pinfo->clk_rate = 76800000;//24576000; pinfo->bl_max = 255; pinfo->bl_min = 1; pinfo->lcdc.h_back_porch = LCDC_HBP; pinfo->lcdc.h_front_porch = LCDC_HFP; pinfo->lcdc.h_pulse_width = LCDC_HPW; pinfo->lcdc.v_back_porch = LCDC_VBP; pinfo->lcdc.v_front_porch = LCDC_VFP; pinfo->lcdc.v_pulse_width = LCDC_VPW; pinfo->lcdc.border_clr = 0; /* blk */ pinfo->lcdc.underflow_clr = 0xff; /* blue */ pinfo->lcdc.hsync_skew = 0; ret = platform_device_register(&this_device); DPRINT("platform_device_register(&this_device) is done \n"); if (ret) { printk(KERN_ERR "%s: platform_device_register failed! ret=%d\n", __func__, ret); platform_driver_unregister(&this_driver); } return ret; }
static int __init truly_r61529_hvga_panel_init(void) { int ret; struct msm_panel_info *pinfo; /*< DTS2011122306018 fengwei 20111224 begin */ lcd_panel_hvga = get_lcd_panel_type(); /* DTS2011122306018 fengwei 20111224 end >*/ if((LCD_R61529_TRULY_HVGA != lcd_panel_hvga) && \ (msm_fb_detect_client(lCD_DRIVER_NAME)) ) { return 0; } LCD_DEBUG(" lcd_type=%s, lcd_panel_hvga = %d\n", lCD_DRIVER_NAME, lcd_panel_hvga); ret = platform_driver_register(&this_driver); if (ret) return ret; pinfo = &truly_r61529_hvga_panel_data.panel_info; pinfo->xres = 320; pinfo->yres = 480; pinfo->type = LCDC_PANEL; pinfo->pdest = DISPLAY_1; pinfo->wait_cycle = 0; pinfo->bpp = 18; pinfo->fb_num = 2; pinfo->bl_max = LCD_MAX_BACKLIGHT_LEVEL; pinfo->bl_min = LCD_MIN_BACKLIGHT_LEVEL; if(LCD_R61529_TRULY_HVGA== lcd_panel_hvga) { /* changge the frequency high */ pinfo->clk_rate = 9660 * 1000; /*for HVGA pixel clk*/ } else { pinfo->clk_rate = 8192000; /*for HVGA pixel clk*/ } pinfo->lcdc.h_back_porch = 20; pinfo->lcdc.h_front_porch = 40; pinfo->lcdc.h_pulse_width = 10; pinfo->lcdc.v_back_porch = 8; pinfo->lcdc.v_front_porch = 15; pinfo->lcdc.v_pulse_width = 2; pinfo->lcdc.border_clr = 0; /* blk */ pinfo->lcdc.underflow_clr = 0xff; /* blue */ pinfo->lcdc.hsync_skew = 0; ret = platform_device_register(&this_device); if (ret) platform_driver_unregister(&this_driver); return ret; }
static int __init lcdc_s6d74a0_panel_init(void) { int ret; struct msm_panel_info *pinfo; #ifdef CONFIG_FB_MSM_TRY_MDDI_CATCH_LCDC_PRISM //if (msm_fb_detect_client("lcdc_s6d74a0_hvga")) // return 0; #endif LCD_DEBUG("ENTER lcdc_s6d74a0_panel_init\n"); lcd_panel_hvga = lcd_panel_probe(); if((LCD_S6D74A0_SAMSUNG_HVGA != lcd_panel_hvga) && \ (msm_fb_detect_client("lcdc_s6d74a0_hvga")) ) { return 0; } ret = platform_driver_register(&this_driver); if (ret) return ret; pinfo = &s6d74a0_panel_data.panel_info; pinfo->xres = 320; pinfo->yres = 480; pinfo->type = LCDC_PANEL; pinfo->pdest = DISPLAY_1; pinfo->wait_cycle = 0; pinfo->bpp = 24; pinfo->fb_num = 2; /*modify HVGA LCD pclk frequency to 8.192MHz*/ /*the pixel clk is different for different Resolution LCD*/ //pinfo->clk_rate = 24500000; /*for VGA pixel clk*/ //pinfo->clk_rate = 8192000; /*for HVGA pixel clk*/ pinfo->clk_rate = 9660000; //pinfo->clk_rate = 6125000; /*for QVGA pixel clk*/ pinfo->lcdc.h_back_porch = 7; pinfo->lcdc.h_front_porch = 4; pinfo->lcdc.h_pulse_width = 4; pinfo->lcdc.v_back_porch = 2; pinfo->lcdc.v_front_porch = 4; pinfo->lcdc.v_pulse_width = 2; pinfo->lcdc.border_clr = 0; /* blk */ pinfo->lcdc.underflow_clr = 0xff; /* blue */ pinfo->lcdc.hsync_skew = 0; pinfo->bl_max = 255; ret = platform_device_register(&this_device); if (ret) platform_driver_unregister(&this_driver); LCD_DEBUG(" lcdc_s6d74a0_panel_init OK \n"); return ret; }
static int __init nt35410_hvga_panel_init(void) { int ret; struct msm_panel_info *pinfo; lcd_panel_hvga = lcd_panel_probe(); if((LCD_NT35410_CHIMEI_HVGA != lcd_panel_hvga) && \ (msm_fb_detect_client(lCD_DRIVER_NAME)) ) { return 0; } LCD_DEBUG(" lcd_type=%s, lcd_panel_hvga = %d\n", lCD_DRIVER_NAME, lcd_panel_hvga); ret = platform_driver_register(&this_driver); if (ret) return ret; pinfo = &nt35410_hvga_panel_data.panel_info; pinfo->xres = 320; pinfo->yres = 480; pinfo->type = LCDC_PANEL; pinfo->pdest = DISPLAY_1; pinfo->wait_cycle = 0; pinfo->bpp = 18; pinfo->fb_num = 2; pinfo->bl_max = LCD_MAX_BACKLIGHT_LEVEL; pinfo->bl_min = LCD_MIN_BACKLIGHT_LEVEL; if(LCD_NT35410_CHIMEI_HVGA == lcd_panel_hvga) { pinfo->clk_rate = 9660 * 1000; /*for HVGA pixel clk*/ } else { pinfo->clk_rate = 8192000; /*for HVGA pixel clk*/ } pinfo->lcdc.h_back_porch = 18; pinfo->lcdc.h_front_porch = 30; pinfo->lcdc.h_pulse_width = 4; pinfo->lcdc.v_back_porch = 3; pinfo->lcdc.v_front_porch = 55; pinfo->lcdc.v_pulse_width = 3; pinfo->lcdc.border_clr = 0; /* blk */ pinfo->lcdc.underflow_clr = 0xff; /* blue */ pinfo->lcdc.hsync_skew = 0; ret = platform_device_register(&this_device); if (ret) platform_driver_unregister(&this_driver); return ret; }
static int __init mipi_video_simulator_init(void) { int ret; if (msm_fb_detect_client("mipi_video_simulator_vga")) return 0; pinfo.xres = 640; pinfo.yres = 480; pinfo.type = MIPI_VIDEO_PANEL; pinfo.pdest = DISPLAY_1; pinfo.wait_cycle = 0; pinfo.bpp = 24; pinfo.lcdc.h_back_porch = 6; pinfo.lcdc.h_front_porch = 6; pinfo.lcdc.h_pulse_width = 2; pinfo.lcdc.v_back_porch = 6; pinfo.lcdc.v_front_porch = 6; pinfo.lcdc.v_pulse_width = 2; pinfo.lcdc.border_clr = 0; pinfo.lcdc.underflow_clr = 0xff; pinfo.lcdc.hsync_skew = 0; pinfo.bl_max = 15; pinfo.bl_min = 1; pinfo.fb_num = 2; pinfo.mipi.mode = DSI_VIDEO_MODE; pinfo.mipi.pulse_mode_hsa_he = TRUE; pinfo.mipi.hfp_power_stop = TRUE; pinfo.mipi.hbp_power_stop = TRUE; pinfo.mipi.hsa_power_stop = TRUE; pinfo.mipi.eof_bllp_power_stop = TRUE; pinfo.mipi.bllp_power_stop = TRUE; pinfo.mipi.traffic_mode = DSI_NON_BURST_SYNCH_PULSE; pinfo.mipi.dst_format = DSI_VIDEO_DST_FORMAT_RGB888; pinfo.mipi.vc = 0; pinfo.mipi.rgb_swap = DSI_RGB_SWAP_RGB; pinfo.mipi.data_lane0 = TRUE; pinfo.mipi.data_lane1 = TRUE; pinfo.mipi.t_clk_post = 0x03; pinfo.mipi.t_clk_pre = 0x24; pinfo.mipi.stream = 0; pinfo.mipi.mdp_trigger = DSI_CMD_TRIGGER_SW; pinfo.mipi.dma_trigger = DSI_CMD_TRIGGER_SW; pinfo.mipi.frame_rate = 60; pinfo.mipi.dsi_phy_db = &dsi_video_mode_phy_db; ret = mipi_simulator_device_register(&pinfo, MIPI_DSI_PRIM, MIPI_DSI_PANEL_VGA); if (ret) pr_err("%s: failed to register device!\n", __func__); return ret; }
static int __init mipi_dsi_i2c_video_wvga_init(void) { struct platform_disp_info info = { .id = DISPLAY_PRIMARY, .dest = DISPLAY_1 }; return (msm_fb_detect_client("mipi_dsi_video_wvga", &info)) ? 0 : mipi_dsi_i2c_video_wvga_device_register(&info); }
static int __init lcdc_samsung_panel_init(void) { int ret; struct msm_panel_info *pinfo; #ifdef CONFIG_FB_MSM_LCDC_AUTO_DETECT if (msm_fb_detect_client("lcdc_samsung_wsvga")) return 0; #endif ret = platform_driver_register(&this_driver); if (ret) return ret; pinfo = &samsung_panel_data.panel_info; pinfo->xres = 1024; pinfo->yres = 600; #ifdef CONFIG_FB_MSM_LCDC_DSUB /* DSUB (VGA) is on the same bus, this allows us to allocate for the * max resolution of the DSUB display */ pinfo->mode2_xres = 1440; pinfo->mode2_yres = 900; pinfo->mode2_bpp = 16; #else MSM_FB_SINGLE_MODE_PANEL(pinfo); #endif pinfo->type = LCDC_PANEL; pinfo->pdest = DISPLAY_1; pinfo->wait_cycle = 0; pinfo->bpp = 18; pinfo->fb_num = 2; pinfo->clk_rate = 43192000; pinfo->bl_max = PWM_LEVEL; pinfo->bl_min = 1; pinfo->lcdc.h_back_porch = 80; pinfo->lcdc.h_front_porch = 48; pinfo->lcdc.h_pulse_width = 32; pinfo->lcdc.v_back_porch = 4; pinfo->lcdc.v_front_porch = 3; pinfo->lcdc.v_pulse_width = 1; pinfo->lcdc.border_clr = 0; pinfo->lcdc.underflow_clr = 0xff; pinfo->lcdc.hsync_skew = 0; ret = platform_device_register(&this_device); if (ret) platform_driver_unregister(&this_driver); return ret; }
static int __init lvds_frc_fhd_init(void) { int ret; struct msm_panel_info *pinfo; if (msm_fb_detect_client("lvds_frc_fhd")) return 0; ret = platform_driver_register(&this_driver); if (ret) return ret; pinfo = &lvds_frc_panel_data.panel_info; pinfo->xres = 1920; pinfo->yres = 1080; MSM_FB_SINGLE_MODE_PANEL(pinfo); pinfo->type = LVDS_PANEL; pinfo->pdest = DISPLAY_1; pinfo->wait_cycle = 0; pinfo->bpp = 24; pinfo->fb_num = 2; pinfo->clk_rate = 74250000; pinfo->bl_max = 255; pinfo->bl_min = 1; /* * use hdmi 1080p60 setting, for dual channel mode, * horizontal length is half. */ pinfo->lcdc.h_back_porch = 148/2; pinfo->lcdc.h_front_porch = 88/2; pinfo->lcdc.h_pulse_width = 44/2; pinfo->lcdc.v_back_porch = 36; pinfo->lcdc.v_front_porch = 4; pinfo->lcdc.v_pulse_width = 5; pinfo->lcdc.underflow_clr = 0xff; pinfo->lcdc.hsync_skew = 0; pinfo->lvds.channel_mode = LVDS_DUAL_CHANNEL_MODE; pinfo->lcdc.is_sync_active_high = TRUE; /* Set border color, padding only for reducing active display region */ pinfo->lcdc.border_clr = 0x0; pinfo->lcdc.xres_pad = 0; pinfo->lcdc.yres_pad = 0; ret = platform_device_register(&this_device); if (ret) platform_driver_unregister(&this_driver); return ret; }
static int __init lcdc_auo_init(void) { int ret; struct msm_panel_info *pinfo; #ifdef CONFIG_FB_MSM_LCDC_AUTO_DETECT if (msm_fb_detect_client(LCDC_AUO_PANEL_NAME)) { pr_err("%s: detect failed\n", __func__); return 0; } #endif ret = platform_driver_register(&this_driver); if (ret) { pr_err("%s: driver register failed, rc=%d\n", __func__, ret); return ret; } pinfo = &lcdc_auo_panel_data.panel_info; pinfo->xres = 480; pinfo->yres = 800; pinfo->type = LCDC_PANEL; pinfo->pdest = DISPLAY_1; pinfo->wait_cycle = 0; pinfo->bpp = 16; pinfo->fb_num = 2; pinfo->clk_rate = 24576000; pinfo->lcdc.h_back_porch = 21; pinfo->lcdc.h_front_porch = 81; pinfo->lcdc.h_pulse_width = 60; pinfo->lcdc.v_back_porch = 18; pinfo->lcdc.v_front_porch = 27; pinfo->lcdc.v_pulse_width = 60; pinfo->lcdc.border_clr = 0; /* blk */ pinfo->lcdc.underflow_clr = 0xff; /* blue */ pinfo->lcdc.hsync_skew = 0; pinfo->lcdc.border_clr = 0; pinfo->lcdc.underflow_clr = 0xff; pinfo->lcdc.hsync_skew = 0; //pinfo->lcd.hw_vsync_mode = FALSE; //pinfo->lcd.vsync_enable = FALSE; ret = platform_device_register(&this_device); if (ret) { pr_err("%s: device register failed, rc=%d\n", __func__, ret); } return ret; }
static int __init mipi_dummy_lcd_init(void) { mipi_dsi_buf_alloc(&dummy_tx_buf, DSI_BUF_SIZE); mipi_dsi_buf_alloc(&dummy_rx_buf, DSI_BUF_SIZE); #if 0 //def CONFIG_FB_MSM_MIPI_PANEL_DETECT if (msm_fb_detect_client("mipi_video_dummy_wvga")) return platform_driver_register(&this_driver); return 0; #else return platform_driver_register(&this_driver); #endif }
static int __init hx8357a_panel_init(void) { int ret; struct msm_panel_info *pinfo; lcd_panel_qvga = lcd_panel_probe(); if((LCD_HX8357A_BYD_QVGA != lcd_panel_qvga) && \ (LCD_HX8368A_SEIKO_QVGA != lcd_panel_qvga) && \ (msm_fb_detect_client(lCD_DRIVER_NAME)) ) { return 0; } LCD_DEBUG(" lcd_type=%s, lcd_panel_qvga = %d\n", lCD_DRIVER_NAME, lcd_panel_qvga); ret = platform_driver_register(&this_driver); if (ret) return ret; pinfo = &hx8357a_panel_data.panel_info; pinfo->xres = 320; pinfo->yres = 240; pinfo->type = LCDC_PANEL; pinfo->pdest = DISPLAY_1; pinfo->wait_cycle = 0; pinfo->bpp = 18; pinfo->fb_num = 2; pinfo->bl_max = LCD_MAX_BACKLIGHT_LEVEL; pinfo->bl_min = LCD_MIN_BACKLIGHT_LEVEL; pinfo->clk_rate = 6125000; /*for QVGA pixel clk*/ pinfo->lcdc.h_back_porch = 2; pinfo->lcdc.h_front_porch = 2; pinfo->lcdc.h_pulse_width = 2; pinfo->lcdc.v_back_porch = 2; pinfo->lcdc.v_front_porch = 2; pinfo->lcdc.v_pulse_width = 2; pinfo->lcdc.border_clr = 0; /* blk */ pinfo->lcdc.underflow_clr = 0xff; /* blue */ pinfo->lcdc.hsync_skew = 0; ret = platform_device_register(&this_device); if (ret) platform_driver_unregister(&this_driver); return ret; }
static int __init lcdc_hx8357b_panel_init(void) { int ret; struct msm_panel_info *pinfo; lcd_panel_hvga = lcd_panel_probe(); printk(KERN_INFO "%s:lcd_panel_hvga = %d\n", __func__, lcd_panel_hvga); if((LCD_HX8357B_TIANMA_HVGA != lcd_panel_hvga) && \ (msm_fb_detect_client("lcdc_hx8357b_tm")) ) { return 0; } ret = platform_driver_register(&this_driver); printk(KERN_INFO "%s:register.ret = %d\n", __func__, ret); if (ret) return ret; pinfo = &hx8357b_panel_data.panel_info; pinfo->xres = 320; pinfo->yres = 480; pinfo->type = LCDC_PANEL; pinfo->pdest = DISPLAY_1; pinfo->wait_cycle = 0; pinfo->bpp = 18; pinfo->fb_num = 2; /*the pixel clk is different for different Resolution LCD*/ pinfo->clk_rate = 8192000; /*for HVGA pixel clk*/ pinfo->lcdc.h_back_porch = 7; pinfo->lcdc.h_front_porch = 5; pinfo->lcdc.h_pulse_width = 4; pinfo->lcdc.v_back_porch = 2; pinfo->lcdc.v_front_porch = 4; pinfo->lcdc.v_pulse_width = 2; pinfo->lcdc.border_clr = 0; /* blk */ pinfo->lcdc.underflow_clr = 0xff; /* blue */ pinfo->lcdc.hsync_skew = 0; pinfo->bl_max = 255; ret = platform_device_register(&this_device); if (ret) platform_driver_unregister(&this_driver); return ret; }
static int __init lcdc_ili9325_panel_init(void) { int ret; struct msm_panel_info *pinfo; lcd_panel_qvga = lcd_panel_probe(); if((LCD_ILI9325_INNOLUX_QVGA != lcd_panel_qvga) && \ (LCD_ILI9325_BYD_QVGA != lcd_panel_qvga) && \ (LCD_ILI9325_WINTEK_QVGA != lcd_panel_qvga) && \ (msm_fb_detect_client("lcdc_ili9325_qvga")) ) { return 0; } ret = platform_driver_register(&this_driver); if (ret) return ret; pinfo = &ili9325_panel_data.panel_info; pinfo->xres = 240; pinfo->yres = 320; pinfo->type = LCDC_PANEL; pinfo->pdest = DISPLAY_1; pinfo->wait_cycle = 0; pinfo->bpp = 18; pinfo->fb_num = 2; /*the pixel clk is different for different Resolution LCD*/ //pinfo->clk_rate = 24500000; /*for VGA pixel clk*/ pinfo->clk_rate = 6125000; /*for QVGA pixel clk*/ pinfo->lcdc.h_back_porch = 5; pinfo->lcdc.h_front_porch = 5; pinfo->lcdc.h_pulse_width = 5; pinfo->lcdc.v_back_porch = 3; pinfo->lcdc.v_front_porch = 3; pinfo->lcdc.v_pulse_width = 3; pinfo->lcdc.border_clr = 0; /* blk */ pinfo->lcdc.underflow_clr = 0xff; /* blue */ pinfo->lcdc.hsync_skew = 0; pinfo->bl_max = 255; ret = platform_device_register(&this_device); if (ret) platform_driver_unregister(&this_driver); return ret; }
static int __init lcdc_chimei_lvds_panel_init(void) { int ret; struct msm_panel_info *pinfo; #ifdef CONFIG_FB_MSM_MIPI_PANEL_DETECT if (msm_fb_detect_client("lcdc_chimei_lvds_wxga")) return 0; #endif ret = platform_driver_register(&this_driver); if (ret) return ret; pinfo = &chimei_panel_data.panel_info; pinfo->xres = 1366; pinfo->yres = 768; MSM_FB_SINGLE_MODE_PANEL(pinfo); pinfo->type = LCDC_PANEL; pinfo->pdest = DISPLAY_1; pinfo->wait_cycle = 0; pinfo->bpp = 18; pinfo->fb_num = 2; pinfo->clk_rate = 69300000; pinfo->bl_max = PWM_LEVEL; pinfo->bl_min = 1; /* * this panel is operated by de, * vsycn and hsync are ignored */ pinfo->lcdc.h_back_porch = 108; pinfo->lcdc.h_front_porch = 0; pinfo->lcdc.h_pulse_width = 1; pinfo->lcdc.v_back_porch = 0; pinfo->lcdc.v_front_porch = 16; pinfo->lcdc.v_pulse_width = 1; pinfo->lcdc.border_clr = 0; pinfo->lcdc.underflow_clr = 0xff; pinfo->lcdc.hsync_skew = 0; ret = platform_device_register(&this_device); if (ret) platform_driver_unregister(&this_driver); return ret; }
static int __init mddi_toshiba_wvga_pt_init(void) { int ret; #ifdef CONFIG_FB_MSM_MDDI_AUTO_DETECT uint id; ret = msm_fb_detect_client("mddi_toshiba_wvga_pt"); if (ret == -ENODEV) return 0; if (ret) { id = mddi_get_client_id(); if (id != 0xd2638722) return 0; } #endif pinfo.xres = 480; pinfo.yres = 800; MSM_FB_SINGLE_MODE_PANEL(&pinfo); pinfo.type = MDDI_PANEL; pinfo.pdest = DISPLAY_1; pinfo.mddi.vdopkt = MDDI_DEFAULT_PRIM_PIX_ATTR; pinfo.wait_cycle = 0; pinfo.bpp = 18; pinfo.lcd.vsync_enable = TRUE; pinfo.lcd.refx100 = 6102; /* adjust refx100 to prevent tearing */ pinfo.mddi.is_type1 = TRUE; pinfo.lcd.v_back_porch = 8; /* vsw=10 + vbp = 8 */ pinfo.lcd.v_front_porch = 2; pinfo.lcd.v_pulse_width = 10; pinfo.lcd.hw_vsync_mode = FALSE; pinfo.lcd.vsync_notifier_period = (1 * HZ); pinfo.bl_max = 15; pinfo.bl_min = 1; pinfo.clk_rate = 222750000; pinfo.clk_min = 200000000; pinfo.clk_max = 240000000; pinfo.fb_num = 2; ret = mddi_toshiba_device_register(&pinfo, TOSHIBA_VGA_PRIM, LCD_TOSHIBA_2P4_WVGA_PT); if (ret) printk(KERN_ERR "%s: failed to register device!\n", __func__); return ret; }
static int __init lvds_chimei_wxga_init(void) { int ret; struct msm_panel_info *pinfo; if (msm_fb_detect_client("lvds_chimei_wxga")) return 0; ret = platform_driver_register(&this_driver); if (ret) return ret; pinfo = &lvds_chimei_panel_data.panel_info; pinfo->xres = 1366; pinfo->yres = 768; MSM_FB_SINGLE_MODE_PANEL(pinfo); pinfo->type = LVDS_PANEL; pinfo->pdest = DISPLAY_1; pinfo->wait_cycle = 0; pinfo->bpp = 24; pinfo->fb_num = 2; pinfo->clk_rate = 75000000; pinfo->bl_max = 255; pinfo->bl_min = 1; pinfo->lcdc.h_back_porch = 0; pinfo->lcdc.h_front_porch = 194; pinfo->lcdc.h_pulse_width = 40; pinfo->lcdc.v_back_porch = 0; pinfo->lcdc.v_front_porch = 38; pinfo->lcdc.v_pulse_width = 20; pinfo->lcdc.underflow_clr = 0xff; pinfo->lcdc.hsync_skew = 0; pinfo->lvds.channel_mode = LVDS_SINGLE_CHANNEL_MODE; pinfo->lcdc.border_clr = 0x0; pinfo->lcdc.xres_pad = 0; pinfo->lcdc.yres_pad = 0; ret = platform_device_register(&this_device); if (ret) platform_driver_unregister(&this_driver); return ret; }
static int __init amoled_init(void) { int ret; struct msm_panel_info *pinfo; if (msm_fb_detect_client("lcdc_s6e63m0_wvga")) return 0; ret = platform_driver_register(&this_driver); if (ret) { pr_err("%s: driver register failed, rc=%d\n", __func__, ret); return ret; } pinfo = &amoled_panel_data.panel_info; pinfo->xres = 480; pinfo->yres = 800; pinfo->type = LCDC_PANEL; pinfo->pdest = DISPLAY_1; pinfo->wait_cycle = 0; pinfo->bpp = 18; pinfo->fb_num = 2; pinfo->clk_rate = 24576000; pinfo->bl_max = 255; pinfo->bl_min = 1; pinfo->lcdc.h_back_porch = 14; pinfo->lcdc.h_front_porch = 16; pinfo->lcdc.h_pulse_width = 2; pinfo->lcdc.v_back_porch = 1; pinfo->lcdc.v_front_porch = 28; pinfo->lcdc.v_pulse_width = 2; pinfo->lcdc.border_clr = 0; pinfo->lcdc.underflow_clr = 0xff; pinfo->lcdc.hsync_skew = 0; ret = platform_device_register(&this_device); if (ret) { printk(KERN_ERR "%s not able to register the device\n", __func__); platform_driver_unregister(&this_driver); } return ret; }
static int __init lcdc_qrdc_init(void) { int ret; struct msm_panel_info *pinfo; if (msm_fb_detect_client("lcdc_qrdc")) return 0; ret = platform_driver_register(&this_driver); if (ret) { printk(KERN_ERR "%s not able to register the driver\n", __func__); return ret; } pinfo = &qrdc_panel_data.panel_info; pinfo->xres = 1366; pinfo->yres = 768; pinfo->type = LCDC_PANEL; pinfo->pdest = DISPLAY_1; pinfo->wait_cycle = 0; pinfo->bpp = 24; pinfo->fb_num = 2; pinfo->clk_rate = 43192000; pinfo->bl_max = 255; pinfo->bl_min = 1; pinfo->lcdc.h_back_porch = 120; pinfo->lcdc.h_front_porch = 20; pinfo->lcdc.h_pulse_width = 40; pinfo->lcdc.v_back_porch = 25; pinfo->lcdc.v_front_porch = 1; pinfo->lcdc.v_pulse_width = 7; pinfo->lcdc.border_clr = 0; /* blk */ pinfo->lcdc.underflow_clr = 0xff; /* blue */ pinfo->lcdc.hsync_skew = 0; ret = platform_device_register(&this_device); if (ret) { printk(KERN_ERR "%s not able to register the device\n", __func__); platform_driver_unregister(&this_driver); } return ret; }
static int __init mddi_hitachi_wvga_pt_init(void) { int ret; struct msm_panel_info pinfo; ret = msm_fb_detect_client("mddi_hitachi_wvga_pt"); if (ret) return 0; pinfo.xres = 480; pinfo.yres = 800; pinfo.type = MDDI_PANEL; pinfo.pdest = DISPLAY_1; pinfo.mddi.vdopkt = MDDI_DEFAULT_PRIM_PIX_ATTR; pinfo.wait_cycle = 0; pinfo.bpp = 16; pinfo.lcd.vsync_enable = TRUE; pinfo.lcd.hw_vsync_mode = TRUE; pinfo.lcd.refx100 = 6000; pinfo.lcd.v_back_porch = 2; pinfo.lcd.v_front_porch = 8; pinfo.lcd.v_pulse_width = 13; /* Backlight level for LED driver's spec */ pinfo.bl_max = 0x64; /* max 0x64 */ pinfo.bl_min = 0x00; /* min 0x00 */ /* MDDI Clock */ pinfo.clk_rate = 192000000; pinfo.clk_min = 190000000; pinfo.clk_max = 200000000; pinfo.fb_num = 2; ret = mddi_ta8851_device_register(&pinfo, 1, 1); if (ret) printk(KERN_ERR "%s: failed to register device!\n", __func__); return ret; }