Example #1
0
int usb_phy_gen_create_phy(struct device *dev, struct usb_phy_generic *nop,
		struct usb_phy_generic_platform_data *pdata)
{
	enum usb_phy_type type = USB_PHY_TYPE_USB2;
	int err;

	u32 clk_rate = 0;
	bool needs_vcc = false;

	nop->reset_active_low = true;	/* default behaviour */

	if (dev->of_node) {
		struct device_node *node = dev->of_node;
		enum of_gpio_flags flags = 0;

		if (of_property_read_u32(node, "clock-frequency", &clk_rate))
			clk_rate = 0;

		needs_vcc = of_property_read_bool(node, "vcc-supply");
		nop->gpio_reset = of_get_named_gpio_flags(node, "reset-gpios",
								0, &flags);
		if (nop->gpio_reset == -EPROBE_DEFER)
			return -EPROBE_DEFER;

		nop->reset_active_low = flags & OF_GPIO_ACTIVE_LOW;

	} else if (pdata) {
		type = pdata->type;
		clk_rate = pdata->clk_rate;
		needs_vcc = pdata->needs_vcc;
		nop->gpio_reset = pdata->gpio_reset;
	} else {
		nop->gpio_reset = -1;
	}

	nop->phy.otg = devm_kzalloc(dev, sizeof(*nop->phy.otg),
			GFP_KERNEL);
	if (!nop->phy.otg)
		return -ENOMEM;

	nop->clk = devm_clk_get(dev, "main_clk");
	if (IS_ERR(nop->clk)) {
		dev_dbg(dev, "Can't get phy clock: %ld\n",
					PTR_ERR(nop->clk));
	}

	if (!IS_ERR(nop->clk) && clk_rate) {
		err = clk_set_rate(nop->clk, clk_rate);
		if (err) {
			dev_err(dev, "Error setting clock rate\n");
			return err;
		}
	}

	nop->vcc = devm_regulator_get(dev, "vcc");
	if (IS_ERR(nop->vcc)) {
		dev_dbg(dev, "Error getting vcc regulator: %ld\n",
					PTR_ERR(nop->vcc));
		if (needs_vcc)
			return -EPROBE_DEFER;
	}

	if (gpio_is_valid(nop->gpio_reset)) {
		unsigned long gpio_flags;

		/* Assert RESET */
		if (nop->reset_active_low)
			gpio_flags = GPIOF_OUT_INIT_LOW;
		else
			gpio_flags = GPIOF_OUT_INIT_HIGH;

		err = devm_gpio_request_one(dev, nop->gpio_reset,
						gpio_flags, dev_name(dev));
		if (err) {
			dev_err(dev, "Error requesting RESET GPIO %d\n",
					nop->gpio_reset);
			return err;
		}
	}

	nop->dev		= dev;
	nop->phy.dev		= nop->dev;
	nop->phy.label		= "nop-xceiv";
	nop->phy.set_suspend	= nop_set_suspend;
	nop->phy.state		= OTG_STATE_UNDEFINED;
	nop->phy.type		= type;

	nop->phy.otg->phy		= &nop->phy;
	nop->phy.otg->set_host		= nop_set_host;
	nop->phy.otg->set_peripheral	= nop_set_peripheral;

	return 0;
}
static int omap_abe_probe(struct platform_device *pdev)
{
	struct omap_abe_twl6040_data *pdata = dev_get_platdata(&pdev->dev);
	struct device_node *node = pdev->dev.of_node;
	struct snd_soc_card *card = &omap_abe_card;
	struct abe_twl6040 *priv;
	int num_links = 0;
	int ret = 0;

	card->dev = &pdev->dev;

	priv = devm_kzalloc(&pdev->dev, sizeof(struct abe_twl6040), GFP_KERNEL);
	if (priv == NULL)
		return -ENOMEM;

	priv->dmic_codec_dev = ERR_PTR(-EINVAL);

	if (node) {
		struct device_node *dai_node;

		if (snd_soc_of_parse_card_name(card, "ti,model")) {
			dev_err(&pdev->dev, "Card name is not provided\n");
			return -ENODEV;
		}

		ret = snd_soc_of_parse_audio_routing(card,
						"ti,audio-routing");
		if (ret) {
			dev_err(&pdev->dev,
				"Error while parsing DAPM routing\n");
			return ret;
		}

		dai_node = of_parse_phandle(node, "ti,mcpdm", 0);
		if (!dai_node) {
			dev_err(&pdev->dev, "McPDM node is not provided\n");
			return -EINVAL;
		}
		abe_twl6040_dai_links[0].cpu_dai_name  = NULL;
		abe_twl6040_dai_links[0].cpu_of_node = dai_node;

		dai_node = of_parse_phandle(node, "ti,dmic", 0);
		if (dai_node) {
			num_links = 2;
			abe_twl6040_dai_links[1].cpu_dai_name  = NULL;
			abe_twl6040_dai_links[1].cpu_of_node = dai_node;

			priv->dmic_codec_dev = platform_device_register_simple(
						"dmic-codec", -1, NULL, 0);
			if (IS_ERR(priv->dmic_codec_dev)) {
				dev_err(&pdev->dev,
					"Can't instantiate dmic-codec\n");
				return PTR_ERR(priv->dmic_codec_dev);
			}
		} else {
			num_links = 1;
		}

		priv->jack_detection = of_property_read_bool(node,
							   "ti,jack-detection");
		of_property_read_u32(node, "ti,mclk-freq",
				     &priv->mclk_freq);
		if (!priv->mclk_freq) {
			dev_err(&pdev->dev, "MCLK frequency not provided\n");
			ret = -EINVAL;
			goto err_unregister;
		}

		omap_abe_card.fully_routed = 1;
	} else if (pdata) {
		if (pdata->card_name) {
			card->name = pdata->card_name;
		} else {
			dev_err(&pdev->dev, "Card name is not provided\n");
			return -ENODEV;
		}

		if (pdata->has_dmic)
			num_links = 2;
		else
			num_links = 1;

		priv->jack_detection = pdata->jack_detection;
		priv->mclk_freq = pdata->mclk_freq;
	} else {
		dev_err(&pdev->dev, "Missing pdata\n");
		return -ENODEV;
	}


	if (!priv->mclk_freq) {
		dev_err(&pdev->dev, "MCLK frequency missing\n");
		ret = -ENODEV;
		goto err_unregister;
	}

	card->dai_link = abe_twl6040_dai_links;
	card->num_links = num_links;

	snd_soc_card_set_drvdata(card, priv);

	ret = snd_soc_register_card(card);
	if (ret) {
		dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n",
			ret);
		goto err_unregister;
	}

	return 0;

err_unregister:
	if (!IS_ERR(priv->dmic_codec_dev))
		platform_device_unregister(priv->dmic_codec_dev);

	return ret;
}
Example #3
0
static int probe_vdd_rstr(struct device_node *node,
		struct msm_thermal_data *data, struct platform_device *pdev)
{
	int ret = 0;
	int i = 0;
	int arr_size;
	char *key = NULL;
	struct device_node *child_node = NULL;

	rails = NULL;

	key = "qcom,vdd-restriction-temp";
	ret = of_property_read_u32(node, key, &data->vdd_rstr_temp_degC);
	if (ret)
		goto read_node_fail;

	key = "qcom,vdd-restriction-temp-hysteresis";
	ret = of_property_read_u32(node, key, &data->vdd_rstr_temp_hyst_degC);
	if (ret)
		goto read_node_fail;

	for_each_child_of_node(node, child_node) {
		rails_cnt++;
	}

	if (rails_cnt == 0)
		goto read_node_fail;
	if (rails_cnt >= MAX_RAILS) {
		pr_err("%s: Too many rails.\n", __func__);
		return -EFAULT;
	}

	rails = kzalloc(sizeof(struct rail) * rails_cnt,
				GFP_KERNEL);
	if (!rails) {
		pr_err("%s: Fail to allocate memory for rails.\n", __func__);
		return -ENOMEM;
	}

	i = 0;
	for_each_child_of_node(node, child_node) {
		key = "qcom,vdd-rstr-reg";
		ret = of_property_read_string(child_node, key, &rails[i].name);
		if (ret)
			goto read_node_fail;

		key = "qcom,levels";
		if (!of_get_property(child_node, key, &arr_size))
			goto read_node_fail;
		rails[i].num_levels = arr_size/sizeof(__be32);
		if (rails[i].num_levels >
			sizeof(rails[i].levels)/sizeof(uint32_t)) {
			pr_err("%s: Array size too large\n", __func__);
			return -EFAULT;
		}
		ret = of_property_read_u32_array(child_node, key,
				rails[i].levels, rails[i].num_levels);
		if (ret)
			goto read_node_fail;

		key = "qcom,freq-req";
		rails[i].freq_req = of_property_read_bool(child_node, key);
		if (rails[i].freq_req)
			rails[i].min_level = MSM_CPUFREQ_NO_LIMIT;
		else {
			key = "qcom,min-level";
			ret = of_property_read_u32(child_node, key,
				&rails[i].min_level);
			if (ret)
				goto read_node_fail;
		}

		rails[i].curr_level = 0;
		rails[i].reg = NULL;
		i++;
	}
static int sirfsoc_uart_probe(struct platform_device *pdev)
{
	struct sirfsoc_uart_port *sirfport;
	struct uart_port *port;
	struct resource *res;
	int ret;
	const struct of_device_id *match;

	match = of_match_node(sirfsoc_uart_ids, pdev->dev.of_node);
	if (of_property_read_u32(pdev->dev.of_node, "cell-index", &pdev->id)) {
		dev_err(&pdev->dev,
			"Unable to find cell-index in uart node.\n");
		ret = -EFAULT;
		goto err;
	}
	if (of_device_is_compatible(pdev->dev.of_node, "sirf,prima2-usp-uart"))
		pdev->id += ((struct sirfsoc_uart_register *)
				match->data)->uart_param.register_uart_nr;
	sirfport = &sirfsoc_uart_ports[pdev->id];
	port = &sirfport->port;
	port->dev = &pdev->dev;
	port->private_data = sirfport;
	sirfport->uart_reg = (struct sirfsoc_uart_register *)match->data;

	sirfport->hw_flow_ctrl = of_property_read_bool(pdev->dev.of_node,
		"sirf,uart-has-rtscts");
	if (of_device_is_compatible(pdev->dev.of_node, "sirf,prima2-uart")) {
		sirfport->uart_reg->uart_type = SIRF_REAL_UART;
		if (of_property_read_u32(pdev->dev.of_node,
				"sirf,uart-dma-rx-channel",
				&sirfport->rx_dma_no))
			sirfport->rx_dma_no = UNVALID_DMA_CHAN;
		if (of_property_read_u32(pdev->dev.of_node,
				"sirf,uart-dma-tx-channel",
				&sirfport->tx_dma_no))
			sirfport->tx_dma_no = UNVALID_DMA_CHAN;
	}
	if (of_device_is_compatible(pdev->dev.of_node, "sirf,prima2-usp-uart")) {
		sirfport->uart_reg->uart_type =	SIRF_USP_UART;
		if (of_property_read_u32(pdev->dev.of_node,
				"sirf,usp-dma-rx-channel",
				&sirfport->rx_dma_no))
			sirfport->rx_dma_no = UNVALID_DMA_CHAN;
		if (of_property_read_u32(pdev->dev.of_node,
				"sirf,usp-dma-tx-channel",
				&sirfport->tx_dma_no))
			sirfport->tx_dma_no = UNVALID_DMA_CHAN;
		if (!sirfport->hw_flow_ctrl)
			goto usp_no_flow_control;
		if (of_find_property(pdev->dev.of_node, "cts-gpios", NULL))
			sirfport->cts_gpio = of_get_named_gpio(
					pdev->dev.of_node, "cts-gpios", 0);
		else
			sirfport->cts_gpio = -1;
		if (of_find_property(pdev->dev.of_node, "rts-gpios", NULL))
			sirfport->rts_gpio = of_get_named_gpio(
					pdev->dev.of_node, "rts-gpios", 0);
		else
			sirfport->rts_gpio = -1;

		if ((!gpio_is_valid(sirfport->cts_gpio) ||
			 !gpio_is_valid(sirfport->rts_gpio))) {
			ret = -EINVAL;
			dev_err(&pdev->dev,
				"Usp flow control must have cts and rts gpio");
			goto err;
		}
		ret = devm_gpio_request(&pdev->dev, sirfport->cts_gpio,
				"usp-cts-gpio");
		if (ret) {
			dev_err(&pdev->dev, "Unable request cts gpio");
			goto err;
		}
		gpio_direction_input(sirfport->cts_gpio);
		ret = devm_gpio_request(&pdev->dev, sirfport->rts_gpio,
				"usp-rts-gpio");
		if (ret) {
			dev_err(&pdev->dev, "Unable request rts gpio");
			goto err;
		}
		gpio_direction_output(sirfport->rts_gpio, 1);
	}
usp_no_flow_control:
	if (of_device_is_compatible(pdev->dev.of_node, "sirf,marco-uart"))
		sirfport->is_marco = true;

	if (of_property_read_u32(pdev->dev.of_node,
			"fifosize",
			&port->fifosize)) {
		dev_err(&pdev->dev,
			"Unable to find fifosize in uart node.\n");
		ret = -EFAULT;
		goto err;
	}

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (res == NULL) {
		dev_err(&pdev->dev, "Insufficient resources.\n");
		ret = -EFAULT;
		goto err;
	}
	spin_lock_init(&sirfport->rx_lock);
	spin_lock_init(&sirfport->tx_lock);
	tasklet_init(&sirfport->rx_dma_complete_tasklet,
			sirfsoc_uart_rx_dma_complete_tl, (unsigned long)sirfport);
	tasklet_init(&sirfport->rx_tmo_process_tasklet,
			sirfsoc_rx_tmo_process_tl, (unsigned long)sirfport);
	port->mapbase = res->start;
	port->membase = devm_ioremap(&pdev->dev, res->start, resource_size(res));
	if (!port->membase) {
		dev_err(&pdev->dev, "Cannot remap resource.\n");
		ret = -ENOMEM;
		goto err;
	}
	res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
	if (res == NULL) {
		dev_err(&pdev->dev, "Insufficient resources.\n");
		ret = -EFAULT;
		goto err;
	}
	port->irq = res->start;

	sirfport->clk = clk_get(&pdev->dev, NULL);
	if (IS_ERR(sirfport->clk)) {
		ret = PTR_ERR(sirfport->clk);
		goto err;
	}
	clk_prepare_enable(sirfport->clk);
	port->uartclk = clk_get_rate(sirfport->clk);

	port->ops = &sirfsoc_uart_ops;
	spin_lock_init(&port->lock);

	platform_set_drvdata(pdev, sirfport);
	ret = uart_add_one_port(&sirfsoc_uart_drv, port);
	if (ret != 0) {
		dev_err(&pdev->dev, "Cannot add UART port(%d).\n", pdev->id);
		goto port_err;
	}

	return 0;

port_err:
	clk_disable_unprepare(sirfport->clk);
	clk_put(sirfport->clk);
err:
	return ret;
}
Example #5
0
int dsi_panel_device_register(struct platform_device *pdev,
			      struct mdss_panel_common_pdata *panel_data)
{
	struct mipi_panel_info *mipi;
	int rc;
	u8 lanes = 0, bpp;
	u32 h_period, v_period, dsi_pclk_rate;
	struct mdss_dsi_ctrl_pdata *ctrl_pdata;
	struct device_node *dsi_ctrl_np = NULL;
	struct platform_device *ctrl_pdev = NULL;
	bool broadcast;
	bool cont_splash_enabled = false;

	h_period = ((panel_data->panel_info.lcdc.h_pulse_width)
			+ (panel_data->panel_info.lcdc.h_back_porch)
			+ (panel_data->panel_info.xres)
			+ (panel_data->panel_info.lcdc.h_front_porch));

	v_period = ((panel_data->panel_info.lcdc.v_pulse_width)
			+ (panel_data->panel_info.lcdc.v_back_porch)
			+ (panel_data->panel_info.yres)
			+ (panel_data->panel_info.lcdc.v_front_porch));

	mipi  = &panel_data->panel_info.mipi;

	panel_data->panel_info.type =
		((mipi->mode == DSI_VIDEO_MODE)
			? MIPI_VIDEO_PANEL : MIPI_CMD_PANEL);

	if (mipi->data_lane3)
		lanes += 1;
	if (mipi->data_lane2)
		lanes += 1;
	if (mipi->data_lane1)
		lanes += 1;
	if (mipi->data_lane0)
		lanes += 1;


	if ((mipi->dst_format == DSI_CMD_DST_FORMAT_RGB888)
	    || (mipi->dst_format == DSI_VIDEO_DST_FORMAT_RGB888)
	    || (mipi->dst_format == DSI_VIDEO_DST_FORMAT_RGB666_LOOSE))
		bpp = 3;
	else if ((mipi->dst_format == DSI_CMD_DST_FORMAT_RGB565)
		 || (mipi->dst_format == DSI_VIDEO_DST_FORMAT_RGB565))
		bpp = 2;
	else
		bpp = 3;		/* Default format set to RGB888 */

	if (!panel_data->panel_info.clk_rate) {
		h_period += panel_data->panel_info.lcdc.xres_pad;
		v_period += panel_data->panel_info.lcdc.yres_pad;

		if (lanes > 0) {
			panel_data->panel_info.clk_rate =
			((h_period * v_period * (mipi->frame_rate) * bpp * 8)
			   / lanes);
		} else {
			pr_err("%s: forcing mdss_dsi lanes to 1\n", __func__);
			panel_data->panel_info.clk_rate =
				(h_period * v_period
					 * (mipi->frame_rate) * bpp * 8);
		}
	}
	pll_divider_config.clk_rate = panel_data->panel_info.clk_rate;

	rc = mdss_dsi_clk_div_config(bpp, lanes, &dsi_pclk_rate);
	if (rc) {
		pr_err("%s: unable to initialize the clk dividers\n", __func__);
		return rc;
	}

	if ((dsi_pclk_rate < 3300000) || (dsi_pclk_rate > 250000000))
		dsi_pclk_rate = 35000000;
	mipi->dsi_pclk_rate = dsi_pclk_rate;

	dsi_ctrl_np = of_parse_phandle(pdev->dev.of_node,
				       "qcom,dsi-ctrl-phandle", 0);
	if (!dsi_ctrl_np) {
		pr_err("%s: Dsi controller node not initialized\n", __func__);
		return -EPROBE_DEFER;
	}

	ctrl_pdev = of_find_device_by_node(dsi_ctrl_np);
	ctrl_pdata = platform_get_drvdata(ctrl_pdev);
	if (!ctrl_pdata) {
		pr_err("%s: no dsi ctrl driver data\n", __func__);
		return -EINVAL;
	}

	rc = mdss_dsi_regulator_init(ctrl_pdev);
	if (rc) {
		dev_err(&pdev->dev,
			"%s: failed to init regulator, rc=%d\n",
						__func__, rc);
		return rc;
	}

	broadcast = of_property_read_bool(pdev->dev.of_node,
					  "qcom,mdss-pan-broadcast-mode");
	if (broadcast)
		ctrl_pdata->shared_pdata.broadcast_enable = 1;

	ctrl_pdata->disp_en_gpio = of_get_named_gpio(pdev->dev.of_node,
						     "qcom,enable-gpio", 0);
	if (!gpio_is_valid(ctrl_pdata->disp_en_gpio)) {
		pr_err("%s:%d, Disp_en gpio not specified\n",
						__func__, __LINE__);
	} else {
		rc = gpio_request(ctrl_pdata->disp_en_gpio, "disp_enable");
		if (rc) {
			pr_err("request reset gpio failed, rc=%d\n",
			       rc);
			gpio_free(ctrl_pdata->disp_en_gpio);
			return -ENODEV;
		}
	}

	ctrl_pdata->disp_te_gpio = of_get_named_gpio(pdev->dev.of_node,
						     "qcom,te-gpio", 0);
	if (!gpio_is_valid(ctrl_pdata->disp_te_gpio)) {
		pr_err("%s:%d, Disp_te gpio not specified\n",
						__func__, __LINE__);
	} else {
		rc = gpio_request(ctrl_pdata->disp_te_gpio, "disp_te");
		if (rc) {
			pr_err("request TE gpio failed, rc=%d\n",
			       rc);
			gpio_free(ctrl_pdata->disp_te_gpio);
			return -ENODEV;
		}
		rc = gpio_tlmm_config(GPIO_CFG(
				ctrl_pdata->disp_te_gpio, 1,
				GPIO_CFG_INPUT,
				GPIO_CFG_PULL_DOWN,
				GPIO_CFG_2MA),
				GPIO_CFG_ENABLE);

		if (rc) {
			pr_err("%s: unable to config tlmm = %d\n",
				__func__, ctrl_pdata->disp_te_gpio);
			gpio_free(ctrl_pdata->disp_te_gpio);
			return -ENODEV;
		}

		rc = gpio_direction_input(ctrl_pdata->disp_te_gpio);
		if (rc) {
			pr_err("set_direction for disp_en gpio failed, rc=%d\n",
			       rc);
			gpio_free(ctrl_pdata->disp_te_gpio);
			return -ENODEV;
		}
		pr_debug("%s: te_gpio=%d\n", __func__,
					ctrl_pdata->disp_te_gpio);
	}


	ctrl_pdata->rst_gpio = of_get_named_gpio(pdev->dev.of_node,
						 "qcom,rst-gpio", 0);
	if (!gpio_is_valid(ctrl_pdata->rst_gpio)) {
		pr_err("%s:%d, reset gpio not specified\n",
						__func__, __LINE__);
	} else {
		rc = gpio_request(ctrl_pdata->rst_gpio, "disp_rst_n");
		if (rc) {
			pr_err("request reset gpio failed, rc=%d\n",
				rc);
			gpio_free(ctrl_pdata->rst_gpio);
			if (gpio_is_valid(ctrl_pdata->disp_en_gpio))
				gpio_free(ctrl_pdata->disp_en_gpio);
			return -ENODEV;
		}
	}

	if (mdss_dsi_clk_init(ctrl_pdev, ctrl_pdata)) {
		pr_err("%s: unable to initialize Dsi ctrl clks\n", __func__);
		return -EPERM;
	}

	if (mdss_dsi_retrieve_ctrl_resources(ctrl_pdev,
					     panel_data->panel_info.pdest,
					     ctrl_pdata)) {
		pr_err("%s: unable to get Dsi controller res\n", __func__);
		return -EPERM;
	}

	ctrl_pdata->panel_data.event_handler = mdss_dsi_event_handler;

	ctrl_pdata->on_cmds = panel_data->on_cmds;
	ctrl_pdata->off_cmds = panel_data->off_cmds;

	memcpy(&((ctrl_pdata->panel_data).panel_info),
				&(panel_data->panel_info),
				       sizeof(struct mdss_panel_info));

	ctrl_pdata->panel_data.set_backlight = panel_data->bl_fnc;
	ctrl_pdata->bklt_ctrl = panel_data->panel_info.bklt_ctrl;
	ctrl_pdata->pwm_pmic_gpio = panel_data->panel_info.pwm_pmic_gpio;
	ctrl_pdata->pwm_period = panel_data->panel_info.pwm_period;
	ctrl_pdata->pwm_lpg_chan = panel_data->panel_info.pwm_lpg_chan;
	ctrl_pdata->bklt_max = panel_data->panel_info.bl_max;

	if (ctrl_pdata->bklt_ctrl == BL_PWM)
		mdss_dsi_panel_pwm_cfg(ctrl_pdata);

	mdss_dsi_ctrl_init(ctrl_pdata);
	/*
	 * register in mdp driver
	 */

	ctrl_pdata->pclk_rate = dsi_pclk_rate;
	ctrl_pdata->byte_clk_rate = panel_data->panel_info.clk_rate / 8;
	pr_debug("%s: pclk=%d, bclk=%d\n", __func__,
			ctrl_pdata->pclk_rate, ctrl_pdata->byte_clk_rate);

	ctrl_pdata->ctrl_state = CTRL_STATE_UNKNOWN;
	cont_splash_enabled = of_property_read_bool(pdev->dev.of_node,
			"qcom,cont-splash-enabled");
	if (!cont_splash_enabled) {
		pr_info("%s:%d Continuous splash flag not found.\n",
				__func__, __LINE__);
		ctrl_pdata->panel_data.panel_info.cont_splash_enabled = 0;
		ctrl_pdata->panel_data.panel_info.panel_power_on = 0;
	} else {
		pr_info("%s:%d Continuous splash flag enabled.\n",
				__func__, __LINE__);

		ctrl_pdata->panel_data.panel_info.cont_splash_enabled = 1;
		ctrl_pdata->panel_data.panel_info.panel_power_on = 1;
		rc = mdss_dsi_panel_power_on(&(ctrl_pdata->panel_data), 1);
		if (rc) {
			pr_err("%s: Panel power on failed\n", __func__);
			return rc;
		}

		mdss_dsi_clk_ctrl(ctrl_pdata, 1);
		ctrl_pdata->ctrl_state |=
			(CTRL_STATE_PANEL_INIT | CTRL_STATE_MDP_ACTIVE);
	}

	rc = mdss_register_panel(ctrl_pdev, &(ctrl_pdata->panel_data));
	if (rc) {
		dev_err(&pdev->dev, "unable to register MIPI DSI panel\n");
		if (ctrl_pdata->rst_gpio)
			gpio_free(ctrl_pdata->rst_gpio);
		if (gpio_is_valid(ctrl_pdata->disp_en_gpio))
			gpio_free(ctrl_pdata->disp_en_gpio);
		return rc;
	}

	ctrl_pdata->on = panel_data->on;
	ctrl_pdata->off = panel_data->off;

	if (panel_data->panel_info.pdest == DISPLAY_1) {
		mdss_debug_register_base("dsi0",
			ctrl_pdata->ctrl_base, ctrl_pdata->reg_size);
		ctrl_pdata->ndx = 0;
	} else {
		mdss_debug_register_base("dsi1",
			ctrl_pdata->ctrl_base, ctrl_pdata->reg_size);
		ctrl_pdata->ndx = 1;
	}

	pr_debug("%s: Panal data initialized\n", __func__);
	return 0;
}
static int mdm9x35_setup_hw(struct mdm_ctrl *mdm,
					struct esoc_clink_ops const *ops,
					struct platform_device *pdev)
{
	int ret;
	struct device_node *node;
	struct esoc_clink *esoc;

	pr_info("[MIF] %s\n", __func__);
	mdm->dev = &pdev->dev;
	node = pdev->dev.of_node;
	esoc = devm_kzalloc(mdm->dev, sizeof(*esoc), GFP_KERNEL);
	if (IS_ERR(esoc)) {
		dev_err(mdm->dev, "cannot allocate esoc device\n");
		return PTR_ERR(esoc);
	}
	mdm->mdm_queue = alloc_workqueue("mdm_queue", 0, 0);
	if (!mdm->mdm_queue) {
		dev_err(mdm->dev, "could not create mdm_queue\n");
		return -ENOMEM;
	}
	mdm->irq_mask = 0;
	mdm->ready = false;
	ret = mdm_dt_parse_gpios(mdm);
	if (ret)
		return ret;
	dev_info(mdm->dev, "parsing gpio done\n");
	ret = mdm_configure_ipc(mdm, pdev);
	if (ret)
		return ret;
	dev_info(mdm->dev, "ipc configure done\n");
	esoc->name = MDM9x35_LABEL;
	mdm->dual_interface = of_property_read_bool(node,
						"qcom,mdm-dual-link");
	/* Check if link gpio is available */
	if (gpio_is_valid(MDM_GPIO(mdm, MDM_LINK_DETECT))) {
		if (mdm->dual_interface) {
			if (gpio_get_value(MDM_GPIO(mdm, MDM_LINK_DETECT)))
				esoc->link_name = MDM9x35_DUAL_LINK;
			else
				esoc->link_name = MDM9x35_PCIE;
		} else {
			if (gpio_get_value(MDM_GPIO(mdm, MDM_LINK_DETECT)))
				esoc->link_name = MDM9x35_HSIC;
			else
				esoc->link_name = MDM9x35_PCIE;
		}
	} else if (mdm->dual_interface)
		esoc->link_name = MDM9x35_DUAL_LINK;
	else
		esoc->link_name = MDM9x35_HSIC;

	esoc->link_name = MDM9x35_DUAL_LINK;

	esoc->clink_ops = ops;
	esoc->parent = mdm->dev;
	esoc->owner = THIS_MODULE;
	esoc->np = pdev->dev.of_node;
	set_esoc_clink_data(esoc, mdm);
	ret = esoc_clink_register(esoc);
	if (ret) {
		dev_err(mdm->dev, "esoc registration failed\n");
		return ret;
	}
	dev_info(mdm->dev, "esoc registration done\n");
	init_completion(&mdm->debug_done);
	INIT_WORK(&mdm->mdm_status_work, mdm_status_fn);
	INIT_WORK(&mdm->restart_reason_work, mdm_get_restart_reason);
	INIT_DELAYED_WORK(&mdm->mdm2ap_status_check_work, mdm2ap_status_check);
	mdm->get_restart_reason = false;
	mdm->cp_crash_occurrence= false;
	mdm->debug_fail = false;
	mdm->esoc = esoc;
	mdm->init = 0;
	g_mdm = mdm;
	return 0;
}
Example #7
0
static int lm3630a_parse_dt(struct device_node *np,
		struct lm3630a_chip *pchip)
{
	struct lm3630a_platform_data *pdata = pchip->pdata;
	int rc;
	u32 tmp;
	const char *st = NULL;

	rc = of_get_named_gpio(np, "ti,irq-gpio", 0);
	if (!gpio_is_valid(rc))
		dev_warn(pchip->dev, "irq gpio not specified\n");
	else
		pchip->irq = gpio_to_irq(rc);

	pdata->hwen_gpio = of_get_named_gpio(np, "ti,hwen-gpio", 0);
	if (!gpio_is_valid(pdata->hwen_gpio))
		dev_warn(pchip->dev, "hwen gpio not specified\n");

	pdata->pwm_gpio = of_get_named_gpio(np, "ti,pwm-gpio", 0);
	if (!gpio_is_valid(pdata->pwm_gpio))
		dev_warn(pchip->dev, "pwm gpio not specified\n");

	rc = of_property_read_string(np, "ti,vddio-name", &st);
	if (rc)
		dev_warn(pchip->dev, "vddio name not specified\n");
	else
		snprintf(pdata->vddio_name,
			ARRAY_SIZE(pdata->vddio_name), "%s", st);

	rc = of_property_read_u32(np, "ti,leda-ctrl", &tmp);
	if (rc) {
		dev_err(pchip->dev, "leda-ctrl not found in devtree\n");
		return -EINVAL;
	}
	pdata->leda_ctrl = tmp;

	rc = of_property_read_u32(np, "ti,ledb-ctrl", &tmp);
	if (rc) {
		dev_err(pchip->dev, "ledb-ctrl not found in devtree\n");
		return -EINVAL;
	}
	pdata->ledb_ctrl = tmp;

	rc = of_property_read_u32(np, "ti,leda-max-brt", &tmp);
	if (rc)
		dev_warn(pchip->dev, "leda-max-brt not found in devtree\n");
	pdata->leda_max_brt = rc ? LM3630A_MAX_BRIGHTNESS : tmp;

	rc = of_property_read_u32(np, "ti,ledb-max-brt", &tmp);
	if (rc)
		dev_warn(pchip->dev, "ledb-max-brt not found in devtree\n");
	pdata->ledb_max_brt = rc ? LM3630A_MAX_BRIGHTNESS : tmp;

	rc = of_property_read_u32(np, "ti,leda-init-brt", &tmp);
	if (rc)
		dev_warn(pchip->dev, "leda-init-brt not found in devtree\n");
	pdata->leda_init_brt = rc ? LM3630A_MAX_BRIGHTNESS : tmp;

	rc = of_property_read_u32(np, "ti,ledb-init-brt", &tmp);
	if (rc)
		dev_warn(pchip->dev, "ledb-init-brt not found in devtree\n");
	pdata->ledb_init_brt = rc ? LM3630A_MAX_BRIGHTNESS : tmp;

	rc = of_property_read_u32(np, "ti,leda-max-cur", &tmp);
	if (rc)
		dev_warn(pchip->dev, "leda-max-cur not found in devtree\n");
	pdata->leda_max_cur = rc ? LM3630A_MAX_CURRENT : tmp;

	rc = of_property_read_u32(np, "ti,ledb-max-cur", &tmp);
	if (rc)
		dev_warn(pchip->dev, "ledb-max-cur not found in devtree\n");
	pdata->ledb_max_cur = rc ? LM3630A_MAX_CURRENT : tmp;

	rc = of_property_read_u32(np, "ti,leda-max-hbm-cur", &tmp);
	if (rc)
		dev_warn(pchip->dev, "leda-max-hbm-cur not found in devtree\n");
	pdata->leda_max_hbm_cur = rc ? LM3630A_MAX_CURRENT : tmp;

	rc = of_property_read_u32(np, "ti,ledb-max-hbm-cur", &tmp);
	if (rc)
		dev_warn(pchip->dev, "ledb-max-hbm-cur not found in devtree\n");
	pdata->ledb_max_hbm_cur = rc ? LM3630A_MAX_CURRENT : tmp;

	rc = of_property_read_u32(np, "ti,boost-ctrl", &tmp);
	if (rc)
		dev_warn(pchip->dev, "boost-ctrl not found in devtree\n");
	pdata->boost_ctrl = rc ? LM3630A_BOOST_CTRL_DEFAULT : tmp;

	rc = of_property_read_u32(np, "ti,flt-str", &tmp);
	if (rc)
		dev_warn(pchip->dev, "flt-str not found in devtree\n");
	pdata->flt_str = rc ? LM3630A_FLT_STRENGTH_DEFAULT : tmp;

	rc = of_property_read_u32(np, "ti,config", &tmp);
	if (rc)
		dev_warn(pchip->dev, "config not found in devtree\n");
	pdata->config = rc ? LM3630A_CONFIG_DEFAULT : tmp;
	pdata->pwm_ctrl = gpio_is_valid(pdata->pwm_gpio) ?
			pdata->config & LM3630A_PWM_BANK_ALL : 0x00;

	pdata->skip_init_config = of_property_read_bool(np,
					"ti,skip-init-config");

	dev_info(pchip->dev, "loading configuration done.\n");
	return 0;
}
static struct ncp6335d_platform_data *
ncp6335d_get_of_platform_data(struct i2c_client *client)
{
    struct ncp6335d_platform_data *pdata = NULL;
    struct regulator_init_data *init_data;
    const char *mode_name;
    int rc;

    init_data = of_get_regulator_init_data(&client->dev,
                                           client->dev.of_node);
    if (!init_data) {
        dev_err(&client->dev, "regulator init data is missing\n");
        return pdata;
    }

    pdata = devm_kzalloc(&client->dev,
                         sizeof(struct ncp6335d_platform_data), GFP_KERNEL);
    if (!pdata) {
        dev_err(&client->dev, "ncp6335d_platform_data allocation failed.\n");
        return pdata;
    }

    rc = of_property_read_u32(client->dev.of_node,
                              "onnn,vsel", &pdata->default_vsel);
    if (rc < 0) {
        dev_err(&client->dev, "onnn,vsel property missing: rc = %d.\n",
                rc);
        return NULL;
    }

    rc = of_property_read_u32(client->dev.of_node,
                              "onnn,slew-ns", &pdata->slew_rate_ns);
    if (rc < 0) {
        dev_err(&client->dev, "onnn,slew-ns property missing: rc = %d.\n",
                rc);
        return NULL;
    }

    pdata->discharge_enable = of_property_read_bool(client->dev.of_node,
                              "onnn,discharge-enable");

    pdata->sleep_enable = of_property_read_bool(client->dev.of_node,
                          "onnn,sleep-enable");

    pdata->init_data = init_data;

    init_data->constraints.input_uV = init_data->constraints.max_uV;
    init_data->constraints.valid_ops_mask =
        REGULATOR_CHANGE_VOLTAGE |
        REGULATOR_CHANGE_STATUS |
        REGULATOR_CHANGE_MODE;
    init_data->constraints.valid_modes_mask =
        REGULATOR_MODE_NORMAL |
        REGULATOR_MODE_FAST;

    rc = of_property_read_string(client->dev.of_node, "onnn,mode",
                                 &mode_name);
    if (!rc) {
        if (strcmp("pwm", mode_name) == 0) {
            init_data->constraints.initial_mode =
                REGULATOR_MODE_FAST;
        } else if (strcmp("auto", mode_name) == 0) {
            init_data->constraints.initial_mode =
                REGULATOR_MODE_NORMAL;
        } else {
            dev_err(&client->dev, "onnn,mode, unknown regulator mode: %s\n",
                    mode_name);
            return NULL;
        }
    }

    return pdata;
}
Example #9
0
int usb_phy_gen_create_phy(struct device *dev, struct usb_phy_generic *nop,
		struct usb_phy_generic_platform_data *pdata)
{
	enum usb_phy_type type = USB_PHY_TYPE_USB2;
	int err = 0;

	u32 clk_rate = 0;
	bool needs_vcc = false, needs_clk = false;

	if (dev->of_node) {
		struct device_node *node = dev->of_node;

		if (of_property_read_u32(node, "clock-frequency", &clk_rate))
			clk_rate = 0;

		needs_vcc = of_property_read_bool(node, "vcc-supply");
		needs_clk = of_property_read_bool(node, "clocks");
		nop->gpiod_reset = devm_gpiod_get_optional(dev, "reset",
							   GPIOD_ASIS);
		err = PTR_ERR_OR_ZERO(nop->gpiod_reset);
		if (!err) {
			nop->gpiod_vbus = devm_gpiod_get_optional(dev,
							 "vbus-detect",
							 GPIOD_ASIS);
			err = PTR_ERR_OR_ZERO(nop->gpiod_vbus);
		}
	} else if (pdata) {
		type = pdata->type;
		clk_rate = pdata->clk_rate;
		needs_vcc = pdata->needs_vcc;
		if (gpio_is_valid(pdata->gpio_reset)) {
			err = devm_gpio_request_one(dev, pdata->gpio_reset,
						    GPIOF_ACTIVE_LOW,
						    dev_name(dev));
			if (!err)
				nop->gpiod_reset =
					gpio_to_desc(pdata->gpio_reset);
		}
		nop->gpiod_vbus = pdata->gpiod_vbus;
	}

	if (err == -EPROBE_DEFER)
		return -EPROBE_DEFER;
	if (err) {
		dev_err(dev, "Error requesting RESET or VBUS GPIO\n");
		return err;
	}
	if (nop->gpiod_reset)
		gpiod_direction_output(nop->gpiod_reset, 1);

	nop->phy.otg = devm_kzalloc(dev, sizeof(*nop->phy.otg),
			GFP_KERNEL);
	if (!nop->phy.otg)
		return -ENOMEM;

	nop->clk = devm_clk_get(dev, "main_clk");
	if (IS_ERR(nop->clk)) {
		dev_dbg(dev, "Can't get phy clock: %ld\n",
					PTR_ERR(nop->clk));
		if (needs_clk)
			return PTR_ERR(nop->clk);
	}

	if (!IS_ERR(nop->clk) && clk_rate) {
		err = clk_set_rate(nop->clk, clk_rate);
		if (err) {
			dev_err(dev, "Error setting clock rate\n");
			return err;
		}
	}

	nop->vcc = devm_regulator_get(dev, "vcc");
	if (IS_ERR(nop->vcc)) {
		dev_dbg(dev, "Error getting vcc regulator: %ld\n",
					PTR_ERR(nop->vcc));
		if (needs_vcc)
			return -EPROBE_DEFER;
	}

	nop->dev		= dev;
	nop->phy.dev		= nop->dev;
	nop->phy.label		= "nop-xceiv";
	nop->phy.set_suspend	= nop_set_suspend;
	nop->phy.type		= type;

	nop->phy.otg->state		= OTG_STATE_UNDEFINED;
	nop->phy.otg->usb_phy		= &nop->phy;
	nop->phy.otg->set_host		= nop_set_host;
	nop->phy.otg->set_peripheral	= nop_set_peripheral;

	return 0;
}
static int bcl_probe(struct platform_device *pdev)
{
	struct bcl_context *bcl = NULL;
	int ret = 0, i = 0, cpu = 0;
	enum bcl_device_mode bcl_mode = BCL_DEVICE_DISABLED;
	struct device_node *core_phandle = NULL;

	bcl = devm_kzalloc(&pdev->dev, sizeof(struct bcl_context), GFP_KERNEL);
	if (!bcl) {
		pr_err("Cannot allocate bcl_context\n");
		return -ENOMEM;
	}

	/* For BCL */
	/* Init default BCL params */
	if (of_property_read_bool(pdev->dev.of_node, "qcom,bcl-enable"))
		bcl_mode = BCL_DEVICE_ENABLED;
	else
		bcl_mode = BCL_DEVICE_DISABLED;
	bcl->dev = &pdev->dev;
	bcl->bcl_monitor_type = BCL_IBAT_MONITOR_TYPE;
	bcl->bcl_threshold_mode[BCL_LOW_THRESHOLD_TYPE] =
					BCL_IAVAIL_THRESHOLD_DISABLED;
	bcl->bcl_threshold_mode[BCL_HIGH_THRESHOLD_TYPE] =
					BCL_IAVAIL_THRESHOLD_DISABLED;
	bcl->bcl_threshold_value_ma[BCL_LOW_THRESHOLD_TYPE] = 0;
	bcl->bcl_threshold_value_ma[BCL_HIGH_THRESHOLD_TYPE] = 0;
	bcl->bcl_vbat_min = BATTERY_VOLTAGE_MIN;
	snprintf(bcl->bcl_type, BCL_NAME_LENGTH, "%s",
			bcl_type[BCL_IBAT_MONITOR_TYPE]);
	bcl->bcl_poll_interval_msec = BCL_POLL_INTERVAL;

	if (of_property_read_bool(pdev->dev.of_node, "qcom,bcl-no-bms"))
		bcl->bcl_no_bms = true;
	else
		bcl->bcl_no_bms = false;

	core_phandle = of_parse_phandle(pdev->dev.of_node,
			"qcom,bcl-hotplug-list", i++);
	while (core_phandle) {
		bcl_hotplug_enabled = true;
		for_each_possible_cpu(cpu) {
			if (of_get_cpu_node(cpu, NULL) == core_phandle)
				bcl_hotplug_mask |= BIT(cpu);
		}
		core_phandle = of_parse_phandle(pdev->dev.of_node,
			"qcom,bcl-hotplug-list", i++);
	}
	if (!bcl_hotplug_mask)
		bcl_hotplug_enabled = false;

	ret = probe_btm_properties(bcl);

	if (ret == -EPROBE_DEFER)
		return ret;

	ret = create_bcl_sysfs(bcl);
	if (ret < 0) {
		pr_err("Cannot create bcl sysfs\n");
		return ret;
	}

	gbcl = bcl;
	platform_set_drvdata(pdev, bcl);
	bcl->battery_monitor_wq = alloc_workqueue(
				"battery_monitor", WQ_MEM_RECLAIM, 1);
	if (!bcl->battery_monitor_wq) {
			pr_err("Requesting  battery_monitor wq failed\n");
			return 0;
	}
	INIT_WORK(&bcl->battery_monitor_work, battery_monitor_work);
	if (bcl_hotplug_enabled)
		register_cpu_notifier(&bcl_cpu_notifier);
	if (bcl_mode == BCL_DEVICE_ENABLED)
		bcl_mode_set(bcl_mode);

	return 0;
}
static int ncp6335d_init(struct i2c_client *client, struct ncp6335d_info *dd,
                         const struct ncp6335d_platform_data *pdata)
{
    int rc;
    unsigned int val;

    switch (pdata->default_vsel) {
    case NCP6335D_VSEL0:
        dd->vsel_reg = REG_NCP6335D_PROGVSEL0;
        dd->vsel_backup_reg = REG_NCP6335D_PROGVSEL1;
        dd->mode_bit = NCP6335D_PWM_MODE0;
        break;
    case NCP6335D_VSEL1:
        dd->vsel_reg = REG_NCP6335D_PROGVSEL1;
        dd->vsel_backup_reg = REG_NCP6335D_PROGVSEL0;
        dd->mode_bit = NCP6335D_PWM_MODE1;
        break;
    default:
        dev_err(dd->dev, "Invalid VSEL ID %d\n", pdata->default_vsel);
        return -EINVAL;
    }

    if (of_property_read_bool(client->dev.of_node, "onnn,restore-reg")) {
        rc = ncp6335d_restore_working_reg(client->dev.of_node, dd);
        if (rc)
            return rc;
    }

    rc = ncp6335d_parse_gpio(client->dev.of_node, dd);
    if (rc)
        return rc;

    /* get the current programmed voltage */
    rc = ncp6335x_read(dd, dd->vsel_reg, &val);
    if (rc) {
        dev_err(dd->dev, "Unable to get volatge rc(%d)", rc);
        return rc;
    }
    dd->curr_voltage = ((val & NCP6335D_VOUT_SEL_MASK) *
                        dd->step_size) + dd->min_voltage;

    /* set discharge */
    rc = ncp6335x_update_bits(dd, REG_NCP6335D_PGOOD,
                              NCP6335D_PGOOD_DISCHG,
                              (pdata->discharge_enable ?
                               NCP6335D_PGOOD_DISCHG : 0));
    if (rc) {
        dev_err(dd->dev, "Unable to set Active Discharge rc(%d)\n", rc);
        return -EINVAL;
    }

    /* set slew rate */
    if (pdata->slew_rate_ns < dd->min_slew_ns ||
            pdata->slew_rate_ns > dd->max_slew_ns) {
        dev_err(dd->dev, "Invalid slew rate %d\n", pdata->slew_rate_ns);
        return -EINVAL;
    }

    dd->slew_rate = pdata->slew_rate_ns;
    val = DIV_ROUND_UP(pdata->slew_rate_ns, dd->min_slew_ns);
    val = ilog2(val);

    rc = ncp6335x_update_bits(dd, REG_NCP6335D_TIMING,
                              NCP6335D_SLEW_MASK, val << NCP6335D_SLEW_SHIFT);
    if (rc)
        dev_err(dd->dev, "Unable to set slew rate rc(%d)\n", rc);

    /* Set Sleep mode bit */
    rc = ncp6335x_update_bits(dd, REG_NCP6335D_COMMAND,
                              NCP6335D_SLEEP_MODE, pdata->sleep_enable ?
                              NCP6335D_SLEEP_MODE : 0);
    if (rc)
        dev_err(dd->dev, "Unable to set sleep mode (%d)\n", rc);

    dump_registers(dd, REG_NCP6335D_COMMAND, __func__);
    dump_registers(dd, REG_NCP6335D_PROGVSEL0, __func__);
    dump_registers(dd, REG_NCP6335D_TIMING, __func__);
    dump_registers(dd, REG_NCP6335D_PGOOD, __func__);

    return rc;
}
static int32_t msm_sensor_driver_get_dt_data(struct msm_sensor_ctrl_t *s_ctrl)
{
    int32_t                              rc = 0;
    struct msm_camera_sensor_board_info *sensordata = NULL;
    struct device_node                  *of_node = s_ctrl->of_node;
    uint32_t cell_id;

    s_ctrl->sensordata = kzalloc(sizeof(*sensordata), GFP_KERNEL);
    if (!s_ctrl->sensordata) {
        pr_err("failed: no memory");
        return -ENOMEM;
    }

    sensordata = s_ctrl->sensordata;

    /*
     * Read cell index - this cell index will be the camera slot where
     * this camera will be mounted
     */
    rc = of_property_read_u32(of_node, "cell-index", &cell_id);
    if (rc < 0) {
        pr_err("failed: cell-index rc %d", rc);
        goto FREE_SENSOR_DATA;
    }
    s_ctrl->id = cell_id;

    /* Validate cell_id */
    if (cell_id >= MAX_CAMERAS) {
        pr_err("failed: invalid cell_id %d", cell_id);
        rc = -EINVAL;
        goto FREE_SENSOR_DATA;
    }

    /* Check whether g_sctrl is already filled for this cell_id */
    if (g_sctrl[cell_id]) {
        pr_err("failed: sctrl already filled for cell_id %d", cell_id);
        rc = -EINVAL;
        goto FREE_SENSOR_DATA;
    }

    /* Read subdev info */
    rc = msm_sensor_get_sub_module_index(of_node, &sensordata->sensor_info);
    if (rc < 0) {
        pr_err("failed");
        goto FREE_SENSOR_DATA;
    }

    /* Read vreg information */
    rc = msm_camera_get_dt_vreg_data(of_node,
                                     &sensordata->power_info.cam_vreg,
                                     &sensordata->power_info.num_vreg);
    if (rc < 0) {
        pr_err("failed: msm_camera_get_dt_vreg_data rc %d", rc);
        goto FREE_SUB_MODULE_DATA;
    }

    /* Read gpio information */
    rc = msm_sensor_driver_get_gpio_data(sensordata, of_node);
    if (rc < 0) {
        pr_err("failed: msm_sensor_driver_get_gpio_data rc %d", rc);
        goto FREE_VREG_DATA;
    }

    /* Get CCI master */
    rc = of_property_read_u32(of_node, "qcom,cci-master",
                              &s_ctrl->cci_i2c_master);
    CDBG("qcom,cci-master %d, rc %d", s_ctrl->cci_i2c_master, rc);
    if (rc < 0) {
        /* Set default master 0 */
        s_ctrl->cci_i2c_master = MASTER_0;
        rc = 0;
    }

    /* Get mount angle */
    if (0 > of_property_read_u32(of_node, "qcom,mount-angle",
                                 &sensordata->sensor_info->sensor_mount_angle)) {
        /* Invalidate mount angle flag */
        sensordata->sensor_info->is_mount_angle_valid = 0;
        sensordata->sensor_info->sensor_mount_angle = 0;
    } else {
        sensordata->sensor_info->is_mount_angle_valid = 1;
    }
    CDBG("%s qcom,mount-angle %d\n", __func__,
         sensordata->sensor_info->sensor_mount_angle);
    if (0 > of_property_read_u32(of_node, "qcom,sensor-position",
                                 &sensordata->sensor_info->position)) {
        CDBG("%s:%d Invalid sensor position\n", __func__, __LINE__);
        sensordata->sensor_info->position = INVALID_CAMERA_B;
    }
    if (0 > of_property_read_u32(of_node, "qcom,sensor-mode",
                                 &sensordata->sensor_info->modes_supported)) {
        CDBG("%s:%d Invalid sensor mode supported\n",
             __func__, __LINE__);
        sensordata->sensor_info->modes_supported = CAMERA_MODE_INVALID;
    }
    /* Get vdd-cx regulator */
    /*Optional property, don't return error if absent */
    of_property_read_string(of_node, "qcom,vdd-cx-name",
                            &sensordata->misc_regulator);
    CDBG("qcom,misc_regulator %s", sensordata->misc_regulator);

    s_ctrl->set_mclk_23880000 = of_property_read_bool(of_node,
                                "qcom,mclk-23880000");

    CDBG("%s qcom,mclk-23880000 = %d\n", __func__,
         s_ctrl->set_mclk_23880000);

    return rc;

FREE_VREG_DATA:
    kfree(sensordata->power_info.cam_vreg);
FREE_SUB_MODULE_DATA:
    kfree(sensordata->sensor_info);
FREE_SENSOR_DATA:
    kfree(sensordata);
    return rc;
}
Example #13
0
static int ehci_platform_probe(struct platform_device *dev)
{
	struct usb_hcd *hcd;
	struct resource *res_mem;
	struct usb_ehci_pdata *pdata = dev_get_platdata(&dev->dev);
	struct ehci_platform_priv *priv;
	struct ehci_hcd *ehci;
	int err, irq, phy_num, clk = 0;

	if (usb_disabled())
		return -ENODEV;

	/*
	 * Use reasonable defaults so platforms don't have to provide these
	 * with DT probing on ARM.
	 */
	if (!pdata)
		pdata = &ehci_platform_defaults;

	err = dma_coerce_mask_and_coherent(&dev->dev,
		pdata->dma_mask_64 ? DMA_BIT_MASK(64) : DMA_BIT_MASK(32));
	if (err) {
		dev_err(&dev->dev, "Error: DMA mask configuration failed\n");
		return err;
	}

	irq = platform_get_irq(dev, 0);
	if (irq < 0) {
		dev_err(&dev->dev, "no irq provided");
		return irq;
	}

	hcd = usb_create_hcd(&ehci_platform_hc_driver, &dev->dev,
			     dev_name(&dev->dev));
	if (!hcd)
		return -ENOMEM;

	platform_set_drvdata(dev, hcd);
	dev->dev.platform_data = pdata;
	priv = hcd_to_ehci_priv(hcd);
	ehci = hcd_to_ehci(hcd);

	if (pdata == &ehci_platform_defaults && dev->dev.of_node) {
		if (of_property_read_bool(dev->dev.of_node, "big-endian-regs"))
			ehci->big_endian_mmio = 1;

		if (of_property_read_bool(dev->dev.of_node, "big-endian-desc"))
			ehci->big_endian_desc = 1;

		if (of_property_read_bool(dev->dev.of_node, "big-endian"))
			ehci->big_endian_mmio = ehci->big_endian_desc = 1;

		if (of_property_read_bool(dev->dev.of_node,
					  "needs-reset-on-resume"))
			priv->reset_on_resume = true;

		if (of_property_read_bool(dev->dev.of_node,
					  "has-transaction-translator"))
			hcd->has_tt = 1;

		priv->num_phys = of_count_phandle_with_args(dev->dev.of_node,
				"phys", "#phy-cells");

		if (priv->num_phys > 0) {
			priv->phys = devm_kcalloc(&dev->dev, priv->num_phys,
					    sizeof(struct phy *), GFP_KERNEL);
			if (!priv->phys)
				return -ENOMEM;
		} else
			priv->num_phys = 0;

		for (phy_num = 0; phy_num < priv->num_phys; phy_num++) {
			priv->phys[phy_num] = devm_of_phy_get_by_index(
					&dev->dev, dev->dev.of_node, phy_num);
			if (IS_ERR(priv->phys[phy_num])) {
				err = PTR_ERR(priv->phys[phy_num]);
					goto err_put_hcd;
			} else if (!hcd->phy) {
				/* Avoiding phy_get() in usb_add_hcd() */
				hcd->phy = priv->phys[phy_num];
			}
		}

		for (clk = 0; clk < EHCI_MAX_CLKS; clk++) {
			priv->clks[clk] = of_clk_get(dev->dev.of_node, clk);
			if (IS_ERR(priv->clks[clk])) {
				err = PTR_ERR(priv->clks[clk]);
				if (err == -EPROBE_DEFER)
					goto err_put_clks;
				priv->clks[clk] = NULL;
				break;
			}
		}
	}

	priv->rsts = devm_reset_control_array_get_optional_shared(&dev->dev);
	if (IS_ERR(priv->rsts)) {
		err = PTR_ERR(priv->rsts);
		goto err_put_clks;
	}

	err = reset_control_deassert(priv->rsts);
	if (err)
		goto err_put_clks;

	if (pdata->big_endian_desc)
		ehci->big_endian_desc = 1;
	if (pdata->big_endian_mmio)
		ehci->big_endian_mmio = 1;
	if (pdata->has_tt)
		hcd->has_tt = 1;
	if (pdata->reset_on_resume)
		priv->reset_on_resume = true;

#ifndef CONFIG_USB_EHCI_BIG_ENDIAN_MMIO
	if (ehci->big_endian_mmio) {
		dev_err(&dev->dev,
			"Error: CONFIG_USB_EHCI_BIG_ENDIAN_MMIO not set\n");
		err = -EINVAL;
		goto err_reset;
	}
#endif
#ifndef CONFIG_USB_EHCI_BIG_ENDIAN_DESC
	if (ehci->big_endian_desc) {
		dev_err(&dev->dev,
			"Error: CONFIG_USB_EHCI_BIG_ENDIAN_DESC not set\n");
		err = -EINVAL;
		goto err_reset;
	}
#endif

	if (pdata->power_on) {
		err = pdata->power_on(dev);
		if (err < 0)
			goto err_reset;
	}

	res_mem = platform_get_resource(dev, IORESOURCE_MEM, 0);
	hcd->regs = devm_ioremap_resource(&dev->dev, res_mem);
	if (IS_ERR(hcd->regs)) {
		err = PTR_ERR(hcd->regs);
		goto err_power;
	}
	hcd->rsrc_start = res_mem->start;
	hcd->rsrc_len = resource_size(res_mem);

	err = usb_add_hcd(hcd, irq, IRQF_SHARED);
	if (err)
		goto err_power;

	device_wakeup_enable(hcd->self.controller);
	device_enable_async_suspend(hcd->self.controller);
	platform_set_drvdata(dev, hcd);

	return err;

err_power:
	if (pdata->power_off)
		pdata->power_off(dev);
err_reset:
	reset_control_assert(priv->rsts);
err_put_clks:
	while (--clk >= 0)
		clk_put(priv->clks[clk]);
err_put_hcd:
	if (pdata == &ehci_platform_defaults)
		dev->dev.platform_data = NULL;

	usb_put_hcd(hcd);

	return err;
}
Example #14
0
static void palmas_dt_to_pdata(struct device *dev,
			       struct device_node *node,
			       struct palmas_pmic_platform_data *pdata,
			       struct palmas_pmic_driver_data *ddata)
{
	struct device_node *regulators;
	u32 prop;
	int idx, ret;

	regulators = of_get_child_by_name(node, "regulators");
	if (!regulators) {
		dev_info(dev, "regulator node not found\n");
		return;
	}

	ret = of_regulator_match(dev, regulators, ddata->palmas_matches,
				 ddata->max_reg);
	of_node_put(regulators);
	if (ret < 0) {
		dev_err(dev, "Error parsing regulator init data: %d\n", ret);
		return;
	}

	for (idx = 0; idx < ddata->max_reg; idx++) {
		if (!ddata->palmas_matches[idx].init_data ||
		    !ddata->palmas_matches[idx].of_node)
			continue;

		pdata->reg_data[idx] = ddata->palmas_matches[idx].init_data;

		pdata->reg_init[idx] = devm_kzalloc(dev,
				sizeof(struct palmas_reg_init), GFP_KERNEL);

		pdata->reg_init[idx]->warm_reset =
			of_property_read_bool(ddata->palmas_matches[idx].of_node,
					      "ti,warm-reset");

		ret = of_property_read_u32(ddata->palmas_matches[idx].of_node,
					   "ti,roof-floor", &prop);
		/* EINVAL: Property not found */
		if (ret != -EINVAL) {
			int econtrol;

			/* use default value, when no value is specified */
			econtrol = PALMAS_EXT_CONTROL_NSLEEP;
			if (!ret) {
				switch (prop) {
				case 1:
					econtrol = PALMAS_EXT_CONTROL_ENABLE1;
					break;
				case 2:
					econtrol = PALMAS_EXT_CONTROL_ENABLE2;
					break;
				case 3:
					econtrol = PALMAS_EXT_CONTROL_NSLEEP;
					break;
				default:
					WARN_ON(1);
					dev_warn(dev,
						 "%s: Invalid roof-floor option: %u\n",
					     palmas_matches[idx].name, prop);
					break;
				}
			}
			pdata->reg_init[idx]->roof_floor = econtrol;
		}

		ret = of_property_read_u32(ddata->palmas_matches[idx].of_node,
					   "ti,mode-sleep", &prop);
		if (!ret)
			pdata->reg_init[idx]->mode_sleep = prop;

		ret = of_property_read_bool(ddata->palmas_matches[idx].of_node,
					    "ti,smps-range");
		if (ret)
			pdata->reg_init[idx]->vsel =
				PALMAS_SMPS12_VOLTAGE_RANGE;

		if (idx == PALMAS_REG_LDO8)
			pdata->enable_ldo8_tracking = of_property_read_bool(
						ddata->palmas_matches[idx].of_node,
						"ti,enable-ldo8-tracking");
	}

	pdata->ldo6_vibrator = of_property_read_bool(node, "ti,ldo6-vibrator");
}
Example #15
0
static int ufshcd_populate_vreg(struct device *dev, const char *name,
		struct ufs_vreg **out_vreg)
{
	int ret = 0;
	char prop_name[MAX_PROP_SIZE];
	struct ufs_vreg *vreg = NULL;
	struct device_node *np = dev->of_node;

	if (!np) {
		dev_err(dev, "%s: non DT initialization\n", __func__);
		goto out;
	}

	snprintf(prop_name, MAX_PROP_SIZE, "%s-supply", name);
	if (!of_parse_phandle(np, prop_name, 0)) {
		dev_info(dev, "%s: Unable to find %s regulator, assuming enabled\n",
				__func__, prop_name);
		goto out;
	}

	vreg = devm_kzalloc(dev, sizeof(*vreg), GFP_KERNEL);
	if (!vreg)
		return -ENOMEM;

	vreg->name = kstrdup(name, GFP_KERNEL);

	/* if fixed regulator no need further initialization */
	snprintf(prop_name, MAX_PROP_SIZE, "%s-fixed-regulator", name);
	if (of_property_read_bool(np, prop_name))
		goto out;

	snprintf(prop_name, MAX_PROP_SIZE, "%s-max-microamp", name);
	ret = of_property_read_u32(np, prop_name, &vreg->max_uA);
	if (ret) {
		dev_err(dev, "%s: unable to find %s err %d\n",
				__func__, prop_name, ret);
		goto out;
	}

	vreg->min_uA = 0;
	if (!strcmp(name, "vcc")) {
		if (of_property_read_bool(np, "vcc-supply-1p8")) {
			vreg->min_uV = UFS_VREG_VCC_1P8_MIN_UV;
			vreg->max_uV = UFS_VREG_VCC_1P8_MAX_UV;
		} else {
			vreg->min_uV = UFS_VREG_VCC_MIN_UV;
			vreg->max_uV = UFS_VREG_VCC_MAX_UV;
		}
	} else if (!strcmp(name, "vccq")) {
		vreg->min_uV = UFS_VREG_VCCQ_MIN_UV;
		vreg->max_uV = UFS_VREG_VCCQ_MAX_UV;
	} else if (!strcmp(name, "vccq2")) {
		vreg->min_uV = UFS_VREG_VCCQ2_MIN_UV;
		vreg->max_uV = UFS_VREG_VCCQ2_MAX_UV;
	}

	goto out;

out:
	if (!ret)
		*out_vreg = vreg;
	return ret;
}
Example #16
0
static int __devinit qpnp_pon_probe(struct spmi_device *spmi)
{
	struct qpnp_pon *pon;
	struct resource *pon_resource;
	struct device_node *itr = NULL;
	u32 delay = 0;
	int rc, sys_reset;
	struct device *sec_powerkey;
    	int ret;
	pon = devm_kzalloc(&spmi->dev, sizeof(struct qpnp_pon),
							GFP_KERNEL);
	if (!pon) {
		dev_err(&spmi->dev, "Can't allocate qpnp_pon\n");
		return -ENOMEM;
	}

	sys_reset = of_property_read_bool(spmi->dev.of_node,
						"qcom,system-reset");
	if (sys_reset && sys_reset_dev) {
		dev_err(&spmi->dev, "qcom,system-reset property can only be specified for one device on the system\n");
		return -EINVAL;
	} else if (sys_reset) {
		sys_reset_dev = pon;
	}

	pon->spmi = spmi;

	/* get the total number of pon configurations */
	while ((itr = of_get_next_child(spmi->dev.of_node, itr)))
		pon->num_pon_config++;

	if (!pon->num_pon_config) {
		/* No PON config., do not register the driver */
		dev_err(&spmi->dev, "No PON config. specified\n");
		return -EINVAL;
	}

	pon->pon_cfg = devm_kzalloc(&spmi->dev,
			sizeof(struct qpnp_pon_config) * pon->num_pon_config,
								GFP_KERNEL);

	pon_resource = spmi_get_resource(spmi, NULL, IORESOURCE_MEM, 0);
	if (!pon_resource) {
		dev_err(&spmi->dev, "Unable to get PON base address\n");
		return -ENXIO;
	}
	pon->base = pon_resource->start;

	rc = of_property_read_u32(pon->spmi->dev.of_node,
				"qcom,pon-dbc-delay", &delay);
	if (rc) {
		if (rc != -EINVAL) {
			dev_err(&spmi->dev, "Unable to read debounce delay\n");
			return rc;
		}
	} else {
		delay = (delay << QPNP_PON_DELAY_BIT_SHIFT) / USEC_PER_SEC;
		delay = ilog2(delay);
		rc = qpnp_pon_masked_write(pon, QPNP_PON_DBC_CTL(pon->base),
						QPNP_PON_DBC_DELAY_MASK, delay);
		if (rc) {
			dev_err(&spmi->dev, "Unable to set PON debounce\n");
			return rc;
		}
	}

	dev_set_drvdata(&spmi->dev, pon);

	INIT_DELAYED_WORK(&pon->bark_work, bark_work_func);

	/* register the PON configurations */
	rc = qpnp_pon_config_init(pon);
	if (rc) {
		dev_err(&spmi->dev,
			"Unable to intialize PON configurations\n");
		return rc;
	}

#ifdef CONFIG_CONTROL_S2_RESET
	if (0 == sec_debug_is_enabled())
		qpnp_control_s2_reset(0);
#endif

	sec_powerkey = device_create(sec_class, NULL, 0, NULL, "sec_powerkey");
	if (IS_ERR(sec_powerkey))
		pr_err("Failed to create device(sec_powerkey)!\n");
	ret = device_create_file(sec_powerkey, &dev_attr_sec_powerkey_pressed);
	if (ret) {
		pr_err("Failed to create device file in sysfs entries(%s)!\n",
		dev_attr_sec_powerkey_pressed.attr.name);
	}
	dev_set_drvdata(sec_powerkey, pon);

	return rc;
}
Example #17
0
int dsi_panel_device_register(struct platform_device *pdev,
			      struct mdss_panel_common_pdata *panel_data)
{
	struct mipi_panel_info *mipi;
	int rc;
	struct mdss_dsi_ctrl_pdata *ctrl_pdata;
	struct device_node *dsi_ctrl_np = NULL;
	struct platform_device *ctrl_pdev = NULL;
	bool broadcast;
	bool dynamic_fps;
	bool cont_splash_enabled = false;
	const char *data;

	mipi  = &panel_data->panel_info.mipi;

	panel_data->panel_info.type =
		((mipi->mode == DSI_VIDEO_MODE)
			? MIPI_VIDEO_PANEL : MIPI_CMD_PANEL);

	rc = mdss_dsi_clk_div_config(&panel_data->panel_info, mipi->frame_rate);
	if (rc) {
		pr_err("%s: unable to initialize the clk dividers\n", __func__);
		return rc;
	}

	dsi_ctrl_np = of_parse_phandle(pdev->dev.of_node,
				       "qcom,dsi-ctrl-phandle", 0);
	if (!dsi_ctrl_np) {
		pr_err("%s: Dsi controller node not initialized\n", __func__);
		return -EPROBE_DEFER;
	}

	ctrl_pdev = of_find_device_by_node(dsi_ctrl_np);
	ctrl_pdata = platform_get_drvdata(ctrl_pdev);
	if (!ctrl_pdata) {
		pr_err("%s: no dsi ctrl driver data\n", __func__);
		return -EINVAL;
	}

	rc = mdss_dsi_regulator_init(ctrl_pdev);
	if (rc) {
		dev_err(&pdev->dev,
			"%s: failed to init regulator, rc=%d\n",
						__func__, rc);
		return rc;
	}

	broadcast = of_property_read_bool(pdev->dev.of_node,
					  "qcom,mdss-pan-broadcast-mode");
	if (broadcast)
		ctrl_pdata->shared_pdata.broadcast_enable = 1;

	dynamic_fps = of_property_read_bool(pdev->dev.of_node,
					  "qcom,mdss-dsi-pan-enable-dynamic-fps");
	if (dynamic_fps) {
		panel_data->panel_info.dynamic_fps = true;
		data = of_get_property(pdev->dev.of_node,
					  "qcom,mdss-dsi-pan-fps-update", NULL);
		if (data) {
			if (!strcmp(data, "dfps_suspend_resume_mode")) {
				panel_data->panel_info.dfps_update =
						DFPS_SUSPEND_RESUME_MODE;
				pr_debug("%s: dfps mode: suspend/resume\n",
								__func__);
			} else if (!strcmp(data,
					    "dfps_immediate_clk_mode")) {
				panel_data->panel_info.dfps_update =
						DFPS_IMMEDIATE_CLK_UPDATE_MODE;
				pr_debug("%s: dfps mode: Immediate clk\n",
								__func__);
			} else {
				pr_debug("%s: dfps to default mode\n",
								__func__);
				panel_data->panel_info.dfps_update =
						DFPS_SUSPEND_RESUME_MODE;
				pr_debug("%s: dfps mode: suspend/resume\n",
								__func__);
			}
		} else {
			pr_debug("%s: dfps update mode not configured\n",
								__func__);
				panel_data->panel_info.dynamic_fps =
								false;
				pr_debug("%s: dynamic FPS disabled\n",
								__func__);
		}
		panel_data->panel_info.new_fps =
				panel_data->panel_info.mipi.frame_rate;
	}

	ctrl_pdata->disp_en_gpio = of_get_named_gpio(pdev->dev.of_node,
						     "qcom,enable-gpio", 0);
	if (!gpio_is_valid(ctrl_pdata->disp_en_gpio)) {
		pr_err("%s:%d, Disp_en gpio not specified\n",
						__func__, __LINE__);
	} else {
		rc = gpio_request(ctrl_pdata->disp_en_gpio, "disp_enable");
		if (rc) {
			pr_err("request reset gpio failed, rc=%d\n",
			       rc);
			gpio_free(ctrl_pdata->disp_en_gpio);
			return -ENODEV;
		}
	}

	ctrl_pdata->disp_te_gpio = of_get_named_gpio(pdev->dev.of_node,
						     "qcom,te-gpio", 0);
	if (!gpio_is_valid(ctrl_pdata->disp_te_gpio)) {
		pr_err("%s:%d, Disp_te gpio not specified\n",
						__func__, __LINE__);
	} else {
		rc = gpio_request(ctrl_pdata->disp_te_gpio, "disp_te");
		if (rc) {
			pr_err("request TE gpio failed, rc=%d\n",
			       rc);
			gpio_free(ctrl_pdata->disp_te_gpio);
			return -ENODEV;
		}
		rc = gpio_tlmm_config(GPIO_CFG(
				ctrl_pdata->disp_te_gpio, 1,
				GPIO_CFG_INPUT,
				GPIO_CFG_PULL_DOWN,
				GPIO_CFG_2MA),
				GPIO_CFG_ENABLE);

		if (rc) {
			pr_err("%s: unable to config tlmm = %d\n",
				__func__, ctrl_pdata->disp_te_gpio);
			gpio_free(ctrl_pdata->disp_te_gpio);
			return -ENODEV;
		}

		rc = gpio_direction_input(ctrl_pdata->disp_te_gpio);
		if (rc) {
			pr_err("set_direction for disp_en gpio failed, rc=%d\n",
			       rc);
			gpio_free(ctrl_pdata->disp_te_gpio);
			return -ENODEV;
		}
		pr_debug("%s: te_gpio=%d\n", __func__,
					ctrl_pdata->disp_te_gpio);
	}


	ctrl_pdata->rst_gpio = of_get_named_gpio(pdev->dev.of_node,
						 "qcom,rst-gpio", 0);
	if (!gpio_is_valid(ctrl_pdata->rst_gpio)) {
		pr_err("%s:%d, reset gpio not specified\n",
						__func__, __LINE__);
	} else {
		rc = gpio_request(ctrl_pdata->rst_gpio, "disp_rst_n");
		if (rc) {
			pr_err("request reset gpio failed, rc=%d\n",
				rc);
			gpio_free(ctrl_pdata->rst_gpio);
			if (gpio_is_valid(ctrl_pdata->disp_en_gpio))
				gpio_free(ctrl_pdata->disp_en_gpio);
			return -ENODEV;
		}
	}

	if (mdss_dsi_clk_init(ctrl_pdev, ctrl_pdata)) {
		pr_err("%s: unable to initialize Dsi ctrl clks\n", __func__);
		return -EPERM;
	}

	if (mdss_dsi_retrieve_ctrl_resources(ctrl_pdev,
					     panel_data->panel_info.pdest,
					     ctrl_pdata)) {
		pr_err("%s: unable to get Dsi controller res\n", __func__);
		return -EPERM;
	}

	ctrl_pdata->panel_data.event_handler = mdss_dsi_event_handler;

	ctrl_pdata->on_cmds = panel_data->on_cmds;
	ctrl_pdata->off_cmds = panel_data->off_cmds;

	memcpy(&((ctrl_pdata->panel_data).panel_info),
				&(panel_data->panel_info),
				       sizeof(struct mdss_panel_info));

	ctrl_pdata->panel_data.set_backlight = panel_data->bl_fnc;
	ctrl_pdata->bklt_ctrl = panel_data->panel_info.bklt_ctrl;
	ctrl_pdata->pwm_pmic_gpio = panel_data->panel_info.pwm_pmic_gpio;
	ctrl_pdata->pwm_period = panel_data->panel_info.pwm_period;
	ctrl_pdata->pwm_lpg_chan = panel_data->panel_info.pwm_lpg_chan;
	ctrl_pdata->bklt_max = panel_data->panel_info.bl_max;

	if (ctrl_pdata->bklt_ctrl == BL_PWM)
		mdss_dsi_panel_pwm_cfg(ctrl_pdata);

	mdss_dsi_ctrl_init(ctrl_pdata);
	/*
	 * register in mdp driver
	 */

	ctrl_pdata->pclk_rate = mipi->dsi_pclk_rate;
	ctrl_pdata->byte_clk_rate = panel_data->panel_info.clk_rate / 8;
	pr_debug("%s: pclk=%d, bclk=%d\n", __func__,
			ctrl_pdata->pclk_rate, ctrl_pdata->byte_clk_rate);

	ctrl_pdata->ctrl_state = CTRL_STATE_UNKNOWN;
	cont_splash_enabled = of_property_read_bool(pdev->dev.of_node,
			"qcom,cont-splash-enabled");
	if (!cont_splash_enabled) {
		pr_info("%s:%d Continuous splash flag not found.\n",
				__func__, __LINE__);
		ctrl_pdata->panel_data.panel_info.cont_splash_enabled = 0;
		ctrl_pdata->panel_data.panel_info.panel_power_on = 0;
	} else {
		pr_info("%s:%d Continuous splash flag enabled.\n",
				__func__, __LINE__);

		ctrl_pdata->panel_data.panel_info.cont_splash_enabled = 1;
		ctrl_pdata->panel_data.panel_info.panel_power_on = 1;
		rc = mdss_dsi_panel_power_on(&(ctrl_pdata->panel_data), 1);
		if (rc) {
			pr_err("%s: Panel power on failed\n", __func__);
			return rc;
		}

		mdss_dsi_clk_ctrl(ctrl_pdata, 1);
		ctrl_pdata->ctrl_state |=
			(CTRL_STATE_PANEL_INIT | CTRL_STATE_MDP_ACTIVE);
	}

	rc = mdss_register_panel(ctrl_pdev, &(ctrl_pdata->panel_data));
	if (rc) {
		dev_err(&pdev->dev, "unable to register MIPI DSI panel\n");
		if (ctrl_pdata->rst_gpio)
			gpio_free(ctrl_pdata->rst_gpio);
		if (gpio_is_valid(ctrl_pdata->disp_en_gpio))
			gpio_free(ctrl_pdata->disp_en_gpio);
		return rc;
	}

	ctrl_pdata->on = panel_data->on;
	ctrl_pdata->off = panel_data->off;

	if (panel_data->panel_info.pdest == DISPLAY_1) {
		mdss_debug_register_base("dsi0",
			ctrl_pdata->ctrl_base, ctrl_pdata->reg_size);
		ctrl_pdata->ndx = 0;
	} else {
		mdss_debug_register_base("dsi1",
			ctrl_pdata->ctrl_base, ctrl_pdata->reg_size);
		ctrl_pdata->ndx = 1;
	}

	pr_debug("%s: Panal data initialized\n", __func__);
	return 0;
}
static int pil_mss_loadable_init(struct modem_data *drv,
					struct platform_device *pdev)
{
	struct q6v5_data *q6;
	struct pil_desc *q6_desc;
	struct resource *res;
	struct property *prop;
	int ret;

	q6 = pil_q6v5_init(pdev);
	if (IS_ERR_OR_NULL(q6))
		return PTR_ERR(q6);
	drv->q6 = q6;
	drv->xo = q6->xo;

	q6_desc = &q6->desc;
	q6_desc->owner = THIS_MODULE;
	q6_desc->proxy_timeout = PROXY_TIMEOUT_MS;

	q6_desc->ops = &pil_msa_mss_ops;

	q6->self_auth = of_property_read_bool(pdev->dev.of_node,
							"qcom,pil-self-auth");
	if (q6->self_auth) {
		res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
						    "rmb_base");
		q6->rmb_base = devm_ioremap_resource(&pdev->dev, res);
		if (!q6->rmb_base)
			return -ENOMEM;
		drv->rmb_base = q6->rmb_base;
		q6_desc->ops = &pil_msa_mss_ops_selfauth;
	}

	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "restart_reg");
	if (!res) {
		res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
							"restart_reg_sec");
		q6->restart_reg_sec = true;
	}

	q6->restart_reg = devm_ioremap_resource(&pdev->dev, res);
	if (!q6->restart_reg)
		return -ENOMEM;

	q6->vreg = NULL;

	prop = of_find_property(pdev->dev.of_node, "vdd_mss-supply", NULL);
	if (prop) {
		q6->vreg = devm_regulator_get(&pdev->dev, "vdd_mss");
		if (IS_ERR(q6->vreg))
			return PTR_ERR(q6->vreg);

		ret = regulator_set_voltage(q6->vreg, VDD_MSS_UV,
						MAX_VDD_MSS_UV);
		if (ret)
			dev_err(&pdev->dev, "Failed to set vreg voltage.\n");

		ret = regulator_set_optimum_mode(q6->vreg, 100000);
		if (ret < 0) {
			dev_err(&pdev->dev, "Failed to set vreg mode.\n");
			return ret;
		}
	}

	q6->vreg_mx = devm_regulator_get(&pdev->dev, "vdd_mx");
	if (IS_ERR(q6->vreg_mx))
		return PTR_ERR(q6->vreg_mx);
	prop = of_find_property(pdev->dev.of_node, "vdd_mx-uV", NULL);
	if (!prop) {
		dev_err(&pdev->dev, "Missing vdd_mx-uV property\n");
		return -EINVAL;
	}

	res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
		"cxrail_bhs_reg");
	if (res)
		q6->cxrail_bhs = devm_ioremap(&pdev->dev, res->start,
					  resource_size(res));

	q6->ahb_clk = devm_clk_get(&pdev->dev, "iface_clk");
	if (IS_ERR(q6->ahb_clk))
		return PTR_ERR(q6->ahb_clk);

	q6->axi_clk = devm_clk_get(&pdev->dev, "bus_clk");
	if (IS_ERR(q6->axi_clk))
		return PTR_ERR(q6->axi_clk);

	q6->rom_clk = devm_clk_get(&pdev->dev, "mem_clk");
	if (IS_ERR(q6->rom_clk))
		return PTR_ERR(q6->rom_clk);

	/* Optional. */
	if (of_property_match_string(pdev->dev.of_node,
			"qcom,active-clock-names", "gpll0_mss_clk") >= 0)
		q6->gpll0_mss_clk = devm_clk_get(&pdev->dev, "gpll0_mss_clk");

	if (of_property_match_string(pdev->dev.of_node,
			"qcom,active-clock-names", "snoc_axi_clk") >= 0)
		q6->snoc_axi_clk = devm_clk_get(&pdev->dev, "snoc_axi_clk");

	if (of_property_match_string(pdev->dev.of_node,
			"qcom,active-clock-names", "mnoc_axi_clk") >= 0)
		q6->mnoc_axi_clk = devm_clk_get(&pdev->dev, "mnoc_axi_clk");

	ret = pil_desc_init(q6_desc);

	return ret;
}
Example #19
0
static int max8907_i2c_probe(struct i2c_client *i2c,
				       const struct i2c_device_id *id)
{
	struct max8907 *max8907;
	int ret;
	struct max8907_platform_data *pdata = dev_get_platdata(&i2c->dev);
	bool pm_off = false;

	if (pdata)
		pm_off = pdata->pm_off;
	else if (i2c->dev.of_node)
		pm_off = of_property_read_bool(i2c->dev.of_node,
					"maxim,system-power-controller");

	max8907 = devm_kzalloc(&i2c->dev, sizeof(struct max8907), GFP_KERNEL);
	if (!max8907) {
		ret = -ENOMEM;
		goto err_alloc_drvdata;
	}

	max8907->dev = &i2c->dev;
	dev_set_drvdata(max8907->dev, max8907);

	max8907->i2c_gen = i2c;
	i2c_set_clientdata(i2c, max8907);
	max8907->regmap_gen = devm_regmap_init_i2c(i2c,
						&max8907_regmap_gen_config);
	if (IS_ERR(max8907->regmap_gen)) {
		ret = PTR_ERR(max8907->regmap_gen);
		dev_err(&i2c->dev, "gen regmap init failed: %d\n", ret);
		goto err_regmap_gen;
	}

	max8907->i2c_rtc = i2c_new_dummy(i2c->adapter, MAX8907_RTC_I2C_ADDR);
	if (!max8907->i2c_rtc) {
		ret = -ENOMEM;
		goto err_dummy_rtc;
	}
	i2c_set_clientdata(max8907->i2c_rtc, max8907);
	max8907->regmap_rtc = devm_regmap_init_i2c(max8907->i2c_rtc,
						&max8907_regmap_rtc_config);
	if (IS_ERR(max8907->regmap_rtc)) {
		ret = PTR_ERR(max8907->regmap_rtc);
		dev_err(&i2c->dev, "rtc regmap init failed: %d\n", ret);
		goto err_regmap_rtc;
	}

	irq_set_status_flags(max8907->i2c_gen->irq, IRQ_NOAUTOEN);

	ret = regmap_add_irq_chip(max8907->regmap_gen, max8907->i2c_gen->irq,
				  IRQF_ONESHOT | IRQF_SHARED, -1,
				  &max8907_chg_irq_chip,
				  &max8907->irqc_chg);
	if (ret != 0) {
		dev_err(&i2c->dev, "failed to add chg irq chip: %d\n", ret);
		goto err_irqc_chg;
	}
	ret = regmap_add_irq_chip(max8907->regmap_gen, max8907->i2c_gen->irq,
				  IRQF_ONESHOT | IRQF_SHARED, -1,
				  &max8907_on_off_irq_chip,
				  &max8907->irqc_on_off);
	if (ret != 0) {
		dev_err(&i2c->dev, "failed to add on off irq chip: %d\n", ret);
		goto err_irqc_on_off;
	}
	ret = regmap_add_irq_chip(max8907->regmap_rtc, max8907->i2c_gen->irq,
				  IRQF_ONESHOT | IRQF_SHARED, -1,
				  &max8907_rtc_irq_chip,
				  &max8907->irqc_rtc);
	if (ret != 0) {
		dev_err(&i2c->dev, "failed to add rtc irq chip: %d\n", ret);
		goto err_irqc_rtc;
	}

	enable_irq(max8907->i2c_gen->irq);

	ret = mfd_add_devices(max8907->dev, -1, max8907_cells,
			      ARRAY_SIZE(max8907_cells), NULL, 0, NULL);
	if (ret != 0) {
		dev_err(&i2c->dev, "failed to add MFD devices %d\n", ret);
		goto err_add_devices;
	}

	if (pm_off && !pm_power_off) {
		max8907_pm_off = max8907;
		pm_power_off = max8907_power_off;
	}

	return 0;

err_add_devices:
	regmap_del_irq_chip(max8907->i2c_gen->irq, max8907->irqc_rtc);
err_irqc_rtc:
	regmap_del_irq_chip(max8907->i2c_gen->irq, max8907->irqc_on_off);
err_irqc_on_off:
	regmap_del_irq_chip(max8907->i2c_gen->irq, max8907->irqc_chg);
err_irqc_chg:
err_regmap_rtc:
	i2c_unregister_device(max8907->i2c_rtc);
err_dummy_rtc:
err_regmap_gen:
err_alloc_drvdata:
	return ret;
}
Example #20
0
/* parse wled dtsi parameters */
static int qpnp_wled_parse_dt(struct qpnp_wled *wled)
{
	struct spmi_device *spmi = wled->spmi;
	struct property *prop;
	const char *temp_str;
	u32 temp_val;
	int rc, i;

	wled->cdev.name = "wled";
	rc = of_property_read_string(spmi->dev.of_node,
			"linux,name", &wled->cdev.name);
	if (rc && (rc != -EINVAL)) {
		dev_err(&spmi->dev, "Unable to read led name\n");
		return rc;
	}

	wled->cdev.default_trigger = QPNP_WLED_TRIGGER_NONE;
	rc = of_property_read_string(spmi->dev.of_node, "linux,default-trigger",
					&wled->cdev.default_trigger);
	if (rc && (rc != -EINVAL)) {
		dev_err(&spmi->dev, "Unable to read led trigger\n");
		return rc;
	}

	wled->disp_type_amoled = of_property_read_bool(spmi->dev.of_node,
				"qcom,disp-type-amoled");

	wled->fdbk_op = QPNP_WLED_FDBK_AUTO;
	rc = of_property_read_string(spmi->dev.of_node,
			"qcom,fdbk-output", &temp_str);
	if (!rc) {
		if (strcmp(temp_str, "wled1") == 0)
			wled->fdbk_op = QPNP_WLED_FDBK_WLED1;
		else if (strcmp(temp_str, "wled2") == 0)
			wled->fdbk_op = QPNP_WLED_FDBK_WLED2;
		else if (strcmp(temp_str, "wled3") == 0)
			wled->fdbk_op = QPNP_WLED_FDBK_WLED3;
		else if (strcmp(temp_str, "wled4") == 0)
			wled->fdbk_op = QPNP_WLED_FDBK_WLED4;
		else
			wled->fdbk_op = QPNP_WLED_FDBK_AUTO;
	} else if (rc != -EINVAL) {
		dev_err(&spmi->dev, "Unable to read feedback output\n");
		return rc;
	}

	wled->vref_mv = QPNP_WLED_DFLT_VREF_MV;
	rc = of_property_read_u32(spmi->dev.of_node,
			"qcom,vref-mv", &temp_val);
	if (!rc) {
		wled->vref_mv = temp_val;
	} else if (rc != -EINVAL) {
		dev_err(&spmi->dev, "Unable to read vref\n");
		return rc;
	}

	wled->switch_freq_khz = QPNP_WLED_SWITCH_FREQ_800_KHZ;
	rc = of_property_read_u32(spmi->dev.of_node,
			"qcom,switch-freq-khz", &temp_val);
	if (!rc) {
		wled->switch_freq_khz = temp_val;
	} else if (rc != -EINVAL) {
		dev_err(&spmi->dev, "Unable to read switch freq\n");
		return rc;
	}

	wled->ovp_mv = QPNP_WLED_OVP_29500_MV;
	rc = of_property_read_u32(spmi->dev.of_node,
			"qcom,ovp-mv", &temp_val);
	if (!rc) {
		wled->ovp_mv = temp_val;
	} else if (rc != -EINVAL) {
		dev_err(&spmi->dev, "Unable to read vref\n");
		return rc;
	}

	wled->ilim_ma = QPNP_WLED_DFLT_ILIM_MA;
	rc = of_property_read_u32(spmi->dev.of_node,
			"qcom,ilim-ma", &temp_val);
	if (!rc) {
		wled->ilim_ma = temp_val;
	} else if (rc != -EINVAL) {
		dev_err(&spmi->dev, "Unable to read ilim\n");
		return rc;
	}

	wled->boost_duty_ns = QPNP_WLED_DEF_BOOST_DUTY_NS;
	rc = of_property_read_u32(spmi->dev.of_node,
			"qcom,boost-duty-ns", &temp_val);
	if (!rc) {
		wled->boost_duty_ns = temp_val;
	} else if (rc != -EINVAL) {
		dev_err(&spmi->dev, "Unable to read boost duty\n");
		return rc;
	}

	wled->mod_freq_khz = QPNP_WLED_MOD_FREQ_9600_KHZ;
	rc = of_property_read_u32(spmi->dev.of_node,
			"qcom,mod-freq-khz", &temp_val);
	if (!rc) {
		wled->mod_freq_khz = temp_val;
	} else if (rc != -EINVAL) {
		dev_err(&spmi->dev, "Unable to read modulation freq\n");
		return rc;
	}

	wled->dim_mode = QPNP_WLED_DIM_HYBRID;
	rc = of_property_read_string(spmi->dev.of_node,
			"qcom,dim-mode", &temp_str);
	if (!rc) {
		if (strcmp(temp_str, "analog") == 0)
			wled->dim_mode = QPNP_WLED_DIM_ANALOG;
		else if (strcmp(temp_str, "digital") == 0)
			wled->dim_mode = QPNP_WLED_DIM_DIGITAL;
		else
			wled->dim_mode = QPNP_WLED_DIM_HYBRID;
	} else if (rc != -EINVAL) {
		dev_err(&spmi->dev, "Unable to read dim mode\n");
		return rc;
	}

	if (wled->dim_mode == QPNP_WLED_DIM_HYBRID) {
		wled->hyb_thres = QPNP_WLED_DEF_HYB_THRES;
		rc = of_property_read_u32(spmi->dev.of_node,
				"qcom,hyb-thres", &temp_val);
		if (!rc) {
			wled->hyb_thres = temp_val;
		} else if (rc != -EINVAL) {
			dev_err(&spmi->dev, "Unable to read hyb threshold\n");
			return rc;
		}
	}

	wled->sync_dly_us = QPNP_WLED_DEF_SYNC_DLY_US;
	rc = of_property_read_u32(spmi->dev.of_node,
			"qcom,sync-dly-us", &temp_val);
	if (!rc) {
		wled->sync_dly_us = temp_val;
	} else if (rc != -EINVAL) {
		dev_err(&spmi->dev, "Unable to read sync delay\n");
		return rc;
	}

	wled->fs_curr_ua = QPNP_WLED_FS_CURR_MAX_UA;
	rc = of_property_read_u32(spmi->dev.of_node,
			"qcom,fs-curr-ua", &temp_val);
	if (!rc) {
		wled->fs_curr_ua = temp_val;
	} else if (rc != -EINVAL) {
		dev_err(&spmi->dev, "Unable to read full scale current\n");
		return rc;
	}

	wled->en_9b_dim_res = of_property_read_bool(spmi->dev.of_node,
			"qcom,en-9b-dim-res");
	wled->en_phase_stag = of_property_read_bool(spmi->dev.of_node,
			"qcom,en-phase-stag");
	wled->en_cabc = of_property_read_bool(spmi->dev.of_node,
			"qcom,en-cabc");

	prop = of_find_property(spmi->dev.of_node,
			"qcom,led-strings-list", &temp_val);
	if (!prop || !temp_val || temp_val > QPNP_WLED_MAX_STRINGS) {
		dev_err(&spmi->dev, "Invalid strings info, use default");
		wled->num_strings = QPNP_WLED_MAX_STRINGS;
		for (i = 0; i < wled->num_strings; i++)
			wled->strings[i] = i;
	} else {
		wled->num_strings = temp_val;
		memcpy(wled->strings, prop->value, temp_val);
	}

	wled->ibb_bias_active = of_property_read_bool(spmi->dev.of_node,
				"qcom,ibb-bias-active");

	wled->ibb_pwrup_dly_ms = QPNP_WLED_IBB_PWRUP_DLY_MIN_MS;
	rc = of_property_read_u32(spmi->dev.of_node,
				"qcom,ibb-pwrup-dly", &temp_val);
	if (!rc) {
		wled->ibb_pwrup_dly_ms = temp_val;
	} else if (rc != -EINVAL) {
		dev_err(&spmi->dev, "Unable to read ibb pwrup delay\n");
		return rc;
	}

	wled->lab_fast_precharge = of_property_read_bool(spmi->dev.of_node,
				"qcom,lab-fast-precharge");

	wled->ovp_irq = spmi_get_irq_byname(spmi, NULL, "ovp-irq");
	if (wled->ovp_irq < 0)
		dev_dbg(&spmi->dev, "ovp irq is not used\n");

	wled->sc_irq = spmi_get_irq_byname(spmi, NULL, "sc-irq");
	if (wled->sc_irq < 0)
		dev_dbg(&spmi->dev, "sc irq is not used\n");

	wled->en_ext_pfet_sc_pro = of_property_read_bool(spmi->dev.of_node,
					"qcom,en-ext-pfet-sc-pro");

	return 0;
}
Example #21
0
static int omap_rtc_probe(struct platform_device *pdev)
{
	struct omap_rtc	*rtc;
	struct resource	*res;
	u8 reg, mask, new_ctrl;
	const struct platform_device_id *id_entry;
	const struct of_device_id *of_id;
	int ret;

	rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
	if (!rtc)
		return -ENOMEM;

	of_id = of_match_device(omap_rtc_of_match, &pdev->dev);
	if (of_id) {
		rtc->type = of_id->data;
		rtc->is_pmic_controller = rtc->type->has_pmic_mode &&
				of_property_read_bool(pdev->dev.of_node,
						"system-power-controller");
	} else {
		id_entry = platform_get_device_id(pdev);
		rtc->type = (void *)id_entry->driver_data;
	}

	rtc->irq_timer = platform_get_irq(pdev, 0);
	if (rtc->irq_timer <= 0)
		return -ENOENT;

	rtc->irq_alarm = platform_get_irq(pdev, 1);
	if (rtc->irq_alarm <= 0)
		return -ENOENT;

	rtc->clk = devm_clk_get(&pdev->dev, "ext-clk");
	if (!IS_ERR(rtc->clk))
		rtc->has_ext_clk = true;
	else
		rtc->clk = devm_clk_get(&pdev->dev, "int-clk");

	if (!IS_ERR(rtc->clk))
		clk_prepare_enable(rtc->clk);

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	rtc->base = devm_ioremap_resource(&pdev->dev, res);
	if (IS_ERR(rtc->base)) {
		clk_disable_unprepare(rtc->clk);
		return PTR_ERR(rtc->base);
	}

	platform_set_drvdata(pdev, rtc);

	/* Enable the clock/module so that we can access the registers */
	pm_runtime_enable(&pdev->dev);
	pm_runtime_get_sync(&pdev->dev);

	rtc->type->unlock(rtc);

	/*
	 * disable interrupts
	 *
	 * NOTE: ALARM2 is not cleared on AM3352 if rtc_write (writeb) is used
	 */
	rtc_writel(rtc, OMAP_RTC_INTERRUPTS_REG, 0);

	/* enable RTC functional clock */
	if (rtc->type->has_32kclk_en) {
		reg = rtc_read(rtc, OMAP_RTC_OSC_REG);
		rtc_writel(rtc, OMAP_RTC_OSC_REG,
				reg | OMAP_RTC_OSC_32KCLK_EN);
	}

	/* clear old status */
	reg = rtc_read(rtc, OMAP_RTC_STATUS_REG);

	mask = OMAP_RTC_STATUS_ALARM;

	if (rtc->type->has_pmic_mode)
		mask |= OMAP_RTC_STATUS_ALARM2;

	if (rtc->type->has_power_up_reset) {
		mask |= OMAP_RTC_STATUS_POWER_UP;
		if (reg & OMAP_RTC_STATUS_POWER_UP)
			dev_info(&pdev->dev, "RTC power up reset detected\n");
	}

	if (reg & mask)
		rtc_write(rtc, OMAP_RTC_STATUS_REG, reg & mask);

	/* On boards with split power, RTC_ON_NOFF won't reset the RTC */
	reg = rtc_read(rtc, OMAP_RTC_CTRL_REG);
	if (reg & OMAP_RTC_CTRL_STOP)
		dev_info(&pdev->dev, "already running\n");

	/* force to 24 hour mode */
	new_ctrl = reg & (OMAP_RTC_CTRL_SPLIT | OMAP_RTC_CTRL_AUTO_COMP);
	new_ctrl |= OMAP_RTC_CTRL_STOP;

	/*
	 * BOARD-SPECIFIC CUSTOMIZATION CAN GO HERE:
	 *
	 *  - Device wake-up capability setting should come through chip
	 *    init logic. OMAP1 boards should initialize the "wakeup capable"
	 *    flag in the platform device if the board is wired right for
	 *    being woken up by RTC alarm. For OMAP-L138, this capability
	 *    is built into the SoC by the "Deep Sleep" capability.
	 *
	 *  - Boards wired so RTC_ON_nOFF is used as the reset signal,
	 *    rather than nPWRON_RESET, should forcibly enable split
	 *    power mode.  (Some chip errata report that RTC_CTRL_SPLIT
	 *    is write-only, and always reads as zero...)
	 */

	if (new_ctrl & OMAP_RTC_CTRL_SPLIT)
		dev_info(&pdev->dev, "split power mode\n");

	if (reg != new_ctrl)
		rtc_write(rtc, OMAP_RTC_CTRL_REG, new_ctrl);

	/*
	 * If we have the external clock then switch to it so we can keep
	 * ticking across suspend.
	 */
	if (rtc->has_ext_clk) {
		reg = rtc_read(rtc, OMAP_RTC_OSC_REG);
		reg &= ~OMAP_RTC_OSC_OSC32K_GZ_DISABLE;
		reg |= OMAP_RTC_OSC_32KCLK_EN | OMAP_RTC_OSC_SEL_32KCLK_SRC;
		rtc_writel(rtc, OMAP_RTC_OSC_REG, reg);
	}

	rtc->type->lock(rtc);

	device_init_wakeup(&pdev->dev, true);

	rtc->rtc = devm_rtc_allocate_device(&pdev->dev);
	if (IS_ERR(rtc->rtc)) {
		ret = PTR_ERR(rtc->rtc);
		goto err;
	}

	rtc->rtc->ops = &omap_rtc_ops;
	omap_rtc_nvmem_config.priv = rtc;

	/* handle periodic and alarm irqs */
	ret = devm_request_irq(&pdev->dev, rtc->irq_timer, rtc_irq, 0,
			dev_name(&rtc->rtc->dev), rtc);
	if (ret)
		goto err;

	if (rtc->irq_timer != rtc->irq_alarm) {
		ret = devm_request_irq(&pdev->dev, rtc->irq_alarm, rtc_irq, 0,
				dev_name(&rtc->rtc->dev), rtc);
		if (ret)
			goto err;
	}

	if (rtc->is_pmic_controller) {
		if (!pm_power_off) {
			omap_rtc_power_off_rtc = rtc;
			pm_power_off = omap_rtc_power_off;
		}
	}

	/* Support ext_wakeup pinconf */
	rtc_pinctrl_desc.name = dev_name(&pdev->dev);

	rtc->pctldev = pinctrl_register(&rtc_pinctrl_desc, &pdev->dev, rtc);
	if (IS_ERR(rtc->pctldev)) {
		dev_err(&pdev->dev, "Couldn't register pinctrl driver\n");
		ret = PTR_ERR(rtc->pctldev);
		goto err;
	}

	ret = rtc_register_device(rtc->rtc);
	if (ret)
		goto err;

	rtc_nvmem_register(rtc->rtc, &omap_rtc_nvmem_config);

	return 0;

err:
	clk_disable_unprepare(rtc->clk);
	device_init_wakeup(&pdev->dev, false);
	rtc->type->lock(rtc);
	pm_runtime_put_sync(&pdev->dev);
	pm_runtime_disable(&pdev->dev);

	return ret;
}
Example #22
0
static void analogix_dp_bridge_mode_set(struct drm_bridge *bridge,
					struct drm_display_mode *orig_mode,
					struct drm_display_mode *mode)
{
	struct analogix_dp_device *dp = bridge->driver_private;
	struct drm_display_info *display_info = &dp->connector.display_info;
	struct video_info *video = &dp->video_info;
	struct device_node *dp_node = dp->dev->of_node;
	int vic;

	/* Input video interlaces & hsync pol & vsync pol */
	video->interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
	video->v_sync_polarity = !!(mode->flags & DRM_MODE_FLAG_NVSYNC);
	video->h_sync_polarity = !!(mode->flags & DRM_MODE_FLAG_NHSYNC);

	/* Input video dynamic_range & colorimetry */
	vic = drm_match_cea_mode(mode);
	if ((vic == 6) || (vic == 7) || (vic == 21) || (vic == 22) ||
	    (vic == 2) || (vic == 3) || (vic == 17) || (vic == 18)) {
		video->dynamic_range = CEA;
		video->ycbcr_coeff = COLOR_YCBCR601;
	} else if (vic) {
		video->dynamic_range = CEA;
		video->ycbcr_coeff = COLOR_YCBCR709;
	} else {
		video->dynamic_range = VESA;
		video->ycbcr_coeff = COLOR_YCBCR709;
	}

	/* Input vide bpc and color_formats */
	switch (display_info->bpc) {
	case 12:
		video->color_depth = COLOR_12;
		break;
	case 10:
		video->color_depth = COLOR_10;
		break;
	case 8:
		video->color_depth = COLOR_8;
		break;
	case 6:
		video->color_depth = COLOR_6;
		break;
	default:
		video->color_depth = COLOR_8;
		break;
	}
	if (display_info->color_formats & DRM_COLOR_FORMAT_YCRCB444)
		video->color_space = COLOR_YCBCR444;
	else if (display_info->color_formats & DRM_COLOR_FORMAT_YCRCB422)
		video->color_space = COLOR_YCBCR422;
	else if (display_info->color_formats & DRM_COLOR_FORMAT_RGB444)
		video->color_space = COLOR_RGB;
	else
		video->color_space = COLOR_RGB;

	/*
	 * NOTE: those property parsing code is used for providing backward
	 * compatibility for samsung platform.
	 * Due to we used the "of_property_read_u32" interfaces, when this
	 * property isn't present, the "video_info" can keep the original
	 * values and wouldn't be modified.
	 */
	of_property_read_u32(dp_node, "samsung,color-space",
			     &video->color_space);
	of_property_read_u32(dp_node, "samsung,dynamic-range",
			     &video->dynamic_range);
	of_property_read_u32(dp_node, "samsung,ycbcr-coeff",
			     &video->ycbcr_coeff);
	of_property_read_u32(dp_node, "samsung,color-depth",
			     &video->color_depth);
	if (of_property_read_bool(dp_node, "hsync-active-high"))
		video->h_sync_polarity = true;
	if (of_property_read_bool(dp_node, "vsync-active-high"))
		video->v_sync_polarity = true;
	if (of_property_read_bool(dp_node, "interlaced"))
		video->interlaced = true;
}
static int gen_panel_backlight_probe(struct platform_device *pdev)
{
	struct backlight_device *bd;
	struct backlight_properties props;
	struct gen_panel_backlight_info *bl_info;
	int ret;
	bool outdoor_mode_en;

	pr_info("called %s\n", __func__);

	bl_info = devm_kzalloc(&pdev->dev,
			sizeof(*bl_info), GFP_KERNEL);
	if (unlikely(!bl_info))
		return -ENOMEM;

	if (IS_ENABLED(CONFIG_OF)) {
		struct device_node *np = pdev->dev.of_node;
		int arr[MAX_BRT_VALUE_IDX * 2], i;

		ret = of_property_read_string(np,
				"gen-panel-backlight-name",
				&bl_info->name);

		outdoor_mode_en = of_property_read_bool(np,
				"gen-panel-outdoor-mode-en");
		if (outdoor_mode_en) {
			ret = of_property_read_u32_array(np,
					"backlight-brt-outdoor",arr, 2);
			bl_info->outdoor_value.brightness = arr[0];
			bl_info->outdoor_value.tune_level = arr[1];
		}
		ret = of_property_read_u32_array(np,
				"gen-panel-backlight-brt-range",
				arr, MAX_BRT_VALUE_IDX * 2);
		for (i = 0; i < MAX_BRT_VALUE_IDX; i++) {
			bl_info->range[i].brightness = arr[i * 2];
			bl_info->range[i].tune_level = arr[i * 2 + 1];
		}

		pr_info("backlight device : %s\n", bl_info->name);
		pr_info("[BRT_VALUE_OFF] brightness(%d), tune_level(%d)\n",
				bl_info->range[BRT_VALUE_OFF].brightness,
				bl_info->range[BRT_VALUE_OFF].tune_level);
		pr_info("[BRT_VALUE_MIN] brightness(%d), tune_level(%d)\n",
				bl_info->range[BRT_VALUE_MIN].brightness,
				bl_info->range[BRT_VALUE_MIN].tune_level);
		pr_info("[BRT_VALUE_DIM] brightness(%d), tune_level(%d)\n",
				bl_info->range[BRT_VALUE_DIM].brightness,
				bl_info->range[BRT_VALUE_DIM].tune_level);
		pr_info("[BRT_VALUE_DEF] brightness(%d), tune_level(%d)\n",
				bl_info->range[BRT_VALUE_DEF].brightness,
				bl_info->range[BRT_VALUE_DEF].tune_level);
		pr_info("[BRT_VALUE_MAX] brightness(%d), tune_level(%d)\n",
				bl_info->range[BRT_VALUE_MAX].brightness,
				bl_info->range[BRT_VALUE_MAX].tune_level);
	} else {
		if (unlikely(pdev->dev.platform_data == NULL)) {
			dev_err(&pdev->dev, "no platform data!\n");
			ret = -EINVAL;
		}
	}

	memset(&props, 0, sizeof(struct backlight_properties));
	props.type = BACKLIGHT_RAW;
	props.max_brightness = bl_info->range[BRT_VALUE_MAX].brightness;
	props.brightness = (u8)bl_info->range[BRT_VALUE_DEF].brightness;
	bl_info->current_brightness =
		(u8)bl_info->range[BRT_VALUE_DEF].brightness;

	bd = backlight_device_register(bl_info->name, &pdev->dev, bl_info,
			&gen_panel_backlight_ops, &props);
	if (IS_ERR(bd)) {
		dev_err(&pdev->dev, "failed to register backlight\n");
		ret = PTR_ERR(bd);
	}
	bl_dev = bd;

	mutex_init(&bl_info->ops_lock);
	if (outdoor_mode_en) {
		ret = device_create_file(&bd->dev, &dev_attr_auto_brightness);
		if (unlikely(ret < 0)) {
			pr_err("Failed to create device file(%s)!\n",
					dev_attr_auto_brightness.attr.name);
		}
	}
	bl_info->enable = true;
	pm_runtime_enable(&pdev->dev);
	platform_set_drvdata(pdev, bd);
	pm_runtime_get_sync(&pdev->dev);

	return 0;

}
Example #24
0
int analogix_dp_bind(struct device *dev, struct drm_device *drm_dev,
		     struct analogix_dp_plat_data *plat_data)
{
	struct platform_device *pdev = to_platform_device(dev);
	struct analogix_dp_device *dp;
	struct resource *res;
	unsigned int irq_flags;
	int ret;

	if (!plat_data) {
		dev_err(dev, "Invalided input plat_data\n");
		return -EINVAL;
	}

	dp = devm_kzalloc(dev, sizeof(struct analogix_dp_device), GFP_KERNEL);
	if (!dp)
		return -ENOMEM;

	dev_set_drvdata(dev, dp);

	dp->dev = &pdev->dev;
	dp->dpms_mode = DRM_MODE_DPMS_OFF;

	mutex_init(&dp->panel_lock);
	dp->panel_is_modeset = false;

	/*
	 * platform dp driver need containor_of the plat_data to get
	 * the driver private data, so we need to store the point of
	 * plat_data, not the context of plat_data.
	 */
	dp->plat_data = plat_data;

	ret = analogix_dp_dt_parse_pdata(dp);
	if (ret)
		return ret;

	dp->phy = devm_phy_get(dp->dev, "dp");
	if (IS_ERR(dp->phy)) {
		dev_err(dp->dev, "no DP phy configured\n");
		ret = PTR_ERR(dp->phy);
		if (ret) {
			/*
			 * phy itself is not enabled, so we can move forward
			 * assigning NULL to phy pointer.
			 */
			if (ret == -ENOSYS || ret == -ENODEV)
				dp->phy = NULL;
			else
				return ret;
		}
	}

	dp->clock = devm_clk_get(&pdev->dev, "dp");
	if (IS_ERR(dp->clock)) {
		dev_err(&pdev->dev, "failed to get clock\n");
		return PTR_ERR(dp->clock);
	}

	clk_prepare_enable(dp->clock);

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);

	dp->reg_base = devm_ioremap_resource(&pdev->dev, res);
	if (IS_ERR(dp->reg_base))
		return PTR_ERR(dp->reg_base);

	dp->force_hpd = of_property_read_bool(dev->of_node, "force-hpd");

	dp->hpd_gpio = of_get_named_gpio(dev->of_node, "hpd-gpios", 0);
	if (!gpio_is_valid(dp->hpd_gpio))
		dp->hpd_gpio = of_get_named_gpio(dev->of_node,
						 "samsung,hpd-gpio", 0);

	if (gpio_is_valid(dp->hpd_gpio)) {
		/*
		 * Set up the hotplug GPIO from the device tree as an interrupt.
		 * Simply specifying a different interrupt in the device tree
		 * doesn't work since we handle hotplug rather differently when
		 * using a GPIO.  We also need the actual GPIO specifier so
		 * that we can get the current state of the GPIO.
		 */
		ret = devm_gpio_request_one(&pdev->dev, dp->hpd_gpio, GPIOF_IN,
					    "hpd_gpio");
		if (ret) {
			dev_err(&pdev->dev, "failed to get hpd gpio\n");
			return ret;
		}
		dp->irq = gpio_to_irq(dp->hpd_gpio);
		irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING;
	} else {
		dp->hpd_gpio = -ENODEV;
		dp->irq = platform_get_irq(pdev, 0);
		irq_flags = 0;
	}

	if (dp->irq == -ENXIO) {
		dev_err(&pdev->dev, "failed to get irq\n");
		return -ENODEV;
	}

	pm_runtime_enable(dev);

	phy_power_on(dp->phy);

	analogix_dp_init_dp(dp);

	ret = devm_request_threaded_irq(&pdev->dev, dp->irq,
					analogix_dp_hardirq,
					analogix_dp_irq_thread,
					irq_flags, "analogix-dp", dp);
	if (ret) {
		dev_err(&pdev->dev, "failed to request irq\n");
		goto err_disable_pm_runtime;
	}
	disable_irq(dp->irq);

	dp->drm_dev = drm_dev;
	dp->encoder = dp->plat_data->encoder;

	ret = analogix_dp_create_bridge(drm_dev, dp);
	if (ret) {
		DRM_ERROR("failed to create bridge (%d)\n", ret);
		drm_encoder_cleanup(dp->encoder);
		goto err_disable_pm_runtime;
	}

	return 0;

err_disable_pm_runtime:
	pm_runtime_disable(dev);

	return ret;
}
static int of_sii8240_parse_dt(void)
{
	struct sii8240_platform_data *pdata = g_pdata;
	struct device_node *np = pdata->tmds_client->dev.of_node;
	struct device *pdev = &pdata->tmds_client->dev;
	char *temp_string = NULL;

	struct platform_device *hdmi_pdev = NULL;
	struct device_node *hdmi_tx_node = NULL;

	pdata->gpio_mhl_irq = of_get_named_gpio_flags(np,
		"sii8240,gpio_mhl_irq", 0, NULL);
	if (pdata->gpio_mhl_irq > 0)
		pr_info("gpio: mhl_irq = %d\n", pdata->gpio_mhl_irq);

	pdata->gpio_mhl_reset = of_get_named_gpio_flags(np,
		"sii8240,gpio_mhl_reset", 0, NULL);
	if (pdata->gpio_mhl_reset > 0)
		pr_info("gpio: mhl_reset = %d\n", pdata->gpio_mhl_reset);

	if(of_property_read_string(np,
		"sii8240,gpio_mhl_reset_type",
		(const char **)&temp_string) == 0) {
		pdata->gpio_mhl_reset_type = of_sii8240_get_gpio_type(temp_string);
		pr_info("%s() gpio_mhl_reset_type = %d\n", __func__, pdata->gpio_mhl_reset_type);
	}

	pdata->gpio_mhl_wakeup = of_get_named_gpio_flags(np,
		"sii8240,gpio_mhl_wakeup", 0, NULL);
	if (pdata->gpio_mhl_wakeup > 0)
		pr_info("gpio: mhl_wakeup = %d\n", pdata->gpio_mhl_wakeup);

	pdata->gpio_mhl_scl = of_get_named_gpio_flags(np,
		"sii8240,gpio_mhl_scl", 0, NULL);
	if (pdata->gpio_mhl_scl > 0)
		pr_info("gpio: mhl_scl = %d\n",
					pdata->gpio_mhl_scl);

	pdata->gpio_mhl_sda = of_get_named_gpio_flags(np,
		"sii8240,gpio_mhl_sda", 0, NULL);
	if (pdata->gpio_mhl_sda > 0)
		pr_info("gpio: mhl_sda = %d\n", pdata->gpio_mhl_sda);

	pdata->gpio_mhl_en = of_get_named_gpio_flags(np,
		"sii8240,gpio_mhl_en", 0, NULL);
	if (pdata->gpio_mhl_en > 0)
		pr_info("gpio: mhl_en = %d\n", pdata->gpio_mhl_en);

	temp_string = NULL;
	if(of_property_read_string(np,
		"sii8240,gpio_mhl_en_type",
		(const char **)&temp_string) == 0) {
		pdata->gpio_mhl_en_type = of_sii8240_get_gpio_type(temp_string);
		pr_info("%s() gpio_mhl_en_type = %d\n", __func__, pdata->gpio_mhl_en_type);
	}

	pdata->gpio_ta_int = of_get_named_gpio_flags(np,
		"sii8240,gpio_ta_int", 0, NULL);
	if (pdata->gpio_ta_int > 0)
		pr_info("gpio: ta_int = %d\n", pdata->gpio_ta_int);

#ifdef	CONFIG_MACH_LT03_EUR
	pdata->swing_level = 0x0D; /*1 5*/
	pr_info("swing_level = 0x%X\n", pdata->swing_level);
#else
	if (!of_property_read_u32(np, "sii8240,swing_level",
				&pdata->swing_level))
		pr_info("swing_level = 0x%X\n", pdata->swing_level);
#endif
	if (!of_property_read_u32(np, "sii8240,damping",
				&pdata->damping))
		pr_info("damping = 0x%X\n", pdata->damping);
	else
		pdata->damping = BIT_MHLTX_CTL3_DAMPING_SEL_OFF;

	pdata->gpio_barcode_emul = of_property_read_bool(np,
			"sii8240,barcode_emul");
	pr_info("barcode_emul = %s\n",
			pdata->gpio_barcode_emul ? "true" : "false");

	pdata->drm_workaround = of_property_read_bool(np,
			"sii8240,drm_workaround");
	pr_info("drm_workaround = %s\n",
			pdata->drm_workaround ? "true" : "false");

	pdata->vcc_1p2v = regulator_get(pdev, "vcc_1p2v");
	if (IS_ERR(pdata->vcc_1p2v)) {
		pdata->vcc_1p2v = regulator_get(pdev, "max77826_ldo3");
		if (IS_ERR(pdata->vcc_1p2v)) {
			pr_err("sii8240,vcc_1p2v is not exist in device tree\n");
			pdata->vcc_1p2v = NULL;
		}
	}

	pdata->vcc_1p8v = regulator_get(pdev, "vcc_1p8v");
	if (IS_ERR(pdata->vcc_1p8v)) {
		pdata->vcc_1p8v = regulator_get(pdev, "max77826_ldo7");
		if (IS_ERR(pdata->vcc_1p8v)) {
			pr_err("sii8240,vcc_1p8v is not exist in device tree\n");
			pdata->vcc_1p8v = NULL;
		}
	}

	pdata->vcc_3p3v = regulator_get(pdev, "vcc_3p3v");
	if (IS_ERR(pdata->vcc_3p3v)) {
		pdata->vcc_3p3v = regulator_get(pdev, "max77826_ldo14");
		if (IS_ERR(pdata->vcc_3p3v)) {
			pr_err("sii8240,vcc_3p3v is not exist in device tree\n");
			pdata->vcc_3p3v = NULL;
		}
	}

	/* parse phandle for hdmi tx */
	hdmi_tx_node = of_parse_phandle(np, "qcom,hdmi-tx-map", 0);
	if (!hdmi_tx_node) {
		pr_err("%s: can't find hdmi phandle\n", __func__);
		goto finish;
	}

	hdmi_pdev = of_find_device_by_node(hdmi_tx_node);
	if (!hdmi_pdev) {
		pr_err("%s: can't find the device by node\n", __func__);
		goto finish;
	}
	pr_info("%s: hdmi_pdev [0X%x] to pdata->pdev\n",
	       __func__, (unsigned int)hdmi_pdev);

	pdata->hdmi_pdev = hdmi_pdev;
finish:

	return 0;
}
struct coresight_platform_data_s *of_get_coresight_platform_cfg(struct device_node *node)
{
	int i, ret = 0;
	int outports_len = 0;
/*
	struct clk *clk;
*/
	struct device_node *child_node, *cpu;
	struct coresight_platform_data_s *pdata;

	pdata = osl_malloc(sizeof(*pdata));
	if (!pdata)
		return NULL;

    memset_s((void *)pdata, sizeof(*pdata), 0, sizeof(*pdata));

	ret = of_property_read_u32(node, "coresight-id", (u32*)&pdata->id);
	if (ret)
		goto err;

	ret = of_property_read_string(node, "coresight-name", &pdata->name);
	if (ret)
		goto err;

	ret = of_property_read_u32(node, "coresight-nr-inports",
				   (u32*)&pdata->nr_inports);
	if (ret)
		goto err;

	pdata->nr_outports = 0;
	if (of_get_property(node, "coresight-outports", &outports_len))
		pdata->nr_outports = (unsigned int)outports_len/sizeof(uint32_t);

	if (pdata->nr_outports)
    {
        pdata->outports = osl_malloc((unsigned int)pdata->nr_outports*sizeof(*pdata->outports));
		if (!pdata->outports)
            goto err;

        memset_s((void *)pdata->outports, (unsigned int)pdata->nr_outports*sizeof(*pdata->outports), 0,
            (unsigned int)pdata->nr_outports*sizeof(*pdata->outports));

		ret = of_property_read_u32_array(node, "coresight-outports",
						 (u32 *)pdata->outports,
						 pdata->nr_outports);
		if (ret)
			goto err;

        pdata->child_ids = osl_malloc(pdata->nr_outports*sizeof(*pdata->child_ids));
		if (!pdata->child_ids)
			goto err;

        memset_s((void *)pdata->child_ids, pdata->nr_outports*sizeof(*pdata->child_ids), 0,
            pdata->nr_outports*sizeof(*pdata->child_ids));

		for (i = 0; i < (int)pdata->nr_outports; i++) {
			child_node = of_parse_phandle(node,
						      "coresight-child-list",
						      i);
			if (!child_node)
                goto err;

			ret = of_property_read_u32(child_node, "coresight-id",
						   (u32 *)&pdata->child_ids[i]);
			of_node_put(child_node);
			if (ret)
				goto err;
		}

        pdata->child_ports = osl_malloc(pdata->nr_outports*sizeof(*pdata->child_ports));
		if (!pdata->child_ports)
			goto err;

        memset_s((void *)pdata->child_ports,pdata->nr_outports*sizeof(*pdata->child_ports),0,
            pdata->nr_outports*sizeof(*pdata->child_ports));

		ret = of_property_read_u32_array(node, "coresight-child-ports",
						 (u32 *)pdata->child_ports,
						 pdata->nr_outports);
		if (ret)
			goto err;
	}

	pdata->default_sink = of_property_read_bool(node,
						    "coresight-default-sink");

	/* affinity defaults to CPU0 */
	pdata->cpu = 0;
	cpu = of_parse_phandle(node, "cpu", 0);
	if (cpu) {
		const u32 *mpidr;
		int len;

		mpidr = of_get_property(cpu, "reg", &len);
		if (mpidr && (unsigned int)len == 4) {
            pdata->cpu = (int)be32_to_cpup(mpidr);
		}
	}

	/* clock specifics */
/*
	pdata->clk = NULL;
	clk = of_clk_get(node, 0);
	if (!IS_ERR(clk))
		pdata->clk = clk;
*/
   	return pdata;

err:
    if(NULL != pdata->child_ports)
        osl_free((void*)pdata->child_ports);
    if(NULL != pdata->child_ids)
        osl_free((void*)pdata->child_ids);
    if(NULL != pdata->outports)
        osl_free((void*)pdata->outports);
    osl_free(pdata);
    return NULL;
}
Example #27
0
static int cros_ec_keyb_probe(struct platform_device *pdev)
{
	struct cros_ec_device *ec = dev_get_drvdata(pdev->dev.parent);
	struct device *dev = ec->dev;
	struct cros_ec_keyb *ckdev;
	struct input_dev *idev;
	struct device_node *np;
	int err;

	np = pdev->dev.of_node;
	if (!np)
		return -ENODEV;

	ckdev = devm_kzalloc(&pdev->dev, sizeof(*ckdev), GFP_KERNEL);
	if (!ckdev)
		return -ENOMEM;
	err = matrix_keypad_parse_of_params(&pdev->dev, &ckdev->rows,
					    &ckdev->cols);
	if (err)
		return err;

	ckdev->valid_keys = devm_kzalloc(&pdev->dev, ckdev->cols, GFP_KERNEL);
	if (!ckdev->valid_keys)
		return -ENOMEM;

	ckdev->old_kb_state = devm_kzalloc(&pdev->dev, ckdev->cols, GFP_KERNEL);
	if (!ckdev->old_kb_state)
		return -ENOMEM;

	idev = devm_input_allocate_device(&pdev->dev);
	if (!idev)
		return -ENOMEM;

	if (!ec->irq) {
		dev_err(dev, "no EC IRQ specified\n");
		return -EINVAL;
	}

	ckdev->ec = ec;
	ckdev->dev = dev;
	dev_set_drvdata(&pdev->dev, ckdev);

	idev->name = ec->ec_name;
	idev->phys = ec->phys_name;
	__set_bit(EV_REP, idev->evbit);

	idev->id.bustype = BUS_VIRTUAL;
	idev->id.version = 1;
	idev->id.product = 0;
	idev->dev.parent = &pdev->dev;
	idev->open = cros_ec_keyb_open;
	idev->close = cros_ec_keyb_close;

	ckdev->ghost_filter = of_property_read_bool(np,
					"google,needs-ghost-filter");

	err = matrix_keypad_build_keymap(NULL, NULL, ckdev->rows, ckdev->cols,
					 NULL, idev);
	if (err) {
		dev_err(dev, "cannot build key matrix\n");
		return err;
	}

	ckdev->row_shift = get_count_order(ckdev->cols);

	input_set_capability(idev, EV_MSC, MSC_SCAN);
	input_set_drvdata(idev, ckdev);
	ckdev->idev = idev;
	cros_ec_keyb_compute_valid_keys(ckdev);

	err = input_register_device(ckdev->idev);
	if (err) {
		dev_err(dev, "cannot register input device\n");
		return err;
	}

	return 0;
}
static int __devinit gdsc_probe(struct platform_device *pdev)
{
	static atomic_t gdsc_count __initdata = ATOMIC_INIT(-1);
	struct regulator_init_data *init_data;
	struct resource *res;
	struct gdsc *sc;
	uint32_t regval;
	bool retain_mem, retain_periph;
	int i, ret;

	sc = devm_kzalloc(&pdev->dev, sizeof(struct gdsc), GFP_KERNEL);
	if (sc == NULL)
		return -ENOMEM;

	init_data = of_get_regulator_init_data(&pdev->dev, pdev->dev.of_node);
	if (init_data == NULL)
		return -ENOMEM;

	if (of_get_property(pdev->dev.of_node, "parent-supply", NULL))
		init_data->supply_regulator = "parent";

	ret = of_property_read_string(pdev->dev.of_node, "regulator-name",
				      &sc->rdesc.name);
	if (ret)
		return ret;

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (res == NULL)
		return -EINVAL;
	sc->gdscr = devm_ioremap(&pdev->dev, res->start, resource_size(res));
	if (sc->gdscr == NULL)
		return -ENOMEM;

	sc->clock_count = of_property_count_strings(pdev->dev.of_node,
					    "qcom,clock-names");
	if (sc->clock_count == -EINVAL) {
		sc->clock_count = 0;
	} else if (IS_ERR_VALUE(sc->clock_count)) {
		dev_err(&pdev->dev, "Failed to get clock names\n");
		return -EINVAL;
	}

	sc->clocks = devm_kzalloc(&pdev->dev,
			sizeof(struct clk *) * sc->clock_count, GFP_KERNEL);
	if (!sc->clocks)
		return -ENOMEM;
	for (i = 0; i < sc->clock_count; i++) {
		const char *clock_name;
		of_property_read_string_index(pdev->dev.of_node,
					      "qcom,clock-names", i,
					      &clock_name);
		sc->clocks[i] = devm_clk_get(&pdev->dev, clock_name);
		if (IS_ERR(sc->clocks[i])) {
			int rc = PTR_ERR(sc->clocks[i]);
			if (rc != -EPROBE_DEFER)
				dev_err(&pdev->dev, "Failed to get %s\n",
					clock_name);
			return rc;
		}
	}

	sc->rdesc.id = atomic_inc_return(&gdsc_count);
	sc->rdesc.ops = &gdsc_ops;
	sc->rdesc.type = REGULATOR_VOLTAGE;
	sc->rdesc.owner = THIS_MODULE;
	platform_set_drvdata(pdev, sc);

	/*
	 * Disable HW trigger: collapse/restore occur based on registers writes.
	 * Disable SW override: Use hardware state-machine for sequencing.
	 */
	regval = readl_relaxed(sc->gdscr);
	regval &= ~(HW_CONTROL_MASK | SW_OVERRIDE_MASK);

	/* Configure wait time between states. */
	regval &= ~(EN_REST_WAIT_MASK | EN_FEW_WAIT_MASK | CLK_DIS_WAIT_MASK);
	regval |= EN_REST_WAIT_VAL | EN_FEW_WAIT_VAL | CLK_DIS_WAIT_VAL;
	writel_relaxed(regval, sc->gdscr);

	retain_mem = of_property_read_bool(pdev->dev.of_node,
					    "qcom,retain-mem");
	sc->toggle_mem = !retain_mem;
	retain_periph = of_property_read_bool(pdev->dev.of_node,
					    "qcom,retain-periph");
	sc->toggle_periph = !retain_periph;
	sc->toggle_logic = !of_property_read_bool(pdev->dev.of_node,
						"qcom,skip-logic-collapse");
	if (!sc->toggle_logic) {
		regval &= ~SW_COLLAPSE_MASK;
		writel_relaxed(regval, sc->gdscr);

		ret = readl_tight_poll_timeout(sc->gdscr, regval,
					regval & PWR_ON_MASK, TIMEOUT_US);
		if (ret) {
			dev_err(&pdev->dev, "%s enable timed out\n",
				sc->rdesc.name);
			return ret;
		}
	}

	for (i = 0; i < sc->clock_count; i++) {
		if (retain_mem || (regval & PWR_ON_MASK))
			clk_set_flags(sc->clocks[i], CLKFLAG_RETAIN_MEM);
		else
			clk_set_flags(sc->clocks[i], CLKFLAG_NORETAIN_MEM);

		if (retain_periph || (regval & PWR_ON_MASK))
			clk_set_flags(sc->clocks[i], CLKFLAG_RETAIN_PERIPH);
		else
			clk_set_flags(sc->clocks[i], CLKFLAG_NORETAIN_PERIPH);
	}

	sc->rdev = regulator_register(&sc->rdesc, &pdev->dev, init_data, sc,
				      pdev->dev.of_node);
	if (IS_ERR(sc->rdev)) {
		dev_err(&pdev->dev, "regulator_register(\"%s\") failed.\n",
			sc->rdesc.name);
		return PTR_ERR(sc->rdev);
	}

	return 0;
}
int dsi_panel_device_register(struct device_node *pan_node,
                              struct mdss_dsi_ctrl_pdata *ctrl_pdata)
{
    struct mipi_panel_info *mipi;
    int rc, i, len;
    struct device_node *dsi_ctrl_np = NULL;
    struct platform_device *ctrl_pdev = NULL;
    bool dynamic_fps;
    const char *data;
    struct mdss_panel_info *pinfo = &(ctrl_pdata->panel_data.panel_info);

    mipi  = &(pinfo->mipi);

    pinfo->type =
        ((mipi->mode == DSI_VIDEO_MODE)
         ? MIPI_VIDEO_PANEL : MIPI_CMD_PANEL);

    rc = mdss_dsi_clk_div_config(pinfo, mipi->frame_rate);
    if (rc) {
        pr_err("%s: unable to initialize the clk dividers\n", __func__);
        return rc;
    }

    dsi_ctrl_np = of_parse_phandle(pan_node,
                                   "qcom,mdss-dsi-panel-controller", 0);
    if (!dsi_ctrl_np) {
        pr_err("%s: Dsi controller node not initialized\n", __func__);
        return -EPROBE_DEFER;
    }

    ctrl_pdev = of_find_device_by_node(dsi_ctrl_np);

    rc = mdss_dsi_regulator_init(ctrl_pdev);
    if (rc) {
        pr_err("%s: failed to init regulator, rc=%d\n",
               __func__, rc);
        return rc;
    }

    data = of_get_property(ctrl_pdev->dev.of_node,
                           "qcom,platform-strength-ctrl", &len);
    if ((!data) || (len != 2)) {
        pr_err("%s:%d, Unable to read Phy Strength ctrl settings",
               __func__, __LINE__);
        return -EINVAL;
    }
    pinfo->mipi.dsi_phy_db.strength[0] = data[0];
    pinfo->mipi.dsi_phy_db.strength[1] = data[1];

    data = of_get_property(ctrl_pdev->dev.of_node,
                           "qcom,platform-regulator-settings", &len);
    if ((!data) || (len != 7)) {
        pr_err("%s:%d, Unable to read Phy regulator settings",
               __func__, __LINE__);
        return -EINVAL;
    }
    for (i = 0; i < len; i++) {
        pinfo->mipi.dsi_phy_db.regulator[i]
            = data[i];
    }

    data = of_get_property(ctrl_pdev->dev.of_node,
                           "qcom,platform-bist-ctrl", &len);
    if ((!data) || (len != 6)) {
        pr_err("%s:%d, Unable to read Phy Bist Ctrl settings",
               __func__, __LINE__);
        return -EINVAL;
    }
    for (i = 0; i < len; i++) {
        pinfo->mipi.dsi_phy_db.bistctrl[i]
            = data[i];
    }

    data = of_get_property(ctrl_pdev->dev.of_node,
                           "qcom,platform-lane-config", &len);
    if ((!data) || (len != 45)) {
        pr_err("%s:%d, Unable to read Phy lane configure settings",
               __func__, __LINE__);
        return -EINVAL;
    }
    for (i = 0; i < len; i++) {
        pinfo->mipi.dsi_phy_db.lanecfg[i] =
            data[i];
    }

    ctrl_pdata->shared_pdata.broadcast_enable = of_property_read_bool(
                pan_node, "qcom,mdss-dsi-panel-broadcast-mode");

    dynamic_fps = of_property_read_bool(pan_node,
                                        "qcom,mdss-dsi-pan-enable-dynamic-fps");
    if (dynamic_fps) {
        pinfo->dynamic_fps = true;
        data = of_get_property(pan_node,
                               "qcom,mdss-dsi-pan-fps-update", NULL);
        if (data) {
            if (!strcmp(data, "dfps_suspend_resume_mode")) {
                pinfo->dfps_update =
                    DFPS_SUSPEND_RESUME_MODE;
                pr_debug("%s: dfps mode: suspend/resume\n",
                         __func__);
            } else if (!strcmp(data,
                               "dfps_immediate_clk_mode")) {
                pinfo->dfps_update =
                    DFPS_IMMEDIATE_CLK_UPDATE_MODE;
                pr_debug("%s: dfps mode: Immediate clk\n",
                         __func__);
            } else if (!strcmp(data,
                               "dfps_immediate_porch_mode")) {
                pinfo->dfps_update =
                    DFPS_IMMEDIATE_PORCH_UPDATE_MODE;
                pr_debug("%s: dfps mode: Immediate porch\n",
                         __func__);
            } else {
                pr_debug("%s: dfps to default mode\n",
                         __func__);
                pinfo->dfps_update =
                    DFPS_SUSPEND_RESUME_MODE;
                pr_debug("%s: dfps mode: suspend/resume\n",
                         __func__);
            }
        } else {
            pr_debug("%s: dfps update mode not configured\n",
                     __func__);
            pinfo->dynamic_fps =
                false;
            pr_debug("%s: dynamic FPS disabled\n",
                     __func__);
        }
        pinfo->new_fps = pinfo->mipi.frame_rate;
    }

    ctrl_pdata->disp_en_gpio = of_get_named_gpio(ctrl_pdev->dev.of_node,
                               "qcom,platform-enable-gpio", 0);

    if (!gpio_is_valid(ctrl_pdata->disp_en_gpio)) {
        pr_err("%s:%d, Disp_en gpio not specified\n",
               __func__, __LINE__);
    } else {
        rc = gpio_request(ctrl_pdata->disp_en_gpio, "disp_enable");
        if (rc) {
            pr_err("request reset gpio failed, rc=%d\n",
                   rc);
            gpio_free(ctrl_pdata->disp_en_gpio);
            return -ENODEV;
        }
    }

    if (pinfo->type == MIPI_CMD_PANEL) {
        ctrl_pdata->disp_te_gpio = of_get_named_gpio(ctrl_pdev->dev.of_node,
                                   "qcom,platform-te-gpio", 0);
        if (!gpio_is_valid(ctrl_pdata->disp_te_gpio)) {
            pr_err("%s:%d, Disp_te gpio not specified\n",
                   __func__, __LINE__);
        }
    }

    if (gpio_is_valid(ctrl_pdata->disp_te_gpio) &&
            pinfo->type == MIPI_CMD_PANEL) {
        rc = gpio_request(ctrl_pdata->disp_te_gpio, "disp_te");
        if (rc) {
            pr_err("request TE gpio failed, rc=%d\n",
                   rc);
            gpio_free(ctrl_pdata->disp_te_gpio);
            return -ENODEV;
        }
        rc = gpio_tlmm_config(GPIO_CFG(
                                  ctrl_pdata->disp_te_gpio, 1,
                                  GPIO_CFG_INPUT,
                                  GPIO_CFG_PULL_DOWN,
                                  GPIO_CFG_2MA),
                              GPIO_CFG_ENABLE);

        if (rc) {
            pr_err("%s: unable to config tlmm = %d\n",
                   __func__, ctrl_pdata->disp_te_gpio);
            gpio_free(ctrl_pdata->disp_te_gpio);
            return -ENODEV;
        }

        rc = gpio_direction_input(ctrl_pdata->disp_te_gpio);
        if (rc) {
            pr_err("set_direction for disp_en gpio failed, rc=%d\n",
                   rc);
            gpio_free(ctrl_pdata->disp_te_gpio);
            return -ENODEV;
        }
        pr_debug("%s: te_gpio=%d\n", __func__,
                 ctrl_pdata->disp_te_gpio);
    }

    ctrl_pdata->rst_gpio = of_get_named_gpio(ctrl_pdev->dev.of_node,
                           "qcom,platform-reset-gpio", 0);
    if (!gpio_is_valid(ctrl_pdata->rst_gpio)) {
        pr_err("%s:%d, reset gpio not specified\n",
               __func__, __LINE__);
    } else {
        rc = gpio_request(ctrl_pdata->rst_gpio, "disp_rst_n");
        if (rc) {
            pr_err("request reset gpio failed, rc=%d\n",
                   rc);
            gpio_free(ctrl_pdata->rst_gpio);
            if (gpio_is_valid(ctrl_pdata->disp_en_gpio))
                gpio_free(ctrl_pdata->disp_en_gpio);
            return -ENODEV;
        }
    }

    if (pinfo->mode_gpio_state != MODE_GPIO_NOT_VALID) {

        ctrl_pdata->mode_gpio = of_get_named_gpio(
                                    ctrl_pdev->dev.of_node,
                                    "qcom,platform-mode-gpio", 0);
        if (!gpio_is_valid(ctrl_pdata->mode_gpio)) {
            pr_info("%s:%d, mode gpio not specified\n",
                    __func__, __LINE__);
        } else {
            rc = gpio_request(ctrl_pdata->mode_gpio, "panel_mode");
            if (rc) {
                pr_err("request panel mode gpio failed,rc=%d\n",
                       rc);
                gpio_free(ctrl_pdata->mode_gpio);
                if (gpio_is_valid(ctrl_pdata->disp_en_gpio))
                    gpio_free(ctrl_pdata->disp_en_gpio);
                if (gpio_is_valid(ctrl_pdata->rst_gpio))
                    gpio_free(ctrl_pdata->rst_gpio);
                if (gpio_is_valid(ctrl_pdata->disp_te_gpio))
                    gpio_free(ctrl_pdata->disp_te_gpio);
                return -ENODEV;
            }
        }
    }

    if (mdss_dsi_clk_init(ctrl_pdev, ctrl_pdata)) {
        pr_err("%s: unable to initialize Dsi ctrl clks\n", __func__);
        return -EPERM;
    }

    if (mdss_dsi_retrieve_ctrl_resources(ctrl_pdev,
                                         pinfo->pdest,
                                         ctrl_pdata)) {
        pr_err("%s: unable to get Dsi controller res\n", __func__);
        return -EPERM;
    }

    ctrl_pdata->panel_data.event_handler = mdss_dsi_event_handler;
    ctrl_pdata->check_status = mdss_dsi_bta_status_check;

    if (ctrl_pdata->bklt_ctrl == BL_PWM)
        mdss_dsi_panel_pwm_cfg(ctrl_pdata);

    mdss_dsi_ctrl_init(ctrl_pdata);
    /*
     * register in mdp driver
     */

    ctrl_pdata->pclk_rate = mipi->dsi_pclk_rate;
    ctrl_pdata->byte_clk_rate = pinfo->clk_rate / 8;
    pr_debug("%s: pclk=%d, bclk=%d\n", __func__,
             ctrl_pdata->pclk_rate, ctrl_pdata->byte_clk_rate);

    ctrl_pdata->ctrl_state = CTRL_STATE_UNKNOWN;

    if (pinfo->cont_splash_enabled) {
        pinfo->panel_power_on = 1;
        rc = mdss_dsi_panel_power_on(&(ctrl_pdata->panel_data), 1);
        if (rc) {
            pr_err("%s: Panel power on failed\n", __func__);
            return rc;
        }

        mdss_dsi_clk_ctrl(ctrl_pdata, 1);
        ctrl_pdata->ctrl_state |=
            (CTRL_STATE_PANEL_INIT | CTRL_STATE_MDP_ACTIVE);
    } else {
        pinfo->panel_power_on = 0;
    }

    rc = mdss_register_panel(ctrl_pdev, &(ctrl_pdata->panel_data));
    if (rc) {
        pr_err("%s: unable to register MIPI DSI panel\n", __func__);
        if (ctrl_pdata->rst_gpio)
            gpio_free(ctrl_pdata->rst_gpio);
        if (gpio_is_valid(ctrl_pdata->disp_en_gpio))
            gpio_free(ctrl_pdata->disp_en_gpio);
        return rc;
    }

    if (pinfo->pdest == DISPLAY_1) {
        mdss_debug_register_base("dsi0",
                                 ctrl_pdata->ctrl_base, ctrl_pdata->reg_size);
        ctrl_pdata->ndx = 0;
    } else {
        mdss_debug_register_base("dsi1",
                                 ctrl_pdata->ctrl_base, ctrl_pdata->reg_size);
        ctrl_pdata->ndx = 1;
    }

    pr_debug("%s: Panel data initialized\n", __func__);
    return 0;
}
static int aml_virtaul_thermal_probe(struct platform_device *pdev)
{
    int ret, len, cells; 
    struct property *prop;
    void *buf;

    if (!of_property_read_bool(pdev->dev.of_node, "use_virtual_thermal")) {
        printk("%s, virtual thermal is not enabled\n", __func__);
        virtual_thermal_en = 0;
        return 0;
    } else {
        printk("%s, virtual thermal enabled\n", __func__);
    }

    ret = of_property_read_u32(pdev->dev.of_node,
                               "freq_sample_period",
                               &freq_sample_period);
    if (ret) {
        printk("%s, get freq_sample_period failed, us 30 as default\n", __func__);
        freq_sample_period = 30;
    } else {
        printk("%s, get freq_sample_period with value:%d\n", __func__, freq_sample_period);    
    }
    ret = of_property_read_u32_array(pdev->dev.of_node, 
                                     "report_time", 
                                     report_interval, sizeof(report_interval) / sizeof(u32));
    if (ret) {
        printk("%s, get report_time failed\n", __func__);    
        goto error;
    } else {
        printk("[virtual_thermal] report interval:%4d, %4d, %4d, %4d\n",
               report_interval[0], report_interval[1], report_interval[2], report_interval[3]);    
    }
    /*
     * read cpu_virtal
     */
    prop = of_find_property(pdev->dev.of_node, "cpu_virtual", &len);
    if (!prop) {
        printk("%s, cpu virtual not found\n", __func__);
        goto error;
    }
    cells = len / sizeof(struct aml_virtual_thermal);
    buf = kzalloc(len, GFP_KERNEL);
    if (!buf) {
        printk("%s, no memory\n", __func__);
        return -ENOMEM;
    }
    ret = of_property_read_u32_array(pdev->dev.of_node, 
                                     "cpu_virtual", 
                                     buf, len/sizeof(u32)); 
    if (ret) {
        printk("%s, read cpu_virtual failed\n", __func__);
        kfree(buf);
        goto error;
    }
    cpu_virtual_thermal.count   = cells;
    cpu_virtual_thermal.thermal = buf;

    /*
     * read gpu_virtal
     */
    prop = of_find_property(pdev->dev.of_node, "gpu_virtual", &len);
    if (!prop) {
        printk("%s, gpu virtual not found\n", __func__);
        goto error;
    }
    cells = len / sizeof(struct aml_virtual_thermal);
    buf = kzalloc(len, GFP_KERNEL);
    if (!buf) {
        printk("%s, no memory\n", __func__);
        return -ENOMEM;
    }
    ret = of_property_read_u32_array(pdev->dev.of_node, 
                                     "gpu_virtual", 
                                     buf, len/sizeof(u32)); 
    if (ret) {
        printk("%s, read gpu_virtual failed\n", __func__);
        kfree(buf);
        goto error;
    }
    gpu_virtual_thermal.count   = cells;
    gpu_virtual_thermal.thermal = buf;

#if DBG_VIRTUAL
    printk("cpu_virtal cells:%d, table:\n", cpu_virtual_thermal.count);
    for (len = 0; len < cpu_virtual_thermal.count; len++) {
        printk("%2d, %8d, %4d, %4d, %4d, %4d\n",
               len, 
               cpu_virtual_thermal.thermal[len].freq,
               cpu_virtual_thermal.thermal[len].temp_time[0],
               cpu_virtual_thermal.thermal[len].temp_time[1],
               cpu_virtual_thermal.thermal[len].temp_time[2],
               cpu_virtual_thermal.thermal[len].temp_time[3]);
    }
    printk("gpu_virtal cells:%d, table:\n", gpu_virtual_thermal.count);
    for (len = 0; len < gpu_virtual_thermal.count; len++) {
        printk("%2d, %8d, %4d, %4d, %4d, %4d\n",
               len, 
               gpu_virtual_thermal.thermal[len].freq,
               gpu_virtual_thermal.thermal[len].temp_time[0],
               gpu_virtual_thermal.thermal[len].temp_time[1],
               gpu_virtual_thermal.thermal[len].temp_time[2],
               gpu_virtual_thermal.thermal[len].temp_time[3]);
    }
#endif

    virtual_thermal_en = 1;    
    return 0;

error: 
    virtual_thermal_en = 0;
    return -1;
}