static u32 __init omap_usb2_init(unsigned nwires, unsigned alt_pingroup)
{
u32 syscon1 = 0;
if (cpu_is_omap24xx()) {
omap2_usb2_disable_5pinbitll();
alt_pingroup = 0;
}
/* NOTE omap1 erratum: must leave USB2_UNI_R set if usb0 in use */
if (alt_pingroup || nwires == 0)
return 0;
if (cpu_class_is_omap1() && !cpu_is_omap15xx() && nwires != 6) {
u32 l;
l = omap_readl(USB_TRANSCEIVER_CTRL);
l &= ~CONF_USB2_UNI_R;
omap_writel(l, USB_TRANSCEIVER_CTRL);
}
/* external transceiver */
if (cpu_is_omap15xx()) {
omap_cfg_reg(USB2_TXD);
omap_cfg_reg(USB2_TXEN);
omap_cfg_reg(USB2_SEO);
if (nwires != 3)
omap_cfg_reg(USB2_RCV);
/* there is no USB2_SPEED */
} else if (cpu_is_omap16xx()) {
omap_cfg_reg(V6_USB2_TXD);
omap_cfg_reg(W9_USB2_TXEN);
omap_cfg_reg(W5_USB2_SE0);
if (nwires != 3)
omap_cfg_reg(Y5_USB2_RCV);
// FIXME omap_cfg_reg(USB2_SPEED);
} else if (cpu_is_omap24xx()) {
omap_cfg_reg(Y11_24XX_USB2_DAT);
omap_cfg_reg(AA10_24XX_USB2_SE0);
if (nwires > 2)
omap_cfg_reg(AA12_24XX_USB2_TXEN);
if (nwires > 3)
omap_cfg_reg(AA6_24XX_USB2_RCV);
} else {
pr_debug("usb%d cpu unrecognized\n", 1);
return 0;
}
// if (cpu_class_is_omap1()) omap_cfg_reg(USB2_SUSP);
switch (nwires) {
case 2:
if (!cpu_is_omap24xx())
goto bad;
/* NOTE: board-specific code must override this setting if
* this TLL link is not using DP/DM
*/
syscon1 = 1;
omap2_usb_devconf_set(2, USB_BIDIR_TLL);
break;
case 3:
syscon1 = 2;
if (cpu_is_omap24xx())
omap2_usb_devconf_set(2, USB_BIDIR);
break;
case 4:
syscon1 = 1;
if (cpu_is_omap24xx())
omap2_usb_devconf_set(2, USB_BIDIR);
break;
case 5:
if (!cpu_is_omap24xx())
goto bad;
omap_cfg_reg(AA4_24XX_USB2_TLLSE0);
/* NOTE: board-specific code must override this setting if
* this TLL link is not using DP/DM. Something must also
* set up OTG_SYSCON2.HMC_TLL{ATTACH,SPEED}
*/
syscon1 = 3;
omap2_usb2_enable_5pinunitll();
break;
case 6:
if (cpu_is_omap24xx())
goto bad;
syscon1 = 3;
if (cpu_is_omap15xx()) {
omap_cfg_reg(USB2_VP);
omap_cfg_reg(USB2_VM);
} else {
u32 l;
omap_cfg_reg(AA9_USB2_VP);
omap_cfg_reg(R9_USB2_VM);
l = omap_readl(USB_TRANSCEIVER_CTRL);
l |= CONF_USB2_UNI_R;
omap_writel(l, USB_TRANSCEIVER_CTRL);
}
break;
default:
bad:
printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
2, nwires);
}
return syscon1 << 24;
}
static void enable_board_wakeup_source(void)
{
omap_cfg_reg(AF26_34XX_SYS_NIRQ);
}
static inline void omap1_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
int controller_nr)
{
if (controller_nr == 0) {
if (cpu_is_omap7xx()) {
omap_cfg_reg(MMC_7XX_CMD);
omap_cfg_reg(MMC_7XX_CLK);
omap_cfg_reg(MMC_7XX_DAT0);
} else {
omap_cfg_reg(MMC_CMD);
omap_cfg_reg(MMC_CLK);
omap_cfg_reg(MMC_DAT0);
}
if (cpu_is_omap1710()) {
omap_cfg_reg(M15_1710_MMC_CLKI);
omap_cfg_reg(P19_1710_MMC_CMDDIR);
omap_cfg_reg(P20_1710_MMC_DATDIR0);
}
if (mmc_controller->slots[0].wires == 4 && !cpu_is_omap7xx()) {
omap_cfg_reg(MMC_DAT1);
/* NOTE: DAT2 can be on W10 (here) or M15 */
if (!mmc_controller->slots[0].nomux)
omap_cfg_reg(MMC_DAT2);
omap_cfg_reg(MMC_DAT3);
}
}
/* Block 2 is on newer chips, and has many pinout options */
if (cpu_is_omap16xx() && controller_nr == 1) {
if (!mmc_controller->slots[1].nomux) {
omap_cfg_reg(Y8_1610_MMC2_CMD);
omap_cfg_reg(Y10_1610_MMC2_CLK);
omap_cfg_reg(R18_1610_MMC2_CLKIN);
omap_cfg_reg(W8_1610_MMC2_DAT0);
if (mmc_controller->slots[1].wires == 4) {
omap_cfg_reg(V8_1610_MMC2_DAT1);
omap_cfg_reg(W15_1610_MMC2_DAT2);
omap_cfg_reg(R10_1610_MMC2_DAT3);
}
/* These are needed for the level shifter */
omap_cfg_reg(V9_1610_MMC2_CMDDIR);
omap_cfg_reg(V5_1610_MMC2_DATDIR0);
omap_cfg_reg(W19_1610_MMC2_DATDIR1);
}
/* Feedback clock must be set on OMAP-1710 MMC2 */
if (cpu_is_omap1710())
omap_writel(omap_readl(MOD_CONF_CTRL_1) | (1 << 24),
MOD_CONF_CTRL_1);
}
}
static void config_wlan_gpio(void)
{
/* WLAN PW_EN and IRQ */
omap_cfg_reg(B24_34XX_GPIO101_OUT);
omap_cfg_reg(W21_34XX_GPIO162);
}
static void __init omap_fsample_init(void)
{
omap_writew(omap_readw(OMAP7XX_DSP_M_CTL) & ~1, OMAP7XX_DSP_M_CTL);
omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_0);
omap_writel(0x00000088, OMAP7XX_FLASH_ACFG_0);
omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_1);
omap_writel(0x00000000, OMAP7XX_FLASH_ACFG_1);
omap_writel(omap_readl(OMAP7XX_IO_CONF_9) & 0x1FFFFFFF,
OMAP7XX_IO_CONF_9);
fsample_init_smc91x();
if (gpio_request(FSAMPLE_NAND_RB_GPIO_PIN, "NAND ready") < 0)
BUG();
gpio_direction_input(FSAMPLE_NAND_RB_GPIO_PIN);
omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
omap_cfg_reg(E2_7XX_KBR0);
omap_cfg_reg(J7_7XX_KBR1);
omap_cfg_reg(E1_7XX_KBR2);
omap_cfg_reg(F3_7XX_KBR3);
omap_cfg_reg(D2_7XX_KBR4);
omap_cfg_reg(C2_7XX_KBC0);
omap_cfg_reg(D3_7XX_KBC1);
omap_cfg_reg(E4_7XX_KBC2);
omap_cfg_reg(F4_7XX_KBC3);
omap_cfg_reg(E3_7XX_KBC4);
platform_add_devices(devices, ARRAY_SIZE(devices));
omap_serial_init();
omap_register_i2c_bus(1, 100, NULL, 0);
omapfb_set_lcd_config(&fsample_lcd_config);
}
static void __init mapphone_als_init(void)
{
int lm3530_int_gpio = MAPPHONE_LM_3530_INT_GPIO;
int lm3530_reset_gpio;
#ifdef CONFIG_ARM_OF
struct device_node *als_node;
const u8 *als_val;
int len = 0;
als_node = of_find_node_by_path(DT_LCD_BACKLIGHT);
if (als_node != NULL) {
als_val = of_get_property(als_node, DT_PROP_POWERUP_GEN_CNFG,
&len);
if (als_val && len)
omap3430_als_light_data.power_up_gen_config = *als_val;
else
pr_err("%s: Cann't get powerup gen cnfg\n", __func__);
als_val = of_get_property(als_node, DT_PROP_GEN_CNFG, &len);
if (als_val && len)
omap3430_als_light_data.gen_config = *als_val;
else
pr_err("%s: Cann't get gen cnfg\n", __func__);
als_val = of_get_property(als_node, DT_PROP_ALS_CNFG, &len);
if (als_val && len)
omap3430_als_light_data.als_config = *als_val;
else
pr_err("%s: Cann't get als cnfg\n", __func__);
als_val = of_get_property(als_node, DT_PROP_BRIGHTNESS_RAMP,
&len);
if (als_val && len)
omap3430_als_light_data.brightness_ramp = *als_val;
else
pr_err("%s: Cann't get brightness ramp", __func__);
als_val = of_get_property(als_node, DT_PROP_ALS_ZONE_INFO,
&len);
if (als_val && len)
omap3430_als_light_data.als_zone_info = *als_val;
else
pr_err("%s: Cann't get als zone info\n", __func__);
als_val = of_get_property(als_node, DT_PROP_ALS_RESISTOR_SEL,
&len);
if (als_val && len)
omap3430_als_light_data.als_resistor_sel = *als_val;
else
pr_err("%s: Cann't get als resistor sel\n", __func__);
als_val = of_get_property(als_node, DT_PROP_BRIGHTNESS_CTRL,
&len);
if (als_val && len)
omap3430_als_light_data.brightness_control = *als_val;
else
pr_err("%s: Cann't get brightness control\n", __func__);
als_val = of_get_property(als_node, DT_PROP_ZB0, &len);
if (als_val && len)
omap3430_als_light_data.zone_boundary_0 = *als_val;
else
pr_err("%s: Cann't get zone boundary 0\n", __func__);
als_val = of_get_property(als_node, DT_PROP_ZB1, &len);
if (als_val && len)
omap3430_als_light_data.zone_boundary_1 = *als_val;
else
pr_err("%s: Cann't get zone boundary 1\n", __func__);
als_val = of_get_property(als_node, DT_PROP_ZB2, &len);
if (als_val && len)
omap3430_als_light_data.zone_boundary_2 = *als_val;
else
pr_err("%s: Cann't get zone boundary 2\n", __func__);
als_val = of_get_property(als_node, DT_PROP_ZB3, &len);
if (als_val && len)
omap3430_als_light_data.zone_boundary_3 = *als_val;
else
pr_err("%s: Cann't get zone boundary 3\n", __func__);
als_val = of_get_property(als_node, DT_PROP_ZT0, &len);
if (als_val && len)
omap3430_als_light_data.zone_target_0 = *als_val;
else
pr_err("%s: Cann't get zone target 0\n", __func__);
als_val = of_get_property(als_node, DT_PROP_ZT1, &len);
if (als_val && len)
omap3430_als_light_data.zone_target_1 = *als_val;
else
pr_err("%s: Cann't get zone target 1\n", __func__);
als_val = of_get_property(als_node, DT_PROP_ZT2, &len);
if (als_val && len)
omap3430_als_light_data.zone_target_2 = *als_val;
else
pr_err("%s: Cann't get zone target 2\n", __func__);
als_val = of_get_property(als_node, DT_PROP_ZT3, &len);
if (als_val && len)
omap3430_als_light_data.zone_target_3 = *als_val;
else
pr_err("%s: Cann't get zone target 3\n", __func__);
als_val = of_get_property(als_node, DT_PROP_ZT4, &len);
if (als_val && len)
omap3430_als_light_data.zone_target_4 = *als_val;
else
pr_err("%s: Cann't get zone target 4\n", __func__);
als_val = of_get_property(als_node, DT_PROP_MANUAL_CURRENT,
&len);
if (als_val && len)
omap3430_als_light_data.manual_current = *als_val;
else
pr_err("%s: Cann't get manual current\n", __func__);
als_val = of_get_property(als_node, DT_PROP_UPPER_CURR_SEL,
&len);
if (als_val && len)
omap3430_als_light_data.upper_curr_sel = *als_val;
else
pr_err("%s: Cann't get upper curr sel\n", __func__);
als_val = of_get_property(als_node, DT_PROP_LOWER_CURR_SEL,
&len);
if (als_val && len)
omap3430_als_light_data.lower_curr_sel = *als_val;
else
pr_err("%s: Cann't get lower curr sel\n", __func__);
als_val = of_get_property(als_node, DT_PROP_LENS_LOSS_COEFF,
&len);
if (als_val && len)
omap3430_als_light_data.lens_loss_coeff = *als_val;
else
pr_err("%s: Cann't get lens loss coeff\n", __func__);
als_val = of_get_property(als_node, DT_PROP_MANUAL_ALS_CONFIG,
&len);
if (als_val && len)
omap3430_als_light_data.manual_als_config = *als_val;
else
pr_err("%s: Cann't get manual als config\n", __func__);
als_val = of_get_property(als_node, DT_PROP_ALS_ENABLED, &len);
if (als_val && len)
omap3430_als_light_data.als_enabled = *als_val;
else
pr_err("%s: Cann't get manual als config\n", __func__);
of_node_put(als_node);
}
lm3530_int_gpio = get_gpio_by_name("lm3530_int");
if (lm3530_int_gpio < 0) {
printk(KERN_DEBUG"mapphone_als_init: cann't get lm3530_int from device_tree\n");
lm3530_int_gpio = MAPPHONE_LM_3530_INT_GPIO;
} else {
mapphone_i2c_bus1_master_board_info[1].irq =
OMAP_GPIO_IRQ(lm3530_int_gpio);
mapphone_i2c_bus2_master_board_info[3].irq =
OMAP_GPIO_IRQ(lm3530_int_gpio);
}
lm3530_reset_gpio = get_gpio_by_name("lm3530_reset");
if (lm3530_int_gpio >= 0) {
gpio_request(lm3530_reset_gpio, "LED reset");
gpio_direction_output(lm3530_reset_gpio, 1);
msleep(10);
}
#endif
printk(KERN_INFO "%s:Initializing\n", __func__);
gpio_request(lm3530_int_gpio, "mapphone als int");
gpio_direction_input(lm3530_int_gpio);
omap_cfg_reg(AC27_34XX_GPIO92);
}
static int __init
isp1301_probe(struct i2c_client *i2c, const struct i2c_device_id *id)
{
int status;
struct isp1301 *isp;
if (the_transceiver)
return 0;
isp = kzalloc(sizeof *isp, GFP_KERNEL);
if (!isp)
return 0;
INIT_WORK(&isp->work, isp1301_work);
init_timer(&isp->timer);
isp->timer.function = isp1301_timer;
isp->timer.data = (unsigned long) isp;
i2c_set_clientdata(i2c, isp);
isp->client = i2c;
/* verify the chip (shouldn't be necesary) */
status = isp1301_get_u16(isp, ISP1301_VENDOR_ID);
if (status != I2C_VENDOR_ID_PHILIPS) {
dev_dbg(&i2c->dev, "not philips id: %d\n", status);
goto fail;
}
status = isp1301_get_u16(isp, ISP1301_PRODUCT_ID);
if (status != I2C_PRODUCT_ID_PHILIPS_1301) {
dev_dbg(&i2c->dev, "not isp1301, %d\n", status);
goto fail;
}
isp->i2c_release = i2c->dev.release;
i2c->dev.release = isp1301_release;
/* initial development used chiprev 2.00 */
status = i2c_smbus_read_word_data(i2c, ISP1301_BCD_DEVICE);
dev_info(&i2c->dev, "chiprev %x.%02x, driver " DRIVER_VERSION "\n",
status >> 8, status & 0xff);
/* make like power-on reset */
isp1301_clear_bits(isp, ISP1301_MODE_CONTROL_1, MC1_MASK);
isp1301_set_bits(isp, ISP1301_MODE_CONTROL_2, MC2_BI_DI);
isp1301_clear_bits(isp, ISP1301_MODE_CONTROL_2, ~MC2_BI_DI);
isp1301_set_bits(isp, ISP1301_OTG_CONTROL_1,
OTG1_DM_PULLDOWN | OTG1_DP_PULLDOWN);
isp1301_clear_bits(isp, ISP1301_OTG_CONTROL_1,
~(OTG1_DM_PULLDOWN | OTG1_DP_PULLDOWN));
isp1301_clear_bits(isp, ISP1301_INTERRUPT_LATCH, ~0);
isp1301_clear_bits(isp, ISP1301_INTERRUPT_FALLING, ~0);
isp1301_clear_bits(isp, ISP1301_INTERRUPT_RISING, ~0);
#ifdef CONFIG_USB_OTG
status = otg_bind(isp);
if (status < 0) {
dev_dbg(&i2c->dev, "can't bind OTG\n");
goto fail;
}
#endif
if (machine_is_omap_h2()) {
/* full speed signaling by default */
isp1301_set_bits(isp, ISP1301_MODE_CONTROL_1,
MC1_SPEED);
isp1301_set_bits(isp, ISP1301_MODE_CONTROL_2,
MC2_SPD_SUSP_CTRL);
/* IRQ wired at M14 */
omap_cfg_reg(M14_1510_GPIO2);
if (gpio_request(2, "isp1301") == 0)
gpio_direction_input(2);
isp->irq_type = IRQF_TRIGGER_FALLING;
}
isp->irq_type |= IRQF_SAMPLE_RANDOM;
status = request_irq(i2c->irq, isp1301_irq,
isp->irq_type, DRIVER_NAME, isp);
if (status < 0) {
dev_dbg(&i2c->dev, "can't get IRQ %d, err %d\n",
i2c->irq, status);
goto fail;
}
isp->otg.dev = &i2c->dev;
isp->otg.label = DRIVER_NAME;
isp->otg.set_host = isp1301_set_host,
isp->otg.set_peripheral = isp1301_set_peripheral,
isp->otg.set_power = isp1301_set_power,
isp->otg.start_srp = isp1301_start_srp,
isp->otg.start_hnp = isp1301_start_hnp,
enable_vbus_draw(isp, 0);
power_down(isp);
the_transceiver = isp;
#ifdef CONFIG_USB_OTG
update_otg1(isp, isp1301_get_u8(isp, ISP1301_INTERRUPT_SOURCE));
update_otg2(isp, isp1301_get_u8(isp, ISP1301_OTG_STATUS));
#endif
dump_regs(isp, __func__);
#ifdef VERBOSE
mod_timer(&isp->timer, jiffies + TIMER_JIFFIES);
dev_dbg(&i2c->dev, "scheduled timer, %d min\n", TIMER_MINUTES);
#endif
status = otg_set_transceiver(&isp->otg);
if (status < 0)
dev_err(&i2c->dev, "can't register transceiver, %d\n",
status);
return 0;
fail:
kfree(isp);
return -ENODEV;
}
static void sholest_touch_init(void)
{
#ifdef CONFIG_ARM_OF
struct device_node *touch_node;
const void *touch_prop;
int len = 0;
const uint32_t *touch_val;
if ((touch_node = of_find_node_by_path(DT_PATH_TOUCH))) {
if ((touch_prop = of_get_property(touch_node, DT_PROP_TOUCH_KEYMAP, &len)) \
&& len && (0 == len % sizeof(struct vkey))) {
sholest_ts_platform_data.vkeys.count = len / sizeof(struct vkey);
sholest_ts_platform_data.vkeys.keys = (struct vkey *)touch_prop;
}
if ((touch_prop = of_get_property(touch_node, DT_PROP_TOUCH_I2C_ADDRESS, &len))) {
sholest_i2c_bus1_board_info[0].addr = *((int *)touch_prop);
}
touch_val = of_get_property(touch_node, DT_PROP_TOUCH_FLAGS, &len);
if (touch_val && len)
sholest_ts_platform_data.flags = *touch_val;
touch_val = of_get_property(touch_node, DT_PROP_TOUCH_ABS_MIN_X, &len);
if (touch_val && len)
sholest_ts_platform_data.abs_min_x = *touch_val;
touch_val = of_get_property(touch_node, DT_PROP_TOUCH_ABS_MAX_X, &len);
if (touch_val && len)
sholest_ts_platform_data.abs_max_x = *touch_val;
touch_val = of_get_property(touch_node, DT_PROP_TOUCH_ABS_MIN_Y, &len);
if (touch_val && len)
sholest_ts_platform_data.abs_min_y = *touch_val;
touch_val = of_get_property(touch_node, DT_PROP_TOUCH_ABS_MAX_Y, &len);
if (touch_val && len)
sholest_ts_platform_data.abs_max_y = *touch_val;
touch_val = of_get_property(touch_node, DT_PROP_TOUCH_ABS_MIN_P, &len);
if (touch_val && len)
sholest_ts_platform_data.abs_min_p = *touch_val;
touch_val = of_get_property(touch_node, DT_PROP_TOUCH_ABS_MAX_P, &len);
if (touch_val && len)
sholest_ts_platform_data.abs_max_p = *touch_val;
touch_val = of_get_property(touch_node, DT_PROP_TOUCH_ABS_MIN_W, &len);
if (touch_val && len)
sholest_ts_platform_data.abs_min_w = *touch_val;
touch_val = of_get_property(touch_node, DT_PROP_TOUCH_ABS_MAX_W, &len);
if (touch_val && len)
sholest_ts_platform_data.abs_max_w = *touch_val;
touch_val = of_get_property(touch_node, DT_PROP_TOUCH_FUZZ_X, &len);
if (touch_val && len)
sholest_ts_platform_data.fuzz_x = *touch_val;
touch_val = of_get_property(touch_node, DT_PROP_TOUCH_FUZZ_Y, &len);
if (touch_val && len)
sholest_ts_platform_data.fuzz_y = *touch_val;
touch_val = of_get_property(touch_node, DT_PROP_TOUCH_FUZZ_P, &len);
if (touch_val && len)
sholest_ts_platform_data.fuzz_p = *touch_val;
touch_val = of_get_property(touch_node, DT_PROP_TOUCH_FUZZ_W, &len);
if (touch_val && len)
sholest_ts_platform_data.fuzz_w = *touch_val;
if ((touch_prop = of_get_property(touch_node, DT_PROP_TOUCH_T15, &len))) {
sholest_ts_platform_data.key_array.cfg = (struct qtm_touch_keyarray_cfg *)touch_prop;
}
if ((touch_prop = of_get_property(touch_node, DT_PROP_TOUCH_KEY_ARRAY_MAP, &len))) {
sholest_ts_platform_data.key_array.keys = (struct qtouch_key *)touch_prop;
}
touch_val = of_get_property(touch_node, DT_PROP_TOUCH_KEY_ARRAY_COUNT, &len);
if (touch_val && len)
sholest_ts_platform_data.key_array.num_keys = *touch_val;
if ((touch_prop = of_get_property(touch_node, DT_PROP_TOUCH_T7, &len))) {
sholest_ts_platform_data.power_cfg = *(struct qtm_gen_power_cfg *)touch_prop;
}
if ((touch_prop = of_get_property(touch_node, DT_PROP_TOUCH_T8, &len))) {
sholest_ts_platform_data.acquire_cfg = *(struct qtm_gen_acquire_cfg *)touch_prop;
}
if ((touch_prop = of_get_property(touch_node, DT_PROP_TOUCH_T9, &len))) {
sholest_ts_platform_data.multi_touch_cfg = *(struct qtm_touch_multi_cfg *)touch_prop;
}
if ((touch_prop = of_get_property(touch_node, DT_PROP_TOUCH_T17, &len))) {
sholest_ts_platform_data.linear_tbl_cfg
= *(struct qtm_proci_linear_tbl_cfg*)touch_prop;
}
if ((touch_prop = of_get_property(touch_node, DT_PROP_TOUCH_T19, &len))) {
sholest_ts_platform_data.gpio_pwm_cfg
= *(struct qtm_spt_gpio_pwm_cfg*)touch_prop;
}
if ((touch_prop = of_get_property(touch_node, DT_PROP_TOUCH_T20, &len))) {
sholest_ts_platform_data.grip_suppression_cfg
= *(struct qtm_proci_grip_suppression_cfg*)touch_prop;
}
if ((touch_prop = of_get_property(touch_node, DT_PROP_TOUCH_T22, &len))) {
sholest_ts_platform_data.noise_suppression_cfg
= *(struct qtm_procg_noise_suppression_cfg*)touch_prop;
}
if ((touch_prop = of_get_property(touch_node, DT_PROP_TOUCH_T24, &len))) {
sholest_ts_platform_data.one_touch_gesture_proc_cfg
= *(struct qtm_proci_one_touch_gesture_proc_cfg*)touch_prop;
}
if ((touch_prop = of_get_property(touch_node, DT_PROP_TOUCH_T25, &len))) {
sholest_ts_platform_data.self_test_cfg
= *(struct qtm_spt_self_test_cfg*)touch_prop;
}
if ((touch_prop = of_get_property(touch_node, DT_PROP_TOUCH_T27, &len))) {
sholest_ts_platform_data.two_touch_gesture_proc_cfg
= *(struct qtm_proci_two_touch_gesture_proc_cfg*)touch_prop;
}
if ((touch_prop = of_get_property(touch_node, DT_PROP_TOUCH_T28, &len))) {
sholest_ts_platform_data.cte_config_cfg = *(struct qtm_spt_cte_config_cfg*)touch_prop;
}
of_node_put(touch_node);
}
#endif
gpio_request(SHOLEST_TOUCH_RESET_N_GPIO, "mapphone touch reset");
gpio_direction_output(SHOLEST_TOUCH_RESET_N_GPIO, 1);
omap_cfg_reg(H19_34XX_GPIO164_OUT);
gpio_request(SHOLEST_TOUCH_INT_GPIO, "mapphone touch irq");
gpio_direction_input(SHOLEST_TOUCH_INT_GPIO);
omap_cfg_reg(D25_34XX_GPIO109);
}
void __init sholes_camera_init(void)
{
omap_cfg_reg(A24_34XX_CAM_HS);
omap_cfg_reg(A23_34XX_CAM_VS);
omap_cfg_reg(C25_34XX_CAM_XCLKA);
omap_cfg_reg(C27_34XX_CAM_PCLK);
omap_cfg_reg(C23_34XX_CAM_FLD);
omap_cfg_reg(AG17_34XX_CAM_D0);
omap_cfg_reg(AH17_34XX_CAM_D1);
omap_cfg_reg(B24_34XX_CAM_D2);
omap_cfg_reg(C24_34XX_CAM_D3);
omap_cfg_reg(D24_34XX_CAM_D4);
omap_cfg_reg(A25_34XX_CAM_D5);
omap_cfg_reg(K28_34XX_CAM_D6);
omap_cfg_reg(L28_34XX_CAM_D7);
omap_cfg_reg(K27_34XX_CAM_D8);
omap_cfg_reg(L27_34XX_CAM_D9);
omap_cfg_reg(B25_34XX_CAM_D10);
omap_cfg_reg(C26_34XX_CAM_D11);
omap_cfg_reg(B23_34XX_CAM_WEN);
omap_cfg_reg(D25_34XX_CAM_STROBE);
omap_cfg_reg(K8_34XX_GPMC_WAIT2);
sholes_camera_lines_safe_mode();
}
static void __init omap_h4_init(void)
{
/*
* Make sure the serial ports are muxed on at this point.
* You have to mux them off in device drivers later on
* if not needed.
*/
#if defined(CONFIG_OMAP_IR) || defined(CONFIG_OMAP_IR_MODULE)
omap_cfg_reg(K15_24XX_UART3_TX);
omap_cfg_reg(K14_24XX_UART3_RX);
#endif
#if defined(CONFIG_KEYBOARD_OMAP) || defined(CONFIG_KEYBOARD_OMAP_MODULE)
if (omap_has_menelaus()) {
row_gpios[5] = 0;
col_gpios[2] = 15;
col_gpios[6] = 18;
}
#endif
#ifdef CONFIG_MACH_OMAP2_H4_USB1
/* S3.3 controls whether these pins are for UART2 or USB1 */
omap_cfg_reg(N14_24XX_USB1_SE0);
omap_cfg_reg(P15_24XX_USB1_DAT);
omap_cfg_reg(W20_24XX_USB1_TXEN);
omap_cfg_reg(V19_24XX_USB1_RCV);
#endif
/* Menelaus interrupt */
omap_cfg_reg(W19_24XX_SYS_NIRQ);
platform_add_devices(h4_devices, ARRAY_SIZE(h4_devices));
omap_board_config = h4_config;
omap_board_config_size = ARRAY_SIZE(h4_config);
omap_serial_init();
h4_mmc_init();
omap_register_i2c_bus(1, 100, h4_i2c_board_info,
ARRAY_SIZE(h4_i2c_board_info));
/* smc91x, debug leds, ps/2, extra uarts */
h4_init_debug();
#ifdef CONFIG_MACH_OMAP_H4_TUSB
tusb_evm_setup();
#endif
/* defaults seem ok for:
* omap_cfg_reg(U18_24XX_SPI1_SCK);
* omap_cfg_reg(V20_24XX_SPI1_MOSI);
* omap_cfg_reg(T18_24XX_SPI1_MISO);
* omap_cfg_reg(U19_24XX_SPI1_NCS0);
*/
/* TSC2101 */
omap_cfg_reg(P20_24XX_GPIO93);
gpio_request(93, "tsc_irq");
gpio_direction_input(93);
omap_cfg_reg(W14_24XX_SYS_CLKOUT); /* mclk */
/* defaults seem ok for:
* omap_cfg_reg(Y15_EAC_AC_SCLK); // bclk
* omap_cfg_reg(R14_EAC_AC_FS);
* omap_cfg_reg(V15_EAC_AC_DOUT);
* omap_cfg_reg(W15_EAC_AC_DIN);
*/
spi_register_board_info(h4_spi_board_info,
ARRAY_SIZE(h4_spi_board_info));
}
static void setup_ehci_io_mux(void)
{
// ehci on port 2 for gen8
omap_cfg_reg(AE7_3430_USB2HS_PHY_CLK);
omap_cfg_reg(AF7_3430_USB2HS_PHY_STP);
omap_cfg_reg(AG7_3430_USB2HS_PHY_DIR);
omap_cfg_reg(AH7_3430_USB2HS_PHY_NXT);
omap_cfg_reg(AG8_3430_USB2HS_PHY_DATA0);
omap_cfg_reg(AH8_3430_USB2HS_PHY_DATA1);
omap_cfg_reg(AB2_3430_USB2HS_PHY_DATA2);
omap_cfg_reg(V3_3430_USB2HS_PHY_DATA3);
omap_cfg_reg(Y2_3430_USB2HS_PHY_DATA4);
omap_cfg_reg(Y3_3430_USB2HS_PHY_DATA5);
omap_cfg_reg(Y4_3430_USB2HS_PHY_DATA6);
omap_cfg_reg(AA3_3430_USB2HS_PHY_DATA7);
return;
}
static inline void __init h4_init_debug(void)
{
int eth_cs;
unsigned long cs_mem_base;
unsigned int muxed, rate;
struct clk *gpmc_fck;
eth_cs = H4_SMC91X_CS;
gpmc_fck = clk_get(NULL, "gpmc_fck"); /* Always on ENABLE_ON_INIT */
if (IS_ERR(gpmc_fck)) {
WARN_ON(1);
return;
}
clk_enable(gpmc_fck);
rate = clk_get_rate(gpmc_fck);
clk_disable(gpmc_fck);
clk_put(gpmc_fck);
if (is_gpmc_muxed())
muxed = 0x200;
else
muxed = 0;
/* Make sure CS1 timings are correct */
gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG1,
0x00011000 | muxed);
if (rate >= 160000000) {
gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f01);
gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080803);
gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1c0b1c0a);
gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x041f1F1F);
gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000004C4);
} else if (rate >= 130000000) {
gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f00);
gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080802);
gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1C091C09);
gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x041f1F1F);
gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000004C4);
} else {/* rate = 100000000 */
gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f00);
gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080802);
gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1C091C09);
gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x031A1F1F);
gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000003C2);
}
if (gpmc_cs_request(eth_cs, SZ_16M, &cs_mem_base) < 0) {
printk(KERN_ERR "Failed to request GPMC mem for smc91x\n");
goto out;
}
udelay(100);
omap_cfg_reg(M15_24XX_GPIO92);
if (debug_card_init(cs_mem_base, OMAP24XX_ETHR_GPIO_IRQ) < 0)
gpmc_cs_free(eth_cs);
out:
clk_disable(gpmc_fck);
clk_put(gpmc_fck);
}
static void omap_init_kp(void)
{
/* 2430 and 34xx keypad is on TWL4030 */
if (cpu_is_omap2430() || cpu_is_omap34xx())
return;
if (machine_is_omap_h2() || machine_is_omap_h3()) {
omap_cfg_reg(F18_1610_KBC0);
omap_cfg_reg(D20_1610_KBC1);
omap_cfg_reg(D19_1610_KBC2);
omap_cfg_reg(E18_1610_KBC3);
omap_cfg_reg(C21_1610_KBC4);
omap_cfg_reg(G18_1610_KBR0);
omap_cfg_reg(F19_1610_KBR1);
omap_cfg_reg(H14_1610_KBR2);
omap_cfg_reg(E20_1610_KBR3);
omap_cfg_reg(E19_1610_KBR4);
omap_cfg_reg(N19_1610_KBR5);
} else if (machine_is_omap_perseus2() || machine_is_omap_fsample()) {
omap_cfg_reg(E2_7XX_KBR0);
omap_cfg_reg(J7_7XX_KBR1);
omap_cfg_reg(E1_7XX_KBR2);
omap_cfg_reg(F3_7XX_KBR3);
omap_cfg_reg(D2_7XX_KBR4);
omap_cfg_reg(C2_7XX_KBC0);
omap_cfg_reg(D3_7XX_KBC1);
omap_cfg_reg(E4_7XX_KBC2);
omap_cfg_reg(F4_7XX_KBC3);
omap_cfg_reg(E3_7XX_KBC4);
} else if (machine_is_omap_h4()) {
omap_cfg_reg(T19_24XX_KBR0);
omap_cfg_reg(R19_24XX_KBR1);
omap_cfg_reg(V18_24XX_KBR2);
omap_cfg_reg(M21_24XX_KBR3);
omap_cfg_reg(E5__24XX_KBR4);
if (omap_has_menelaus()) {
omap_cfg_reg(B3__24XX_KBR5);
omap_cfg_reg(AA4_24XX_KBC2);
omap_cfg_reg(B13_24XX_KBC6);
} else {
omap_cfg_reg(M18_24XX_KBR5);
omap_cfg_reg(H19_24XX_KBC2);
omap_cfg_reg(N19_24XX_KBC6);
}
omap_cfg_reg(R20_24XX_KBC0);
omap_cfg_reg(M14_24XX_KBC1);
omap_cfg_reg(V17_24XX_KBC3);
omap_cfg_reg(P21_24XX_KBC4);
omap_cfg_reg(L14_24XX_KBC5);
}
}
static inline void omap2_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
int controller_nr)
{
if ((mmc_controller->slots[0].switch_pin > 0) && \
(mmc_controller->slots[0].switch_pin < OMAP_MAX_GPIO_LINES))
omap_mux_init_gpio(mmc_controller->slots[0].switch_pin,
OMAP_PIN_INPUT_PULLUP);
if ((mmc_controller->slots[0].gpio_wp > 0) && \
(mmc_controller->slots[0].gpio_wp < OMAP_MAX_GPIO_LINES))
omap_mux_init_gpio(mmc_controller->slots[0].gpio_wp,
OMAP_PIN_INPUT_PULLUP);
if (cpu_is_omap2420() && controller_nr == 0) {
omap_cfg_reg(H18_24XX_MMC_CMD);
omap_cfg_reg(H15_24XX_MMC_CLKI);
omap_cfg_reg(G19_24XX_MMC_CLKO);
omap_cfg_reg(F20_24XX_MMC_DAT0);
omap_cfg_reg(F19_24XX_MMC_DAT_DIR0);
omap_cfg_reg(G18_24XX_MMC_CMD_DIR);
if (mmc_controller->slots[0].caps & MMC_CAP_4_BIT_DATA) {
omap_cfg_reg(H14_24XX_MMC_DAT1);
omap_cfg_reg(E19_24XX_MMC_DAT2);
omap_cfg_reg(D19_24XX_MMC_DAT3);
omap_cfg_reg(E20_24XX_MMC_DAT_DIR1);
omap_cfg_reg(F18_24XX_MMC_DAT_DIR2);
omap_cfg_reg(E18_24XX_MMC_DAT_DIR3);
}
/*
* Use internal loop-back in MMC/SDIO Module Input Clock
* selection
*/
if (mmc_controller->slots[0].internal_clock) {
u32 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
v |= (1 << 24);
omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
}
}
if (cpu_is_omap34xx()) {
if (controller_nr == 0) {
omap_mux_init_signal("sdmmc1_clk",
OMAP_PIN_INPUT_PULLUP);
omap_mux_init_signal("sdmmc1_cmd",
OMAP_PIN_INPUT_PULLUP);
omap_mux_init_signal("sdmmc1_dat0",
OMAP_PIN_INPUT_PULLUP);
if (mmc_controller->slots[0].caps &
(MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA)) {
omap_mux_init_signal("sdmmc1_dat1",
OMAP_PIN_INPUT_PULLUP);
omap_mux_init_signal("sdmmc1_dat2",
OMAP_PIN_INPUT_PULLUP);
omap_mux_init_signal("sdmmc1_dat3",
OMAP_PIN_INPUT_PULLUP);
}
if (mmc_controller->slots[0].caps &
MMC_CAP_8_BIT_DATA) {
omap_mux_init_signal("sdmmc1_dat4",
OMAP_PIN_INPUT_PULLUP);
omap_mux_init_signal("sdmmc1_dat5",
OMAP_PIN_INPUT_PULLUP);
omap_mux_init_signal("sdmmc1_dat6",
OMAP_PIN_INPUT_PULLUP);
omap_mux_init_signal("sdmmc1_dat7",
OMAP_PIN_INPUT_PULLUP);
}
}
if (controller_nr == 1) {
/* MMC2 */
omap_mux_init_signal("sdmmc2_clk",
OMAP_PIN_INPUT_PULLUP);
omap_mux_init_signal("sdmmc2_cmd",
OMAP_PIN_INPUT_PULLUP);
omap_mux_init_signal("sdmmc2_dat0",
OMAP_PIN_INPUT_PULLUP);
/*
* For 8 wire configurations, lines DAT4, 5, 6 and 7
* need to be muxed in the board-*.c files
*/
if (mmc_controller->slots[0].caps &
(MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA)) {
omap_mux_init_signal("sdmmc2_dat1",
OMAP_PIN_INPUT_PULLUP);
omap_mux_init_signal("sdmmc2_dat2",
OMAP_PIN_INPUT_PULLUP);
omap_mux_init_signal("sdmmc2_dat3",
OMAP_PIN_INPUT_PULLUP);
}
if (mmc_controller->slots[0].caps &
MMC_CAP_8_BIT_DATA) {
omap_mux_init_signal("sdmmc2_dat4.sdmmc2_dat4",
OMAP_PIN_INPUT_PULLUP);
omap_mux_init_signal("sdmmc2_dat5.sdmmc2_dat5",
OMAP_PIN_INPUT_PULLUP);
omap_mux_init_signal("sdmmc2_dat6.sdmmc2_dat6",
OMAP_PIN_INPUT_PULLUP);
omap_mux_init_signal("sdmmc2_dat7.sdmmc2_dat7",
OMAP_PIN_INPUT_PULLUP);
}
}
/*
* For MMC3 the pins need to be muxed in the board-*.c files
*/
}
}
static void __init mapphone_sdrc_init(void)
{
/* Ensure SDRC pins are mux'd for self-refresh */
omap_cfg_reg(H16_34XX_SDRC_CKE0);
omap_cfg_reg(H17_34XX_SDRC_CKE1);
}
static void __init archos_hdmi_gpio_init(
const struct archos_disp_conf* disp_conf)
{
/* driver will manage the GPIO, just apply the pin multiplexing
* archos_gpio_init_input(&disp_conf->hdmi_int, "hdmi irq"); */
omap_cfg_reg(GPIO_MUX(disp_conf->hdmi_int));
archos_gpio_init_output(&disp_conf->hdmi_pwr, "hdmi pwr");
/* FIXME: make userspace configurable */
gpio_set_value(GPIO_PIN(disp_conf->hdmi_pwr), 1);
/* patch power gpio into platform data */
board_hdmi_pdata.pwr_gpio = GPIO_PIN(disp_conf->hdmi_pwr);
/* patch IRQ into HDMI I2C bus info */
board_i2c_bus2_info[1].irq = gpio_to_irq(GPIO_PIN(disp_conf->hdmi_int));
board_i2c_bus2_info[2].irq = gpio_to_irq(GPIO_PIN(disp_conf->hdmi_int));
omap_cfg_reg(H26_3630_DSS_DATA0);
omap_cfg_reg(H25_3630_DSS_DATA1);
omap_cfg_reg(E28_3630_DSS_DATA2);
omap_cfg_reg(J26_3630_DSS_DATA3);
omap_cfg_reg(AC27_3630_DSS_DATA4);
omap_cfg_reg(AC28_3630_DSS_DATA5);
omap_cfg_reg(D26_3630_DSS_HSYNC);
omap_cfg_reg(D27_3630_DSS_VSYNC);
omap_cfg_reg(D28_3630_DSS_PCLK);
omap_cfg_reg(E27_3630_DSS_ACBIAS);
omap_cfg_reg(E26_3630_DSS_DATA6);
omap_cfg_reg(F28_3630_DSS_DATA7);
omap_cfg_reg(F27_3630_DSS_DATA8);
omap_cfg_reg(G26_3630_DSS_DATA9);
omap_cfg_reg(AD28_3630_DSS_DATA10);
omap_cfg_reg(AD27_3630_DSS_DATA11);
omap_cfg_reg(AB28_3630_DSS_DATA12);
omap_cfg_reg(AB27_3630_DSS_DATA13);
omap_cfg_reg(AA28_3630_DSS_DATA14);
omap_cfg_reg(AA27_3630_DSS_DATA15);
omap_cfg_reg(G25_3630_DSS_DATA16);
omap_cfg_reg(H27_3630_DSS_DATA17);
omap_cfg_reg(AH26_3630_DSS_DATA18);
omap_cfg_reg(AG26_3630_DSS_DATA19);
omap_cfg_reg(AF18_3630_DSS_DATA20);
omap_cfg_reg(AF19_3630_DSS_DATA21);
omap_cfg_reg(AE21_3630_DSS_DATA22);
omap_cfg_reg(AF21_3630_DSS_DATA23);
}
static void __init mapphone_serial_init(void)
{
int bpwake_strobe_gpio = MAPPHONE_BPWAKE_STROBE_GPIO;
#ifdef CONFIG_ARM_OF
struct device_node *uart_node;
const void *uart_prop;
struct device_node *dt_node;
const void *dt_prop;
uart_node = of_find_node_by_path(DT_PATH_UART);
if (uart_node) {
uart_prop = of_get_property(uart_node,
DT_PROP_UART_HW_FLOW_CONTROL, NULL);
if (uart_prop)
omap_serial_ctsrts_init((unsigned char *) uart_prop);
uart_prop = of_get_property(uart_node,
DT_PROP_UART_PORT_FOR_GPS, NULL);
if (uart_prop)
omap_uart_set_gps_port(*(int *) uart_prop);
uart_prop = of_get_property(uart_node,
DT_PROP_UART_PADCONF_FOR_UART0, NULL);
if (uart_prop)
omap_uart_set_uart0_padconf(*(int *) uart_prop);
of_node_put(uart_node);
}
/* Disable ttyS2 if uart debug is disabled in the device tree.
* This disables the serial console, preventing headset static
* that occured when the kernel wrote to the serial console.
*/
dt_node = of_find_node_by_path(DT_HIGH_LEVEL_FEATURE);
if (NULL != dt_node) {
dt_prop = of_get_property(dt_node,
DT_HIGH_LEVEL_FEATURE_HEADSET_UART_EN, NULL);
if (NULL != dt_prop)
if (*(u8 *)dt_prop == 0)
mapphone_uart_config.enabled_uarts &= ~(1 << 2);
of_node_put(dt_node);
}
#endif
omap_cfg_reg(AA8_34XX_UART1_TX);
omap_cfg_reg(Y8_34XX_UART1_RX);
omap_cfg_reg(AA9_34XX_UART1_RTS);
omap_cfg_reg(W8_34XX_UART1_CTS);
omap_cfg_reg(AA25_34XX_UART2_TX);
omap_cfg_reg(AD25_34XX_UART2_RX);
omap_cfg_reg(AB25_34XX_UART2_RTS);
omap_cfg_reg(AB26_34XX_UART2_CTS);
bpwake_strobe_gpio = get_gpio_by_name("ipc_bpwake_strobe");
#ifdef MODEM_EXISTS
if (bpwake_strobe_gpio < 0)
bpwake_strobe_gpio = MAPPHONE_BPWAKE_STROBE_GPIO;
omap_serial_init(bpwake_strobe_gpio, 0x01);
#else
/* No BP on G2 so second parameter set to 0x00 and GPIO_157 used for
* BT
*/
omap_serial_init(bpwake_strobe_gpio, 0x00);
#endif
}
static void __init board_init(void)
{
int num_displays = 0;
init_buffer_pbias();
omap_board_config = board_config;
omap_board_config_size = ARRAY_SIZE(board_config);
archos_leds_init(); // set it here mask hugly transitions
/* before omap_i2c_init() or IRQ will not forwarded to driver */
if (display_config.nrev > hardware_rev)
archos_hdmi_gpio_init(&display_config.rev[hardware_rev]);
msecure_init();
/* offmode config, before I2C config! */
board_offmode_config();
omap_i2c_init();
/* Fix to prevent VIO leakage on wl127x */
wl127x_vio_leakage_fix();
#if defined CONFIG_OMAP2_DSS
if (archos_lcd_panel_init(&board_lcd_device) == 0) {
board_dss_devices[num_displays++] = &board_lcd_device;
board_dss_data.default_device = &board_lcd_device;
}
board_dss_devices[num_displays++] = &board_hdmi_device;
#ifdef CONFIG_OMAP2_DSS_DUMMY
board_dss_devices[num_displays++] = &board_dummy_device;
board_dss_data.default_device = &board_dummy_device;
#endif /* CONFIG_OMAP2_DSS_DUMMY */
board_dss_data.num_devices = num_displays;
#endif/* CONFIG_OMAP2_DSS */
platform_add_devices(board_devices, ARRAY_SIZE(board_devices));
omap_cfg_reg(H20_3430_UART3_RX_IRRX);
omap_serial_init();
usb_musb_init();
archos_usb_ehci_init();
archos_accel_init(&board_mma7660fc_pdata);
if ( hardware_rev < 2 ) {
ads7846_dev_init();
}
twl4030_mmc_init(mmc);
board_vmmc2_supply.dev = mmc[0].dev;
archos_audio_gpio_init();
archos_usb2sata_init();
archos_camera_ov7675_init();
archos_keys_init();
enable_board_wakeup_source();
}
static void __init osk_mistral_init(void)
{
/* NOTE: we could actually tell if there's a Mistral board
* attached, e.g. by trying to read something from the ads7846.
* But this arch_init() code is too early for that, since we
* can't talk to the ads or even the i2c eeprom.
*/
/* parallel camera interface */
omap_cfg_reg(J15_1610_CAM_LCLK);
omap_cfg_reg(J18_1610_CAM_D7);
omap_cfg_reg(J19_1610_CAM_D6);
omap_cfg_reg(J14_1610_CAM_D5);
omap_cfg_reg(K18_1610_CAM_D4);
omap_cfg_reg(K19_1610_CAM_D3);
omap_cfg_reg(K15_1610_CAM_D2);
omap_cfg_reg(K14_1610_CAM_D1);
omap_cfg_reg(L19_1610_CAM_D0);
omap_cfg_reg(L18_1610_CAM_VS);
omap_cfg_reg(L15_1610_CAM_HS);
omap_cfg_reg(M19_1610_CAM_RSTZ);
omap_cfg_reg(Y15_1610_CAM_OUTCLK);
/* serial camera interface */
omap_cfg_reg(H19_1610_CAM_EXCLK);
omap_cfg_reg(W13_1610_CCP_CLKM);
omap_cfg_reg(Y12_1610_CCP_CLKP);
/* CCP_DATAM CONFLICTS WITH UART1.TX (and serial console) */
/* omap_cfg_reg(Y14_1610_CCP_DATAM); */
omap_cfg_reg(W14_1610_CCP_DATAP);
/* CAM_PWDN */
if (gpio_request(11, "cam_pwdn") == 0) {
omap_cfg_reg(N20_1610_GPIO11);
gpio_direction_output(11, 0);
} else
pr_debug("OSK+Mistral: CAM_PWDN is awol\n");
/* omap_cfg_reg(P19_1610_GPIO6); */ /* BUSY */
gpio_request(6, "ts_busy");
gpio_direction_input(6);
omap_cfg_reg(P20_1610_GPIO4); /* PENIRQ */
gpio_request(4, "ts_int");
gpio_direction_input(4);
irq_set_irq_type(gpio_to_irq(4), IRQ_TYPE_EDGE_FALLING);
mistral_boardinfo[0].irq = gpio_to_irq(4);
spi_register_board_info(mistral_boardinfo,
ARRAY_SIZE(mistral_boardinfo));
/* the sideways button (SW1) is for use as a "wakeup" button
*
* NOTE: The Mistral board has the wakeup button (SW1) wired
* to the LCD 3.3V rail, which is powered down during suspend.
* To allow this button to wake up the omap, work around this
* HW bug by rewiring SW1 to use the main 3.3V rail.
*/
omap_cfg_reg(N15_1610_MPUIO2);
if (gpio_request(OMAP_MPUIO(2), "wakeup") == 0) {
int ret = 0;
int irq = gpio_to_irq(OMAP_MPUIO(2));
gpio_direction_input(OMAP_MPUIO(2));
irq_set_irq_type(irq, IRQ_TYPE_EDGE_RISING);
#ifdef CONFIG_PM
/* share the IRQ in case someone wants to use the
* button for more than wakeup from system sleep.
*/
ret = request_irq(irq,
&osk_mistral_wake_interrupt,
IRQF_SHARED, "mistral_wakeup",
&osk_mistral_wake_interrupt);
if (ret != 0) {
gpio_free(OMAP_MPUIO(2));
printk(KERN_ERR "OSK+Mistral: no wakeup irq, %d?\n",
ret);
} else
enable_irq_wake(irq);
#endif
} else
printk(KERN_ERR "OSK+Mistral: wakeup button is awol\n");
/* LCD: backlight, and power; power controls other devices on the
* board, like the touchscreen, EEPROM, and wakeup (!) switch.
*/
omap_cfg_reg(PWL);
if (gpio_request(2, "lcd_pwr") == 0)
gpio_direction_output(2, 1);
i2c_register_board_info(1, mistral_i2c_board_info,
ARRAY_SIZE(mistral_i2c_board_info));
platform_add_devices(mistral_devices, ARRAY_SIZE(mistral_devices));
}
static int ohci_omap_reset(struct usb_hcd *hcd)
{
struct ohci_hcd *ohci = hcd_to_ohci(hcd);
struct omap_usb_config *config = dev_get_platdata(hcd->self.controller);
int need_transceiver = (config->otg != 0);
int ret;
dev_dbg(hcd->self.controller, "starting USB Controller\n");
if (config->otg) {
hcd->self.otg_port = config->otg;
/* default/minimum OTG power budget: 8 mA */
hcd->power_budget = 8;
}
/* boards can use OTG transceivers in non-OTG modes */
need_transceiver = need_transceiver
|| machine_is_omap_h2() || machine_is_omap_h3();
/* XXX OMAP16xx only */
if (config->ocpi_enable)
config->ocpi_enable();
#ifdef CONFIG_USB_OTG
if (need_transceiver) {
hcd->phy = usb_get_phy(USB_PHY_TYPE_USB2);
if (!IS_ERR_OR_NULL(hcd->phy)) {
int status = otg_set_host(hcd->phy->otg,
&ohci_to_hcd(ohci)->self);
dev_dbg(hcd->self.controller, "init %s phy, status %d\n",
hcd->phy->label, status);
if (status) {
usb_put_phy(hcd->phy);
return status;
}
} else {
dev_err(hcd->self.controller, "can't find phy\n");
return -ENODEV;
}
ohci->start_hnp = start_hnp;
}
#endif
omap_ohci_clock_power(1);
if (cpu_is_omap15xx()) {
omap_1510_local_bus_power(1);
omap_1510_local_bus_init();
}
ret = ohci_setup(hcd);
if (ret < 0)
return ret;
if (config->otg || config->rwc) {
ohci->hc_control = OHCI_CTRL_RWC;
writel(OHCI_CTRL_RWC, &ohci->regs->control);
}
/* board-specific power switching and overcurrent support */
if (machine_is_omap_osk() || machine_is_omap_innovator()) {
u32 rh = roothub_a (ohci);
/* power switching (ganged by default) */
rh &= ~RH_A_NPS;
/* TPS2045 switch for internal transceiver (port 1) */
if (machine_is_omap_osk()) {
ohci_to_hcd(ohci)->power_budget = 250;
rh &= ~RH_A_NOCP;
/* gpio9 for overcurrent detction */
omap_cfg_reg(W8_1610_GPIO9);
gpio_request(9, "OHCI overcurrent");
gpio_direction_input(9);
/* for paranoia's sake: disable USB.PUEN */
omap_cfg_reg(W4_USB_HIGHZ);
}
ohci_writel(ohci, rh, &ohci->regs->roothub.a);
ohci->flags &= ~OHCI_QUIRK_HUB_POWER;
} else if (machine_is_nokia770()) {
/* We require a self-powered hub, which should have
* plenty of power. */
ohci_to_hcd(ohci)->power_budget = 0;
}
/* FIXME khubd hub requests should manage power switching */
omap_ohci_transceiver_power(1);
/* board init will have already handled HMC and mux setup.
* any external transceiver should already be initialized
* too, so all configured ports use the right signaling now.
*/
return 0;
}
static void __init h2_init(void)
{
h2_nor_resource.end = h2_nor_resource.start = omap_cs3_phys();
h2_nor_resource.end += SZ_32M - 1;
h2_nand_resource.end = h2_nand_resource.start = OMAP_CS2B_PHYS;
h2_nand_resource.end += SZ_4K - 1;
if (gpio_request(H2_NAND_RB_GPIO_PIN, "NAND ready") < 0)
BUG();
gpio_direction_input(H2_NAND_RB_GPIO_PIN);
omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
/* MMC: card detect and WP */
/* omap_cfg_reg(U19_ARMIO1); */ /* CD */
omap_cfg_reg(BALLOUT_V8_ARMIO3); /* WP */
/* Mux pins for keypad */
omap_cfg_reg(F18_1610_KBC0);
omap_cfg_reg(D20_1610_KBC1);
omap_cfg_reg(D19_1610_KBC2);
omap_cfg_reg(E18_1610_KBC3);
omap_cfg_reg(C21_1610_KBC4);
omap_cfg_reg(G18_1610_KBR0);
omap_cfg_reg(F19_1610_KBR1);
omap_cfg_reg(H14_1610_KBR2);
omap_cfg_reg(E20_1610_KBR3);
omap_cfg_reg(E19_1610_KBR4);
omap_cfg_reg(N19_1610_KBR5);
platform_add_devices(h2_devices, ARRAY_SIZE(h2_devices));
omap_board_config = h2_config;
omap_board_config_size = ARRAY_SIZE(h2_config);
omap_serial_init();
omap_register_i2c_bus(1, 100, h2_i2c_board_info,
ARRAY_SIZE(h2_i2c_board_info));
omap1_usb_init(&h2_usb_config);
h2_mmc_init();
}
/* this may be called only from board-*.c setup code */
int __init
tusb6010_setup_interface(struct musb_hdrc_platform_data *data,
unsigned ps_refclk, unsigned waitpin,
unsigned async, unsigned sync,
unsigned irq, unsigned dmachan)
{
int status;
static char error[] __initdata =
KERN_ERR "tusb6010 init error %d, %d\n";
/* ASYNC region, primarily for PIO */
status = gpmc_cs_request(async, SZ_16M, (unsigned long *)
&tusb_resources[0].start);
if (status < 0) {
printk(error, 1, status);
return status;
}
tusb_resources[0].end = tusb_resources[0].start + 0x9ff;
async_cs = async;
gpmc_cs_write_reg(async, GPMC_CS_CONFIG1,
GPMC_CONFIG1_PAGE_LEN(2)
| GPMC_CONFIG1_WAIT_READ_MON
| GPMC_CONFIG1_WAIT_WRITE_MON
| GPMC_CONFIG1_WAIT_PIN_SEL(waitpin)
| GPMC_CONFIG1_READTYPE_ASYNC
| GPMC_CONFIG1_WRITETYPE_ASYNC
| GPMC_CONFIG1_DEVICESIZE_16
| GPMC_CONFIG1_DEVICETYPE_NOR
| GPMC_CONFIG1_MUXADDDATA);
/* SYNC region, primarily for DMA */
status = gpmc_cs_request(sync, SZ_16M, (unsigned long *)
&tusb_resources[1].start);
if (status < 0) {
printk(error, 2, status);
return status;
}
tusb_resources[1].end = tusb_resources[1].start + 0x9ff;
sync_cs = sync;
gpmc_cs_write_reg(sync, GPMC_CS_CONFIG1,
GPMC_CONFIG1_READMULTIPLE_SUPP
| GPMC_CONFIG1_READTYPE_SYNC
| GPMC_CONFIG1_WRITEMULTIPLE_SUPP
| GPMC_CONFIG1_WRITETYPE_SYNC
| GPMC_CONFIG1_CLKACTIVATIONTIME(1)
| GPMC_CONFIG1_PAGE_LEN(2)
| GPMC_CONFIG1_WAIT_READ_MON
| GPMC_CONFIG1_WAIT_WRITE_MON
| GPMC_CONFIG1_WAIT_PIN_SEL(waitpin)
| GPMC_CONFIG1_DEVICESIZE_16
| GPMC_CONFIG1_DEVICETYPE_NOR
| GPMC_CONFIG1_MUXADDDATA
/* fclk divider gets set later */
);
/* IRQ */
status = gpio_request(irq, "TUSB6010 irq");
if (status < 0) {
printk(error, 3, status);
return status;
}
gpio_direction_input(irq);
tusb_resources[2].start = irq + IH_GPIO_BASE;
/* set up memory timings ... can speed them up later */
if (!ps_refclk) {
printk(error, 4, status);
return -ENODEV;
}
refclk_psec = ps_refclk;
status = tusb6010_platform_retime(1);
if (status < 0) {
printk(error, 5, status);
return status;
}
/* finish device setup ... */
if (!data) {
printk(error, 6, status);
return -ENODEV;
}
tusb_device.dev.platform_data = data;
/* REVISIT let the driver know what DMA channels work */
if (!dmachan)
tusb_device.dev.dma_mask = NULL;
else {
/* assume OMAP 2420 ES2.0 and later */
if (dmachan & (1 << 0))
omap_cfg_reg(AA10_242X_DMAREQ0);
if (dmachan & (1 << 1))
omap_cfg_reg(AA6_242X_DMAREQ1);
if (dmachan & (1 << 2))
omap_cfg_reg(E4_242X_DMAREQ2);
if (dmachan & (1 << 3))
omap_cfg_reg(G4_242X_DMAREQ3);
if (dmachan & (1 << 4))
omap_cfg_reg(D3_242X_DMAREQ4);
if (dmachan & (1 << 5))
omap_cfg_reg(E3_242X_DMAREQ5);
}
/* so far so good ... register the device */
status = platform_device_register(&tusb_device);
if (status < 0) {
printk(error, 7, status);
return status;
}
return 0;
}
static void __init ams_delta_init(void)
{
/* mux pins for uarts */
omap_cfg_reg(UART1_TX);
omap_cfg_reg(UART1_RTS);
/* parallel camera interface */
omap_cfg_reg(H19_1610_CAM_EXCLK);
omap_cfg_reg(J15_1610_CAM_LCLK);
omap_cfg_reg(L18_1610_CAM_VS);
omap_cfg_reg(L15_1610_CAM_HS);
omap_cfg_reg(L19_1610_CAM_D0);
omap_cfg_reg(K14_1610_CAM_D1);
omap_cfg_reg(K15_1610_CAM_D2);
omap_cfg_reg(K19_1610_CAM_D3);
omap_cfg_reg(K18_1610_CAM_D4);
omap_cfg_reg(J14_1610_CAM_D5);
omap_cfg_reg(J19_1610_CAM_D6);
omap_cfg_reg(J18_1610_CAM_D7);
omap_board_config = ams_delta_config;
omap_board_config_size = ARRAY_SIZE(ams_delta_config);
omap_serial_init();
omap_register_i2c_bus(1, 100, NULL, 0);
/* Clear latch2 (NAND, LCD, modem enable) */
ams_delta_latch2_write(~0, 0);
omap1_usb_init(&ams_delta_usb_config);
omap1_set_camera_info(&ams_delta_camera_platform_data);
#ifdef CONFIG_LEDS_TRIGGERS
led_trigger_register_simple("ams_delta_camera",
&ams_delta_camera_led_trigger);
#endif
platform_add_devices(ams_delta_devices, ARRAY_SIZE(ams_delta_devices));
ams_delta_init_fiq();
omap_writew(omap_readw(ARM_RSTCT1) | 0x0004, ARM_RSTCT1);
}
static void __init omap_perseus2_init(void)
{
/* Early, board-dependent init */
/*
* Hold GSM Reset until needed
*/
omap_writew(omap_readw(OMAP7XX_DSP_M_CTL) & ~1, OMAP7XX_DSP_M_CTL);
/*
* UARTs -> done automagically by 8250 driver
*/
/*
* CSx timings, GPIO Mux ... setup
*/
/* Flash: CS0 timings setup */
omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_0);
omap_writel(0x00000088, OMAP7XX_FLASH_ACFG_0);
/*
* Ethernet support through the debug board
* CS1 timings setup
*/
omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_1);
omap_writel(0x00000000, OMAP7XX_FLASH_ACFG_1);
/*
* Configure MPU_EXT_NIRQ IO in IO_CONF9 register,
* It is used as the Ethernet controller interrupt
*/
omap_writel(omap_readl(OMAP7XX_IO_CONF_9) & 0x1FFFFFFF,
OMAP7XX_IO_CONF_9);
perseus2_init_smc91x();
if (gpio_request(P2_NAND_RB_GPIO_PIN, "NAND ready") < 0)
BUG();
gpio_direction_input(P2_NAND_RB_GPIO_PIN);
omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
/* Mux pins for keypad */
omap_cfg_reg(E2_7XX_KBR0);
omap_cfg_reg(J7_7XX_KBR1);
omap_cfg_reg(E1_7XX_KBR2);
omap_cfg_reg(F3_7XX_KBR3);
omap_cfg_reg(D2_7XX_KBR4);
omap_cfg_reg(C2_7XX_KBC0);
omap_cfg_reg(D3_7XX_KBC1);
omap_cfg_reg(E4_7XX_KBC2);
omap_cfg_reg(F4_7XX_KBC3);
omap_cfg_reg(E3_7XX_KBC4);
platform_add_devices(devices, ARRAY_SIZE(devices));
omap_board_config = perseus2_config;
omap_board_config_size = ARRAY_SIZE(perseus2_config);
omap_serial_init();
omap_register_i2c_bus(1, 100, NULL, 0);
}
static inline void omap2_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
int controller_nr)
{
if (cpu_is_omap2420() && controller_nr == 0) {
omap_cfg_reg(H18_24XX_MMC_CMD);
omap_cfg_reg(H15_24XX_MMC_CLKI);
omap_cfg_reg(G19_24XX_MMC_CLKO);
omap_cfg_reg(F20_24XX_MMC_DAT0);
omap_cfg_reg(F19_24XX_MMC_DAT_DIR0);
omap_cfg_reg(G18_24XX_MMC_CMD_DIR);
if (mmc_controller->slots[0].wires == 4) {
omap_cfg_reg(H14_24XX_MMC_DAT1);
omap_cfg_reg(E19_24XX_MMC_DAT2);
omap_cfg_reg(D19_24XX_MMC_DAT3);
omap_cfg_reg(E20_24XX_MMC_DAT_DIR1);
omap_cfg_reg(F18_24XX_MMC_DAT_DIR2);
omap_cfg_reg(E18_24XX_MMC_DAT_DIR3);
}
/*
* Use internal loop-back in MMC/SDIO Module Input Clock
* selection
*/
if (mmc_controller->slots[0].internal_clock) {
u32 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
v |= (1 << 24);
omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
}
}
if (cpu_is_omap34xx()) {
u32 dev_conf = 0, v_shift = 0;
if (controller_nr == 0) {
omap_cfg_reg(N28_34XX_MMC1_CLK);
omap_cfg_reg(M27_34XX_MMC1_CMD);
omap_cfg_reg(N27_34XX_MMC1_DAT0);
if (mmc_controller->slots[0].wires == 4 ||
mmc_controller->slots[0].wires == 8) {
omap_cfg_reg(N26_34XX_MMC1_DAT1);
omap_cfg_reg(N25_34XX_MMC1_DAT2);
omap_cfg_reg(P28_34XX_MMC1_DAT3);
}
if (mmc_controller->slots[0].wires == 8) {
omap_cfg_reg(P27_34XX_MMC1_DAT4);
omap_cfg_reg(P26_34XX_MMC1_DAT5);
omap_cfg_reg(R27_34XX_MMC1_DAT6);
omap_cfg_reg(R25_34XX_MMC1_DAT7);
}
dev_conf = OMAP2_CONTROL_DEVCONF0;
v_shift = OMAP2_MMCSDIO1ADPCLKISEL;
}
if (controller_nr == 1) {
/* MMC2 */
omap_cfg_reg(AE2_34XX_MMC2_CLK);
omap_cfg_reg(AG5_34XX_MMC2_CMD);
omap_cfg_reg(AH5_34XX_MMC2_DAT0);
/*
* For 8 wire configurations, Lines DAT4, 5, 6 and 7 need to be muxed
* in the board-*.c files
*/
if (mmc_controller->slots[0].wires == 4 ||
mmc_controller->slots[0].wires == 8) {
omap_cfg_reg(AH4_34XX_MMC2_DAT1);
omap_cfg_reg(AG4_34XX_MMC2_DAT2);
omap_cfg_reg(AF4_34XX_MMC2_DAT3);
}
if (mmc_controller->slots[0].wires == 8) {
omap_cfg_reg(AE4_34XX_MMC2_DAT4);
omap_cfg_reg(AH3_34XX_MMC2_DAT5);
omap_cfg_reg(AF3_34XX_MMC2_DAT6);
omap_cfg_reg(AE3_34XX_MMC2_DAT7);
}
dev_conf = OMAP343X_CONTROL_DEVCONF1;
v_shift = OMAP2_MMCSDIO2ADPCLKISEL;
}
/*
* For MMC3 the pins need to be muxed in the board-*.c files
*/
/*
* Use internal loop-back in MMC/SDIO Module Input Clock
* selection
*/
if (mmc_controller->slots[0].internal_clock && dev_conf) {
u32 v = omap_ctrl_readl(dev_conf);
v |= (1 << v_shift);
omap_ctrl_writel(v, dev_conf);
}
}
}
static int ohci_omap_init(struct usb_hcd *hcd)
{
struct ohci_hcd *ohci = hcd_to_ohci(hcd);
struct omap_usb_config *config = hcd->self.controller->platform_data;
int need_transceiver = (config->otg != 0);
int ret;
dev_dbg(hcd->self.controller, "starting USB Controller\n");
if (config->otg) {
ohci_to_hcd(ohci)->self.otg_port = config->otg;
/* default/minimum OTG power budget: 8 mA */
ohci_to_hcd(ohci)->power_budget = 8;
}
/* boards can use OTG transceivers in non-OTG modes */
need_transceiver = need_transceiver
|| machine_is_omap_h2() || machine_is_omap_h3();
if (cpu_is_omap16xx())
ocpi_enable();
#ifdef CONFIG_ARCH_OMAP_OTG
if (need_transceiver) {
ohci->transceiver = otg_get_transceiver();
if (ohci->transceiver) {
int status = otg_set_host(ohci->transceiver,
&ohci_to_hcd(ohci)->self);
dev_dbg(hcd->self.controller, "init %s transceiver, status %d\n",
ohci->transceiver->label, status);
if (status) {
if (ohci->transceiver)
put_device(ohci->transceiver->dev);
return status;
}
} else {
dev_err(hcd->self.controller, "can't find transceiver\n");
return -ENODEV;
}
}
#endif
omap_ohci_clock_power(1);
if (cpu_is_omap1510()) {
omap_1510_local_bus_power(1);
omap_1510_local_bus_init();
}
if ((ret = ohci_init(ohci)) < 0)
return ret;
/* board-specific power switching and overcurrent support */
if (machine_is_omap_osk() || machine_is_omap_innovator()) {
u32 rh = roothub_a (ohci);
/* power switching (ganged by default) */
rh &= ~RH_A_NPS;
/* TPS2045 switch for internal transceiver (port 1) */
if (machine_is_omap_osk()) {
ohci_to_hcd(ohci)->power_budget = 250;
rh &= ~RH_A_NOCP;
/* gpio9 for overcurrent detction */
omap_cfg_reg(W8_1610_GPIO9);
omap_request_gpio(9);
omap_set_gpio_direction(9, 1 /* IN */);
/* for paranoia's sake: disable USB.PUEN */
omap_cfg_reg(W4_USB_HIGHZ);
}
ohci_writel(ohci, rh, &ohci->regs->roothub.a);
distrust_firmware = 0;
} else if (machine_is_nokia770()) {
/* We require a self-powered hub, which should have
* plenty of power. */
ohci_to_hcd(ohci)->power_budget = 0;
}
/* FIXME khubd hub requests should manage power switching */
omap_ohci_transceiver_power(1);
/* board init will have already handled HMC and mux setup.
* any external transceiver should already be initialized
* too, so all configured ports use the right signaling now.
*/
return 0;
}
static void __init h2_init(void)
{
h2_init_smc91x();
/* Here we assume the NOR boot config: NOR on CS3 (possibly swapped
* to address 0 by a dip switch), NAND on CS2B. The NAND driver will
* notice whether a NAND chip is enabled at probe time.
*
* FIXME revC boards (and H3) support NAND-boot, with a dip switch to
* put NOR on CS2B and NAND (which on H2 may be 16bit) on CS3. Try
* detecting that in code here, to avoid probing every possible flash
* configuration...
*/
h2_nor_resource.end = h2_nor_resource.start = omap_cs3_phys();
h2_nor_resource.end += SZ_32M - 1;
h2_nand_resource.end = h2_nand_resource.start = OMAP_CS2B_PHYS;
h2_nand_resource.end += SZ_4K - 1;
if (gpio_request(H2_NAND_RB_GPIO_PIN, "NAND ready") < 0)
BUG();
gpio_direction_input(H2_NAND_RB_GPIO_PIN);
omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
/* MMC: card detect and WP */
/* omap_cfg_reg(U19_ARMIO1); */ /* CD */
omap_cfg_reg(BALLOUT_V8_ARMIO3); /* WP */
/* Mux pins for keypad */
omap_cfg_reg(F18_1610_KBC0);
omap_cfg_reg(D20_1610_KBC1);
omap_cfg_reg(D19_1610_KBC2);
omap_cfg_reg(E18_1610_KBC3);
omap_cfg_reg(C21_1610_KBC4);
omap_cfg_reg(G18_1610_KBR0);
omap_cfg_reg(F19_1610_KBR1);
omap_cfg_reg(H14_1610_KBR2);
omap_cfg_reg(E20_1610_KBR3);
omap_cfg_reg(E19_1610_KBR4);
omap_cfg_reg(N19_1610_KBR5);
platform_add_devices(h2_devices, ARRAY_SIZE(h2_devices));
omap_board_config = h2_config;
omap_board_config_size = ARRAY_SIZE(h2_config);
omap_serial_init();
omap_register_i2c_bus(1, 100, h2_i2c_board_info,
ARRAY_SIZE(h2_i2c_board_info));
omap1_usb_init(&h2_usb_config);
h2_mmc_init();
}
static void __init h3_init(void)
{
h3_init_smc91x();
/* Here we assume the NOR boot config: NOR on CS3 (possibly swapped
* to address 0 by a dip switch), NAND on CS2B. The NAND driver will
* notice whether a NAND chip is enabled at probe time.
*
* H3 support NAND-boot, with a dip switch to put NOR on CS2B and NAND
* (which on H2 may be 16bit) on CS3. Try detecting that in code here,
* to avoid probing every possible flash configuration...
*/
nor_resource.end = nor_resource.start = omap_cs3_phys();
nor_resource.end += SZ_32M - 1;
nand_resource.end = nand_resource.start = OMAP_CS2B_PHYS;
nand_resource.end += SZ_4K - 1;
if (gpio_request(H3_NAND_RB_GPIO_PIN, "NAND ready") < 0)
BUG();
gpio_direction_input(H3_NAND_RB_GPIO_PIN);
/* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */
/* GPIO10 pullup/down register, Enable pullup on GPIO10 */
omap_cfg_reg(V2_1710_GPIO10);
/* Mux pins for keypad */
omap_cfg_reg(F18_1610_KBC0);
omap_cfg_reg(D20_1610_KBC1);
omap_cfg_reg(D19_1610_KBC2);
omap_cfg_reg(E18_1610_KBC3);
omap_cfg_reg(C21_1610_KBC4);
omap_cfg_reg(G18_1610_KBR0);
omap_cfg_reg(F19_1610_KBR1);
omap_cfg_reg(H14_1610_KBR2);
omap_cfg_reg(E20_1610_KBR3);
omap_cfg_reg(E19_1610_KBR4);
omap_cfg_reg(N19_1610_KBR5);
platform_add_devices(devices, ARRAY_SIZE(devices));
spi_register_board_info(h3_spi_board_info,
ARRAY_SIZE(h3_spi_board_info));
omap_board_config = h3_config;
omap_board_config_size = ARRAY_SIZE(h3_config);
omap_serial_init();
omap_register_i2c_bus(1, 100, h3_i2c_board_info,
ARRAY_SIZE(h3_i2c_board_info));
omap1_usb_init(&h3_usb_config);
h3_mmc_init();
}
/*
* Note that on Innovator-1510 UART2 pins conflict with USB2.
* By default UART2 does not work on Innovator-1510 if you have
* USB OHCI enabled. To use UART2, you must disable USB2 first.
*/
void __init omap_serial_init(void)
{
int i;
const struct omap_uart_config *info;
if (cpu_is_omap730()) {
serial_platform_data[0].regshift = 0;
serial_platform_data[1].regshift = 0;
serial_platform_data[0].irq = INT_730_UART_MODEM_1;
serial_platform_data[1].irq = INT_730_UART_MODEM_IRDA_2;
}
if (cpu_is_omap1510()) {
serial_platform_data[0].uartclk = OMAP1510_BASE_BAUD * 16;
serial_platform_data[1].uartclk = OMAP1510_BASE_BAUD * 16;
serial_platform_data[2].uartclk = OMAP1510_BASE_BAUD * 16;
}
info = omap_get_config(OMAP_TAG_UART, struct omap_uart_config);
if (info == NULL)
return;
for (i = 0; i < OMAP_MAX_NR_PORTS; i++) {
unsigned char reg;
if (!((1 << i) & info->enabled_uarts)) {
serial_platform_data[i].membase = NULL;
serial_platform_data[i].mapbase = 0;
continue;
}
switch (i) {
case 0:
uart1_ck = clk_get(NULL, "uart1_ck");
if (IS_ERR(uart1_ck))
printk("Could not get uart1_ck\n");
else {
clk_use(uart1_ck);
if (cpu_is_omap1510())
clk_set_rate(uart1_ck, 12000000);
}
if (cpu_is_omap1510()) {
omap_cfg_reg(UART1_TX);
omap_cfg_reg(UART1_RTS);
if (machine_is_omap_innovator()) {
reg = fpga_read(OMAP1510_FPGA_POWER);
reg |= OMAP1510_FPGA_PCR_COM1_EN;
fpga_write(reg, OMAP1510_FPGA_POWER);
udelay(10);
}
}
break;
case 1:
uart2_ck = clk_get(NULL, "uart2_ck");
if (IS_ERR(uart2_ck))
printk("Could not get uart2_ck\n");
else {
clk_use(uart2_ck);
if (cpu_is_omap1510())
clk_set_rate(uart2_ck, 12000000);
else
clk_set_rate(uart2_ck, 48000000);
}
if (cpu_is_omap1510()) {
omap_cfg_reg(UART2_TX);
omap_cfg_reg(UART2_RTS);
if (machine_is_omap_innovator()) {
reg = fpga_read(OMAP1510_FPGA_POWER);
reg |= OMAP1510_FPGA_PCR_COM2_EN;
fpga_write(reg, OMAP1510_FPGA_POWER);
udelay(10);
}
}
break;
case 2:
uart3_ck = clk_get(NULL, "uart3_ck");
if (IS_ERR(uart3_ck))
printk("Could not get uart3_ck\n");
else {
clk_use(uart3_ck);
if (cpu_is_omap1510())
clk_set_rate(uart3_ck, 12000000);
}
if (cpu_is_omap1510()) {
omap_cfg_reg(UART3_TX);
omap_cfg_reg(UART3_RX);
}
break;
}
omap_serial_reset(&serial_platform_data[i]);
}
}
static u32 __init omap_usb1_init(unsigned nwires)
{
u32 syscon1 = 0;
if (cpu_class_is_omap1() && !cpu_is_omap15xx() && nwires != 6) {
u32 l;
l = omap_readl(USB_TRANSCEIVER_CTRL);
l &= ~CONF_USB1_UNI_R;
omap_writel(l, USB_TRANSCEIVER_CTRL);
}
if (cpu_is_omap24xx())
omap2_usb_devconf_clear(1, USB_BIDIR_TLL);
if (nwires == 0)
return 0;
/* external transceiver */
if (cpu_class_is_omap1()) {
omap_cfg_reg(USB1_TXD);
omap_cfg_reg(USB1_TXEN);
if (nwires != 3)
omap_cfg_reg(USB1_RCV);
}
if (cpu_is_omap15xx()) {
omap_cfg_reg(USB1_SEO);
omap_cfg_reg(USB1_SPEED);
// SUSP
} else if (cpu_is_omap1610() || cpu_is_omap5912()) {
omap_cfg_reg(W13_1610_USB1_SE0);
omap_cfg_reg(R13_1610_USB1_SPEED);
// SUSP
} else if (cpu_is_omap1710()) {
omap_cfg_reg(R13_1710_USB1_SE0);
// SUSP
} else if (cpu_is_omap24xx()) {
/* NOTE: board-specific code must set up pin muxing for usb1,
* since each signal could come out on either of two balls.
*/
} else {
pr_debug("usb%d cpu unrecognized\n", 1);
return 0;
}
switch (nwires) {
case 2:
if (!cpu_is_omap24xx())
goto bad;
/* NOTE: board-specific code must override this setting if
* this TLL link is not using DP/DM
*/
syscon1 = 1;
omap2_usb_devconf_set(1, USB_BIDIR_TLL);
break;
case 3:
syscon1 = 2;
if (cpu_is_omap24xx())
omap2_usb_devconf_set(1, USB_BIDIR);
break;
case 4:
syscon1 = 1;
if (cpu_is_omap24xx())
omap2_usb_devconf_set(1, USB_BIDIR);
break;
case 6:
if (cpu_is_omap24xx())
goto bad;
syscon1 = 3;
omap_cfg_reg(USB1_VP);
omap_cfg_reg(USB1_VM);
if (!cpu_is_omap15xx()) {
u32 l;
l = omap_readl(USB_TRANSCEIVER_CTRL);
l |= CONF_USB1_UNI_R;
omap_writel(l, USB_TRANSCEIVER_CTRL);
}
break;
default:
bad:
printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
1, nwires);
}
return syscon1 << 20;
}
