static void __init omap_palmte_init(void) { omap_board_config = palmte_config; omap_board_config_size = ARRAY_SIZE(palmte_config); platform_add_devices(palmte_devices, ARRAY_SIZE(palmte_devices)); spi_register_board_info(palmte_spi_info, ARRAY_SIZE(palmte_spi_info)); palmte_misc_gpio_setup(); omap_serial_init(); omap_register_i2c_bus(1, 100, NULL, 0); }
void __init omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int pmic_irq, struct twl4030_platform_data *pmic_data) { omap_mux_init_signal("sys_nirq", OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE); strncpy(pmic_i2c_board_info.type, pmic_type, sizeof(pmic_i2c_board_info.type)); pmic_i2c_board_info.irq = pmic_irq; pmic_i2c_board_info.platform_data = pmic_data; omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1); }
static int __init omap3_beagle_i2c_init(void) { omap3_pmic_get_config(&beagle_twldata, TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2); beagle_twldata.vpll2->constraints.name = "VDVI"; omap3_pmic_init("twl4030", &beagle_twldata); /* Bus 3 is attached to the DVI port where devices like the pico DLP * projector don't work reliably with 400kHz */ omap_register_i2c_bus(3, 100, beagle_i2c_eeprom, ARRAY_SIZE(beagle_i2c_eeprom)); return 0; }
static void __init omap_palmtt_init(void) { omap_mpu_wdt_mode(0); omap_board_config = palmtt_config; omap_board_config_size = ARRAY_SIZE(palmtt_config); platform_add_devices(palmtt_devices, ARRAY_SIZE(palmtt_devices)); spi_register_board_info(palmtt_boardinfo,ARRAY_SIZE(palmtt_boardinfo)); omap_serial_init(); omap_register_i2c_bus(1, 100, NULL, 0); }
static int __init omap_i2c_init(void) { /* 20110801 [email protected] using internal I2C pull up */ u32 prog_io; u32 lb; #if 0 //disable I2C Internal pull up prog_io = omap_ctrl_readl(OMAP343X_CONTROL_PROG_IO1); /* Program (bit 0)=0 to enable internal pull-up on I2C2 */ prog_io &= ~(OMAP3630_PRG_I2C2_PULLUPRESX); omap_ctrl_writel(prog_io, OMAP343X_CONTROL_PROG_IO1); #endif// prog_io = omap_ctrl_readl(OMAP36XX_CONTROL_PROG_IO2); /* Program (bit 7)=0 to enable internal pull-up on I2C3 */ prog_io &= ~(OMAP3630_PRG_I2C3_PULLUPRESX); #if 0 //disable I2C Internal pull up /* Set LB on I2C2 */ lb = 0x02; /* 860 Ohms / 50-150pF cap.load */ prog_io &= ~(OMAP3630_PRG_I2C2_FS_MASK); prog_io |= (lb << OMAP3630_PRG_I2C2_FS_SHIFT) & OMAP3630_PRG_I2C2_FS_MASK; #endif// /* Set LB on I2C3 */ lb = 0x02;/* 860 Ohms / 50-150pF cap.load */ prog_io &= ~(OMAP3630_PRG_I2C3_FS_MASK); prog_io |= (lb << OMAP3630_PRG_I2C3_FS_SHIFT) & OMAP3630_PRG_I2C3_FS_MASK; omap_ctrl_writel(prog_io, OMAP36XX_CONTROL_PROG_IO2); omap_register_i2c_bus(1, 400, NULL, hub_i2c_boardinfo, ARRAY_SIZE(hub_i2c_boardinfo)); omap_register_i2c_bus(2, 400, NULL,hub_i2c_bus2_info, ARRAY_SIZE(hub_i2c_bus2_info)); omap_register_i2c_bus(3, 400, NULL,hub_i2c_bus3_info, ARRAY_SIZE(hub_i2c_bus3_info));// 20100624 [email protected], add the i2c3 platform device return 0; }
static int __init omap3430_i2c_init(void) { /* i2c1 for PMIC only */ omap3_pmic_get_config(&sdp3430_twldata, TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI | TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO, TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2); sdp3430_twldata.vdac->constraints.apply_uV = true; sdp3430_twldata.vpll2->constraints.apply_uV = true; sdp3430_twldata.vpll2->constraints.name = "VDVI"; sdp3430_twldata.audio->codec->hs_extmute = 1; sdp3430_twldata.audio->codec->hs_extmute_gpio = -EINVAL; omap3_pmic_init("twl4030", &sdp3430_twldata); /* i2c2 on camera connector (for sensor control) and optional isp1301 */ omap_register_i2c_bus(2, 400, NULL, 0); /* i2c3 on display connector (for DVI, tfp410) */ omap_register_i2c_bus(3, 400, NULL, 0); return 0; }
static void __init gokey_i2c_init(void) { omap_i2c_hwspinlock_init(1, 0, &gokey_i2c_1_bus_pdata); omap_i2c_hwspinlock_init(2, 1, &gokey_i2c_2_bus_pdata); omap_i2c_hwspinlock_init(3, 2, &gokey_i2c_3_bus_pdata); omap_i2c_hwspinlock_init(4, 3, &gokey_i2c_4_bus_pdata); omap_register_i2c_bus_board_data(1, &gokey_i2c_1_bus_pdata); omap_register_i2c_bus_board_data(2, &gokey_i2c_2_bus_pdata); omap_register_i2c_bus_board_data(3, &gokey_i2c_3_bus_pdata); omap_register_i2c_bus_board_data(4, &gokey_i2c_4_bus_pdata); /* * Phoenix Audio IC needs I2C1 to * start with 400 KHz or less */ omap_register_i2c_bus(1, 400, NULL, 0); omap_register_i2c_bus(2, 400, gokey_i2c_board_info, ARRAY_SIZE(gokey_i2c_board_info)); omap_register_i2c_bus(3, 400, NULL, 0); omap_register_i2c_bus(4, 400, NULL, 0); }
static int __init overo_i2c_init(void) { omap3_pmic_get_config(&overo_twldata, TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2); overo_twldata.vpll2->constraints.name = "VDVI"; omap3_pmic_init("tps65950", &overo_twldata); /* i2c2 pins are used for gpio */ omap_register_i2c_bus(3, 400, NULL, 0); return 0; }
static int __init omap4_i2c_init(void) { omap4_pmic_get_config(&sdp4430_twldata, TWL_COMMON_PDATA_USB, TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VAUX2 | TWL_COMMON_REGULATOR_VMMC | TWL_COMMON_REGULATOR_VPP | TWL_COMMON_REGULATOR_VANA | TWL_COMMON_REGULATOR_VCXIO | TWL_COMMON_REGULATOR_VUSB | TWL_COMMON_REGULATOR_CLK32KG | TWL_COMMON_REGULATOR_V1V8 | TWL_COMMON_REGULATOR_V2V1); omap4_pmic_init("twl6030", &sdp4430_twldata, &twl6040_data, OMAP44XX_IRQ_SYS_2N); omap_register_i2c_bus(2, 400, NULL, 0); omap_register_i2c_bus(3, 400, sdp4430_i2c_3_boardinfo, ARRAY_SIZE(sdp4430_i2c_3_boardinfo)); omap_register_i2c_bus(4, 400, sdp4430_i2c_4_boardinfo, ARRAY_SIZE(sdp4430_i2c_4_boardinfo)); return 0; }
static void __init omap_nokia770_init(void) { platform_add_devices(nokia770_devices, ARRAY_SIZE(nokia770_devices)); spi_register_board_info(nokia770_spi_board_info, ARRAY_SIZE(nokia770_spi_board_info)); omap_serial_init(); omap_register_i2c_bus(1, 100, NULL, 0); hwa742_dev_init(); ads7846_dev_init(); mipid_dev_init(); omap1_usb_init(&nokia770_usb_config); nokia770_mmc_init(); }
static void __init h2_init(void) { h2_init_smc91x(); /* Here we assume the NOR boot config: NOR on CS3 (possibly swapped * to address 0 by a dip switch), NAND on CS2B. The NAND driver will * notice whether a NAND chip is enabled at probe time. * * FIXME revC boards (and H3) support NAND-boot, with a dip switch to * put NOR on CS2B and NAND (which on H2 may be 16bit) on CS3. Try * detecting that in code here, to avoid probing every possible flash * configuration... */ h2_nor_resource.end = h2_nor_resource.start = omap_cs3_phys(); h2_nor_resource.end += SZ_32M - 1; h2_nand_resource.end = h2_nand_resource.start = OMAP_CS2B_PHYS; h2_nand_resource.end += SZ_4K - 1; if (gpio_request(H2_NAND_RB_GPIO_PIN, "NAND ready") < 0) BUG(); gpio_direction_input(H2_NAND_RB_GPIO_PIN); omap_cfg_reg(L3_1610_FLASH_CS2B_OE); omap_cfg_reg(M8_1610_FLASH_CS2B_WE); /* MMC: card detect and WP */ /* omap_cfg_reg(U19_ARMIO1); */ /* CD */ omap_cfg_reg(BALLOUT_V8_ARMIO3); /* WP */ /* Mux pins for keypad */ omap_cfg_reg(F18_1610_KBC0); omap_cfg_reg(D20_1610_KBC1); omap_cfg_reg(D19_1610_KBC2); omap_cfg_reg(E18_1610_KBC3); omap_cfg_reg(C21_1610_KBC4); omap_cfg_reg(G18_1610_KBR0); omap_cfg_reg(F19_1610_KBR1); omap_cfg_reg(H14_1610_KBR2); omap_cfg_reg(E20_1610_KBR3); omap_cfg_reg(E19_1610_KBR4); omap_cfg_reg(N19_1610_KBR5); platform_add_devices(h2_devices, ARRAY_SIZE(h2_devices)); omap_board_config = h2_config; omap_board_config_size = ARRAY_SIZE(h2_config); omap_serial_init(); omap_register_i2c_bus(1, 100, h2_i2c_board_info, ARRAY_SIZE(h2_i2c_board_info)); omap1_usb_init(&h2_usb_config); h2_mmc_init(); }
static int __init omap_i2c_init(void) { /* Disable OMAP 3630 internal pull-ups for I2Ci */ if (cpu_is_omap3630()) { u32 prog_io; prog_io = omap_ctrl_readl(OMAP343X_CONTROL_PROG_IO1); /* Program (bit 19)=1 to disable internal pull-up on I2C1 */ prog_io |= OMAP3630_PRG_I2C1_PULLUPRESX; /* Program (bit 0)=1 to disable internal pull-up on I2C2 */ prog_io |= OMAP3630_PRG_I2C2_PULLUPRESX; omap_ctrl_writel(prog_io, OMAP343X_CONTROL_PROG_IO1); prog_io = omap_ctrl_readl(OMAP36XX_CONTROL_PROG_IO2); /* Program (bit 7)=1 to disable internal pull-up on I2C3 */ prog_io |= OMAP3630_PRG_I2C3_PULLUPRESX; omap_ctrl_writel(prog_io, OMAP36XX_CONTROL_PROG_IO2); prog_io = omap_ctrl_readl(OMAP36XX_CONTROL_PROG_IO_WKUP1); /* Program (bit 5)=1 to disable internal pull-up on I2C4(SR) */ prog_io |= OMAP3630_PRG_SR_PULLUPRESX; omap_ctrl_writel(prog_io, OMAP36XX_CONTROL_PROG_IO_WKUP1); } omap_register_i2c_bus(1, 400, board_i2c_bus1_info, ARRAY_SIZE(board_i2c_bus1_info)); omap_register_i2c_bus(2, 100, board_i2c_bus2_info, ARRAY_SIZE(board_i2c_bus2_info)); omap_register_i2c_bus(3, 100, board_i2c_bus3_info, ARRAY_SIZE(board_i2c_bus3_info)); /* make sure I2C4 is configured correctly */ omap_cfg_reg(AD26_34XX_I2C4_SCL); omap_cfg_reg(AE26_34XX_I2C4_SDA); return 0; }
static int __init omap_i2c_init(void) { /* Disable OMAP 3630 internal pull-ups for I2Ci */ if (cpu_is_omap3630()) { u32 prog_io; prog_io = omap_ctrl_readl(OMAP343X_CONTROL_PROG_IO1); /* Program (bit 19)=1 to disable internal pull-up on I2C1 */ prog_io |= OMAP3630_PRG_I2C1_PULLUPRESX; /* Program (bit 0)=1 to disable internal pull-up on I2C2 */ prog_io |= OMAP3630_PRG_I2C2_PULLUPRESX; omap_ctrl_writel(prog_io, OMAP343X_CONTROL_PROG_IO1); prog_io = omap_ctrl_readl(OMAP36XX_CONTROL_PROG_IO2); /* Program (bit 7)=1 to disable internal pull-up on I2C3 */ prog_io |= OMAP3630_PRG_I2C3_PULLUPRESX; omap_ctrl_writel(prog_io, OMAP36XX_CONTROL_PROG_IO2); prog_io = omap_ctrl_readl(OMAP36XX_CONTROL_PROG_IO_WKUP1); /* Program (bit 5)=1 to disable internal pull-up on I2C4(SR) */ prog_io |= OMAP3630_PRG_SR_PULLUPRESX; omap_ctrl_writel(prog_io, OMAP36XX_CONTROL_PROG_IO_WKUP1); } /* omap_register_i2c_bus(1, 2400, zoom_i2c_boardinfo, ARRAY_SIZE(zoom_i2c_boardinfo)); omap_register_i2c_bus(2, 400, NULL, 0); omap_register_i2c_bus(3, 400, NULL, 0); */ omap_register_i2c_bus(1, 100, NULL, zoom_i2c_boardinfo, ARRAY_SIZE(zoom_i2c_boardinfo)); omap_register_i2c_bus(2, 100, NULL, zoom2_i2c_bus2_info, ARRAY_SIZE(zoom2_i2c_bus2_info)); omap_register_i2c_bus(3, 400, NULL, zoom2_i2c_bus3_info, ARRAY_SIZE(zoom2_i2c_bus3_info)); return 0; }
int __init jet_sensor_init(void) { #if defined (CONFIG_JET_SENSORS_FREE_FALL)|| defined(CONFIG_JET_SENSORS_TAP_TAP) omap_mux_init_signal("gpmc_nbe0_cle.gpio_59", OMAP_PIN_INPUT); omap_mux_init_gpio(GPIO_INT1_A_IRQ, OMAP_PIN_INPUT | OMAP_PIN_OFF_WAKEUPENABLE); omap_mux_init_signal("gpmc_nbe1.gpio_60", OMAP_PIN_INPUT); omap_mux_init_gpio(GPIO_INT2_A_IRQ, OMAP_PIN_INPUT | OMAP_PIN_OFF_WAKEUPENABLE); #endif omap_register_i2c_bus(2, 400, jet_bus2_sensor_boardinfo, ARRAY_SIZE(jet_bus2_sensor_boardinfo)); omap_register_i2c_bus(3, 400, jet_bus3_sensor_boardinfo, ARRAY_SIZE(jet_bus3_sensor_boardinfo)); omap_register_i2c_bus(4, 400, jet_bus4_sensor_boardinfo, ARRAY_SIZE(jet_bus4_sensor_boardinfo)); //platform_device_register(&jet_proximity_device); return 0; }
static int __init omap3_beagle_i2c_init(void) { omap_register_i2c_bus(1, 2600, beagle_i2c1_boardinfo, ARRAY_SIZE(beagle_i2c1_boardinfo)); /* if(!strcmp(expansionboard_name, "zippy") || !strcmp(expansionboard_name, "zippy2")) { printk(KERN_INFO "Beagle expansionboard: registering i2c2 bus for zippy/zippy2\n"); omap_register_i2c_bus(2, 400, beagle_zippy_i2c2_boardinfo, ARRAY_SIZE(beagle_zippy_i2c2_boardinfo)); } else { omap_register_i2c_bus(2, 400, beagle_i2c2_boardinfo, ARRAY_SIZE(beagle_i2c2_boardinfo)); } */ omap_register_i2c_bus(2, 100, sis9200_i2c2_boardinfo, ARRAY_SIZE(sis9200_i2c2_boardinfo)); /* Bus 3 is attached to the DVI port where devices like the pico DLP * projector don't work reliably with 400kHz */ omap_register_i2c_bus(3, 100, NULL, 0); return 0; }
static int __init omap4_panda_i2c_init(void) { omap4_pmic_get_config(&omap4_panda_twldata, TWL_COMMON_PDATA_USB, TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VAUX2 | TWL_COMMON_REGULATOR_VAUX3 | TWL_COMMON_REGULATOR_VMMC | TWL_COMMON_REGULATOR_VPP | TWL_COMMON_REGULATOR_VANA | TWL_COMMON_REGULATOR_VCXIO | TWL_COMMON_REGULATOR_VUSB | TWL_COMMON_REGULATOR_CLK32KG); omap4_pmic_init("twl6030", &omap4_panda_twldata); omap_register_i2c_bus(2, 400, NULL, 0); /* * Bus 3 is attached to the DVI port where devices like the pico DLP * projector don't work reliably with 400kHz */ omap_register_i2c_bus(3, 100, panda_i2c_eeprom, ARRAY_SIZE(panda_i2c_eeprom)); omap_register_i2c_bus(4, 400, NULL, 0); return 0; }
static void __init ams_delta_init(void) { iotable_init(ams_delta_io_desc, ARRAY_SIZE(ams_delta_io_desc)); omap_board_config = ams_delta_config; omap_board_config_size = ARRAY_SIZE(ams_delta_config); omap_serial_init(); omap_register_i2c_bus(1, 100, NULL, 0); /* Clear latch2 (NAND, LCD, modem enable) */ ams_delta_latch2_write(~0, 0); platform_add_devices(ams_delta_devices, ARRAY_SIZE(ams_delta_devices)); }
static int __init omap4_i2c_init(void) { omap_i2c_hwspinlock_init(1, 0, &sdp4430_i2c_bus_pdata); omap_i2c_hwspinlock_init(2, 1, &sdp4430_i2c_2_bus_pdata); omap_i2c_hwspinlock_init(3, 2, &sdp4430_i2c_3_bus_pdata); omap_i2c_hwspinlock_init(4, 3, &sdp4430_i2c_4_bus_pdata); regulator_has_full_constraints(); /* * Phoenix Audio IC needs I2C1 to * start with 400 KHz or less */ omap_register_i2c_bus(1, 400, &sdp4430_i2c_bus_pdata, sdp4430_i2c_boardinfo, ARRAY_SIZE(sdp4430_i2c_boardinfo)); omap_register_i2c_bus(2, 400, &sdp4430_i2c_2_bus_pdata, sdp4430_i2c_2_boardinfo, ARRAY_SIZE(sdp4430_i2c_2_boardinfo)); omap_register_i2c_bus(3, 400, &sdp4430_i2c_3_bus_pdata, sdp4430_i2c_3_boardinfo, ARRAY_SIZE(sdp4430_i2c_3_boardinfo)); omap_register_i2c_bus(4, 400, &sdp4430_i2c_4_bus_pdata, sdp4430_i2c_4_boardinfo, ARRAY_SIZE(sdp4430_i2c_4_boardinfo)); return 0; }
static int __init omap_i2c_init(void) { int i2c1_devices; /* Disable OMAP 3630 internal pull-ups for I2Ci */ if (cpu_is_omap3630()) { u32 prog_io; prog_io = omap_ctrl_readl(OMAP343X_CONTROL_PROG_IO1); /* Program (bit 19)=1 to disable internal pull-up on I2C1 */ prog_io |= OMAP3630_PRG_I2C1_PULLUPRESX; /* Program (bit 0)=1 to disable internal pull-up on I2C2 */ prog_io |= OMAP3630_PRG_I2C2_PULLUPRESX; omap_ctrl_writel(prog_io, OMAP343X_CONTROL_PROG_IO1); prog_io = omap_ctrl_readl(OMAP36XX_CONTROL_PROG_IO_WKUP1); /* Program (bit 5)=1 to disable internal pull-up on I2C4(SR) */ prog_io |= OMAP3630_PRG_SR_PULLUPRESX; omap_ctrl_writel(prog_io, OMAP36XX_CONTROL_PROG_IO_WKUP1); } i2c1_devices = ARRAY_SIZE(boxer_i2c_bus1_info); #ifdef CONFIG_MAX9635 // right now evt2 is not stuffed with the max9635 light sensor due to i2c conflict // tbd if it will be reworked on specific units --i2c1_devices; #endif omap_register_i2c_bus(1, 100, boxer_i2c_bus1_info, i2c1_devices); omap_register_i2c_bus(2, 400, boxer_i2c_bus2_info, ARRAY_SIZE(boxer_i2c_bus2_info)); return 0; }
static int __init acclaim_i2c_init(void) { int err; acclaim_i2c_hwspinlock_init(1, 0, &acclaim_i2c_1_bus_pdata); acclaim_i2c_hwspinlock_init(2, 1, &acclaim_i2c_2_bus_pdata); acclaim_i2c_hwspinlock_init(3, 2, &acclaim_i2c_3_bus_pdata); acclaim_i2c_hwspinlock_init(4, 3, &acclaim_i2c_4_bus_pdata); omap_register_i2c_bus_board_data(1, &acclaim_i2c_1_bus_pdata); omap_register_i2c_bus_board_data(2, &acclaim_i2c_2_bus_pdata); omap_register_i2c_bus_board_data(3, &acclaim_i2c_3_bus_pdata); omap_register_i2c_bus_board_data(4, &acclaim_i2c_4_bus_pdata); omap4_pmic_init("twl6030", &acclaim_twldata); err = i2c_register_board_info(1, acclaim_i2c_1_boardinfo, ARRAY_SIZE(acclaim_i2c_1_boardinfo)); if (err) return err; omap_register_i2c_bus(2, 400, acclaim_i2c_2_boardinfo, ARRAY_SIZE(acclaim_i2c_2_boardinfo)); omap_register_i2c_bus(3, 400, NULL, 0); omap_register_i2c_bus(4, 400, NULL, 0); omap2_i2c_pullup(3, I2C_PULLUP_STD_860_OM_FAST_500_OM); /* * This will allow unused regulator to be shutdown. This flag * should be set in the board file. Before regulators are registered. */ regulator_has_full_constraints(); return 0; }
static int __init omap4_i2c_init(void) { omap_i2c_hwspinlock_init(1, 0, &sdp4430_i2c_1_bus_pdata); omap_i2c_hwspinlock_init(2, 1, &sdp4430_i2c_2_bus_pdata); omap_i2c_hwspinlock_init(3, 2, &sdp4430_i2c_3_bus_pdata); omap_i2c_hwspinlock_init(4, 3, &sdp4430_i2c_4_bus_pdata); omap_register_i2c_bus_board_data(1, &sdp4430_i2c_1_bus_pdata); omap_register_i2c_bus_board_data(2, &sdp4430_i2c_2_bus_pdata); omap_register_i2c_bus_board_data(3, &sdp4430_i2c_3_bus_pdata); omap_register_i2c_bus_board_data(4, &sdp4430_i2c_4_bus_pdata); omap4_power_init(); i2c_register_board_info(1, sdp4430_i2c_boardinfo, ARRAY_SIZE(sdp4430_i2c_boardinfo)); omap_register_i2c_bus(2, 400, NULL, 0); omap_register_i2c_bus(3, 400, sdp4430_i2c_3_boardinfo, ARRAY_SIZE(sdp4430_i2c_3_boardinfo)); omap_register_i2c_bus(4, 400, sdp4430_i2c_4_boardinfo, ARRAY_SIZE(sdp4430_i2c_4_boardinfo)); /* * This will allow unused regulator to be shutdown. This flag * should be set in the board file. Before regulators are registered. */ regulator_has_full_constraints(); /* * Drive MSECURE high for TWL6030/6032 write access. */ omap_mux_init_signal("fref_clk0_out.gpio_wk6", OMAP_PIN_OUTPUT); gpio_request(6, "msecure"); gpio_direction_output(6, 1); return 0; }
static int __init omap4_i2c_init(void) { omap_i2c_hwspinlock_init(1, 0, &ovation_i2c_1_bus_pdata); omap_i2c_hwspinlock_init(2, 1, &ovation_i2c_2_bus_pdata); omap_i2c_hwspinlock_init(3, 2, &ovation_i2c_3_bus_pdata); omap_register_i2c_bus_board_data(1, &ovation_i2c_1_bus_pdata); omap_register_i2c_bus_board_data(2, &ovation_i2c_2_bus_pdata); omap_register_i2c_bus_board_data(3, &ovation_i2c_3_bus_pdata); bn_power_init(); //set kxtf9 address if (system_rev >= OVATION_EVT1A) { printk(KERN_INFO "kxtf9 i2c address = 0xe \n"); ovation_i2c_kxtf9_boardinfo.addr = 0xe; } i2c_register_board_info(1, &ovation_i2c_kxtf9_boardinfo, 1); if (system_rev >= OVATION_EVT1B) { i2c_register_board_info(1, &ovation_i2c_bq27520_boardinfo, 1); i2c_register_board_info(1, &ovation_i2c_bq24196_boardinfo, 1); } /* Disable i2c2, same pins for uart1 console */ //omap_register_i2c_bus(2, 400, NULL, 0); //i2c_register_board_info(3, ovation_i2c_3_boardinfo, // ARRAY_SIZE(ovation_i2c_3_boardinfo)); omap_register_i2c_bus(3, 400, NULL, 0); // Disable the strong pull-ups on I2C3 and I2C4 omap2_i2c_pullups_en_dis(3, 0); /* * This will allow unused regulator to be shutdown. This flag * should be set in the board file. Before regulators are registered. */ regulator_has_full_constraints(); /* * Drive MSECURE high for TWL6030 write access. */ omap_mux_init_signal("fref_clk0_out.gpio_wk6", OMAP_PIN_OUTPUT); gpio_request(6, "msecure"); gpio_direction_output(6, 1); return 0; }
static void __init h3_init(void) { h3_init_smc91x(); /* Here we assume the NOR boot config: NOR on CS3 (possibly swapped * to address 0 by a dip switch), NAND on CS2B. The NAND driver will * notice whether a NAND chip is enabled at probe time. * * H3 support NAND-boot, with a dip switch to put NOR on CS2B and NAND * (which on H2 may be 16bit) on CS3. Try detecting that in code here, * to avoid probing every possible flash configuration... */ nor_resource.end = nor_resource.start = omap_cs3_phys(); nor_resource.end += SZ_32M - 1; nand_resource.end = nand_resource.start = OMAP_CS2B_PHYS; nand_resource.end += SZ_4K - 1; if (gpio_request(H3_NAND_RB_GPIO_PIN, "NAND ready") < 0) BUG(); gpio_direction_input(H3_NAND_RB_GPIO_PIN); /* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */ /* GPIO10 pullup/down register, Enable pullup on GPIO10 */ omap_cfg_reg(V2_1710_GPIO10); /* Mux pins for keypad */ omap_cfg_reg(F18_1610_KBC0); omap_cfg_reg(D20_1610_KBC1); omap_cfg_reg(D19_1610_KBC2); omap_cfg_reg(E18_1610_KBC3); omap_cfg_reg(C21_1610_KBC4); omap_cfg_reg(G18_1610_KBR0); omap_cfg_reg(F19_1610_KBR1); omap_cfg_reg(H14_1610_KBR2); omap_cfg_reg(E20_1610_KBR3); omap_cfg_reg(E19_1610_KBR4); omap_cfg_reg(N19_1610_KBR5); platform_add_devices(devices, ARRAY_SIZE(devices)); spi_register_board_info(h3_spi_board_info, ARRAY_SIZE(h3_spi_board_info)); omap_board_config = h3_config; omap_board_config_size = ARRAY_SIZE(h3_config); omap_serial_init(); omap_register_i2c_bus(1, 100, h3_i2c_board_info, ARRAY_SIZE(h3_i2c_board_info)); omap1_usb_init(&h3_usb_config); h3_mmc_init(); }
static int __init omap4_i2c_init(void) { omap_i2c_hwspinlock_init(1, 0, &board_i2c_1_bus_pdata); omap_i2c_hwspinlock_init(2, 1, &board_i2c_2_bus_pdata); omap_i2c_hwspinlock_init(3, 2, &board_i2c_3_bus_pdata); omap_i2c_hwspinlock_init(4, 3, &board_i2c_4_bus_pdata); omap_register_i2c_bus_board_data(1, &board_i2c_1_bus_pdata); omap_register_i2c_bus_board_data(2, &board_i2c_2_bus_pdata); omap_register_i2c_bus_board_data(3, &board_i2c_3_bus_pdata); omap_register_i2c_bus_board_data(4, &board_i2c_4_bus_pdata); omap4_pmic_init("twl6030", &board_twldata); omap_register_i2c_bus(2, 100, board_i2c_2_boardinfo, ARRAY_SIZE(board_i2c_2_boardinfo)); // FIXME speed omap_register_i2c_bus(3, 100, board_i2c_3_boardinfo, ARRAY_SIZE(board_i2c_3_boardinfo)); // FIXME speed omap_register_i2c_bus(4, 400, NULL, 0); /* * This will allow unused regulator to be shutdown. This flag * should be set in the board file. Before regulators are registered. */ regulator_has_full_constraints(); /* To access twl registers we enable gpio_wk30 * we need this so the RTC driver can work. */ gpio_request(GPIO_MSECURE, "MSECURE"); gpio_direction_output(GPIO_MSECURE, 1); omap_mux_init_gpio(GPIO_MSECURE, \ OMAP_PIN_OUTPUT | OMAP_PIN_OFF_NONE); return 0; }
static int __init omap4_panda_i2c_init(void) { omap_i2c_hwspinlock_init(1, 0, &panda_i2c_1_bus_pdata); omap_i2c_hwspinlock_init(2, 1, &panda_i2c_2_bus_pdata); omap_i2c_hwspinlock_init(3, 2, &panda_i2c_3_bus_pdata); omap_i2c_hwspinlock_init(4, 3, &panda_i2c_4_bus_pdata); omap_register_i2c_bus_board_data(1, &panda_i2c_1_bus_pdata); omap_register_i2c_bus_board_data(2, &panda_i2c_2_bus_pdata); omap_register_i2c_bus_board_data(3, &panda_i2c_3_bus_pdata); omap_register_i2c_bus_board_data(4, &panda_i2c_4_bus_pdata); omap4_pmic_get_config(&omap4_panda_twldata, TWL_COMMON_PDATA_USB, TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VAUX2 | TWL_COMMON_REGULATOR_VAUX3 | TWL_COMMON_REGULATOR_VMMC | TWL_COMMON_REGULATOR_VPP | TWL_COMMON_REGULATOR_VANA | TWL_COMMON_REGULATOR_VCXIO | TWL_COMMON_REGULATOR_VUSB | TWL_COMMON_REGULATOR_CLK32KG | TWL_COMMON_REGULATOR_V1V8 | TWL_COMMON_REGULATOR_V2V1); omap4_pmic_init("twl6030", &omap4_panda_twldata, &twl6040_data, OMAP44XX_IRQ_SYS_2N); omap_register_i2c_bus(2, 400, NULL, 0); /* * Bus 3 is attached to the DVI port where devices like the pico DLP * projector don't work reliably with 400kHz */ omap_register_i2c_bus(3, 100, panda_i2c_eeprom, ARRAY_SIZE(panda_i2c_eeprom)); omap_register_i2c_bus(4, 400, NULL, 0); return 0; }
static int __init rx51_i2c_init(void) { if ((system_rev >= SYSTEM_REV_S_USES_VAUX3 && system_rev < 0x100) || system_rev >= SYSTEM_REV_B_USES_VAUX3) { rx51_twldata.vaux3 = &rx51_vaux3_mmc; /* Only older boards use VMMC2 for internal MMC */ rx51_vmmc2.num_consumer_supplies--; } else { rx51_twldata.vaux3 = &rx51_vaux3_cam; } rx51_twldata.vmmc2 = &rx51_vmmc2; omap3_pmic_get_config(&rx51_twldata, TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC, TWL_COMMON_REGULATOR_VDAC); rx51_twldata.vdac->constraints.apply_uV = true; rx51_twldata.vdac->constraints.name = "VDAC"; omap_pmic_init(1, 2200, "twl5030", INT_34XX_SYS_NIRQ, &rx51_twldata); omap_register_i2c_bus(2, 100, rx51_peripherals_i2c_board_info_2, ARRAY_SIZE(rx51_peripherals_i2c_board_info_2)); omap_register_i2c_bus(3, 400, NULL, 0); return 0; }
static void __init omap_fsample_init(void) { if (gpio_request(P2_NAND_RB_GPIO_PIN, "NAND ready") < 0) BUG(); nand_data.dev_ready = nand_dev_ready; omap_cfg_reg(L3_1610_FLASH_CS2B_OE); omap_cfg_reg(M8_1610_FLASH_CS2B_WE); platform_add_devices(devices, ARRAY_SIZE(devices)); omap_board_config = fsample_config; omap_board_config_size = ARRAY_SIZE(fsample_config); omap_serial_init(); omap_register_i2c_bus(1, 100, NULL, 0); }
static void __init omap_perseus2_init(void) { if (gpio_request(P2_NAND_RB_GPIO_PIN, "NAND ready") < 0) BUG(); gpio_direction_input(P2_NAND_RB_GPIO_PIN); omap_cfg_reg(L3_1610_FLASH_CS2B_OE); omap_cfg_reg(M8_1610_FLASH_CS2B_WE); platform_add_devices(devices, ARRAY_SIZE(devices)); omap_board_config = perseus2_config; omap_board_config_size = ARRAY_SIZE(perseus2_config); omap_serial_init(); omap_register_i2c_bus(1, 100, NULL, 0); }
static void __init omap_nokia770_init(void) { nokia770_config[0].data = &nokia770_usb_config; platform_add_devices(nokia770_devices, ARRAY_SIZE(nokia770_devices)); spi_register_board_info(nokia770_spi_board_info, ARRAY_SIZE(nokia770_spi_board_info)); omap_board_config = nokia770_config; omap_board_config_size = ARRAY_SIZE(nokia770_config); omap_gpio_init(); omap_serial_init(); omap_register_i2c_bus(1, 100, NULL, 0); omap_dsp_init(); ads7846_dev_init(); mipid_dev_init(); }
static void __init h2_init(void) { /* Here we assume the NOR boot config: NOR on CS3 (possibly swapped * to address 0 by a dip switch), NAND on CS2B. The NAND driver will * notice whether a NAND chip is enabled at probe time. * * FIXME revC boards (and H3) support NAND-boot, with a dip switch to * put NOR on CS2B and NAND (which on H2 may be 16bit) on CS3. Try * detecting that in code here, to avoid probing every possible flash * configuration... */ h2_nor_resource.end = h2_nor_resource.start = omap_cs3_phys(); h2_nor_resource.end += SZ_32M - 1; h2_nand_resource.end = h2_nand_resource.start = OMAP_CS2B_PHYS; h2_nand_resource.end += SZ_4K - 1; if (!(omap_request_gpio(H2_NAND_RB_GPIO_PIN))) h2_nand_data.dev_ready = h2_nand_dev_ready; omap_cfg_reg(L3_1610_FLASH_CS2B_OE); omap_cfg_reg(M8_1610_FLASH_CS2B_WE); /* MMC: card detect and WP */ /* omap_cfg_reg(U19_ARMIO1); */ /* CD */ omap_cfg_reg(BALLOUT_V8_ARMIO3); /* WP */ /* Irda */ #if defined(CONFIG_OMAP_IR) || defined(CONFIG_OMAP_IR_MODULE) omap_writel(omap_readl(FUNC_MUX_CTRL_A) | 7, FUNC_MUX_CTRL_A); if (!(omap_request_gpio(H2_IRDA_FIRSEL_GPIO_PIN))) { omap_set_gpio_direction(H2_IRDA_FIRSEL_GPIO_PIN, 0); h2_irda_data.transceiver_mode = h2_transceiver_mode; } #endif platform_add_devices(h2_devices, ARRAY_SIZE(h2_devices)); spi_register_board_info(h2_spi_board_info, ARRAY_SIZE(h2_spi_board_info)); omap_board_config = h2_config; omap_board_config_size = ARRAY_SIZE(h2_config); omap_serial_init(); omap_register_i2c_bus(1, 100, h2_i2c_board_info, ARRAY_SIZE(h2_i2c_board_info)); h2_mmc_init(); omap_register_gpio_switches(h2_gpio_switches, ARRAY_SIZE(h2_gpio_switches)); }