static int dw_mci_pci_probe(struct pci_dev *pdev, const struct pci_device_id *entries) { struct dw_mci *host; int ret; ret = pcim_enable_device(pdev); if (ret) return ret; host = devm_kzalloc(&pdev->dev, sizeof(struct dw_mci), GFP_KERNEL); if (!host) return -ENOMEM; host->irq = pdev->irq; host->irq_flags = IRQF_SHARED; host->dev = &pdev->dev; host->pdata = &pci_board_data; ret = pcim_iomap_regions(pdev, 1 << PCI_BAR_NO, pci_name(pdev)); if (ret) return ret; host->regs = pcim_iomap_table(pdev)[PCI_BAR_NO]; pci_set_master(pdev); ret = dw_mci_probe(host); if (ret) return ret; pci_set_drvdata(pdev, host); return 0; }
static int optidma_init_one(struct pci_dev *dev, const struct pci_device_id *id) { static const struct ata_port_info info_82c700 = { .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = ATA_PIO4, .mwdma_mask = ATA_MWDMA2, .port_ops = &optidma_port_ops }; static const struct ata_port_info info_82c700_udma = { .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = ATA_PIO4, .mwdma_mask = ATA_MWDMA2, .udma_mask = ATA_UDMA2, .port_ops = &optiplus_port_ops }; const struct ata_port_info *ppi[] = { &info_82c700, NULL }; int rc; ata_print_version_once(&dev->dev, DRV_VERSION); rc = pcim_enable_device(dev); if (rc) return rc; inw(0x1F1); inw(0x1F1); pci_clock = inb(0x1F5) & 1; if (optiplus_with_udma(dev)) ppi[0] = &info_82c700_udma; return ata_pci_bmdma_init_one(dev, ppi, &optidma_sht, NULL, 0); }
static int cs5530_init_one(struct pci_dev *pdev, const struct pci_device_id *id) { static const struct ata_port_info info = { .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = ATA_PIO4, .mwdma_mask = ATA_MWDMA2, .udma_mask = ATA_UDMA2, .port_ops = &cs5530_port_ops }; /* The docking connector doesn't do UDMA, and it seems not MWDMA */ static const struct ata_port_info info_palmax_secondary = { .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = ATA_PIO4, .port_ops = &cs5530_port_ops }; const struct ata_port_info *ppi[] = { &info, NULL }; int rc; rc = pcim_enable_device(pdev); if (rc) return rc; /* Chip initialisation */ if (cs5530_init_chip()) return -ENODEV; if (cs5530_is_palmax()) ppi[1] = &info_palmax_secondary; /* Now kick off ATA set up */ return ata_pci_bmdma_init_one(pdev, ppi, &cs5530_sht, NULL, 0); }
static int intel_spi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) { struct intel_spi_boardinfo *info; struct intel_spi *ispi; u32 bcr; int ret; ret = pcim_enable_device(pdev); if (ret) return ret; info = devm_kmemdup(&pdev->dev, (void *)id->driver_data, sizeof(*info), GFP_KERNEL); if (!info) return -ENOMEM; /* Try to make the chip read/write */ pci_read_config_dword(pdev, BCR, &bcr); if (!(bcr & BCR_WPD)) { bcr |= BCR_WPD; pci_write_config_dword(pdev, BCR, bcr); pci_read_config_dword(pdev, BCR, &bcr); } info->writeable = !!(bcr & BCR_WPD); ispi = intel_spi_probe(&pdev->dev, &pdev->resource[0], info); if (IS_ERR(ispi)) return PTR_ERR(ispi); pci_set_drvdata(pdev, ispi); return 0; }
static int netcell_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) { static const struct ata_port_info info = { .flags = ATA_FLAG_SLAVE_POSS, /* */ .pio_mask = ATA_PIO4, .mwdma_mask = ATA_MWDMA2, .udma_mask = ATA_UDMA5, /* */ .port_ops = &netcell_ops, }; const struct ata_port_info *port_info[] = { &info, NULL }; int rc; ata_print_version_once(&pdev->dev, DRV_VERSION); rc = pcim_enable_device(pdev); if (rc) return rc; /* */ ata_pci_bmdma_clear_simplex(pdev); /* */ return ata_pci_bmdma_init_one(pdev, port_info, &netcell_sht, NULL, 0); }
static int cs5530_init_one(struct pci_dev *pdev, const struct pci_device_id *id) { static const struct ata_port_info info = { .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = ATA_PIO4, .mwdma_mask = ATA_MWDMA2, .udma_mask = ATA_UDMA2, .port_ops = &cs5530_port_ops }; static const struct ata_port_info info_palmax_secondary = { .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = ATA_PIO4, .port_ops = &cs5530_port_ops }; const struct ata_port_info *ppi[] = { &info, NULL }; int rc; rc = pcim_enable_device(pdev); if (rc) return rc; if (cs5530_init_chip()) return -ENODEV; if (cs5530_is_palmax()) ppi[1] = &info_palmax_secondary; return ata_pci_bmdma_init_one(pdev, ppi, &cs5530_sht, NULL, 0); }
static int ns87415_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) { static const struct ata_port_info info = { .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = ATA_PIO4, .mwdma_mask = ATA_MWDMA2, .port_ops = &ns87415_pata_ops, }; const struct ata_port_info *ppi[] = { &info, NULL }; int rc; #if defined(CONFIG_SUPERIO) static const struct ata_port_info info87560 = { .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = ATA_PIO4, .mwdma_mask = ATA_MWDMA2, .port_ops = &ns87560_pata_ops, }; if (PCI_SLOT(pdev->devfn) == 0x0E) ppi[0] = &info87560; #endif ata_print_version_once(&pdev->dev, DRV_VERSION); rc = pcim_enable_device(pdev); if (rc) return rc; ns87415_fixup(pdev); return ata_pci_bmdma_init_one(pdev, ppi, &ns87415_sht, NULL, 0); }
static int intel_lpss_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) { struct intel_lpss_platform_info *info; int ret; ret = pcim_enable_device(pdev); if (ret) return ret; info = devm_kmemdup(&pdev->dev, (void *)id->driver_data, sizeof(*info), GFP_KERNEL); if (!info) return -ENOMEM; info->mem = &pdev->resource[0]; info->irq = pdev->irq; /* Probably it is enough to set this for iDMA capable devices only */ pci_set_master(pdev); ret = intel_lpss_probe(&pdev->dev, info); if (ret) return ret; pm_runtime_put(&pdev->dev); pm_runtime_allow(&pdev->dev); return 0; }
static int netcell_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) { static const struct ata_port_info info = { .flags = ATA_FLAG_SLAVE_POSS, /* Actually we don't really care about these as the firmware deals with it */ .pio_mask = ATA_PIO4, .mwdma_mask = ATA_MWDMA2, .udma_mask = ATA_UDMA5, /* UDMA 133 */ .port_ops = &netcell_ops, }; const struct ata_port_info *port_info[] = { &info, NULL }; int rc; ata_print_version_once(&pdev->dev, DRV_VERSION); rc = pcim_enable_device(pdev); if (rc) return rc; /* Any chip specific setup/optimisation/messages here */ ata_pci_bmdma_clear_simplex(pdev); /* And let the library code do the work */ return ata_pci_bmdma_init_one(pdev, port_info, &netcell_sht, NULL, 0); }
static int cmd640_init_one(struct pci_dev *pdev, const struct pci_device_id *id) { static const struct ata_port_info info = { .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .port_ops = &cmd640_port_ops }; const struct ata_port_info *ppi[] = { &info, NULL }; int rc; rc = pcim_enable_device(pdev); if (rc) return rc; cmd640_hardware_init(pdev); return ata_pci_sff_init_one(pdev, ppi, &cmd640_sht, NULL); } #ifdef CONFIG_PM static int cmd640_reinit_one(struct pci_dev *pdev) { struct ata_host *host = dev_get_drvdata(&pdev->dev); int rc; rc = ata_pci_device_do_resume(pdev); if (rc) return rc; cmd640_hardware_init(pdev); ata_host_resume(host); return 0; } #endif static const struct pci_device_id cmd640[] = { { PCI_VDEVICE(CMD, 0x640), 0 }, { }, }; static struct pci_driver cmd640_pci_driver = { .name = DRV_NAME, .id_table = cmd640, .probe = cmd640_init_one, .remove = ata_pci_remove_one, #ifdef CONFIG_PM .suspend = ata_pci_device_suspend, .resume = cmd640_reinit_one, #endif }; static int __init cmd640_init(void) { return pci_register_driver(&cmd640_pci_driver); } static void __exit cmd640_exit(void) { pci_unregister_driver(&cmd640_pci_driver); }
static int gpu_i2c_probe(struct pci_dev *pdev, const struct pci_device_id *id) { struct gpu_i2c_dev *i2cd; int status; i2cd = devm_kzalloc(&pdev->dev, sizeof(*i2cd), GFP_KERNEL); if (!i2cd) return -ENOMEM; i2cd->dev = &pdev->dev; dev_set_drvdata(&pdev->dev, i2cd); status = pcim_enable_device(pdev); if (status < 0) { dev_err(&pdev->dev, "pcim_enable_device failed %d\n", status); return status; } pci_set_master(pdev); i2cd->regs = pcim_iomap(pdev, 0, 0); if (!i2cd->regs) { dev_err(&pdev->dev, "pcim_iomap failed\n"); return -ENOMEM; } status = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_MSI); if (status < 0) { dev_err(&pdev->dev, "pci_alloc_irq_vectors err %d\n", status); return status; } gpu_enable_i2c_bus(i2cd); i2c_set_adapdata(&i2cd->adapter, i2cd); i2cd->adapter.owner = THIS_MODULE; strlcpy(i2cd->adapter.name, "NVIDIA GPU I2C adapter", sizeof(i2cd->adapter.name)); i2cd->adapter.algo = &gpu_i2c_algorithm; i2cd->adapter.quirks = &gpu_i2c_quirks; i2cd->adapter.dev.parent = &pdev->dev; status = i2c_add_adapter(&i2cd->adapter); if (status < 0) goto free_irq_vectors; status = gpu_populate_client(i2cd, pdev->irq); if (status < 0) { dev_err(&pdev->dev, "gpu_populate_client failed %d\n", status); goto del_adapter; } return 0; del_adapter: i2c_del_adapter(&i2cd->adapter); free_irq_vectors: pci_free_irq_vectors(pdev); return status; }
static int __devinit ioat_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) { void __iomem * const *iomap; struct device *dev = &pdev->dev; struct ioatdma_device *device; int err; err = pcim_enable_device(pdev); if (err) return err; err = pcim_iomap_regions(pdev, 1 << IOAT_MMIO_BAR, DRV_NAME); if (err) return err; iomap = pcim_iomap_table(pdev); if (!iomap) return -ENOMEM; err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); if (err) err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); if (err) return err; err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)); if (err) err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); if (err) return err; device = devm_kzalloc(dev, sizeof(*device), GFP_KERNEL); if (!device) return -ENOMEM; pci_set_master(pdev); device = alloc_ioatdma(pdev, iomap[IOAT_MMIO_BAR]); if (!device) return -ENOMEM; pci_set_drvdata(pdev, device); device->version = readb(device->reg_base + IOAT_VER_OFFSET); if (device->version == IOAT_VER_1_2) err = ioat1_dma_probe(device, ioat_dca_enabled); else if (device->version == IOAT_VER_2_0) err = ioat2_dma_probe(device, ioat_dca_enabled); else if (device->version >= IOAT_VER_3_0) err = ioat3_dma_probe(device, ioat_dca_enabled); else return -ENODEV; if (err) { dev_err(dev, "Intel(R) I/OAT DMA Engine init failed\n"); return -ENODEV; } return 0; }
static int dwc3_pci_probe(struct pci_dev *pci, const struct pci_device_id *id) { struct resource res[2]; struct platform_device *dwc3; int ret; struct device *dev = &pci->dev; ret = pcim_enable_device(pci); if (ret) { dev_err(dev, "failed to enable pci device\n"); return -ENODEV; } pci_set_master(pci); dwc3 = platform_device_alloc("dwc3", PLATFORM_DEVID_AUTO); if (!dwc3) { dev_err(dev, "couldn't allocate dwc3 device\n"); return -ENOMEM; } memset(res, 0x00, sizeof(struct resource) * ARRAY_SIZE(res)); res[0].start = pci_resource_start(pci, 0); res[0].end = pci_resource_end(pci, 0); res[0].name = "dwc_usb3"; res[0].flags = IORESOURCE_MEM; res[1].start = pci->irq; res[1].name = "dwc_usb3"; res[1].flags = IORESOURCE_IRQ; ret = platform_device_add_resources(dwc3, res, ARRAY_SIZE(res)); if (ret) { dev_err(dev, "couldn't add resources to dwc3 device\n"); return ret; } pci_set_drvdata(pci, dwc3); ret = dwc3_pci_quirks(pci); if (ret) goto err; dwc3->dev.parent = dev; ACPI_COMPANION_SET(&dwc3->dev, ACPI_COMPANION(dev)); ret = platform_device_add(dwc3); if (ret) { dev_err(dev, "failed to register dwc3 device\n"); goto err; } return 0; err: platform_device_put(dwc3); return ret; }
static int svia_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) { static int printed_version; unsigned int i; int rc; struct ata_host *host = NULL; int board_id = (int) ent->driver_data; const unsigned *bar_sizes; if (!printed_version++) #ifdef CONFIG_DEBUG_PRINTK dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n"); #else dev_; #endif rc = pcim_enable_device(pdev); if (rc) return rc; if (board_id == vt6421) bar_sizes = &vt6421_bar_sizes[0]; else bar_sizes = &svia_bar_sizes[0]; for (i = 0; i < ARRAY_SIZE(svia_bar_sizes); i++) if ((pci_resource_start(pdev, i) == 0) || (pci_resource_len(pdev, i) < bar_sizes[i])) { dev_printk(KERN_ERR, &pdev->dev, "invalid PCI BAR %u (sz 0x%llx, val 0x%llx)\n", i, (unsigned long long)pci_resource_start(pdev, i), (unsigned long long)pci_resource_len(pdev, i)); return -ENODEV; } switch (board_id) { case vt6420: rc = vt6420_prepare_host(pdev, &host); break; case vt6421: rc = vt6421_prepare_host(pdev, &host); break; case vt8251: rc = vt8251_prepare_host(pdev, &host); break; default: rc = -EINVAL; } if (rc) return rc; svia_configure(pdev, board_id); pci_set_master(pdev); return ata_host_activate(host, pdev->irq, ata_bmdma_interrupt, IRQF_SHARED, &svia_sht); }
static int artop_init_one (struct pci_dev *pdev, const struct pci_device_id *id) { static const struct ata_port_info info_6210 = { .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = ATA_PIO4, .mwdma_mask = ATA_MWDMA2, .udma_mask = ATA_UDMA2, .port_ops = &artop6210_ops, }; static const struct ata_port_info info_626x = { .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = ATA_PIO4, .mwdma_mask = ATA_MWDMA2, .udma_mask = ATA_UDMA4, .port_ops = &artop6260_ops, }; static const struct ata_port_info info_628x = { .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = ATA_PIO4, .mwdma_mask = ATA_MWDMA2, .udma_mask = ATA_UDMA5, .port_ops = &artop6260_ops, }; static const struct ata_port_info info_628x_fast = { .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = ATA_PIO4, .mwdma_mask = ATA_MWDMA2, .udma_mask = ATA_UDMA6, .port_ops = &artop6260_ops, }; const struct ata_port_info *ppi[] = { NULL, NULL }; int rc; ata_print_version_once(&pdev->dev, DRV_VERSION); rc = pcim_enable_device(pdev); if (rc) return rc; if (id->driver_data == 0) /* 6210 variant */ ppi[0] = &info_6210; else if (id->driver_data == 1) /* 6260 */ ppi[0] = &info_626x; else if (id->driver_data == 2) { /* 6280 or 6280 + fast */ unsigned long io = pci_resource_start(pdev, 4); ppi[0] = &info_628x; if (inb(io) & 0x10) ppi[0] = &info_628x_fast; } BUG_ON(ppi[0] == NULL); atp8xx_fixup(pdev); return ata_pci_bmdma_init_one(pdev, ppi, &artop_sht, NULL, 0); }
static int netcell_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) { static int printed_version; static const struct ata_port_info info = { .flags = ATA_FLAG_SLAVE_POSS, /* Actually we don't really care about these as the firmware deals with it */ .pio_mask = 0x1f, /* pio0-4 */ .mwdma_mask = 0x07, /* mwdma0-2 */ .udma_mask = ATA_UDMA5, /* UDMA 133 */ .port_ops = &netcell_ops, }; const struct ata_port_info *port_info[] = { &info, NULL }; int rc; if (!printed_version++) dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n"); rc = pcim_enable_device(pdev); if (rc) return rc; /* Any chip specific setup/optimisation/messages here */ ata_pci_bmdma_clear_simplex(pdev); /* And let the library code do the work */ return ata_pci_sff_init_one(pdev, port_info, &netcell_sht, NULL); } static const struct pci_device_id netcell_pci_tbl[] = { { PCI_VDEVICE(NETCELL, PCI_DEVICE_ID_REVOLUTION), }, { } /* terminate list */ }; static struct pci_driver netcell_pci_driver = { .name = DRV_NAME, .id_table = netcell_pci_tbl, .probe = netcell_init_one, .remove = ata_pci_remove_one, #ifdef CONFIG_PM .suspend = ata_pci_device_suspend, .resume = ata_pci_device_resume, #endif }; static int __init netcell_init(void) { return pci_register_driver(&netcell_pci_driver); } static void __exit netcell_exit(void) { pci_unregister_driver(&netcell_pci_driver); }
static int mt76pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) { struct mt76x2_dev *dev; int ret; ret = pcim_enable_device(pdev); if (ret) return ret; ret = pcim_iomap_regions(pdev, BIT(0), pci_name(pdev)); if (ret) return ret; pci_set_master(pdev); ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); if (ret) return ret; dev = mt76x2_alloc_device(&pdev->dev); if (!dev) return -ENOMEM; mt76_mmio_init(&dev->mt76, pcim_iomap_table(pdev)[0]); dev->mt76.rev = mt76_rr(dev, MT_ASIC_VERSION); dev_info(dev->mt76.dev, "ASIC revision: %08x\n", dev->mt76.rev); ret = devm_request_irq(dev->mt76.dev, pdev->irq, mt76x2_irq_handler, IRQF_SHARED, KBUILD_MODNAME, dev); if (ret) goto error; ret = mt76x2_register_device(dev); if (ret) goto error; /* Fix up ASPM configuration */ /* RG_SSUSB_G1_CDR_BIR_LTR = 0x9 */ mt76_rmw_field(dev, 0x15a10, 0x1f << 16, 0x9); /* RG_SSUSB_G1_CDR_BIC_LTR = 0xf */ mt76_rmw_field(dev, 0x15a0c, 0xf << 28, 0xf); /* RG_SSUSB_CDR_BR_PE1D = 0x3 */ mt76_rmw_field(dev, 0x15c58, 0x3 << 6, 0x3); return 0; error: ieee80211_free_hw(mt76_hw(dev)); return ret; }
static int hsu_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) { struct hsu_dma_chip *chip; int ret; ret = pcim_enable_device(pdev); if (ret) return ret; ret = pcim_iomap_regions(pdev, BIT(0), pci_name(pdev)); if (ret) { dev_err(&pdev->dev, "I/O memory remapping failed\n"); return ret; } pci_set_master(pdev); pci_try_set_mwi(pdev); ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); if (ret) return ret; ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); if (ret) return ret; chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL); if (!chip) return -ENOMEM; chip->dev = &pdev->dev; chip->regs = pcim_iomap_table(pdev)[0]; chip->length = pci_resource_len(pdev, 0); chip->offset = HSU_PCI_CHAN_OFFSET; chip->irq = pdev->irq; pci_enable_msi(pdev); ret = hsu_dma_probe(chip); if (ret) return ret; ret = request_irq(chip->irq, hsu_pci_irq, 0, "hsu_dma_pci", chip); if (ret) goto err_register_irq; pci_set_drvdata(pdev, chip); return 0; err_register_irq: hsu_dma_remove(chip); return ret; }
static int ninja32_init_one(struct pci_dev *dev, const struct pci_device_id *id) { struct ata_host *host; struct ata_port *ap; void __iomem *base; int rc; host = ata_host_alloc(&dev->dev, 1); if (!host) return -ENOMEM; ap = host->ports[0]; /* Set up the PCI device */ rc = pcim_enable_device(dev); if (rc) return rc; rc = pcim_iomap_regions(dev, 1 << 0, DRV_NAME); if (rc == -EBUSY) pcim_pin_device(dev); if (rc) return rc; host->iomap = pcim_iomap_table(dev); rc = pci_set_dma_mask(dev, ATA_DMA_MASK); if (rc) return rc; rc = pci_set_consistent_dma_mask(dev, ATA_DMA_MASK); if (rc) return rc; pci_set_master(dev); /* Set up the register mappings. We use the I/O mapping as only the older chips also have MMIO on BAR 1 */ base = host->iomap[0]; if (!base) return -ENOMEM; ap->ops = &ninja32_port_ops; ap->pio_mask = ATA_PIO4; ap->flags |= ATA_FLAG_SLAVE_POSS; ap->ioaddr.cmd_addr = base + 0x10; ap->ioaddr.ctl_addr = base + 0x1E; ap->ioaddr.altstatus_addr = base + 0x1E; ap->ioaddr.bmdma_addr = base; ata_sff_std_ports(&ap->ioaddr); ap->pflags = ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE; ninja32_program(base); /* FIXME: Should we disable them at remove ? */ return ata_host_activate(host, dev->irq, ata_bmdma_interrupt, IRQF_SHARED, &ninja32_sht); }
static int ninja32_init_one(struct pci_dev *dev, const struct pci_device_id *id) { struct ata_host *host; struct ata_port *ap; void __iomem *base; int rc; host = ata_host_alloc(&dev->dev, 1); if (!host) return -ENOMEM; ap = host->ports[0]; rc = pcim_enable_device(dev); if (rc) return rc; rc = pcim_iomap_regions(dev, 1 << 0, DRV_NAME); if (rc == -EBUSY) pcim_pin_device(dev); if (rc) return rc; host->iomap = pcim_iomap_table(dev); rc = pci_set_dma_mask(dev, ATA_DMA_MASK); if (rc) return rc; rc = pci_set_consistent_dma_mask(dev, ATA_DMA_MASK); if (rc) return rc; pci_set_master(dev); base = host->iomap[0]; if (!base) return -ENOMEM; ap->ops = &ninja32_port_ops; ap->pio_mask = ATA_PIO4; ap->flags |= ATA_FLAG_SLAVE_POSS; ap->ioaddr.cmd_addr = base + 0x10; ap->ioaddr.ctl_addr = base + 0x1E; ap->ioaddr.altstatus_addr = base + 0x1E; ap->ioaddr.bmdma_addr = base; ata_sff_std_ports(&ap->ioaddr); ap->pflags = ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE; ninja32_program(base); return ata_host_activate(host, dev->irq, ata_sff_interrupt, IRQF_SHARED, &ninja32_sht); }
static int pmc_core_probe(struct pci_dev *dev, const struct pci_device_id *id) { struct device *ptr_dev = &dev->dev; struct pmc_dev *pmcdev = &pmc; const struct x86_cpu_id *cpu_id; const struct pmc_reg_map *map = (struct pmc_reg_map *)id->driver_data; int err; cpu_id = x86_match_cpu(intel_pmc_core_ids); if (!cpu_id) { dev_dbg(&dev->dev, "PMC Core: cpuid mismatch.\n"); return -EINVAL; } err = pcim_enable_device(dev); if (err < 0) { dev_dbg(&dev->dev, "PMC Core: failed to enable Power Management Controller.\n"); return err; } err = pci_read_config_dword(dev, SPT_PMC_BASE_ADDR_OFFSET, &pmcdev->base_addr); if (err < 0) { dev_dbg(&dev->dev, "PMC Core: failed to read PCI config space.\n"); return err; } pmcdev->base_addr &= PMC_BASE_ADDR_MASK; dev_dbg(&dev->dev, "PMC Core: PWRMBASE is %#x\n", pmcdev->base_addr); pmcdev->regbase = devm_ioremap_nocache(ptr_dev, pmcdev->base_addr, SPT_PMC_MMIO_REG_LEN); if (!pmcdev->regbase) { dev_dbg(&dev->dev, "PMC Core: ioremap failed.\n"); return -ENOMEM; } mutex_init(&pmcdev->lock); pmcdev->pmc_xram_read_bit = pmc_core_check_read_lock_bit(); pmcdev->map = map; err = pmc_core_dbgfs_register(pmcdev); if (err < 0) dev_warn(&dev->dev, "PMC Core: debugfs register failed.\n"); pmc.has_slp_s0_res = true; return 0; }
static int atp867x_init_one(struct pci_dev *pdev, const struct pci_device_id *id) { static int printed_version; static const struct ata_port_info info_867x = { .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = ATA_PIO4, .udma_mask = ATA_UDMA6, .port_ops = &atp867x_ops, }; struct ata_host *host; const struct ata_port_info *ppi[] = { &info_867x, NULL }; int rc; if (!printed_version++) dev_printk(KERN_INFO, &pdev->dev, "version " DRV_VERSION "\n"); rc = pcim_enable_device(pdev); if (rc) return rc; printk(KERN_INFO "ATP867X: ATP867 ATA UDMA133 controller (rev %02X)", pdev->device); host = ata_host_alloc_pinfo(&pdev->dev, ppi, ATP867X_NUM_PORTS); if (!host) { dev_printk(KERN_ERR, &pdev->dev, "failed to allocate ATA host\n"); rc = -ENOMEM; goto err_out; } rc = atp867x_ata_pci_sff_init_host(host); if (rc) { dev_printk(KERN_ERR, &pdev->dev, "failed to init host\n"); goto err_out; } pci_set_master(pdev); rc = ata_host_activate(host, pdev->irq, ata_bmdma_interrupt, IRQF_SHARED, &atp867x_sht); if (rc) dev_printk(KERN_ERR, &pdev->dev, "failed to activate host\n"); err_out: return rc; }
static int scc_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) { static int printed_version; unsigned int board_idx = (unsigned int) ent->driver_data; struct device *dev = &pdev->dev; struct ata_probe_ent *probe_ent; int rc; if (!printed_version++) dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n"); rc = pcim_enable_device(pdev); if (rc) return rc; rc = pcim_iomap_regions(pdev, (1 << SCC_CTRL_BAR) | (1 << SCC_BMID_BAR), DRV_NAME); if (rc == -EBUSY) pcim_pin_device(pdev); if (rc) return rc; probe_ent = devm_kzalloc(dev, sizeof(*probe_ent), GFP_KERNEL); if (!probe_ent) return -ENOMEM; probe_ent->dev = dev; INIT_LIST_HEAD(&probe_ent->node); probe_ent->sht = scc_port_info[board_idx].sht; probe_ent->port_flags = scc_port_info[board_idx].flags; probe_ent->pio_mask = scc_port_info[board_idx].pio_mask; probe_ent->udma_mask = scc_port_info[board_idx].udma_mask; probe_ent->port_ops = scc_port_info[board_idx].port_ops; probe_ent->irq = pdev->irq; probe_ent->irq_flags = IRQF_SHARED; probe_ent->iomap = pcim_iomap_table(pdev); rc = scc_host_init(probe_ent); if (rc) return rc; if (!ata_device_add(probe_ent)) return -ENODEV; devm_kfree(dev, probe_ent); return 0; }
static int mt76pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) { struct mt7603_dev *dev; int ret; ret = pcim_enable_device(pdev); if (ret) return ret; ret = pcim_iomap_regions(pdev, BIT(0), pci_name(pdev)); if (ret) return ret; pci_set_master(pdev); ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); if (ret) return ret; dev = mt7603_alloc_device(&pdev->dev); if (!dev) return -ENOMEM; mt76_mmio_init(&dev->mt76, pcim_iomap_table(pdev)[0]); pci_set_drvdata(pdev, dev); dev->mt76.rev = (mt76_rr(dev, MT_HW_CHIPID) << 16) | (mt76_rr(dev, MT_HW_REV) & 0xff); dev_printk(KERN_INFO, dev->mt76.dev, "ASIC revision: %04x\n", dev->mt76.rev); ret = devm_request_irq(dev->mt76.dev, pdev->irq, mt7603_irq_handler, IRQF_SHARED, KBUILD_MODNAME, dev); if (ret) goto error; ret = mt7603_register_device(dev); if (ret) goto error; return 0; error: ieee80211_free_hw(mt76_hw(dev)); return ret; }
static int ce4100_spi_probe(struct pci_dev *dev, const struct pci_device_id *ent) { struct platform_device_info pi; int ret; struct platform_device *pdev; struct pxa2xx_spi_master spi_pdata; struct ssp_device *ssp; ret = pcim_enable_device(dev); if (ret) return ret; ret = pcim_iomap_regions(dev, 1 << 0, "PXA2xx SPI"); if (ret) return ret; memset(&spi_pdata, 0, sizeof(spi_pdata)); spi_pdata.num_chipselect = dev->devfn; ssp = &spi_pdata.ssp; ssp->phys_base = pci_resource_start(dev, 0); ssp->mmio_base = pcim_iomap_table(dev)[0]; if (!ssp->mmio_base) { dev_err(&dev->dev, "failed to ioremap() registers\n"); return -EIO; } ssp->irq = dev->irq; ssp->port_id = dev->devfn; ssp->type = PXA25x_SSP; memset(&pi, 0, sizeof(pi)); pi.parent = &dev->dev; pi.name = "pxa2xx-spi"; pi.id = ssp->port_id; pi.data = &spi_pdata; pi.size_data = sizeof(spi_pdata); pdev = platform_device_register_full(&pi); if (IS_ERR(pdev)) return PTR_ERR(pdev); pci_set_drvdata(dev, pdev); return 0; }
static int pacpi_init_one (struct pci_dev *pdev, const struct pci_device_id *id) { static const struct ata_port_info info = { .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, .pio_mask = ATA_PIO4, .mwdma_mask = ATA_MWDMA2, .udma_mask = ATA_UDMA6, .port_ops = &pacpi_ops, }; const struct ata_port_info *ppi[] = { &info, NULL }; if (pdev->vendor == PCI_VENDOR_ID_ATI) { int rc = pcim_enable_device(pdev); if (rc < 0) return rc; pcim_pin_device(pdev); } return ata_pci_sff_init_one(pdev, ppi, &pacpi_sht, NULL); } static const struct pci_device_id pacpi_pci_tbl[] = { { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_STORAGE_IDE << 8, 0xFFFFFF00UL, 1}, { } /* terminate list */ }; static struct pci_driver pacpi_pci_driver = { .name = DRV_NAME, .id_table = pacpi_pci_tbl, .probe = pacpi_init_one, .remove = ata_pci_remove_one, #ifdef CONFIG_PM .suspend = ata_pci_device_suspend, .resume = ata_pci_device_resume, #endif }; static int __init pacpi_init(void) { return pci_register_driver(&pacpi_pci_driver); } static void __exit pacpi_exit(void) { pci_unregister_driver(&pacpi_pci_driver); }
static int cmd640_init_one(struct pci_dev *pdev, const struct pci_device_id *id) { static const struct ata_port_info info = { .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = ATA_PIO4, .port_ops = &cmd640_port_ops }; const struct ata_port_info *ppi[] = { &info, NULL }; int rc; rc = pcim_enable_device(pdev); if (rc) return rc; cmd640_hardware_init(pdev); return ata_pci_sff_init_one(pdev, ppi, &cmd640_sht, NULL, 0); }
/** * ufshcd_pci_probe - probe routine of the driver * @pdev: pointer to PCI device handle * @id: PCI device id * * Returns 0 on success, non-zero value on failure */ static int ufshcd_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) { struct ufs_hba *hba; void __iomem *mmio_base; int err; err = pcim_enable_device(pdev); if (err) { dev_err(&pdev->dev, "pcim_enable_device failed\n"); return err; } pci_set_master(pdev); err = pcim_iomap_regions(pdev, 1 << 0, UFSHCD); if (err < 0) { dev_err(&pdev->dev, "request and iomap failed\n"); return err; } mmio_base = pcim_iomap_table(pdev)[0]; err = ufshcd_alloc_host(&pdev->dev, &hba); if (err) { dev_err(&pdev->dev, "Allocation failed\n"); return err; } INIT_LIST_HEAD(&hba->clk_list_head); err = ufshcd_init(hba, mmio_base, pdev->irq); if (err) { dev_err(&pdev->dev, "Initialization failed\n"); ufshcd_dealloc_host(hba); return err; } pci_set_drvdata(pdev, hba); pm_runtime_put_noidle(&pdev->dev); pm_runtime_allow(&pdev->dev); return 0; }
static int dw_pci_probe(struct pci_dev *pdev, const struct pci_device_id *pid) { const struct dw_dma_platform_data *pdata = (void *)pid->driver_data; struct dw_dma_chip *chip; int ret; ret = pcim_enable_device(pdev); if (ret) return ret; ret = pcim_iomap_regions(pdev, 1 << 0, pci_name(pdev)); if (ret) { dev_err(&pdev->dev, "I/O memory remapping failed\n"); return ret; } pci_set_master(pdev); pci_try_set_mwi(pdev); ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); if (ret) return ret; ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); if (ret) return ret; chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL); if (!chip) return -ENOMEM; chip->dev = &pdev->dev; chip->regs = pcim_iomap_table(pdev)[0]; chip->irq = pdev->irq; chip->pdata = pdata; ret = dw_dma_probe(chip); if (ret) return ret; pci_set_drvdata(pdev, chip); return 0; }
/* * intel_sst_probe - PCI probe function * * @pci: PCI device structure * @pci_id: PCI device ID structure * */ static int intel_sst_probe(struct pci_dev *pci, const struct pci_device_id *pci_id) { int ret = 0; struct intel_sst_drv *sst_drv_ctx; struct sst_platform_info *sst_pdata = pci->dev.platform_data; dev_dbg(&pci->dev, "Probe for DID %x\n", pci->device); ret = sst_alloc_drv_context(&sst_drv_ctx, &pci->dev, pci->device); if (ret < 0) return ret; sst_drv_ctx->pdata = sst_pdata; sst_drv_ctx->irq_num = pci->irq; snprintf(sst_drv_ctx->firmware_name, sizeof(sst_drv_ctx->firmware_name), "%s%04x%s", "fw_sst_", sst_drv_ctx->dev_id, ".bin"); ret = sst_context_init(sst_drv_ctx); if (ret < 0) return ret; /* Init the device */ ret = pcim_enable_device(pci); if (ret) { dev_err(sst_drv_ctx->dev, "device can't be enabled. Returned err: %d\n", ret); goto do_free_drv_ctx; } sst_drv_ctx->pci = pci_dev_get(pci); ret = sst_platform_get_resources(sst_drv_ctx); if (ret < 0) goto do_free_drv_ctx; pci_set_drvdata(pci, sst_drv_ctx); sst_configure_runtime_pm(sst_drv_ctx); return ret; do_free_drv_ctx: sst_context_cleanup(sst_drv_ctx); dev_err(sst_drv_ctx->dev, "Probe failed with %d\n", ret); return ret; }