/** * \brief main function */ int main(void) { pmic_init(); board_init(); sysclk_init(); sleepmgr_init(); rtc_init(); rtc_set_callback(alarm); cpu_irq_enable(); /* The lowest value which is safe to use is 3. This the use of 2 could * happen in a second change, and we would not get an interrupt. A * value of 3 causes the alarm to be set of in 3-4 seconds. */ rtc_set_alarm_relative(3); while (true) { /* Alarm action is handled in alarm callback so we just go to * sleep here. */ sleepmgr_enter_sleep(); } }
static void pch_rtc_init(pci_dev_t dev) { int rtc_failed; u8 reg8; reg8 = pci_read_config8(dev, GEN_PMCON_3); rtc_failed = reg8 & RTC_BATTERY_DEAD; if (rtc_failed) { reg8 &= ~RTC_BATTERY_DEAD; pci_write_config8(dev, GEN_PMCON_3, reg8); } debug("rtc_failed = 0x%x\n", rtc_failed); #if CONFIG_HAVE_ACPI_RESUME /* Avoid clearing pending interrupts and resetting the RTC control * register in the resume path because the Linux kernel relies on * this to know if it should restart the RTC timerqueue if the wake * was due to the RTC alarm. */ if (acpi_get_slp_type() == 3) return; #endif /* TODO: Handle power failure */ if (rtc_failed) printf("RTC power failed\n"); rtc_init(); }
static void init(void) { usart1_init(115200, buf_in, ARR_LEN(buf_in), buf_out, ARR_LEN(buf_out)); rtc_init(); sei(); puts_P(PSTR("Init complete\n\n")); }
/* Read the time from the RTC_STAT. time_in_seconds is seconds since Jan 1970 */ int rtc_get(struct rtc_time *tmp) { uint32_t cur_rtc_stat; int time_in_sec; int tm_sec, tm_min, tm_hr, tm_day; pr_stamp(); if (tmp == NULL) { puts("Error getting the date/time\n"); return -1; } rtc_init(); wait_for_complete(); /* Read the RTC_STAT register */ cur_rtc_stat = bfin_read_RTC_STAT(); /* Convert our encoded format into actual time values */ tm_sec = (cur_rtc_stat & RTC_SEC) >> RTC_SEC_P; tm_min = (cur_rtc_stat & RTC_MIN) >> RTC_MIN_P; tm_hr = (cur_rtc_stat & RTC_HR ) >> RTC_HR_P; tm_day = (cur_rtc_stat & RTC_DAY) >> RTC_DAY_P; /* Calculate the total number of seconds since epoch */ time_in_sec = (tm_sec) + MIN_TO_SECS(tm_min) + HRS_TO_SECS(tm_hr) + DAYS_TO_SECS(tm_day); to_tm(time_in_sec, tmp); return 0; }
int main(void) { #ifdef MODULE_LTC4150 ltc4150_start(); #endif #ifdef FEATURE_PERIPH_RTC rtc_init(); #endif #ifdef MODULE_NETIF gnrc_netreg_entry_t dump; dump.pid = gnrc_pktdump_pid; dump.demux_ctx = GNRC_NETREG_DEMUX_CTX_ALL; gnrc_netreg_register(GNRC_NETTYPE_UNDEF, &dump); #endif (void) puts("Welcome to RIOT!"); char line_buf[SHELL_DEFAULT_BUFSIZE]; shell_run(NULL, line_buf, SHELL_DEFAULT_BUFSIZE); return 0; }
/* * This function is not exposed as an API at this point, * because FreeRTOS doesn't yet support dynamic changing of * CPU frequency. Also we need to implement hooks for * components which want to be notified of CPU frequency * changes. */ void esp_clk_init(void) { rtc_config_t cfg = RTC_CONFIG_DEFAULT(); rtc_init(cfg); rtc_clk_fast_freq_set(RTC_FAST_FREQ_8M); #ifdef CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL select_rtc_slow_clk(RTC_SLOW_FREQ_32K_XTAL); #else select_rtc_slow_clk(RTC_SLOW_FREQ_RTC); #endif uint32_t freq_mhz = CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ; rtc_cpu_freq_t freq = RTC_CPU_FREQ_80M; switch(freq_mhz) { case 240: freq = RTC_CPU_FREQ_240M; break; case 160: freq = RTC_CPU_FREQ_160M; break; default: freq_mhz = 80; /* no break */ case 80: freq = RTC_CPU_FREQ_80M; break; } // Wait for UART TX to finish, otherwise some UART output will be lost // when switching APB frequency uart_tx_wait_idle(CONFIG_CONSOLE_UART_NUM); rtc_clk_cpu_freq_set(freq); }
int main() { InitGPIO(); InitBKP(); Set_System(); Set_USBClock(); USB_Interrupts_Config(); USB_Init(); rtc_init(); /* RTC_t date; date.year = 2015; date.month = 10; date.mday = 24; date.hour = 23; date.min = 20; date.sec = 0; rtc_settime(&date); */ // Start Task // xTaskCreate(vLcdTask, "vLcdTask", configMINIMAL_STACK_SIZE * 1, NULL, tskIDLE_PRIORITY + 1, &xHandleLcdTask); xTaskCreate(vDebugTask, "vDebugTask", configMINIMAL_STACK_SIZE * 1, NULL, tskIDLE_PRIORITY + 1, &xHandleDebugTask); // Start scheduler // osKernelStart(NULL, NULL); }
void rtc_write(time_t t) { if (! rtc_inited) { rtc_init(); } // Convert timestamp to struct tm struct tm *timeinfo = localtime(&t); S_RTC_TIME_DATA_T rtc_datetime; // Convert S_RTC_TIME_DATA_T to struct tm rtc_datetime.u32Year = timeinfo->tm_year + YEAR0; rtc_datetime.u32Month = timeinfo->tm_mon + 1; rtc_datetime.u32Day = timeinfo->tm_mday; rtc_datetime.u32DayOfWeek = timeinfo->tm_wday; rtc_datetime.u32Hour = timeinfo->tm_hour; rtc_datetime.u32Minute = timeinfo->tm_min; rtc_datetime.u32Second = timeinfo->tm_sec; rtc_datetime.u32TimeScale = RTC_CLOCK_24; // NOTE: Timing issue with write to RTC registers. This delay is empirical, not rational. RTC_SetDateAndTime(&rtc_datetime); //nu_nop(6000); wait_us(100); }
/** * MCU: Atmega328 * Fuses: Oscilador interno a 8 Mhz (sin dividir por 8) * -U lfuse:w:0xe2:m -U hfuse:w:0xd1:m -U efuse:w:0x07:m */ int main(void) { adc_init(); timer0_init(timer0_callback); i2c_init(); rtc_init(rtc); rtc_sqw_rate(rtc, 1); rtc_sqw_enable(rtc); rtc_clock_start(rtc); eMBInit(MB_RTU, 0x03, 0, 9600, MB_PAR_NONE); eMBSetSlaveID(0x3, TRUE, (UCHAR*) "demeter", 8); eMBEnable(); blinkenlight(5, 100); parameters_init(); ports_init(); f_mount(&fs, "", 0); update_log_filename(); while (1) { eMBPoll(); update_state(); _delay_ms(100); } return (0); }
time_t rtc_read(void) { // NOTE: After boot, RTC time registers are not synced immediately, about 1 sec latency. // RTC time got (through RTC_GetDateAndTime()) in this sec would be last-synced and incorrect. // NUC472/M453: Known issue // M487: Fixed if (! rtc_isenabled()) { rtc_init(); } S_RTC_TIME_DATA_T rtc_datetime; RTC_GetDateAndTime(&rtc_datetime); struct tm timeinfo; // Convert struct tm to S_RTC_TIME_DATA_T timeinfo.tm_year = rtc_datetime.u32Year - YEAR0; timeinfo.tm_mon = rtc_datetime.u32Month - 1; timeinfo.tm_mday = rtc_datetime.u32Day; timeinfo.tm_wday = rtc_datetime.u32DayOfWeek; timeinfo.tm_hour = rtc_datetime.u32Hour; if (rtc_datetime.u32TimeScale == RTC_CLOCK_12 && rtc_datetime.u32AmPm == RTC_PM) { timeinfo.tm_hour += 12; } timeinfo.tm_min = rtc_datetime.u32Minute; timeinfo.tm_sec = rtc_datetime.u32Second; // Convert to timestamp time_t t; if (_rtc_maketime(&timeinfo, &t, RTC_FULL_LEAP_YEAR_SUPPORT) == false) { return 0; } return t; }
time_t rtc_read(void) { if (! rtc_inited) { rtc_init(); } S_RTC_TIME_DATA_T rtc_datetime; RTC_GetDateAndTime(&rtc_datetime); struct tm timeinfo; // Convert struct tm to S_RTC_TIME_DATA_T timeinfo.tm_year = rtc_datetime.u32Year - YEAR0; timeinfo.tm_mon = rtc_datetime.u32Month - 1; timeinfo.tm_mday = rtc_datetime.u32Day; timeinfo.tm_wday = rtc_datetime.u32DayOfWeek; timeinfo.tm_hour = rtc_datetime.u32Hour; timeinfo.tm_min = rtc_datetime.u32Minute; timeinfo.tm_sec = rtc_datetime.u32Second; // Convert to timestamp time_t t = mktime(&timeinfo); return t; }
void rtc_write(time_t t) { if (! rtc_isenabled()) { rtc_init(); } // Convert timestamp to struct tm struct tm timeinfo; if (_rtc_localtime(t, &timeinfo, RTC_FULL_LEAP_YEAR_SUPPORT) == false) { return; } S_RTC_TIME_DATA_T rtc_datetime; // Convert S_RTC_TIME_DATA_T to struct tm rtc_datetime.u32Year = timeinfo.tm_year + YEAR0; rtc_datetime.u32Month = timeinfo.tm_mon + 1; rtc_datetime.u32Day = timeinfo.tm_mday; rtc_datetime.u32DayOfWeek = timeinfo.tm_wday; rtc_datetime.u32Hour = timeinfo.tm_hour; rtc_datetime.u32Minute = timeinfo.tm_min; rtc_datetime.u32Second = timeinfo.tm_sec; rtc_datetime.u32TimeScale = RTC_CLOCK_24; // NOTE: Timing issue with write to RTC registers. This delay is empirical, not rational. RTC_SetDateAndTime(&rtc_datetime); wait_us(100); }
CuSuite* WindowGetSuite(void) { CuSuite* suite = CuSuiteNew("ui"); rtc_init(); memlcd_DriverInit(); GrContextInit(&context, &g_memlcd_Driver); window_init(0); status_process(EVENT_WINDOW_CREATED, 0, NULL); SUITE_ADD_TEST(suite, TestScriptEngine); SUITE_ADD_TEST(suite, TestTriagle); SUITE_ADD_TEST(suite, TestWideFont); SUITE_ADD_TEST(suite, TestSportWatch); SUITE_ADD_TEST(suite, TestTestButton); SUITE_ADD_TEST(suite, TestTestLight); SUITE_ADD_TEST(suite, TestTestLcd); SUITE_ADD_TEST(suite, TestPhoneScreen); SUITE_ADD_TEST(suite, TestNotification); SUITE_ADD_TEST(suite, TestControl); SUITE_ADD_TEST(suite, TestWelcome); SUITE_ADD_TEST(suite, TestBtConfig); SUITE_ADD_TEST(suite, TestFontConfig); SUITE_ADD_TEST(suite, TestSleep); SUITE_ADD_TEST(suite, TestWindows); SUITE_ADD_TEST(suite, SimluateRun); return suite; }
kmain() { terminal_init(); setup_IDT_entry (&idt[0x08], 0x08, (dword)&_int_08_hand, ACS_INT, 0); setup_IDT_entry (&idt[0x09], 0x08, (dword)&_int_09_hand, ACS_INT, 0); setup_IDT_entry (&idt[0x74], 0x08, (dword)&_int_74_hand, ACS_INT, 0); setup_IDT_entry (&idt[0x80], 0x08, (dword)&_int_80_hand, ACS_INT, 0); /* IDTR Setting */ idtr.base = 0; idtr.base +=(dword) &idt; idtr.limit = sizeof(idt)-1; _lidt(&idtr); /* Interrupt unmasking */ _cli(); _maskPIC1(0xF8); /*0XF8*/ _maskPIC2(0xEF); /*0XEF*/ _sti(); video_init(); timertick_init(); rtc_init(); mouse_init(); shell_run(); }
int rtc_get(struct rtc_time *tmp) { int rel = 0; struct ds1302_st bbclk; if(!ds1302_initted) rtc_init(); read_ser_drv(0xbe,(unsigned char *)&bbclk, 8); /* read burst */ if (bbclk.CH) { printf("ds1302: rtc_get: Clock was halted, clock probably " "corrupt\n"); rel = -1; } tmp->tm_sec=10*bbclk.sec10+bbclk.sec; tmp->tm_min=10*bbclk.min10+bbclk.min; tmp->tm_hour=10*bbclk.hr10+bbclk.hr; tmp->tm_wday=bbclk.day; tmp->tm_mday=10*bbclk.date10+bbclk.date; tmp->tm_mon=10*bbclk.month10+bbclk.month; tmp->tm_year=10*bbclk.year10+bbclk.year + 1900; tmp->tm_yday = 0; tmp->tm_isdst= 0; DPRINTF("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, tmp->tm_hour, tmp->tm_min, tmp->tm_sec ); return rel; }
static int setupHardware( void ) { // When using the JTAG debugger the hardware is not always initialised to // the correct default state. This line just ensures that this does not // cause all interrupts to be masked at the start. AT91C_BASE_AIC->AIC_EOICR = 0; // Enable the peripheral clock. AT91F_PMC_EnablePeriphClock( AT91C_BASE_PMC, (1 << AT91C_ID_PIOA) | //Enable Clock for PIO (1 << AT91C_ID_IRQ0) | //Enable Clock for IRQ0 (1 << AT91C_ID_PWMC) | //Enable Clock for the PWM controller (1 << AT91C_ID_US0) | //USART0 (1 << AT91C_ID_US1) //USART1 ); // Enable reset-button AT91F_RSTSetMode( AT91C_BASE_RSTC , AT91C_RSTC_URSTEN ); if (!initUsart()) return 0; if (!vInitUSBInterface()) return 0; init_serial(); rtc_init(); InitLoggerHardware(); return 1; }
int main() { InitGPIO(); //InitTIM3(); //InitTIM4(); InitIWDG(); // Init Watch Dog InitBKP(); #ifdef DEBUG_OUTPUT_USB Set_System(); Set_USBClock(); USB_Interrupts_Config(); USB_Init(); #else rtc_init(); #endif RTC_t date; date.year = 2015; date.month = 10; date.mday = 24; date.hour = 23; date.min = 20; date.sec = 0; rtc_settime(&date); // Start Task // xTaskCreate(vLcdPcf, "vLcdPcf", configMINIMAL_STACK_SIZE * 2, NULL, tskIDLE_PRIORITY + 1, &xHandlevLcdPcfTask); xTaskCreate(vDebugTask, "vDebugTask", configMINIMAL_STACK_SIZE * 2, NULL, tskIDLE_PRIORITY + 1, &xHandleDebugTask); // Start scheduler // osKernelStart(NULL, NULL); }
void main(void) { twi_master_init(); mpu6500_init(); mpu6500_stop(); disable_i2c(); simble_init("Motion"); motion_ctx.sampling_period = DEFAULT_SAMPLING_PERIOD; //Set the timer parameters and initialize it. struct rtc_ctx rtc_ctx = { .rtc_x[NOTIF_TIMER_ID] = { .type = PERIODIC, .period = motion_ctx.sampling_period, .enabled = false, .cb = notif_timer_cb, } }; batt_serv_init(&rtc_ctx); rtc_init(&rtc_ctx); ind_init(); motion_init(&motion_ctx); simble_adv_start(); simble_process_event_loop(); }
void bsp_init(void) { HAL_Init(); /* Configure the system clock */ BSP_SystemClock_Config(); /* Configure LED0 */ BSP_LED_Init(LED0); /*UART2 init*/ UART_Init(); HAL_Delay(1000); /*sensor layer init*/ #ifdef SENSOR_FIFO jsensor_sys_init(); #endif /* Initialize the BlueNRG SPI driver */ BNRG_SPI_Init(); /* Initialize the BlueNRG HCI */ HCI_Init(); /* Reset BlueNRG hardware */ BlueNRG_RST(); /* Enable Power Clock */ __HAL_RCC_PWR_CLK_ENABLE(); rtc_init(); }
int main(void) { // init clocks clock_init(); // init GPIO pin states gpio_init(); // init serial console console_init(); // wait for RTC to start up delay_ms(1000); // init RTC rtc_init(); // init calibration cal_init(); // init display (rtc_init(), cal_init() must must be called first!) display_init(); // call menu menu(); }
/* Set the time. Get the time_in_secs which is the number of seconds since Jan 1970 and set the RTC registers * based on this value. */ int rtc_set(struct rtc_time *tmp) { unsigned long remain, days, hrs, mins, secs; pr_stamp(); if (tmp == NULL) { puts("Error setting the date/time\n"); return -1; } rtc_init(); wait_for_complete(); /* Calculate number of seconds this incoming time represents */ remain = mktime(tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_hour, tmp->tm_min, tmp->tm_sec); /* Figure out how many days since epoch */ days = remain / NUM_SECS_IN_DAY; /* From the remaining secs, compute the hrs(0-23), mins(0-59) and secs(0-59) */ remain = remain % NUM_SECS_IN_DAY; hrs = remain / NUM_SECS_IN_HR; remain = remain % NUM_SECS_IN_HR; mins = remain / NUM_SECS_IN_MIN; secs = remain % NUM_SECS_IN_MIN; /* Encode these time values into our RTC_STAT register */ bfin_write_RTC_STAT(SET_ALARM(days, hrs, mins, secs)); return 0; }
static void rtc_attach(device_t parent, device_t self, void *aux) { struct rtc_softc *sc = device_private(self); struct apb_attach_args *aa = aux; static int rtc_attached = 0; sc->sc_dev = self; sc->sc_iot = aa->aa_iot; if (rtc_attached) { aprint_error_dev(sc->sc_dev, "rtc is already attached\n"); return; } if (bus_space_map(sc->sc_iot, aa->aa_addr, aa->aa_size, 0, &sc->sc_hdl)) { aprint_error_dev(sc->sc_dev, "Unable to map bus space\n"); return; } rtc_init(sc); rtc_reset(sc); aprint_normal("\n"); rtc_attached = 1; return; }
void rtc_write(uint32_t addr, uint8_t data) { rtc_init(); rtc_ce(1); rtc_dir(1); rtc_do(1); /* Don't care */ rtc_do(0); /* R/#W = 0(WRITE) */ rtc_do(1); /* AD = 1 */ rtc_do(0); /* DT = 0 */ rtc_do(addr & 0x8); /* A3 */ rtc_do(addr & 0x4); /* A2 */ rtc_do(addr & 0x2); /* A1 */ rtc_do(addr & 0x1); /* A0 */ rtc_do(1); /* Don't care */ rtc_do(0); /* R/#W = 0(WRITE) */ rtc_do(0); /* AD = 0 */ rtc_do(1); /* DT = 1 */ rtc_do(data & 0x8); /* D3 */ rtc_do(data & 0x4); /* D2 */ rtc_do(data & 0x2); /* D1 */ rtc_do(data & 0x1); /* D0 */ rtc_ce(0); }
//开机初始化 void All_Init( void ) { const uint32_t NewDeviationAddr = 0x4000; /* BootLoad引导程序时,必须在Main中添加,同时更改“魔术棒--Target选项卡的ROM偏移地址” */ NVIC_SetVectorTable(NVIC_VectTab_FLASH,NewDeviationAddr); /* 外设初始化 */ lcd_init(); rtc_init(); led_init(); uart3_init(BAUD_38400); print_init(); //波特率19200 timeout_init(); TIM5_TimeoutInit(); link_init(); tf_init(); eep_init(); delay_init_t2(); beep_init(); SysTick_Config(SYSTICK_10MS); // PrintSystemParameter(); //串口打印系统参数信息,用于调试 #ifdef ENABLE_BEEP BEEP_START(); #endif set_page(system_init); }
void main (void) { char ch; printf("\nRunning RTC example!!\n"); printf("This example generates an interrupt every second!\n"); /* Parameters: * seconds Start value of seconds register * alarm Time in seconds of first alarm. Set to 0xFFFFFFFF to effectively disable alarm * c_interval Interval at which to apply time compensation can range from 1 second (0x0) to 256 (0xFF) * c_value Compensation value ranges from -127 32kHz cycles to +128 32 kHz cycles * 80h Time prescaler register overflows every 32896 clock cycles. * FFh Time prescaler register overflows every 32769 clock cycles. * 00h Time prescaler register overflows every 32768 clock cycles. * 01h Time prescaler register overflows every 32767 clock cycles. * 7Fh Time prescaler register overflows every 32641 clock cycles. * interrupt TRUE or FALSE */ rtc_init(0, 0, 0, 0, TRUE); while(1) { ch = in_char(); out_char(ch); } }
void init_system(void) { /* keep mosfet closed to ground (circuit on) */ gpio_pre_init(); /* timing first, needed for all delays */ systick_init(); /* get globalb config */ config_read(); lcd_init_gpio(); lcd_init_fsmc(); /* lcd inid always before touch_init, since it resets lcd */ lcd_init(); ui_init(); gpio_init(); adc_init(); audio_init(); rtc_init(); touch_init(); }
/** Initialize the low power ticker * */ void lp_ticker_init(void) { lptmr_config_t lptmrConfig; if (lp_ticker_inited) { return; } lp_ticker_inited = true; /* Setup low resolution clock - RTC */ if (!rtc_isenabled()) { rtc_init(); RTC_DisableInterrupts(RTC, kRTC_AlarmInterruptEnable | kRTC_SecondsInterruptEnable); RTC_StartTimer(RTC); } RTC->TAR = 0; /* Write clears the IRQ flag */ NVIC_ClearPendingIRQ(RTC_IRQn); NVIC_SetVector(RTC_IRQn, (uint32_t)rtc_isr); NVIC_EnableIRQ(RTC_IRQn); /* Setup high resolution clock - LPTMR */ LPTMR_GetDefaultConfig(&lptmrConfig); /* Use 32kHz drive */ CLOCK_SetXtal32Freq(OSC32K_CLK_HZ); lptmrConfig.prescalerClockSource = kLPTMR_PrescalerClock_2; LPTMR_Init(LPTMR0, &lptmrConfig); LPTMR_EnableInterrupts(LPTMR0, kLPTMR_TimerInterruptEnable); NVIC_ClearPendingIRQ(LPTMR0_IRQn); NVIC_SetVector(LPTMR0_IRQn, (uint32_t)lptmr_isr); EnableIRQ(LPTMR0_IRQn); }
int kernel_main() { graphics_init(); console_init(); console_printf("video: %d x %d\n", video_xres, video_yres, video_xbytes); console_printf("kernel: %d bytes\n", kernel_size); memory_init(); interrupt_init(); rtc_init(); clock_init(); keyboard_init(); /* process_init() is a big step. This initializes the process table, but also gives us our own process structure, private stack, and enables paging. Now we can do complex things like wait upon events. */ process_init(); mouse_init(); ata_init(); console_printf("\nNUNYA READY:\n"); cmd_line_init(); while(1) { cmd_line_show_prompt(); cmd_line_attempt(keyboard_read_str()); } return 0; }
uint8_t rtc_read(uint32_t addr) { uint8_t data; rtc_init(); rtc_ce(1); rtc_dir(1); rtc_do(1); /* Don't care */ rtc_do(1); /* R/#W = 1(READ) */ rtc_do(1); /* AD = 1 */ rtc_do(0); /* DT = 0 */ rtc_do(addr & 0x8); /* A3 */ rtc_do(addr & 0x4); /* A2 */ rtc_do(addr & 0x2); /* A1 */ rtc_do(addr & 0x1); /* A0 */ rtc_dir(0); (void)rtc_di(); (void)rtc_di(); (void)rtc_di(); (void)rtc_di(); data = rtc_di(); /* D3 */ data <<= 1; data |= rtc_di(); /* D2 */ data <<= 1; data |= rtc_di(); /* D1 */ data <<= 1; data |= rtc_di(); /* D0 */ rtc_ce(0); return data & 0xf; }
void board_init(void) { /* Configure the memory interface */ calypso_mem_cfg(CALYPSO_nCS0, 3, CALYPSO_MEM_16bit, 1); calypso_mem_cfg(CALYPSO_nCS1, 3, CALYPSO_MEM_16bit, 1); calypso_mem_cfg(CALYPSO_nCS2, 5, CALYPSO_MEM_16bit, 1); calypso_mem_cfg(CALYPSO_nCS3, 5, CALYPSO_MEM_16bit, 1); calypso_mem_cfg(CALYPSO_CS4, 0, CALYPSO_MEM_8bit, 1); calypso_mem_cfg(CALYPSO_nCS6, 0, CALYPSO_MEM_32bit, 1); calypso_mem_cfg(CALYPSO_nCS7, 0, CALYPSO_MEM_32bit, 0); /* Set VTCXO_DIV2 = 1, configure PLL for 104 MHz and give ARM half of that */ calypso_clock_set(2, CALYPSO_PLL13_104_MHZ, ARM_MCLK_DIV_2); /* Configure the RHEA bridge with some sane default values */ calypso_rhea_cfg(0, 0, 0xff, 0, 1, 0, 0); /* Initialize board-specific GPIO */ board_io_init(); /* Enable bootrom mapping to route exception vectors to RAM */ calypso_bootrom(1); calypso_exceptions_install(); /* Initialize interrupt controller */ irq_init(); /* initialize MODEM UART to be used for sercomm*/ uart_init(SERCOMM_UART_NR, 1); uart_baudrate(SERCOMM_UART_NR, UART_115200); /* Initialize IRDA UART to be used for old-school console code. * note: IRDA uart only accessible on C115 and C117 PCB */ uart_init(CONS_UART_NR, 1); uart_baudrate(CONS_UART_NR, UART_115200); /* Initialize hardware timers */ hwtimer_init(); /* Initialize DMA controller */ dma_init(); /* Initialize real time clock */ rtc_init(); /* Initialize system timers (uses hwtimer 2) */ timer_init(); /* Initialize LCD driver (uses I2C) and backlight */ display = &st7558_display; display_init(); bl_mode_pwl(1); bl_level(50); /* Initialize keypad driver */ keypad_init(1); /* Initialize ABB driver (uses SPI) */ twl3025_init(); }