void fastpath_reply_recv(word_t cptr, word_t msgInfo) { seL4_MessageInfo_t info; cap_t ep_cap; endpoint_t *ep_ptr; word_t length; cte_t *callerSlot; cap_t callerCap; tcb_t *caller; word_t badge; tcb_t *endpointTail; word_t fault_type; cap_t newVTable; pde_t *cap_pd; pde_t stored_hw_asid; /* Get message info and length */ info = messageInfoFromWord_raw(msgInfo); length = seL4_MessageInfo_get_length(info); fault_type = fault_get_faultType(ksCurThread->tcbFault); #ifdef CONFIG_BENCHMARK_TRACK_KERNEL_ENTRIES ksKernelEntry.path = Entry_Syscall; ksKernelEntry.syscall_no = SysReplyRecv; ksKernelEntry.cap_type = cap_endpoint_cap; ksKernelEntry.invocation_tag = seL4_MessageInfo_get_label(info); ksKernelEntry.is_fastpath = true; benchmark_track_start(); #endif #ifdef CONFIG_BENCHMARK_TRACK_UTILISATION benchmark_utilisation_kentry_stamp(); #endif /* CONFIG_BENCHMARK_TRACK_UTILISATION */ /* Check there's no extra caps, the length is ok and there's no * saved fault. */ if (unlikely(fastpath_mi_check(msgInfo) || fault_type != fault_null_fault)) { slowpath(SysReplyRecv); } /* Lookup the cap */ ep_cap = lookup_fp(TCB_PTR_CTE_PTR(ksCurThread, tcbCTable)->cap, cptr); /* Check it's an endpoint */ if (unlikely(!cap_capType_equals(ep_cap, cap_endpoint_cap) || !cap_endpoint_cap_get_capCanReceive(ep_cap))) { slowpath(SysReplyRecv); } /* Check there is nothing waiting on the notification */ if (ksCurThread->tcbBoundNotification && notification_ptr_get_state(ksCurThread->tcbBoundNotification) == NtfnState_Active) { slowpath(SysReplyRecv); } /* Get the endpoint address */ ep_ptr = EP_PTR(cap_endpoint_cap_get_capEPPtr(ep_cap)); /* Check that there's not a thread waiting to send */ if (unlikely(endpoint_ptr_get_state(ep_ptr) == EPState_Send)) { slowpath(SysReplyRecv); } /* Only reply if the reply cap is valid. */ callerSlot = TCB_PTR_CTE_PTR(ksCurThread, tcbCaller); callerCap = callerSlot->cap; if (unlikely(!fastpath_reply_cap_check(callerCap))) { slowpath(SysReplyRecv); } /* Determine who the caller is. */ caller = TCB_PTR(cap_reply_cap_get_capTCBPtr(callerCap)); /* Check that the caller has not faulted, in which case a fault reply is generated instead. */ fault_type = fault_get_faultType(caller->tcbFault); if (unlikely(fault_type != fault_null_fault)) { slowpath(SysReplyRecv); } /* Get destination thread.*/ newVTable = TCB_PTR_CTE_PTR(caller, tcbVTable)->cap; /* Get vspace root. */ #if defined(ARCH_ARM) || !defined(CONFIG_PAE_PAGING) cap_pd = PDE_PTR(cap_page_directory_cap_get_capPDBasePtr(newVTable)); #else cap_pd = PDE_PTR(cap_pdpt_cap_get_capPDPTBasePtr(newVTable)); #endif /* Ensure that the destination has a valid MMU. */ if (unlikely(! isValidVTableRoot_fp (newVTable))) { slowpath(SysReplyRecv); } #ifdef ARCH_ARM /* Get HWASID. */ stored_hw_asid = cap_pd[PD_ASID_SLOT]; #endif /* Ensure the original caller can be scheduled directly. */ if (unlikely(caller->tcbPriority < ksCurThread->tcbPriority)) { slowpath(SysReplyRecv); } #ifdef ARCH_ARM /* Ensure the HWASID is valid. */ if (unlikely(!pde_pde_invalid_get_stored_asid_valid(stored_hw_asid))) { slowpath(SysReplyRecv); } #endif /* Ensure the original caller is in the current domain and can be scheduled directly. */ if (unlikely(caller->tcbDomain != ksCurDomain && maxDom)) { slowpath(SysReplyRecv); } /* * --- POINT OF NO RETURN --- * * At this stage, we have committed to performing the IPC. */ #ifdef ARCH_X86 /* Need to update NextIP in the calling thread */ setRegister(ksCurThread, NextIP, getRegister(ksCurThread, NextIP) + 2); #endif /* Set thread state to BlockedOnReceive */ thread_state_ptr_mset_blockingObject_tsType( &ksCurThread->tcbState, (word_t)ep_ptr, ThreadState_BlockedOnReceive); /* Place the thread in the endpoint queue */ endpointTail = TCB_PTR(endpoint_ptr_get_epQueue_tail(ep_ptr)); if (likely(!endpointTail)) { ksCurThread->tcbEPPrev = NULL; ksCurThread->tcbEPNext = NULL; /* Set head/tail of queue and endpoint state. */ endpoint_ptr_set_epQueue_head_np(ep_ptr, TCB_REF(ksCurThread)); endpoint_ptr_mset_epQueue_tail_state(ep_ptr, TCB_REF(ksCurThread), EPState_Recv); } else { /* Append current thread onto the queue. */ endpointTail->tcbEPNext = ksCurThread; ksCurThread->tcbEPPrev = endpointTail; ksCurThread->tcbEPNext = NULL; /* Update tail of queue. */ endpoint_ptr_mset_epQueue_tail_state(ep_ptr, TCB_REF(ksCurThread), EPState_Recv); } /* Delete the reply cap. */ mdb_node_ptr_mset_mdbNext_mdbRevocable_mdbFirstBadged( &CTE_PTR(mdb_node_get_mdbPrev(callerSlot->cteMDBNode))->cteMDBNode, 0, 1, 1); callerSlot->cap = cap_null_cap_new(); callerSlot->cteMDBNode = nullMDBNode; /* I know there's no fault, so straight to the transfer. */ /* Replies don't have a badge. */ badge = 0; fastpath_copy_mrs (length, ksCurThread, caller); /* Dest thread is set Running, but not queued. */ thread_state_ptr_set_tsType_np(&caller->tcbState, ThreadState_Running); switchToThread_fp(caller, cap_pd, stored_hw_asid); msgInfo = wordFromMessageInfo(seL4_MessageInfo_set_capsUnwrapped(info, 0)); #ifdef CONFIG_BENCHMARK_TRACK_KERNEL_ENTRIES benchmark_track_exit(); #endif fastpath_restore(badge, msgInfo, ksCurThread); }
exception_t handleUnknownSyscall(word_t w) { #ifdef DEBUG ksKernelEntry.path = Entry_UnknownSyscall; ksKernelEntry.word = w; if (w == SysDebugPutChar) { kernel_putchar(getRegister(ksCurThread, capRegister)); return EXCEPTION_NONE; } if (w == SysDebugHalt) { printf("Debug halt syscall from user thread %p\n", ksCurThread); halt(); } if (w == SysDebugSnapshot) { printf("Debug snapshot syscall from user thread %p\n", ksCurThread); capDL(); return EXCEPTION_NONE; } if (w == SysDebugCapIdentify) { word_t cptr = getRegister(ksCurThread, capRegister); lookupCapAndSlot_ret_t lu_ret = lookupCapAndSlot(ksCurThread, cptr); word_t cap_type = cap_get_capType(lu_ret.cap); setRegister(ksCurThread, capRegister, cap_type); return EXCEPTION_NONE; } #endif /* DEBUG */ #ifdef CONFIG_PRINTING if (w == SysDebugNameThread) { /* This is a syscall meant to aid debugging, so if anything goes wrong * then assume the system is completely misconfigured and halt */ const char *name; word_t cptr = getRegister(ksCurThread, capRegister); lookupCapAndSlot_ret_t lu_ret = lookupCapAndSlot(ksCurThread, cptr); /* ensure we got a TCB cap */ word_t cap_type = cap_get_capType(lu_ret.cap); if (cap_type != cap_thread_cap) { userError("SysDebugNameThread: cap is not a TCB, halting"); halt(); } /* Add 1 to the IPC buffer to skip the message info word */ name = (const char*)(lookupIPCBuffer(true, ksCurThread) + 1); if (!name) { userError("SysDebugNameThread: Failed to lookup IPC buffer, halting"); halt(); } /* ensure the name isn't too long */ if (name[strnlen(name, seL4_MsgMaxLength * sizeof(word_t))] != '\0') { userError("SysDebugNameThread: Name too long, halting"); halt(); } setThreadName(TCB_PTR(cap_thread_cap_get_capTCBPtr(lu_ret.cap)), name); return EXCEPTION_NONE; } #endif /* CONFIG_PRINTING */ #ifdef DANGEROUS_CODE_INJECTION if (w == SysDebugRun) { ((void (*) (void *))getRegister(ksCurThread, capRegister))((void*)getRegister(ksCurThread, msgInfoRegister)); return EXCEPTION_NONE; } #endif #ifdef CONFIG_ENABLE_BENCHMARKS if (w == SysBenchmarkResetLog) { ksLogIndex = 0; return EXCEPTION_NONE; } else if (w == SysBenchmarkDumpLog) { word_t *buffer = lookupIPCBuffer(true, ksCurThread); word_t start = getRegister(ksCurThread, capRegister); word_t size = getRegister(ksCurThread, msgInfoRegister); word_t logSize = ksLogIndexFinalized > MAX_LOG_SIZE ? MAX_LOG_SIZE : ksLogIndexFinalized; if (buffer == NULL) { userError("Cannot dump benchmarking log to a thread without an ipc buffer\n"); current_syscall_error.type = seL4_IllegalOperation; return EXCEPTION_SYSCALL_ERROR; } if (start > logSize) { userError("Start > logsize\n"); current_syscall_error.type = seL4_InvalidArgument; return EXCEPTION_SYSCALL_ERROR; } /* Assume we have access to an ipc buffer 1024 words big. * Do no write to the first 4 bytes as these are overwritten */ if (size > MAX_IPC_BUFFER_STORAGE) { size = MAX_IPC_BUFFER_STORAGE; } /* trim to size */ if ((start + size) > logSize) { size = logSize - start; } #ifdef CONFIG_BENCHMARK_TRACK_KERNEL_ENTRIES benchmark_track_dump((benchmark_track_kernel_entry_t *) &buffer[1], start, size); #else /* CONFIG_MAX_NUM_TRACE_POINTS > 0 */ /* write to ipc buffer */ word_t i; for (i = 0; i < size; i++) { int base_index = i * 2 + 1; ks_log_entry_t *log = &ksLog[i + start]; buffer[base_index] = log->key; buffer[base_index + 1] = log->data; } #endif /* CONFIG_BENCHMARK_TRACK_KERNEL_ENTRIES */ /* Return the amount written */ setRegister(ksCurThread, capRegister, size); return EXCEPTION_NONE; } else if (w == SysBenchmarkLogSize) { /* Return the amount of log items we tried to log (may exceed max size) */ setRegister(ksCurThread, capRegister, ksLogIndexFinalized); return EXCEPTION_NONE; } else if (w == SysBenchmarkFinalizeLog) { ksLogIndexFinalized = ksLogIndex; return EXCEPTION_NONE; } #endif /* CONFIG_ENABLE_BENCHMARKS */ current_fault = fault_unknown_syscall_new(w); handleFault(ksCurThread); schedule(); activateThread(); return EXCEPTION_NONE; }
void CodecController::setInputMuteRight(bool mute){ if(mute) setRegister(RIGHT_LINE_IN_REGISTER, WM8731_INMUTE); else clearRegister(RIGHT_LINE_IN_REGISTER, WM8731_INMUTE); }
void nRF24L01P::disableAutoRetransmit(void) { setRegister(_NRF24L01P_REG_SETUP_RETR, _NRF24L01P_SETUP_RETR_NONE); }
int nRF24L01P::write(int pipe, char *data, int count) { // Note: the pipe number is ignored in a Transmit / write // // Save the CE state // int originalCe = ce_.state(); disable(); if ( count <= 0 ) return 0; if ( count > _NRF24L01P_TX_FIFO_SIZE ) count = _NRF24L01P_TX_FIFO_SIZE; // Clear the Status bit setRegister(_NRF24L01P_REG_STATUS, _NRF24L01P_STATUS_TX_DS); // nCS_ = 0; // digitalWrite(nCS_, LOW); nCS_.write(LOW); // int status = spi_.write(_NRF24L01P_SPI_CMD_WR_TX_PAYLOAD); // int status = SPI.transfer(_NRF24L01P_SPI_CMD_WR_TX_PAYLOAD); // int status = spi_.write(_NRF24L01P_SPI_CMD_WR_TX_PAYLOAD); spi_.write(_NRF24L01P_SPI_CMD_WR_TX_PAYLOAD); for ( int i = 0; i < count; i++ ) { // spi_.write(*data++); // SPI.transfer(*data++); spi_.write(*data++); } // nCS_ = 1; // digitalWrite(nCS_, HIGH); nCS_.write(HIGH); int originalMode = mode; setTransmitMode(); enable(); // delayMicroseconds(_NRF24L01P_TIMING_Thce_us); _delay_us(_NRF24L01P_TIMING_Thce_us); disable(); while ( !( getStatusRegister() & _NRF24L01P_STATUS_TX_DS ) ) { // Wait for the transfer to complete } // Clear the Status bit setRegister(_NRF24L01P_REG_STATUS, _NRF24L01P_STATUS_TX_DS); if ( originalMode == _NRF24L01P_MODE_RX ) { setReceiveMode(); } // ce_ = originalCe; // digitalWrite(ce_, originalCe); ce_.write(originalCe); // delayMicroseconds( _NRF24L01P_TIMING_Tpece2csn_us ); _delay_us(_NRF24L01P_TIMING_Tpece2csn_us); return count; }
void setupSwitch(void) { int s = socket(AF_INET, SOCK_DGRAM, 0); if (s < 0) { return; } // setRegister(s,0x02,0xa0); // Enable 8021Q (80) and IGMP snooping (40) // setRegister(s,0x05,0xa0); // vlan1: valid,5,2,1 port fid=1 vid=1 // setRegister(s,0x76,0x21); // setRegister(s,0x77,0x10); // setRegister(s,0x78,0x01); // write (04) and trigger address 0 // setRegister(s,0x6E,0x04); // setRegister(s,0x6F,0x00); // vlan2: valid,5,4,3 port fid=2 vid=2 // setRegister(s,0x76,0x3E); // setRegister(s,0x77,0x20); // setRegister(s,0x78,0x02); // write (04) and trigger address 0 // setRegister(s,0x6E,0x04); // setRegister(s,0x6F,0x01); // config port 1,2 to VLAN id 1 setRegister(s, 0x14, 0x01); // config port 1,2 to filter vid 1 setRegister(s, 0x12, 0x46); // config port 3,4 to VLAN id 2 setRegister(s, 0x24, 0x02); setRegister(s, 0x34, 0x02); setRegister(s, 0x44, 0x02); setRegister(s, 0x54, 0x02); // config port 3,4 to filter vid 2 setRegister(s, 0x22, 0x46); setRegister(s, 0x32, 0x46); setRegister(s, 0x42, 0x46); setRegister(s, 0x52, 0x46); // for IGMP, disenable special tagging // setRegister(s,0x0b,0x01); // enable vlan tag insertion por 5 // setRegister(s,0x50,0x04); // setRegister(s,0x52,0x06); // remove it from all others setRegister(s, 0x10, 0x02); setRegister(s, 0x20, 0x02); setRegister(s, 0x30, 0x02); setRegister(s, 0x40, 0x02); setRegister(s, 0x50, 0x02); // switch enable setRegister(s, 0x01, 0x01); close(s); }
void nRF24L01P::disableAllRxPipes(void) { setRegister(_NRF24L01P_REG_EN_RXADDR, _NRF24L01P_EN_RXADDR_NONE); }
void CameraOV7670Registers::setManualContrastCenter(uint8_t contrastCenter) { setRegisterBitsAND(MTXS, 0x7F); // disable auto contrast setRegister(REG_CONTRAST_CENTER, contrastCenter); }
void CameraOV7670Registers::setContrast(uint8_t contrast) { // default 0x40 setRegister(REG_CONTRAS, contrast); }
/* * Reister to Register Transfer * Rn <- [Rp]. * * 13 Rn Rp * * Rn is assigned the contents of Rp, n, p{0..3} */ void o13(Vm* vm){ setRegister(vm, charToInt(vm->IR[3]), getRegister(vm, charToInt(vm->IR[5]))); }
/* * Load Register from Accumulator * Rn <- [Acc]. * * 15 Rn * * Register Rn, n{0..3} assigned the contents of the accumulator */ void o15(Vm* vm){ setRegister(vm, charToInt(vm->IR[3]),vm->ACC); }
/* * Load Register R0 Immediate * R0 <- XXXX. * * 12 XX XX * * Load Register R0 with integer value XXXX, X{0..9} */ void o12(Vm* vm){ setRegister(vm, 0, charArrayToInt(2,6,vm->IR)); }
/* * Load Register from memory: Direct Addressing * Rn <- M(XX). * * 11 Rn XX * * Load Register Rn, n{0..3}, with the contents of memory location XX, X{0..9} */ void o11(Vm* vm){ setRegister(vm, charToInt(vm->IR[3]), charArrayToInt(0,6,vm->memory[charArrayToInt(4,6,vm->IR)])); }
/* * Load Register from memory: Register Addressing * Rn <- M(Pn). * * 10 Rn Pn * * Load Register Rn with the contents of memory location pointed to by Pn, n{0..3} */ void o10(Vm* vm){ setRegister(vm, charToInt(vm->IR[3]), charArrayToInt(0,6,vm->memory[getPointer(vm, charToInt(vm->IR[5]))])); }
// sets brightness of the display void Matrix::setBrightness(uint8_t value) { setRegister(REG_INTENSITY, value & 0x0F); }
void CameraOV7670Registers::setBrightness(uint8_t birghtness) { setRegister(REG_BRIGHT, birghtness); }
BOOT_CODE bool_t create_initial_thread( cap_t root_cnode_cap, cap_t it_pd_cap, vptr_t ui_v_entry, vptr_t bi_frame_vptr, vptr_t ipcbuf_vptr, cap_t ipcbuf_cap ) { pptr_t pptr; cap_t cap; tcb_t* tcb; deriveCap_ret_t dc_ret; /* allocate TCB */ pptr = alloc_region(TCB_BLOCK_SIZE_BITS); if (!pptr) { printf("Kernel init failed: Unable to allocate tcb for initial thread\n"); return false; } memzero((void*)pptr, 1 << TCB_BLOCK_SIZE_BITS); tcb = TCB_PTR(pptr + TCB_OFFSET); tcb->tcbTimeSlice = CONFIG_TIME_SLICE; Arch_initContext(&tcb->tcbContext); /* derive a copy of the IPC buffer cap for inserting */ dc_ret = deriveCap(SLOT_PTR(pptr_of_cap(root_cnode_cap), BI_CAP_IT_IPCBUF), ipcbuf_cap); if (dc_ret.status != EXCEPTION_NONE) { printf("Failed to derive copy of IPC Buffer\n"); return false; } /* initialise TCB (corresponds directly to abstract specification) */ cteInsert( root_cnode_cap, SLOT_PTR(pptr_of_cap(root_cnode_cap), BI_CAP_IT_CNODE), SLOT_PTR(pptr, tcbCTable) ); cteInsert( it_pd_cap, SLOT_PTR(pptr_of_cap(root_cnode_cap), BI_CAP_IT_VSPACE), SLOT_PTR(pptr, tcbVTable) ); cteInsert( dc_ret.cap, SLOT_PTR(pptr_of_cap(root_cnode_cap), BI_CAP_IT_IPCBUF), SLOT_PTR(pptr, tcbBuffer) ); tcb->tcbIPCBuffer = ipcbuf_vptr; setRegister(tcb, capRegister, bi_frame_vptr); setNextPC(tcb, ui_v_entry); /* initialise TCB */ tcb->tcbPriority = seL4_MaxPrio; setupReplyMaster(tcb); setThreadState(tcb, ThreadState_Running); ksSchedulerAction = SchedulerAction_ResumeCurrentThread; ksCurThread = ksIdleThread; ksCurDomain = ksDomSchedule[ksDomScheduleIdx].domain; ksDomainTime = ksDomSchedule[ksDomScheduleIdx].length; assert(ksCurDomain < CONFIG_NUM_DOMAINS && ksDomainTime > 0); /* initialise current thread pointer */ switchToThread(tcb); /* initialises ksCurThread */ /* create initial thread's TCB cap */ cap = cap_thread_cap_new(TCB_REF(tcb)); write_slot(SLOT_PTR(pptr_of_cap(root_cnode_cap), BI_CAP_IT_TCB), cap); #ifdef DEBUG setThreadName(tcb, "rootserver"); #endif return true; }
bool CameraOV7670Registers::resetSettings() { bool isSuccessful = setRegister(REG_COM7, COM7_RESET); delay(500); return isSuccessful; }
void doPollFailedTransfer(tcb_t *thread) { /* Set the badge register to 0 to indicate there was no message */ setRegister(thread, badgeRegister, 0); }
void CameraOV7670Registers::setRegisterBitsAND(uint8_t addr, uint8_t bits) { uint8_t val = readRegister(addr); setRegister(addr, val & bits); }
void nRF24L01P::disableAutoAcknowledge(void) { setRegister(_NRF24L01P_REG_EN_AA, _NRF24L01P_EN_AA_NONE); }
void CameraOV7670Registers::setInternalClockPreScaler(int preScaler) { setRegister(REG_CLKRC, 0x80 | preScaler); // f = input / (val + 1) }
void nRF24L01P::setRxAddress(unsigned long long address, int width, int pipe) { if ( ( pipe < NRF24L01P_PIPE_P0 ) || ( pipe > NRF24L01P_PIPE_P5 ) ) { // error( "nRF24L01P: Invalid setRxAddress pipe number %d\r\n", pipe ); Serial.println("nRF24L01P: Invalid setRxAddress pipe number"); return; } if ( ( pipe == NRF24L01P_PIPE_P0 ) || ( pipe == NRF24L01P_PIPE_P1 ) ) { int setupAw = getRegister(_NRF24L01P_REG_SETUP_AW) & ~_NRF24L01P_SETUP_AW_AW_MASK; switch ( width ) { case 3: setupAw |= _NRF24L01P_SETUP_AW_AW_3BYTE; break; case 4: setupAw |= _NRF24L01P_SETUP_AW_AW_4BYTE; break; case 5: setupAw |= _NRF24L01P_SETUP_AW_AW_5BYTE; break; default: // error( "nRF24L01P: Invalid setRxAddress width setting %d\r\n", width ); Serial.println("nRF24L01P: Invalid setRxAddress width setting"); return; } setRegister(_NRF24L01P_REG_SETUP_AW, setupAw); } else { width = 1; } int rxAddrPxRegister = _NRF24L01P_REG_RX_ADDR_P0 + ( pipe - NRF24L01P_PIPE_P0 ); int cn = (_NRF24L01P_SPI_CMD_WR_REG | (rxAddrPxRegister & _NRF24L01P_REG_ADDRESS_MASK)); // nCS_ = 0; // digitalWrite(nCS_, LOW); nCS_.write(LOW); // int status = spi_.write(cn); // int status = SPI.transfer(cn); spi_.write(cn); while ( width-- > 0 ) { // // LSByte first // // spi_.write((int) (address & 0xFF)); // SPI.transfer(address & 0xFF); spi_.write(address & 0xFF); address >>= 8; } // nCS_ = 1; // digitalWrite(nCS_, HIGH); nCS_.write(HIGH); int enRxAddr = getRegister(_NRF24L01P_REG_EN_RXADDR); enRxAddr |= (1 << ( pipe - NRF24L01P_PIPE_P0 ) ); setRegister(_NRF24L01P_REG_EN_RXADDR, enRxAddr); }
void CameraOV7670Registers::setPLLMultiplier(uint8_t multiplier) { uint8_t mask = 0b11000000; uint8_t currentValue = readRegister(DBLV); setRegister(DBLV, (currentValue & ~mask) | (multiplier << 6)); }
int nRF24L01P::read(int pipe, char *data, int count) { if ( ( pipe < NRF24L01P_PIPE_P0 ) || ( pipe > NRF24L01P_PIPE_P5 ) ) { // error( "nRF24L01P: Invalid read pipe number %d\r\n", pipe ); return -1; } if ( count <= 0 ) return 0; if ( count > _NRF24L01P_RX_FIFO_SIZE ) count = _NRF24L01P_RX_FIFO_SIZE; if ( readable(pipe) ) { // nCS_ = 0; // digitalWrite(nCS_, LOW); nCS_.write(LOW); // int status = spi_.write(_NRF24L01P_SPI_CMD_R_RX_PL_WID); // int status = SPI.transfer(_NRF24L01P_SPI_CMD_R_RX_PL_WID); // int status = spi_.write(_NRF24L01P_SPI_CMD_R_RX_PL_WID); spi_.write(_NRF24L01P_SPI_CMD_R_RX_PL_WID); // int rxPayloadWidth = spi_.write(_NRF24L01P_SPI_CMD_NOP); // int rxPayloadWidth = SPI.transfer(_NRF24L01P_SPI_CMD_NOP); int rxPayloadWidth = spi_.write(_NRF24L01P_SPI_CMD_NOP); // nCS_ = 1; // digitalWrite(nCS_, HIGH); nCS_.write(HIGH); if ( ( rxPayloadWidth < 0 ) || ( rxPayloadWidth > _NRF24L01P_RX_FIFO_SIZE ) ) { // Received payload error: need to flush the FIFO // nCS_ = 0; // digitalWrite(nCS_, LOW); nCS_.write(LOW); // int status = spi_.write(_NRF24L01P_SPI_CMD_FLUSH_RX); spi_.write(_NRF24L01P_SPI_CMD_FLUSH_RX); // int rxPayloadWidth = spi_.write(_NRF24L01P_SPI_CMD_NOP); spi_.write(_NRF24L01P_SPI_CMD_NOP); // nCS_ = 1; // digitalWrite(nCS_, HIGH); nCS_.write(HIGH); // // At this point, we should retry the reception, // but for now we'll just fall through... // } else { if ( rxPayloadWidth < count ) count = rxPayloadWidth; // nCS_ = 0; // digitalWrite(nCS_, LOW); nCS_.write(LOW); // int status = spi_.write(_NRF24L01P_SPI_CMD_RD_RX_PAYLOAD); // int status = SPI.transfer(_NRF24L01P_SPI_CMD_RD_RX_PAYLOAD); // int status = spi_.write(_NRF24L01P_SPI_CMD_RD_RX_PAYLOAD); spi_.write(_NRF24L01P_SPI_CMD_RD_RX_PAYLOAD); for ( int i = 0; i < count; i++ ) { // *data++ = spi_.write(_NRF24L01P_SPI_CMD_NOP); // *data++ = SPI.transfer(_NRF24L01P_SPI_CMD_NOP); *data++ = spi_.write(_NRF24L01P_SPI_CMD_NOP); } // nCS_ = 1; // digitalWrite(nCS_, HIGH); nCS_.write(HIGH); // Clear the Status bit setRegister(_NRF24L01P_REG_STATUS, _NRF24L01P_STATUS_RX_DR); return count; } } else { // // What should we do if there is no 'readable' data? // We could wait for data to arrive, but for now, we'll // just return with no data. // return 0; } // // We get here because an error condition occured; // We could wait for data to arrive, but for now, we'll // just return with no data. // return -1; }
void load_plugins( string path, map<string, Command_Rights>& plugins, list<Plugin*>& liste) { void(*sendMsg)(void(*)(const string, const string)); void(*setColor)(string(*)(const string, const string)); void(*setRegister)(void(*)(ScheduleDetails)); void(*setGenerate)(ScheduleDetails(*)(vector<string>)); void(*setCall)(void(*)(string,vector<string>, string)); void(*setSay)(void(*)(string)); void(*setCreateTable)(bool(*)(string)); void(*setSqlCmd)(bool(*)(string)); struct dirent* dp; DIR* dir = opendir( path.c_str()); if( !dir) { cout << "opendir() failure; terminating" << endl; return; } while( (dp = readdir( dir)) != nullptr) { if( !strcmp( &dp->d_name[strlen(dp->d_name)-3], ".so") || !strcmp( &dp->d_name[strlen(dp->d_name)-4], ".dll")) { string name = path; name += dp->d_name; cout << "Loading: " << name << endl; void* lib_handle = dlopen( name.c_str(), RTLD_LAZY); if( !lib_handle) { cerr << dlerror() << endl; exit(1); } char* error; PluginDetails* info; info = reinterpret_cast<PluginDetails*>(dlsym(lib_handle, "exports")); if( (error = dlerror()) != NULL) { cerr << error << endl; exit(2); } *(void**)(&sendMsg) = dlsym(lib_handle, "set_send_msg"); if( !sendMsg) { cerr << dlerror() << endl; exit(3); } sendMsg(send_msg); *(void**)(&setColor) = dlsym(lib_handle, "set_add_color"); if( !setColor) { cerr << dlerror() << endl; exit(3); } setColor( add_color); *(void**)(&setRegister) = dlsym(lib_handle, "set_add_reg_task"); if( !setRegister) { cerr << dlerror() << endl; exit(3); } setRegister( register_task); *(void**)(&setGenerate) = dlsym(lib_handle, "set_generate_schedule"); if( !setGenerate) { cerr << dlerror() << endl; exit(3); } setGenerate( generate_task); *(void**)(&setCall) = dlsym(lib_handle, "set_call"); if( !setCall) { cerr << dlerror() << endl; exit(3); } setCall( call); *(void**)(&setSay) = dlsym(lib_handle, "set_say"); if( !setSay) { cerr << dlerror() << endl; exit(3); } setSay( say); *(void**)(&setCreateTable) = dlsym(lib_handle, "set_create_table"); if( !setCreateTable) { cerr << dlerror() << endl; exit(3); } setCreateTable( create_table); *(void**)(&setSqlCmd) = dlsym(lib_handle, "set_sql"); if( !setSqlCmd) { cerr << dlerror() << endl; exit(3); } setSqlCmd( sql_command); cout << "Plugin info: " << "\nFile Name: " << info->file_name << endl; cout << "Class name: " << info->class_name << endl; cout << "plugin name: " << info->plugin_name << endl; cout << "Command: " << info->command << endl; Plugin* pl = info->initFunc(); pl->set_handle(lib_handle); list_commands( info->command, pl, plugins,liste); } } }
void CodecController::softMute(bool mute){ if(mute) setRegister(DIGITAL_AUDIO_PATH_CONTROL_REGISTER, WM8731_DACMU); else clearRegister(DIGITAL_AUDIO_PATH_CONTROL_REGISTER, WM8731_DACMU); }
// sets how many digits are displayed void Matrix::setScanLimit(uint8_t value) { setRegister(REG_SCANLIMIT, value & 0x07); }
void CodecController::setOutputMuteRight(bool mute){ if(mute) setRegister(RIGHT_HEADPHONE_OUT_REGISTER, WM8731_HPVOL_MUTE); else clearRegister(RIGHT_HEADPHONE_OUT_REGISTER, WM8731_HPVOL_MUTE); }
void #ifdef ARCH_X86 NORETURN #endif fastpath_call(word_t cptr, word_t msgInfo) { seL4_MessageInfo_t info; cap_t ep_cap; endpoint_t *ep_ptr; word_t length; tcb_t *dest; word_t badge; cte_t *replySlot, *callerSlot; cap_t newVTable; pde_t *cap_pd; pde_t stored_hw_asid; word_t fault_type; /* Get message info, length, and fault type. */ info = messageInfoFromWord_raw(msgInfo); length = seL4_MessageInfo_get_length(info); fault_type = fault_get_faultType(ksCurThread->tcbFault); #ifdef CONFIG_BENCHMARK_TRACK_KERNEL_ENTRIES ksKernelEntry.path = Entry_Syscall; ksKernelEntry.syscall_no = SysCall; ksKernelEntry.cap_type = cap_endpoint_cap; ksKernelEntry.invocation_tag = seL4_MessageInfo_get_label(info); ksKernelEntry.is_fastpath = true; benchmark_track_start(); #endif #ifdef CONFIG_BENCHMARK_TRACK_UTILISATION benchmark_utilisation_kentry_stamp(); #endif /* CONFIG_BENCHMARK_TRACK_UTILISATION */ /* Check there's no extra caps, the length is ok and there's no * saved fault. */ if (unlikely(fastpath_mi_check(msgInfo) || fault_type != fault_null_fault)) { slowpath(SysCall); } /* Lookup the cap */ ep_cap = lookup_fp(TCB_PTR_CTE_PTR(ksCurThread, tcbCTable)->cap, cptr); /* Check it's an endpoint */ if (unlikely(!cap_capType_equals(ep_cap, cap_endpoint_cap) || !cap_endpoint_cap_get_capCanSend(ep_cap))) { slowpath(SysCall); } /* Get the endpoint address */ ep_ptr = EP_PTR(cap_endpoint_cap_get_capEPPtr(ep_cap)); /* Get the destination thread, which is only going to be valid * if the endpoint is valid. */ dest = TCB_PTR(endpoint_ptr_get_epQueue_head(ep_ptr)); /* Check that there's a thread waiting to receive */ if (unlikely(endpoint_ptr_get_state(ep_ptr) != EPState_Recv)) { slowpath(SysCall); } /* Get destination thread.*/ newVTable = TCB_PTR_CTE_PTR(dest, tcbVTable)->cap; /* Get vspace root. */ #if defined(ARCH_ARM) || !defined(CONFIG_PAE_PAGING) cap_pd = PDE_PTR(cap_page_directory_cap_get_capPDBasePtr(newVTable)); #else cap_pd = PDE_PTR(cap_pdpt_cap_get_capPDPTBasePtr(newVTable)); #endif /* Ensure that the destination has a valid VTable. */ if (unlikely(! isValidVTableRoot_fp(newVTable))) { slowpath(SysCall); } #ifdef ARCH_ARM /* Get HW ASID */ stored_hw_asid = cap_pd[PD_ASID_SLOT]; #endif /* Ensure the destination has a higher/equal priority to us. */ if (unlikely(dest->tcbPriority < ksCurThread->tcbPriority)) { slowpath(SysCall); } /* Ensure that the endpoint has has grant rights so that we can * create the reply cap */ if (unlikely(!cap_endpoint_cap_get_capCanGrant(ep_cap))) { slowpath(SysCall); } #ifdef ARCH_ARM if (unlikely(!pde_pde_invalid_get_stored_asid_valid(stored_hw_asid))) { slowpath(SysCall); } #endif /* Ensure the original caller is in the current domain and can be scheduled directly. */ if (unlikely(dest->tcbDomain != ksCurDomain && maxDom)) { slowpath(SysCall); } /* * --- POINT OF NO RETURN --- * * At this stage, we have committed to performing the IPC. */ #ifdef ARCH_X86 /* Need to update NextIP in the calling thread */ setRegister(ksCurThread, NextIP, getRegister(ksCurThread, NextIP) + 2); #endif /* Dequeue the destination. */ endpoint_ptr_set_epQueue_head_np(ep_ptr, TCB_REF(dest->tcbEPNext)); if (unlikely(dest->tcbEPNext)) { dest->tcbEPNext->tcbEPPrev = NULL; } else { endpoint_ptr_mset_epQueue_tail_state(ep_ptr, 0, EPState_Idle); } badge = cap_endpoint_cap_get_capEPBadge(ep_cap); /* Block sender */ thread_state_ptr_set_tsType_np(&ksCurThread->tcbState, ThreadState_BlockedOnReply); /* Get sender reply slot */ replySlot = TCB_PTR_CTE_PTR(ksCurThread, tcbReply); /* Get dest caller slot */ callerSlot = TCB_PTR_CTE_PTR(dest, tcbCaller); /* Insert reply cap */ cap_reply_cap_ptr_new_np(&callerSlot->cap, 0, TCB_REF(ksCurThread)); mdb_node_ptr_set_mdbPrev_np(&callerSlot->cteMDBNode, CTE_REF(replySlot)); mdb_node_ptr_mset_mdbNext_mdbRevocable_mdbFirstBadged( &replySlot->cteMDBNode, CTE_REF(callerSlot), 1, 1); fastpath_copy_mrs (length, ksCurThread, dest); /* Dest thread is set Running, but not queued. */ thread_state_ptr_set_tsType_np(&dest->tcbState, ThreadState_Running); switchToThread_fp(dest, cap_pd, stored_hw_asid); msgInfo = wordFromMessageInfo(seL4_MessageInfo_set_capsUnwrapped(info, 0)); #ifdef CONFIG_BENCHMARK_TRACK_KERNEL_ENTRIES benchmark_track_exit(); #endif fastpath_restore(badge, msgInfo, ksCurThread); }