/* Initizes the board specific fastboot Returns 0 on success Returns 1 on failure */ int fastboot_init(struct cmd_fastboot_interface *interface) { int ret = 1; // usbd init fboot_usbctl_init(); device_strings[DEVICE_STRING_MANUFACTURER_INDEX] = "Samsung S.LSI"; device_strings[DEVICE_STRING_PRODUCT_INDEX] = "smdk"; set_serial_number(); /* These are just made up */ device_strings[DEVICE_STRING_CONFIG_INDEX] = "Android Fastboot"; device_strings[DEVICE_STRING_INTERFACE_INDEX] = "Android Fastboot"; /* The interface structure */ fastboot_interface = interface; fastboot_interface->product_name = device_strings[DEVICE_STRING_PRODUCT_INDEX]; fastboot_interface->serial_no = device_strings[DEVICE_STRING_SERIAL_NUMBER_INDEX]; fastboot_interface->nand_block_size = CFG_FASTBOOT_PAGESIZE * 64; fastboot_interface->transfer_buffer = (unsigned char *) CFG_FASTBOOT_TRANSFER_BUFFER; fastboot_interface->transfer_buffer_size = CFG_FASTBOOT_TRANSFER_BUFFER_SIZE; memset((unsigned char *) CFG_FASTBOOT_TRANSFER_BUFFER, 0x0, FASTBOOT_REBOOT_MAGIC_SIZE); ret = 0; // This is a fake return value, because we do not initialize USB yet! return ret; }
/*---------------------------------------------------------------------------*/ PROCESS_THREAD(usb_serial_process, ev, data) { PROCESS_BEGIN(); set_serial_number(); usb_setup(); usb_cdc_acm_setup(); usb_set_global_event_process(&usb_serial_process); usb_cdc_acm_set_event_process(&usb_serial_process); usb_set_ep_event_process(EPIN, &usb_serial_process); usb_set_ep_event_process(EPOUT, &usb_serial_process); while(1) { PROCESS_WAIT_EVENT(); if(ev == PROCESS_EVENT_EXIT) { break; } if(ev == PROCESS_EVENT_POLL) { do_work(); } } PROCESS_END(); }
/******************************************************************** * 初期化関数 ******************************************************************** */ static void InitializeSystem(void) { #if RAM_SERIAL extern void set_serial_number(void); set_serial_number(); #endif #if defined(__18F14K50) // 入力ピンをデジタルモードにする. ANSEL=0; ANSELH=0; #endif ADCON1 = 0x0F; //Need to make sure RB4 can be used as a digital input pin #if 1 // HIDaspx , PICwriter用 portb,portcを全入力にする. TRISB = 0xFF; TRISC = 0xFF; #endif #if defined(USE_USB_BUS_SENSE_IO) tris_usb_bus_sense = INPUT_PIN; #endif #if defined(USE_SELF_POWER_SENSE_IO) tris_self_power = INPUT_PIN; #endif mInitializeUSBDriver(); UserInit(); #if USE_PS2KEYBOARD // PS/2キーボードI/F を使用する. kbd_init(); #endif #if TIMER2_INTERRUPT // timer2_init(0x80 |(15<<3)| 2,255); // 割り込みON,postscale 1/16,prescale 1/16,1/256 = 183.10 H // timer2_init(0x80 |(14<<3)| 2,249); // 割り込みON,postscale 1/15,prescale 1/16,1/250 = 200Hz // timer2_init(0x80 |(14<<3)| 2, 49); // 割り込みON,postscale 1/15,prescale 1/16,1/50 = 1000Hz timer2_init(0x80 |(14<<3)| 2, 4); // 割り込みON,postscale 1/15,prescale 1/16,1/5 = 10kHz // 割り込み許可. InitTimer2InterruptLow(); // Timer2割り込みを low Priorityに設定する. #else INTCONbits.GIEL = 0; // Low Priority 割り込みを禁止. INTCONbits.GIEH = 0; // High Priority 割り込みを禁止. #endif }
int misc_init_r(void) { uint32_t pbcr; int size_val; uint32_t reg; unsigned long usb2d0cr = 0; unsigned long usb2phy0cr, usb2h0cr = 0; unsigned long sdr0_pfc1; uint32_t const flash1_size = gd->bd->bi_flashsize - CONFIG_SYS_FLASH0_SIZE; char const *const act = getenv("usbact"); char const *const usbcf = getenv("korat_usbcf"); /* * Re-do FLASH1 sizing and adjust flash start and offset. */ gd->bd->bi_flashstart = CONFIG_SYS_FLASH1_TOP - flash1_size; gd->bd->bi_flashoffset = 0; mtdcr(EBC0_CFGADDR, PB1CR); pbcr = mfdcr(EBC0_CFGDATA); size_val = ffs(flash1_size) - 21; pbcr = (pbcr & 0x0001ffff) | gd->bd->bi_flashstart | (size_val << 17); mtdcr(EBC0_CFGADDR, PB1CR); mtdcr(EBC0_CFGDATA, pbcr); /* * Re-check to get correct base address */ flash_get_size(gd->bd->bi_flashstart, 0); /* * Re-do FLASH1 sizing and adjust flash offset to reserve space for * environment */ gd->bd->bi_flashoffset = CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - CONFIG_SYS_FLASH1_ADDR; mtdcr(EBC0_CFGADDR, PB1CR); pbcr = mfdcr(EBC0_CFGDATA); size_val = ffs(gd->bd->bi_flashsize - CONFIG_SYS_FLASH0_SIZE) - 21; pbcr = (pbcr & 0x0001ffff) | gd->bd->bi_flashstart | (size_val << 17); mtdcr(EBC0_CFGADDR, PB1CR); mtdcr(EBC0_CFGDATA, pbcr); /* Monitor protection ON by default */ #if defined(CONFIG_KORAT_PERMANENT) (void)flash_protect(FLAG_PROTECT_SET, CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN - 1, flash_info + 1); #else (void)flash_protect(FLAG_PROTECT_SET, CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN - 1, flash_info); #endif /* Env protection ON by default */ (void)flash_protect(FLAG_PROTECT_SET, CONFIG_ENV_ADDR, CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1, flash_info); (void)flash_protect(FLAG_PROTECT_SET, CONFIG_ENV_ADDR_REDUND, CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1, flash_info); /* * USB suff... */ /* * Select the USB controller on the 440EPx ("ppc") or on the PCI bus * ("pci") for the CompactFlash. */ if (usbcf != NULL && (strcmp(usbcf, "ppc") == 0)) { /* * If environment variable "usbcf" is defined and set to "ppc", * then connect the CompactFlash controller to the PowerPC USB * port. */ printf("Attaching CompactFlash controller to PPC USB\n"); out_8((u8 *) CONFIG_SYS_CPLD_BASE + 0x02, in_8((u8 *) CONFIG_SYS_CPLD_BASE + 0x02) | 0x10); } else { if (usbcf != NULL && (strcmp(usbcf, "pci") != 0)) printf("Warning: \"korat_usbcf\" is not set to a legal " "value (\"ppc\" or \"pci\")\n"); printf("Attaching CompactFlash controller to PCI USB\n"); } if (act == NULL || strcmp(act, "hostdev") == 0) { /* SDR Setting */ mfsdr(SDR0_PFC1, sdr0_pfc1); mfsdr(SDR0_USB2D0CR, usb2d0cr); mfsdr(SDR0_USB2PHY0CR, usb2phy0cr); mfsdr(SDR0_USB2H0CR, usb2h0cr); usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_XOCLK_MASK; usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_XOCLK_EXTERNAL; usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_WDINT_MASK; usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_WDINT_16BIT_30MHZ; usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_DVBUS_MASK; usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DVBUS_PURDIS; usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_DWNSTR_MASK; usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DWNSTR_HOST; usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_UTMICN_MASK; usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_UTMICN_HOST; /* * An 8-bit/60MHz interface is the only possible alternative * when connecting the Device to the PHY */ usb2h0cr = usb2h0cr &~SDR0_USB2H0CR_WDINT_MASK; usb2h0cr = usb2h0cr | SDR0_USB2H0CR_WDINT_16BIT_30MHZ; /* * To enable the USB 2.0 Device function * through the UTMI interface */ usb2d0cr = usb2d0cr &~SDR0_USB2D0CR_USB2DEV_EBC_SEL_MASK; usb2d0cr = usb2d0cr | SDR0_USB2D0CR_USB2DEV_SELECTION; sdr0_pfc1 = sdr0_pfc1 &~SDR0_PFC1_UES_MASK; sdr0_pfc1 = sdr0_pfc1 | SDR0_PFC1_UES_USB2D_SEL; mtsdr(SDR0_PFC1, sdr0_pfc1); mtsdr(SDR0_USB2D0CR, usb2d0cr); mtsdr(SDR0_USB2PHY0CR, usb2phy0cr); mtsdr(SDR0_USB2H0CR, usb2h0cr); /* clear resets */ udelay(1000); mtsdr(SDR0_SRST1, 0x00000000); udelay(1000); mtsdr(SDR0_SRST0, 0x00000000); printf("USB: Host(int phy) Device(ext phy)\n"); } else if (strcmp(act, "dev") == 0) { /*-------------------PATCH-------------------------------*/ mfsdr(SDR0_USB2PHY0CR, usb2phy0cr); usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_XOCLK_MASK; usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_XOCLK_EXTERNAL; usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_DVBUS_MASK; usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DVBUS_PURDIS; usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_DWNSTR_MASK; usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DWNSTR_HOST; usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_UTMICN_MASK; usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_UTMICN_HOST; mtsdr(SDR0_USB2PHY0CR, usb2phy0cr); udelay(1000); mtsdr(SDR0_SRST1, 0x672c6000); udelay(1000); mtsdr(SDR0_SRST0, 0x00000080); udelay(1000); mtsdr(SDR0_SRST1, 0x60206000); *(unsigned int *)(0xe0000350) = 0x00000001; udelay(1000); mtsdr(SDR0_SRST1, 0x60306000); /*-------------------PATCH-------------------------------*/ /* SDR Setting */ mfsdr(SDR0_USB2PHY0CR, usb2phy0cr); mfsdr(SDR0_USB2H0CR, usb2h0cr); mfsdr(SDR0_USB2D0CR, usb2d0cr); mfsdr(SDR0_PFC1, sdr0_pfc1); usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_XOCLK_MASK; usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_XOCLK_EXTERNAL; usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_WDINT_MASK; usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_WDINT_8BIT_60MHZ; usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_DVBUS_MASK; usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DVBUS_PUREN; usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_DWNSTR_MASK; usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DWNSTR_DEV; usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_UTMICN_MASK; usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_UTMICN_DEV; usb2h0cr = usb2h0cr &~SDR0_USB2H0CR_WDINT_MASK; usb2h0cr = usb2h0cr | SDR0_USB2H0CR_WDINT_8BIT_60MHZ; usb2d0cr = usb2d0cr &~SDR0_USB2D0CR_USB2DEV_EBC_SEL_MASK; usb2d0cr = usb2d0cr | SDR0_USB2D0CR_EBC_SELECTION; sdr0_pfc1 = sdr0_pfc1 &~SDR0_PFC1_UES_MASK; sdr0_pfc1 = sdr0_pfc1 | SDR0_PFC1_UES_EBCHR_SEL; mtsdr(SDR0_USB2H0CR, usb2h0cr); mtsdr(SDR0_USB2PHY0CR, usb2phy0cr); mtsdr(SDR0_USB2D0CR, usb2d0cr); mtsdr(SDR0_PFC1, sdr0_pfc1); /* clear resets */ udelay(1000); mtsdr(SDR0_SRST1, 0x00000000); udelay(1000); mtsdr(SDR0_SRST0, 0x00000000); printf("USB: Device(int phy)\n"); } mfsdr(SDR0_SRST1, reg); /* enable security/kasumi engines */ reg &= ~(SDR0_SRST1_CRYP0 | SDR0_SRST1_KASU0); mtsdr(SDR0_SRST1, reg); /* * Clear PLB4A0_ACR[WRP] * This fix will make the MAL burst disabling patch for the Linux * EMAC driver obsolete. */ reg = mfdcr(PLB4_ACR) & ~PLB4_ACR_WRP; mtdcr(PLB4_ACR, reg); set_serial_number(); set_mac_addresses(); gpio_write_bit(CONFIG_SYS_GPIO_ATMEGA_RESET_, 1); return 0; }