static int handle_signal(unsigned long sig, struct k_sigaction *ka, siginfo_t *info, sigset_t *oldset, struct pt_regs *regs, unsigned int save_r0) { int ret; /* Are we from a system call? */ if (regs->tra >= 0) { /* If so, check system call restarting.. */ switch (regs->regs[0]) { case -ERESTART_RESTARTBLOCK: case -ERESTARTNOHAND: regs->regs[0] = -EINTR; break; case -ERESTARTSYS: if (!(ka->sa.sa_flags & SA_RESTART)) { regs->regs[0] = -EINTR; break; } /* fallthrough */ case -ERESTARTNOINTR: regs->regs[0] = save_r0; regs->pc -= instruction_size( ctrl_inw(regs->pc - 4)); break; } } else { /* gUSA handling */ #ifdef CONFIG_PREEMPT unsigned long flags; local_irq_save(flags); #endif if (regs->regs[15] >= 0xc0000000) { int offset = (int)regs->regs[15]; /* Reset stack pointer: clear critical region mark */ regs->regs[15] = regs->regs[1]; if (regs->pc < regs->regs[0]) /* Go to rewind point #1 */ regs->pc = regs->regs[0] + offset - instruction_size(ctrl_inw(regs->pc-4)); } #ifdef CONFIG_PREEMPT local_irq_restore(flags); #endif } /* Set up the stack frame */ if (ka->sa.sa_flags & SA_SIGINFO) ret = setup_rt_frame(sig, ka, info, oldset, regs); else ret = setup_frame(sig, ka, oldset, regs); if (ka->sa.sa_flags & SA_ONESHOT) ka->sa.sa_handler = SIG_DFL; if (ret == 0) { spin_lock_irq(¤t->sighand->siglock); sigorsets(¤t->blocked,¤t->blocked,&ka->sa.sa_mask); if (!(ka->sa.sa_flags & SA_NODEFER)) sigaddset(¤t->blocked,sig); recalc_sigpending(); spin_unlock_irq(¤t->sighand->siglock); } return ret; }
/* * OK, we're invoking a handler */ static int handle_signal(unsigned long sig, struct k_sigaction *ka, siginfo_t *info, sigset_t *oldset, struct pt_regs * regs, int syscall) { struct thread_info *thread = current_thread_info(); struct task_struct *tsk = current; int usig = sig; int ret; /* * If we were from a system call, check for system call restarting... */ if (syscall) { switch (regs->ARM_r0) { case -ERESTART_RESTARTBLOCK: case -ERESTARTNOHAND: regs->ARM_r0 = -EINTR; break; case -ERESTARTSYS: if (!(ka->sa.sa_flags & SA_RESTART)) { regs->ARM_r0 = -EINTR; break; } /* fallthrough */ case -ERESTARTNOINTR: setup_syscall_restart(regs); } } /* * translate the signal */ if (usig < 32 && thread->exec_domain && thread->exec_domain->signal_invmap) usig = thread->exec_domain->signal_invmap[usig]; /* * Set up the stack frame */ if (ka->sa.sa_flags & SA_SIGINFO) ret = setup_rt_frame(usig, ka, info, oldset, regs); else ret = setup_frame(usig, ka, oldset, regs); /* * Check that the resulting registers are actually sane. */ ret |= !valid_user_regs(regs); if (ret != 0) { force_sigsegv(sig, tsk); return ret; } /* * Block the signal if we were successful. */ spin_lock_irq(&tsk->sighand->siglock); sigorsets(&tsk->blocked, &tsk->blocked, &ka->sa.sa_mask); if (!(ka->sa.sa_flags & SA_NODEFER)) sigaddset(&tsk->blocked, sig); recalc_sigpending(); spin_unlock_irq(&tsk->sighand->siglock); return 0; }
int asill_sel_pclk(struct asill_s *A, int pclk) { A->pclk = pclk; return setup_frame(A); }
static void init(struct asill_s *A) { float T55, T70; pthread_mutex_lock(&A->cmd_lock); send_ctrl(A, 0xa4); send_ctrl(A, 0xab); send_ctrl(A, 0xaa); set_reg(A, MT9M034_RESET_REGISTER, 0x0001); sleep_ms(A, 101); set_reg(A, MT9M034_SEQ_CTRL_PORT, 0x8000); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x0225); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x5050); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x2d26); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x0828); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x0d17); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x0926); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x0028); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x0526); set_reg(A, MT9M034_SEQ_DATA_PORT, 0xa728); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x0725); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x8080); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x2917); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x0525); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x0040); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x2702); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x1616); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x2706); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x1736); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x26a6); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x1703); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x26a4); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x171f); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x2805); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x2620); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x2804); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x2520); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x2027); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x0017); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x1e25); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x0020); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x2117); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x1028); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x051b); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x1703); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x2706); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x1703); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x1747); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x2660); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x17ae); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x2500); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x9027); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x0026); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x1828); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x002e); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x2a28); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x081e); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x0831); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x1440); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x4014); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x2020); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x1410); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x1034); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x1400); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x1014); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x0020); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x1400); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x4013); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x1802); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x1470); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x7004); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x1470); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x7003); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x1470); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x7017); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x2002); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x1400); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x2002); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x1400); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x5004); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x1400); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x2004); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x1400); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x5022); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x0314); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x0020); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x0314); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x0050); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x2c2c); set_reg(A, MT9M034_SEQ_DATA_PORT, 0x2c2c); set_reg(A, MT9M034_ERS_PROG_START_ADDR, 0x0000); set_reg(A, MT9M034_RESET_REGISTER, 0x10d8); set_reg(A, MT9M034_MODE_CTRL, 0x0029); set_reg(A, MT9M034_DATA_PEDESTAL, 0x0000); set_reg(A, MT9M034_DAC_LD_14_15, 0x0f03); set_reg(A, MT9M034_DAC_LD_18_19, 0xc005); set_reg(A, MT9M034_DAC_LD_12_13, 0x09ef); set_reg(A, MT9M034_DAC_LD_22_23, 0xa46b); set_reg(A, MT9M034_DAC_LD_20_21, 0x047d); set_reg(A, MT9M034_DAC_LD_16_17, 0x0070); set_reg(A, MT9M034_DARK_CONTROL, 0x0404); set_reg(A, MT9M034_DAC_LD_26_27, 0x8303); // note: was set_reg(A, MT9M034_DAC_LD_24_25, 0xd308); // in driver, but DS says put low conversion gain for // column correction calibration. set_reg(A, MT9M034_DAC_LD_24_25, 0xd008); set_reg(A, MT9M034_DAC_LD_10_11, 0x00bd); set_reg(A, MT9M034_DAC_LD_26_27, 0x8303); set_reg(A, MT9M034_ADC_BITS_6_7, 0x6372); set_reg(A, MT9M034_ADC_BITS_4_5, 0x7253); set_reg(A, MT9M034_ADC_BITS_2_3, 0x5470); set_reg(A, MT9M034_ADC_CONFIG1, 0xc4cc); set_reg(A, MT9M034_ADC_CONFIG2, 0x8050); set_reg(A, MT9M034_DIGITAL_TEST, 0x5300); set_reg(A, MT9M034_COLUMN_CORRECTION, 0xe007); set_reg(A, MT9M034_DIGITAL_CTRL, 0x0008); set_reg(A, MT9M034_RESET_REGISTER, 0x10dc); set_reg(A, MT9M034_RESET_REGISTER, 0x10d8); set_reg(A, MT9M034_COARSE_INTEGRATION_TIME, 0x0fff); set_reg(A, MT9M034_DIGITAL_TEST, 0x5300); sleep_ms(A, 101); set_reg(A, MT9M034_EMBEDDED_DATA_CTRL, 0x1802); set_reg(A, 0x30b4, 0x0011); set_reg(A, MT9M034_AE_CTRL_REG, 0x0000); set_reg(A, MT9M034_READ_MODE, 0x4000); set_reg(A, MT9M034_DIGITAL_TEST, 0x1330); set_reg(A, MT9M034_GLOBAL_GAIN, 0x0024); sleep_ms(A, 19); set_reg(A, MT9M034_RED_GAIN, 0x0022); set_reg(A, MT9M034_BLUE_GAIN, 0x003e); set_reg(A, MT9M034_DATA_PEDESTAL, 0x0000); set_reg(A, MT9M034_LINE_LENGTH_PCK, 0x056e); set_reg(A, MT9M034_COARSE_INTEGRATION_TIME, 0x0473); #if 0 /* should be gain = 50 */ set_reg(A, MT9M034_DAC_LD_24_25, 0xd308); set_reg(A, MT9M034_GLOBAL_GAIN, 0x0024); set_reg(A, MT9M034_DIGITAL_TEST, 0x1330); #else /* unity gain digital, minum analog*/ set_reg(A, MT9M034_DIGITAL_TEST, 0x1300); set_reg(A, MT9M034_DAC_LD_24_25, 0xd008); set_reg(A, MT9M034_RED_GAIN, 0x0020); set_reg(A, MT9M034_BLUE_GAIN, 0x0020); set_reg(A, MT9M034_GREEN1_GAIN, 0x0020); set_reg(A, MT9M034_GREEN2_GAIN, 0x0020); set_reg(A, MT9M034_GLOBAL_GAIN, 0x0020); #endif /* read temperature coefficents */ T70 = get_reg_r(A, 0x30c6) & 0x7ff; T55 = get_reg_r(A, 0x30c8) & 0x7ff; A->Tk = (70.0 - 55.0) / (T70 - T55); A->T0 = 55.0 - A->Tk * T55; /* default flip for compatibility with yaaca zwo.c */ set_reg(A, MT9M034_READ_MODE, 0x0000); setup_frame(A); /* start capture */ send_ctrl(A, 0xaa); send_ctrl(A, 0xaf); sleep_ms(A, 100); send_ctrl(A, 0xa9); pthread_mutex_unlock(&A->cmd_lock); }
/* * OK, we're invoking a handler: */ static int handle_signal(unsigned long sig, siginfo_t *info, struct k_sigaction *ka, sigset_t *oldset, struct pt_regs *regs) { int ret; /* Are we from a system call? */ if ((long)regs->orig_ax >= 0) { /* If so, check system call restarting.. */ switch (regs->ax) { case -ERESTART_RESTARTBLOCK: case -ERESTARTNOHAND: regs->ax = -EINTR; break; case -ERESTARTSYS: if (!(ka->sa.sa_flags & SA_RESTART)) { regs->ax = -EINTR; break; } /* fallthrough */ case -ERESTARTNOINTR: regs->ax = regs->orig_ax; regs->ip -= 2; break; } } /* * If TF is set due to a debugger (TIF_FORCED_TF), clear the TF * flag so that register information in the sigcontext is correct. */ if (unlikely(regs->flags & X86_EFLAGS_TF) && likely(test_and_clear_thread_flag(TIF_FORCED_TF))) regs->flags &= ~X86_EFLAGS_TF; /* Set up the stack frame */ if (ka->sa.sa_flags & SA_SIGINFO) ret = setup_rt_frame(sig, ka, info, oldset, regs); else ret = setup_frame(sig, ka, oldset, regs); if (ret) return ret; /* * Clear the direction flag as per the ABI for function entry. */ regs->flags &= ~X86_EFLAGS_DF; /* * Clear TF when entering the signal handler, but * notify any tracer that was single-stepping it. * The tracer may want to single-step inside the * handler too. */ regs->flags &= ~X86_EFLAGS_TF; if (test_thread_flag(TIF_SINGLESTEP)) ptrace_notify(SIGTRAP); spin_lock_irq(¤t->sighand->siglock); sigorsets(¤t->blocked, ¤t->blocked, &ka->sa.sa_mask); if (!(ka->sa.sa_flags & SA_NODEFER)) sigaddset(¤t->blocked, sig); recalc_sigpending(); spin_unlock_irq(¤t->sighand->siglock); return 0; }
static inline void handle_signal(unsigned long sig, siginfo_t *info, struct k_sigaction *ka, sigset_t *oldset, struct pt_regs *regs) { switch(regs->regs[0]) { case ERESTART_RESTARTBLOCK: case ERESTARTNOHAND: regs->regs[2] = EINTR; break; case ERESTARTSYS: if(!(ka->sa.sa_flags & SA_RESTART)) { regs->regs[2] = EINTR; break; } /* fallthrough */ case ERESTARTNOINTR: /* Userland will reload $v0. */ regs->regs[7] = regs->regs[26]; regs->cp0_epc -= 8; } regs->regs[0] = 0; /* Don't deal with this again. */ #ifdef CONFIG_TRAD_SIGNALS if (ka->sa.sa_flags & SA_SIGINFO) { #else if (1) { #endif #ifdef CONFIG_MIPS32_N32 if ((current->thread.mflags & MF_ABI_MASK) == MF_N32) setup_rt_frame_n32 (ka, regs, sig, oldset, info); else #endif setup_rt_frame(ka, regs, sig, oldset, info); } #ifdef CONFIG_TRAD_SIGNALS else setup_frame(ka, regs, sig, oldset); #endif if (!(ka->sa.sa_flags & SA_NODEFER)) { spin_lock_irq(¤t->sighand->siglock); sigorsets(¤t->blocked,¤t->blocked,&ka->sa.sa_mask); sigaddset(¤t->blocked,sig); recalc_sigpending(); spin_unlock_irq(¤t->sighand->siglock); } } extern int do_signal32(sigset_t *oldset, struct pt_regs *regs); extern int do_irix_signal(sigset_t *oldset, struct pt_regs *regs); static int do_signal(sigset_t *oldset, struct pt_regs *regs) { struct k_sigaction ka; siginfo_t info; int signr; #ifdef CONFIG_BINFMT_ELF32 if ((current->thread.mflags & MF_ABI_MASK) == MF_O32) { return do_signal32(oldset, regs); } #endif /* * We want the common case to go fast, which is why we may in certain * cases get here from kernel mode. Just return without doing anything * if so. */ if (!user_mode(regs)) return 1; if (try_to_freeze()) goto no_signal; if (!oldset) oldset = ¤t->blocked; signr = get_signal_to_deliver(&info, &ka, regs, NULL); if (signr > 0) { handle_signal(signr, &info, &ka, oldset, regs); return 1; } no_signal: /* * Who's code doesn't conform to the restartable syscall convention * dies here!!! The li instruction, a single machine instruction, * must directly be followed by the syscall instruction. */ if (regs->regs[0]) { if (regs->regs[2] == ERESTARTNOHAND || regs->regs[2] == ERESTARTSYS || regs->regs[2] == ERESTARTNOINTR) { regs->regs[7] = regs->regs[26]; regs->cp0_epc -= 8; } if (regs->regs[2] == ERESTART_RESTARTBLOCK) { regs->regs[2] = __NR_restart_syscall; regs->regs[7] = regs->regs[26]; regs->cp0_epc -= 4; } } return 0; } /* * notification of userspace execution resumption * - triggered by current->work.notify_resume */ asmlinkage void do_notify_resume(struct pt_regs *regs, sigset_t *oldset, __u32 thread_info_flags) { /* deal with pending signal delivery */ if (thread_info_flags & _TIF_SIGPENDING) { #ifdef CONFIG_BINFMT_ELF32 if (likely((current->thread.mflags & MF_ABI_MASK) == MF_O32)) { do_signal32(oldset, regs); return; } #endif #ifdef CONFIG_BINFMT_IRIX if (unlikely(current->personality != PER_LINUX)) { do_irix_signal(oldset, regs); return; } #endif do_signal(oldset, regs); } }
static int handle_signal(unsigned long sig, struct k_sigaction *ka, siginfo_t *info, sigset_t *oldset, struct pt_regs *regs, int syscall) { struct thread_info *thread = current_thread_info(); struct task_struct *tsk = current; sigset_t blocked; int usig = sig; int ret; /* */ if (syscall) { switch (regs->UCreg_00) { case -ERESTART_RESTARTBLOCK: case -ERESTARTNOHAND: regs->UCreg_00 = -EINTR; break; case -ERESTARTSYS: if (!(ka->sa.sa_flags & SA_RESTART)) { regs->UCreg_00 = -EINTR; break; } /* */ case -ERESTARTNOINTR: setup_syscall_restart(regs); } } /* */ if (usig < 32 && thread->exec_domain && thread->exec_domain->signal_invmap) usig = thread->exec_domain->signal_invmap[usig]; /* */ if (ka->sa.sa_flags & SA_SIGINFO) ret = setup_rt_frame(usig, ka, info, oldset, regs); else ret = setup_frame(usig, ka, oldset, regs); /* */ ret |= !valid_user_regs(regs); if (ret != 0) { force_sigsegv(sig, tsk); return ret; } /* */ sigorsets(&blocked, &tsk->blocked, &ka->sa.sa_mask); if (!(ka->sa.sa_flags & SA_NODEFER)) sigaddset(&blocked, sig); set_current_blocked(&blocked); return 0; }