static int __init m80701_board_init(void) { /* dma */ #ifdef CONFIG_XBURST_DMAC platform_device_register(&jz_pdma_device); #endif /* i2c */ #ifdef CONFIG_I2C0_JZ4780 platform_device_register(&jz_i2c0_device); #endif #ifdef CONFIG_I2C1_JZ4780 platform_device_register(&jz_i2c1_device); #endif #ifdef CONFIG_I2C2_JZ4780 platform_device_register(&jz_i2c2_device); #endif #ifdef CONFIG_I2C3_JZ4780 platform_device_register(&jz_i2c3_device); #endif #ifdef CONFIG_I2C4_JZ4780 platform_device_register(&jz_i2c4_device); #endif /* ipu */ #ifdef CONFIG_JZ4780_IPU platform_device_register(&jz_ipu0_device); #endif #ifdef CONFIG_JZ4780_IPU platform_device_register(&jz_ipu1_device); #endif /* mmc */ #ifdef CONFIG_MMC2_JZ4780 jz_device_register(&jz_msc2_device, &m80701_tf_pdata); #endif #ifdef CONFIG_MMC1_JZ4780 jz_device_register(&jz_msc1_device, &m80701_sdio_pdata); #endif #ifdef CONFIG_MMC0_JZ4780 jz_device_register(&jz_msc0_device, &m80701_inand_pdata); #endif /* sound */ #ifdef CONFIG_SOUND_I2S_JZ47XX jz_device_register(&jz_i2s_device,&i2s_data); jz_device_register(&jz_mixer0_device,&snd_mixer0_data); #endif #ifdef CONFIG_SOUND_PCM_JZ47XX jz_device_register(&jz_pcm_device,&pcm_data); jz_device_register(&jz_mixer1_device,&snd_mixer1_data); #endif #ifdef CONFIG_JZ4780_INTERNAL_CODEC jz_device_register(&jz_codec_device, &codec_data); #endif /* GPU */ #ifdef CONFIG_PVR_SGX platform_device_register(&jz_gpu); #endif /* panel and bl */ #ifdef CONFIG_LCD_KR070LA0S_270 platform_device_register(&kr070la0s_270_device); #endif #ifdef CONFIG_LCD_EK070TN93 platform_device_register(&ek070tn93_device); #endif #ifdef CONFIG_LCD_HSD070IDW1 platform_device_register(&hsd070idw1_device); #endif #ifdef CONFIG_BACKLIGHT_PWM platform_device_register(&m80701_backlight_device); #endif /* lcdc framebuffer*/ #ifdef CONFIG_FB_JZ4780_LCDC1 jz_device_register(&jz_fb1_device, &jzfb1_pdata); #endif #ifdef CONFIG_FB_JZ4780_LCDC0 jz_device_register(&jz_fb0_device, &jzfb0_hdmi_pdata); #endif /* AOSD */ #ifdef CONFIG_JZ4780_AOSD platform_device_register(&jz_aosd_device); #endif /* ADC*/ #ifdef CONFIG_BATTERY_JZ4780 adc_platform_data.battery_info = m80701_battery_info; jz_device_register(&jz_adc_device,&adc_platform_data); #endif /* uart */ #ifdef CONFIG_SERIAL_JZ47XX_UART0 platform_device_register(&jz_uart0_device); #endif #ifdef CONFIG_SERIAL_JZ47XX_UART1 platform_device_register(&jz_uart1_device); #endif #ifdef CONFIG_SERIAL_JZ47XX_UART2 platform_device_register(&jz_uart2_device); #endif #ifdef CONFIG_SERIAL_JZ47XX_UART3 platform_device_register(&jz_uart3_device); #endif #ifdef CONFIG_SERIAL_JZ47XX_UART4 platform_device_register(&jz_uart4_device); #endif /* camera */ #ifdef CONFIG_JZ_CIM platform_device_register(&jz_cim_device); #endif /* x2d */ #ifdef CONFIG_JZ_X2D platform_device_register(&jz_x2d_device); #endif /* USB */ #ifdef CONFIG_USB_OHCI_HCD platform_device_register(&jz_ohci_device); #endif #ifdef CONFIG_USB_EHCI_HCD platform_device_register(&jz_ehci_device); #endif /* net */ #ifdef CONFIG_JZ_MAC platform_device_register(&jz_mac); #endif /* nand */ #ifdef CONFIG_NAND_DRIVER jz_device_register(&jz_nand_device, NULL); #endif /* hdmi */ #ifdef CONFIG_HDMI_JZ4780 platform_device_register(&jz_hdmi); #endif /* rtc */ #ifdef CONFIG_RTC_DRV_JZ4780 platform_device_register(&jz_rtc_device); #endif /* timed_gpio */ platform_device_register(&jz_timed_gpio_device); /* gpio keyboard */ #ifdef CONFIG_KEYBOARD_GPIO platform_device_register(&jz_button_device); #endif /* tcsm */ #ifdef CONFIG_JZ_VPU platform_device_register(&jz_vpu_device); #endif /* spi */ #ifdef CONFIG_SPI_JZ4780 #ifdef CONFIG_SPI0_JZ4780 spi_register_board_info(jz_spi0_board_info, ARRAY_SIZE(jz_spi0_board_info)); platform_device_register(&jz_ssi0_device); platform_device_add_data(&jz_ssi0_device, &spi0_info_cfg, sizeof(struct jz47xx_spi_info)); #endif #ifdef CONFIG_SPI1_JZ4780 spi_register_board_info(jz_spi1_board_info, ARRAY_SIZE(jz_spi1_board_info)); platform_device_register(&jz_ssi1_device); platform_device_add_data(&jz_ssi1_device, &spi1_info_cfg, sizeof(struct jz47xx_spi_info)); #endif #endif #ifdef CONFIG_SPI_GPIO spi_register_board_info(jz_spi0_board_info, ARRAY_SIZE(jz_spi0_board_info)); platform_device_register(&jz4780_spi_gpio_device); #endif return 0; }
static void __init smdkc110_machine_init(void) { /* i2c */ s3c_i2c0_set_platdata(NULL); s3c_i2c1_set_platdata(NULL); s3c_i2c2_set_platdata(NULL); s3c_i2c3_set_platdata(NULL); i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0)); i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1)); /* spi */ #if defined(CONFIG_SPI_CNTRLR_0) s3cspi_set_slaves(BUSNUM(0), ARRAY_SIZE(s3c_slv_pdata_0), s3c_slv_pdata_0); #endif #if defined(CONFIG_SPI_CNTRLR_1) s3cspi_set_slaves(BUSNUM(1), ARRAY_SIZE(s3c_slv_pdata_1), s3c_slv_pdata_1); #endif #if defined(CONFIG_SPI_CNTRLR_2) s3cspi_set_slaves(BUSNUM(2), ARRAY_SIZE(s3c_slv_pdata_2), s3c_slv_pdata_2); #endif spi_register_board_info(s3c_spi_devs, ARRAY_SIZE(s3c_spi_devs)); universal_wm8994_init(); universal_sdhci2_set_platdata(); #ifdef CONFIG_FB_S3C_LVDS s3cfb_set_platdata(&lvds_data); #endif /* pmem */ #ifdef CONFIG_ANDROID_PMEM android_pmem_set_platdata(); #endif /* fimc */ s3c_fimc0_set_platdata(&fimc_plat); s3c_fimc1_set_platdata(&fimc_plat); s3c_fimc2_set_platdata(&fimc_plat); s3c_csis_set_platdata(NULL); smdkc110_cam0_power(1); smdkc110_cam1_power(1); smdkc110_mipi_cam_power(1); /* ipc */ s3c_ipc_set_platdata(NULL); platform_add_devices(smdkc110_devices, ARRAY_SIZE(smdkc110_devices)); #if defined(CONFIG_PM) s5pc11x_pm_init(); #endif #if defined(CONFIG_HAVE_PWM) smdk_backlight_register(); #endif s3c_gpio_cfgpin( AP_I2C_SCL_28V, 1 ); s3c_gpio_setpull( AP_I2C_SCL_28V, S3C_GPIO_PULL_UP); s3c_gpio_cfgpin( AP_I2C_SDA_28V, 1 ); s3c_gpio_setpull( AP_I2C_SDA_28V, S3C_GPIO_PULL_UP); sec_class = class_create(THIS_MODULE, "sec"); }
static void spi_device_init(void) { spi_register_board_info(spi_nor_device, ARRAY_SIZE(spi_nor_device)); }
int __init mx51_babbage_init_mc13892(void) { return spi_register_board_info(&mc13892_spi_device, 1); }
static void spi_device_init(void) { spi_register_board_info(imx6_sabrelite_spi_nor_device, ARRAY_SIZE(imx6_sabrelite_spi_nor_device)); }
static void __init smdkv210_machine_init(void) { /* Find out S5PC110 chip version */ _hw_version_check(); /* OneNAND */ #ifdef CONFIG_MTD_ONENAND //s3c_device_onenand.dev.platform_data = &s5p_onenand_data; #endif #ifdef CONFIG_MTD_NAND //s3c_device_nand.dev.platform_data = &s5p_nand_data; #endif #ifdef CONFIG_DM9000 smdkv210_dm9000_set(); #endif #ifdef CONFIG_ANDROID_PMEM android_pmem_set_platdata(); #endif /* i2c */ s3c_i2c0_set_platdata(NULL); s3c_i2c1_set_platdata(NULL); s3c_i2c2_set_platdata(NULL); i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0)); i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1)); i2c_register_board_info(2, i2c_devs2, ARRAY_SIZE(i2c_devs2)); /* to support system shut down */ pm_power_off = smdkv210_power_off; #if defined(CONFIG_SPI_CNTRLR_0) s3cspi_set_slaves(BUSNUM(0), ARRAY_SIZE(s3c_slv_pdata_0), s3c_slv_pdata_0); #endif #if defined(CONFIG_SPI_CNTRLR_1) s3cspi_set_slaves(BUSNUM(1), ARRAY_SIZE(s3c_slv_pdata_1), s3c_slv_pdata_1); #endif #if defined(CONFIG_SPI_CNTRLR_2) s3cspi_set_slaves(BUSNUM(2), ARRAY_SIZE(s3c_slv_pdata_2), s3c_slv_pdata_2); #endif spi_register_board_info(s3c_spi_devs, ARRAY_SIZE(s3c_spi_devs)); #ifdef CONFIG_FB_S3C_LTE480WV s3cfb_set_platdata(<e480wv_fb_data); #endif #if defined(CONFIG_BLK_DEV_IDE_S3C) s3c_ide_set_platdata(&smdkv210_ide_pdata); #endif #if defined(CONFIG_TOUCHSCREEN_S3C) s3c_ts_set_platdata(&s3c_ts_platform); #endif #if defined(CONFIG_S5PV210_ADC) s3c_adc_set_platdata(&s3c_adc_platform); #endif #if defined(CONFIG_PM) s3c_pm_init(); #endif #ifdef CONFIG_VIDEO_FIMC /* fimc */ s3c_fimc0_set_platdata(&fimc_plat); s3c_fimc1_set_platdata(&fimc_plat); s3c_fimc2_set_platdata(&fimc_plat); s3c_csis_set_platdata(NULL); smdkv210_cam0_power(1); smdkv210_cam1_power(1); smdkv210_mipi_cam_reset(); #endif #ifdef CONFIG_VIDEO_MFC50 /* mfc */ s3c_mfc_set_platdata(NULL); #endif #ifdef CONFIG_VIDEO_TV20 s3c_set_qos(); #endif #ifdef CONFIG_S3C_DEV_HSMMC s5pv210_default_sdhci0(); #endif #ifdef CONFIG_S3C_DEV_HSMMC1 s5pv210_default_sdhci1(); #endif #ifdef CONFIG_S3C_DEV_HSMMC2 s5pv210_default_sdhci2(); #endif #ifdef CONFIG_S3C_DEV_HSMMC3 s5pv210_default_sdhci3(); #endif #ifdef CONFIG_S5PV210_SETUP_SDHCI s3c_sdhci_set_platdata(); #endif platform_add_devices(smdkv210_devices, ARRAY_SIZE(smdkv210_devices)); #if defined(CONFIG_HAVE_PWM) smdk_backlight_register(); #endif }
void __init lpc178x_touch_init(void) { spi_register_board_info(lpc178x_spi_devs, ARRAY_SIZE(lpc178x_spi_devs)); }
static void __init omap3_beagle_init(void) { omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); omap3_beagle_init_rev(); if ((!strcmp(expansionboard_name, "zippy")) || (!strcmp(expansionboard_name, "zippy2"))) { pr_info("Beagle expansionboard: initializing zippy mmc\n"); platform_device_register(&omap_zippy_device); expansion_config.i2c_settings = EXPANSION_I2C_ZIPPY; expansion_config.mmc_settings = EXPANSION_MMC_ZIPPY; omap_mux_init_gpio(OMAP3BEAGLE_GPIO_ZIPPY_MMC_WP, OMAP_PIN_INPUT); omap_mux_init_gpio(OMAP3BEAGLE_GPIO_ZIPPY_MMC_CD, OMAP_PIN_INPUT); } if ((!strcmp(expansionboard_name, "bbtoys-wifi")) || (!strcmp(expansionboard_name, "lsr-com6l-adpt"))) { #if defined(CONFIG_WL12XX) || defined(CONFIG_WL12XX_MODULE) pr_info("Beagle expansion: wl12xx: setting up gpio pinmux\n"); omap_mux_init_gpio(OMAP_BEAGLE_FM_EN_BT_WU, OMAP_PIN_OUTPUT); omap_mux_init_gpio(OMAP_BEAGLE_BT_EN_GPIO, OMAP_PIN_OUTPUT); omap_mux_init_gpio(OMAP_BEAGLE_WLAN_EN_GPIO, OMAP_PIN_OUTPUT); omap_mux_init_gpio(OMAP_BEAGLE_WLAN_IRQ_GPIO, OMAP_PIN_INPUT_PULLUP); /* WLAN SDIO: MMC2 CLK */ omap_mux_init_signal("sdmmc2_clk.sdmmc2_clk", OMAP_PIN_INPUT_PULLUP); /* WLAN SDIO: MMC2 CMD */ omap_mux_init_signal("sdmmc2_cmd.sdmmc2_cmd", OMAP_PIN_INPUT_PULLUP); /* WLAN SDIO: MMC2 DAT[0-3] */ omap_mux_init_signal("sdmmc2_dat0.sdmmc2_dat0", OMAP_PIN_INPUT_PULLUP); omap_mux_init_signal("sdmmc2_dat1.sdmmc2_dat1", OMAP_PIN_INPUT_PULLUP); omap_mux_init_signal("sdmmc2_dat2.sdmmc2_dat2", OMAP_PIN_INPUT_PULLUP); omap_mux_init_signal("sdmmc2_dat3.sdmmc2_dat3", OMAP_PIN_INPUT_PULLUP); expansion_config.mmc_settings = EXPANSION_MMC_WIFI; expansion_config.i2c_settings = EXPANSION_I2C_COM6L; #endif } if (!strcmp(expansionboard2_name, "bbtoys-ulcd")) { int r; expansion_config.i2c_settings = EXPANSION_I2C_7ULCD; /* TODO: set lcd_driver_name by command line or device tree */ beagle_config.lcd_driver_name = "tfc_s9700rtwv35tr-01b", lcd_panel.name = beagle_config.lcd_driver_name; r = gpio_request_one(beagle_config.lcd_pwren, GPIOF_OUT_INIT_LOW, "LCD power"); if (r < 0) pr_err("Beagle expansionboard: Unable to get LCD power enable GPIO\n"); } if (gpio_is_valid(beagle_config.mmc1_gpio_wp)) omap_mux_init_gpio(beagle_config.mmc1_gpio_wp, OMAP_PIN_INPUT); switch (expansion_config.mmc_settings) { case EXPANSION_MMC_WIFI: mmcbbt[0].caps = beagle_config.mmc_caps; omap_hsmmc_init(mmcbbt); break; case EXPANSION_MMC_ZIPPY: mmc_zippy[0].caps = beagle_config.mmc_caps; omap_hsmmc_init(mmc_zippy); break; default: mmc[0].caps = beagle_config.mmc_caps; omap_hsmmc_init(mmc); } omap3_beagle_i2c_init(); gpio_buttons[0].gpio = beagle_config.usr_button_gpio; platform_add_devices(omap3_beagle_devices, ARRAY_SIZE(omap3_beagle_devices)); if (gpio_is_valid(beagle_config.dvi_pd_gpio)) omap_mux_init_gpio(beagle_config.dvi_pd_gpio, OMAP_PIN_OUTPUT); omap_display_init(&beagle_dss_data); omap_serial_init(); omap_sdrc_init(mt46h32m32lf6_sdrc_params, mt46h32m32lf6_sdrc_params); if (!strcmp(expansionboard_name, "zippy")) { pr_info("Beagle expansionboard: initializing enc28j60\n"); omap3beagle_enc28j60_init(); } if (!strcmp(expansionboard_name, "zippy2")) { pr_info("Beagle expansionboard: initializing ks_8851\n"); omap3beagle_ks8851_init(); } if (!strcmp(expansionboard_name, "trainer")) { pr_info("Beagle expansionboard: exporting GPIOs 130-141,162 to userspace\n"); gpio_request(130, "sysfs"); gpio_export(130, 1); gpio_request(131, "sysfs"); gpio_export(131, 1); gpio_request(132, "sysfs"); gpio_export(132, 1); gpio_request(133, "sysfs"); gpio_export(133, 1); gpio_request(134, "sysfs"); gpio_export(134, 1); gpio_request(135, "sysfs"); gpio_export(135, 1); gpio_request(136, "sysfs"); gpio_export(136, 1); gpio_request(137, "sysfs"); gpio_export(137, 1); gpio_request(138, "sysfs"); gpio_export(138, 1); gpio_request(139, "sysfs"); gpio_export(139, 1); gpio_request(140, "sysfs"); gpio_export(140, 1); gpio_request(141, "sysfs"); gpio_export(141, 1); gpio_request(162, "sysfs"); gpio_export(162, 1); } if ((!strcmp(expansionboard_name, "bbtoys-wifi")) || (!strcmp(expansionboard_name, "lsr-com6l-adpt"))) { #if defined(CONFIG_WL12XX) || defined(CONFIG_WL12XX_MODULE) pr_info("Beagle expansionboard: initializing wl12xx platform\n"); if (!strcmp(wl12xx_name, "wl12xx_26mhz")) { pr_info("wl12xx: 26Mhz reference clock (TiWi5)\n"); omap_beagle_wlan_data_26mhz.irq = gpio_to_irq(OMAP_BEAGLE_WLAN_IRQ_GPIO); if (wl12xx_set_platform_data(&omap_beagle_wlan_data_26mhz)) pr_err("error setting wl12xx data\n"); } else { pr_info("wl12xx: 38.4Mhz reference clock (TiWi2/TiWi-BLE)\n"); pr_info("wl12xx: for (TiWi5) support pass kernel [wl12xx_clk=wl12xx_26mhz]\n"); omap_beagle_wlan_data.irq = gpio_to_irq(OMAP_BEAGLE_WLAN_IRQ_GPIO); if (wl12xx_set_platform_data(&omap_beagle_wlan_data)) pr_err("error setting wl12xx data\n"); } pr_info("Beagle expansionboard: registering wl12xx bt platform device\n"); platform_device_register(&wl12xx_device); platform_device_register(&btwilink_device); pr_info("Beagle expansionboard: registering wl12xx wifi platform device\n"); platform_device_register(&omap_vwlan_device); #endif } if (!strcmp(expansionboard_name, "beaglefpga")) { pr_info("Beagle expansionboard: enabling SPIdev for McSPI3/4 and pin muxing for McBSP3 slave mode\n"); /* FPGA pin settings configure McSPI 3, McSPI 4 and McBSP 3 */ omap3_beagle_config_fpga_mux(); /* register McSPI 3 and McSPI 4 for FPGA programming and control */ spi_register_board_info(beagle_mcspi_board_info, ARRAY_SIZE(beagle_mcspi_board_info)); } if (!strcmp(expansionboard_name, "spidev")) { pr_info("Beagle expansionboard: registering spidev\n"); omap3_beagle_config_mcspi3_mux(); omap3_beagle_config_mcspi4_mux(); spi_register_board_info(beagle_mcspi_board_info, ARRAY_SIZE(beagle_mcspi_board_info)); } if (!strcmp(expansionboard2_name, "bbtoys-ulcd")) { #if defined(CONFIG_TOUCHSCREEN_TSC2007) || defined(CONFIG_TOUCHSCREEN_TSC2007_MODULE) pr_info("Beagle expansionboard: initializing touchscreen: tsc2007\n"); omap3beagle_tsc2007_init(); #endif } usb_musb_init(NULL); usbhs_init(&usbhs_bdata); omap_nand_flash_init(NAND_BUSWIDTH_16, omap3beagle_nand_partitions, ARRAY_SIZE(omap3beagle_nand_partitions)); omap_twl4030_audio_init("omap3beagle"); /* Ensure msecure is mux'd to be able to set the RTC. */ omap_mux_init_signal("sys_drm_msecure", OMAP_PIN_OFF_OUTPUT_HIGH); /* Ensure SDRC pins are mux'd for self-refresh */ omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT); omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT); }
static void __init cmx270_init_spi(void) { pxa2xx_set_spi_info(2, &cm_x270_spi_info); spi_register_board_info(ARRAY_AND_SIZE(cm_x270_spi_devices)); }
static void spi_device_init(void) { spi_register_board_info(m25p32_spi1_board_info, ARRAY_SIZE(m25p32_spi1_board_info)); }
static __init void da830_evm_init(void) { struct davinci_soc_info *soc_info = &davinci_soc_info; int ret; ret = da830_register_edma(da830_edma_rsv); if (ret) pr_warning("da830_evm_init: edma registration failed: %d\n", ret); ret = davinci_cfg_reg_list(da830_i2c0_pins); if (ret) pr_warning("da830_evm_init: i2c0 mux setup failed: %d\n", ret); ret = da8xx_register_i2c(0, &da830_evm_i2c_0_pdata); if (ret) pr_warning("da830_evm_init: i2c0 registration failed: %d\n", ret); da830_evm_usb_init(); soc_info->emac_pdata->rmii_en = 1; soc_info->emac_pdata->phy_id = DA830_EVM_PHY_ID; ret = davinci_cfg_reg_list(da830_cpgmac_pins); if (ret) pr_warning("da830_evm_init: cpgmac mux setup failed: %d\n", ret); ret = da8xx_register_emac(); if (ret) pr_warning("da830_evm_init: emac registration failed: %d\n", ret); ret = da8xx_register_watchdog(); if (ret) pr_warning("da830_evm_init: watchdog registration failed: %d\n", ret); davinci_serial_init(&da830_evm_uart_config); i2c_register_board_info(1, da830_evm_i2c_devices, ARRAY_SIZE(da830_evm_i2c_devices)); ret = davinci_cfg_reg_list(da830_evm_mcasp1_pins); if (ret) pr_warning("da830_evm_init: mcasp1 mux setup failed: %d\n", ret); da8xx_register_mcasp(1, &da830_evm_snd_data); da830_evm_init_mmc(); ret = da8xx_register_rtc(); if (ret) pr_warning("da830_evm_init: rtc setup failed: %d\n", ret); ret = spi_register_board_info(da830evm_spi_info, ARRAY_SIZE(da830evm_spi_info)); if (ret) pr_warn("%s: spi info registration failed: %d\n", __func__, ret); ret = da8xx_register_spi_bus(0, ARRAY_SIZE(da830evm_spi_info)); if (ret) pr_warning("da830_evm_init: spi 0 registration failed: %d\n", ret); }
static void __init omap_4430sdp_init(void) { int status; int package = OMAP_PACKAGE_CBS; if (omap_rev() == OMAP4430_REV_ES1_0) package = OMAP_PACKAGE_CBL; /* Modification for ELPIDA LPDDR2-s4 8Gb memory device */ omap_emif_set_device_details(1, &lpddr2_elpida_8G_S4_x2_info, lpddr2_elpida_8G_S4_timings, ARRAY_SIZE(lpddr2_elpida_8G_S4_timings), &lpddr2_elpida_S4_min_tck, &custom_configs); omap_emif_set_device_details(2, &lpddr2_elpida_8G_S4_x2_info, lpddr2_elpida_8G_S4_timings, ARRAY_SIZE(lpddr2_elpida_8G_S4_timings), &lpddr2_elpida_S4_min_tck, &custom_configs); omap4_mux_init(board_mux, NULL, package); omap_board_config = sdp4430_config; omap_board_config_size = ARRAY_SIZE(sdp4430_config); omap4_i2c_init(); omap4_twl6030_hsmmc_init(mmc); omap_sfh7741prox_init(); platform_add_devices(sdp4430_devices, ARRAY_SIZE(sdp4430_devices)); omap_serial_init(); omap_sdrc_init(NULL, NULL); omap4_sdp4430_wifi_init(); usb_musb_init(&musb_board_data); status = omap_ethernet_init(); if (status) { pr_err("Ethernet initialization failed: %d\n", status); } else { sdp4430_spi_board_info[0].irq = gpio_to_irq(ETH_KS8851_IRQ); spi_register_board_info(sdp4430_spi_board_info, ARRAY_SIZE(sdp4430_spi_board_info)); } status = omap4_keyboard_init(&sdp4430_keypad_data, &keypad_data); if (status) pr_err("Keypad initialization failed: %d\n", status); omap_4430sdp_display_init(); if (cpu_is_omap446x()) { /* Vsel0 = gpio, vsel1 = gnd */ status = omap_tps6236x_board_setup(true, TPS62361_GPIO, -1, OMAP_PIN_OFF_OUTPUT_HIGH, -1); if (status) pr_err("TPS62361 initialization failed: %d\n", status); } omap_enable_smartreflex_on_init(); omap_rprm_regulator_init(sdp4430_rprm_regulators, ARRAY_SIZE(sdp4430_rprm_regulators)); enable_board_wakeups(); }
static void __init jive_machine_init(void) { /* register system devices for managing low level suspend */ sysdev_class_register(&jive_pm_sysclass); sysdev_register(&jive_pm_sysdev); /* write our sleep configurations for the IO. Pull down all unused * IO, ensure that we have turned off all peripherals we do not * need, and configure the ones we do need. */ /* Port B sleep */ __raw_writel(S3C2412_SLPCON_IN(0) | S3C2412_SLPCON_PULL(1) | S3C2412_SLPCON_HIGH(2) | S3C2412_SLPCON_PULL(3) | S3C2412_SLPCON_PULL(4) | S3C2412_SLPCON_PULL(5) | S3C2412_SLPCON_PULL(6) | S3C2412_SLPCON_HIGH(7) | S3C2412_SLPCON_PULL(8) | S3C2412_SLPCON_PULL(9) | S3C2412_SLPCON_PULL(10), S3C2412_GPBSLPCON); /* Port C sleep */ __raw_writel(S3C2412_SLPCON_PULL(0) | S3C2412_SLPCON_PULL(1) | S3C2412_SLPCON_PULL(2) | S3C2412_SLPCON_PULL(3) | S3C2412_SLPCON_PULL(4) | S3C2412_SLPCON_PULL(5) | S3C2412_SLPCON_LOW(6) | S3C2412_SLPCON_PULL(6) | S3C2412_SLPCON_PULL(7) | S3C2412_SLPCON_PULL(8) | S3C2412_SLPCON_PULL(9) | S3C2412_SLPCON_PULL(10) | S3C2412_SLPCON_PULL(11) | S3C2412_SLPCON_PULL(12) | S3C2412_SLPCON_PULL(13) | S3C2412_SLPCON_PULL(14) | S3C2412_SLPCON_PULL(15), S3C2412_GPCSLPCON); /* Port D sleep */ __raw_writel(S3C2412_SLPCON_ALL_PULL, S3C2412_GPDSLPCON); /* Port F sleep */ __raw_writel(S3C2412_SLPCON_LOW(0) | S3C2412_SLPCON_LOW(1) | S3C2412_SLPCON_LOW(2) | S3C2412_SLPCON_EINT(3) | S3C2412_SLPCON_EINT(4) | S3C2412_SLPCON_EINT(5) | S3C2412_SLPCON_EINT(6) | S3C2412_SLPCON_EINT(7), S3C2412_GPFSLPCON); /* Port G sleep */ __raw_writel(S3C2412_SLPCON_IN(0) | S3C2412_SLPCON_IN(1) | S3C2412_SLPCON_IN(2) | S3C2412_SLPCON_IN(3) | S3C2412_SLPCON_IN(4) | S3C2412_SLPCON_IN(5) | S3C2412_SLPCON_IN(6) | S3C2412_SLPCON_IN(7) | S3C2412_SLPCON_PULL(8) | S3C2412_SLPCON_PULL(9) | S3C2412_SLPCON_IN(10) | S3C2412_SLPCON_PULL(11) | S3C2412_SLPCON_PULL(12) | S3C2412_SLPCON_PULL(13) | S3C2412_SLPCON_IN(14) | S3C2412_SLPCON_PULL(15), S3C2412_GPGSLPCON); /* Port H sleep */ __raw_writel(S3C2412_SLPCON_PULL(0) | S3C2412_SLPCON_PULL(1) | S3C2412_SLPCON_PULL(2) | S3C2412_SLPCON_PULL(3) | S3C2412_SLPCON_PULL(4) | S3C2412_SLPCON_PULL(5) | S3C2412_SLPCON_PULL(6) | S3C2412_SLPCON_IN(7) | S3C2412_SLPCON_IN(8) | S3C2412_SLPCON_PULL(9) | S3C2412_SLPCON_IN(10), S3C2412_GPHSLPCON); /* initialise the power management now we've setup everything. */ s3c2410_pm_init(); s3c_device_nand.dev.platform_data = &jive_nand_info; /* initialise the spi */ s3c2410_gpio_setpin(S3C2410_GPG13, 0); s3c2410_gpio_cfgpin(S3C2410_GPG13, S3C2410_GPIO_OUTPUT); s3c2410_gpio_setpin(S3C2410_GPB7, 1); s3c2410_gpio_cfgpin(S3C2410_GPB7, S3C2410_GPIO_OUTPUT); s3c2410_gpio_setpin(S3C2410_GPB6, 0); s3c2410_gpio_cfgpin(S3C2410_GPB6, S3C2410_GPIO_OUTPUT); s3c2410_gpio_setpin(S3C2410_GPG8, 1); s3c2410_gpio_cfgpin(S3C2410_GPG8, S3C2410_GPIO_OUTPUT); /* initialise the WM8750 spi */ s3c2410_gpio_setpin(S3C2410_GPH10, 1); s3c2410_gpio_cfgpin(S3C2410_GPH10, S3C2410_GPIO_OUTPUT); /* Turn off suspend on both USB ports, and switch the * selectable USB port to USB device mode. */ s3c2410_modify_misccr(S3C2410_MISCCR_USBHOST | S3C2410_MISCCR_USBSUSPND0 | S3C2410_MISCCR_USBSUSPND1, 0x0); s3c24xx_udc_set_platdata(&jive_udc_cfg); s3c24xx_fb_set_platdata(&jive_lcd_config); spi_register_board_info(jive_spi_devs, ARRAY_SIZE(jive_spi_devs)); s3c_i2c0_set_platdata(&jive_i2c_cfg); i2c_register_board_info(0, jive_i2c_devs, ARRAY_SIZE(jive_i2c_devs)); pm_power_off = jive_power_off; platform_add_devices(jive_devices, ARRAY_SIZE(jive_devices)); }
static void __init dove_db_init(void) { /* * Basic Dove setup. Needs to be called early. */ u32 dev, rev; dove_init(); dove_pcie_id(&dev, &rev); dove_mpp_conf(dove_d2plug_a0_mpp_modes, dove_d2plug_a0_mppgrp_modes, MPP_GRP_AU1_52_57_AU1, MPP_GRP_NFC_64_71_NFC); dove_d2plug_gpio_init(rev); pm_power_off = dove_d2plug_power_off; /* sdio card interrupt workaround using GPIOs */ dove_sd_card_int_wa_setup(0); dove_sd_card_int_wa_setup(1); pxa_init_dma_wins(&orion_mbus_dram_info); pxa_init_dma(16); #ifdef CONFIG_MV_HAL_DRIVERS_SUPPORT if (useHalDrivers || useNandHal) { if (mvPdmaHalInit(MV_PDMA_MAX_CHANNELS_NUM) != MV_OK) { printk(KERN_ERR "mvPdmaHalInit() failed.\n"); BUG(); } /* reserve channels for NAND Data and command PDMA */ pxa_reserve_dma_channel(MV_PDMA_NAND_DATA); pxa_reserve_dma_channel(MV_PDMA_NAND_COMMAND); } #endif #ifdef CONFIG_MV_ETHERNET if (use_hal_giga || useHalDrivers) dove_mv_eth_init(); else #endif dove_ge00_init(&dove_db_ge00_data); dove_ehci0_init(); dove_ehci1_init(); //ds_clks_disable_all(0, 0); dove_sata_init(&dove_db_sata_data); dove_sdio0_init(); dove_sdio1_init(); //dove_spi0_init(); //it is called in following place. //dove_spi1_init(); //dove_d2plug_nfc_init(); dove_uart0_init(); dove_uart1_init(); dove_d2plug_clcd_init(); dove_vmeta_init(); dove_gpu_init(); dove_cesa_init(); dove_hwmon_init(); //dove_i2s_init(0, &i2s0_data); //for audio jack; (d3plug) dove_i2s_init(1, &i2s1_data); //for hdmi dove_i2c_init(); dove_i2c_exp_init(0); //if (rev >= DOVE_REV_X0) { dove_i2c_exp_init(1); } i2c_register_board_info(0, dove_d2plug_i2c_bus0_devs, ARRAY_SIZE(dove_d2plug_i2c_bus0_devs)); //i2c_register_board_info(1, dove_d2plug_i2c_bus1_devs, ARRAY_SIZE(dove_d2plug_i2c_bus1_devs)); //if (rev >= DOVE_REV_A0) i2c_register_board_info(0, &idt, 1); dove_spi0_init(); spi_register_board_info(dove_db_spi_flash_info, ARRAY_SIZE(dove_db_spi_flash_info)); platform_device_register(&plug_leds); #ifdef CONFIG_BATTERY_MCU dove_battery_init_v3(); #endif //ds_clks_enable_all(); printk(KERN_INFO"ENd of INIT ***************************\r\n"); }
static void __init lager_add_rsnd_device(void) { struct platform_device_info cardinfo = { .parent = &platform_bus, .name = "asoc-simple-card", .id = -1, .data = &rsnd_card_info, .size_data = sizeof(struct asoc_simple_card_info), .dma_mask = DMA_BIT_MASK(32), }; i2c_register_board_info(2, i2c2_devices, ARRAY_SIZE(i2c2_devices)); platform_device_register_resndata( &platform_bus, "rcar_sound", -1, rsnd_resources, ARRAY_SIZE(rsnd_resources), &rsnd_info, sizeof(rsnd_info)); platform_device_register_full(&cardinfo); } /* SDHI0 */ static struct sh_mobile_sdhi_info sdhi0_info __initdata = { .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD, .tmio_caps2 = MMC_CAP2_NO_MULTI_READ, .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE, }; static struct resource sdhi0_resources[] __initdata = { DEFINE_RES_MEM(0xee100000, 0x200), DEFINE_RES_IRQ(gic_spi(165)), }; /* SDHI2 */ static struct sh_mobile_sdhi_info sdhi2_info __initdata = { .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD, .tmio_caps2 = MMC_CAP2_NO_MULTI_READ, .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE, }; static struct resource sdhi2_resources[] __initdata = { DEFINE_RES_MEM(0xee140000, 0x100), DEFINE_RES_IRQ(gic_spi(167)), }; /* Internal PCI1 */ static const struct resource pci1_resources[] __initconst = { DEFINE_RES_MEM(0xee0b0000, 0x10000), /* CFG */ DEFINE_RES_MEM(0xee0a0000, 0x10000), /* MEM */ DEFINE_RES_IRQ(gic_spi(112)), }; static const struct platform_device_info pci1_info __initconst = { .parent = &platform_bus, .name = "pci-rcar-gen2", .id = 1, .res = pci1_resources, .num_res = ARRAY_SIZE(pci1_resources), .dma_mask = DMA_BIT_MASK(32), }; static void __init lager_add_usb1_device(void) { platform_device_register_full(&pci1_info); } /* Internal PCI2 */ static const struct resource pci2_resources[] __initconst = { DEFINE_RES_MEM(0xee0d0000, 0x10000), /* CFG */ DEFINE_RES_MEM(0xee0c0000, 0x10000), /* MEM */ DEFINE_RES_IRQ(gic_spi(113)), }; static const struct platform_device_info pci2_info __initconst = { .parent = &platform_bus, .name = "pci-rcar-gen2", .id = 2, .res = pci2_resources, .num_res = ARRAY_SIZE(pci2_resources), .dma_mask = DMA_BIT_MASK(32), }; static void __init lager_add_usb2_device(void) { platform_device_register_full(&pci2_info); } static const struct pinctrl_map lager_pinctrl_map[] = { /* DU (CN10: ARGB0, CN13: LVDS) */ PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790", "du_rgb666", "du"), PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790", "du_sync_1", "du"), PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790", "du_clk_out_0", "du"), /* I2C2 */ PIN_MAP_MUX_GROUP_DEFAULT("i2c-rcar.2", "pfc-r8a7790", "i2c2", "i2c2"), /* QSPI */ PIN_MAP_MUX_GROUP_DEFAULT("qspi.0", "pfc-r8a7790", "qspi_ctrl", "qspi"), PIN_MAP_MUX_GROUP_DEFAULT("qspi.0", "pfc-r8a7790", "qspi_data4", "qspi"), /* SCIF0 (CN19: DEBUG SERIAL0) */ PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7790", "scif0_data", "scif0"), /* SCIF1 (CN20: DEBUG SERIAL1) */ PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.7", "pfc-r8a7790", "scif1_data", "scif1"), /* SDHI0 */ PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7790", "sdhi0_data4", "sdhi0"), PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7790", "sdhi0_ctrl", "sdhi0"), PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7790", "sdhi0_cd", "sdhi0"), /* SDHI2 */ PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-r8a7790", "sdhi2_data4", "sdhi2"), PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-r8a7790", "sdhi2_ctrl", "sdhi2"), PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-r8a7790", "sdhi2_cd", "sdhi2"), /* SSI (CN17: sound) */ PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790", "ssi0129_ctrl", "ssi"), PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790", "ssi0_data", "ssi"), PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790", "ssi1_data", "ssi"), PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790", "audio_clk_a", "audio_clk"), /* MMCIF1 */ PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.1", "pfc-r8a7790", "mmc1_data8", "mmc1"), PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.1", "pfc-r8a7790", "mmc1_ctrl", "mmc1"), /* Ether */ PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790", "eth_link", "eth"), PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790", "eth_mdio", "eth"), PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790", "eth_rmii", "eth"), PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790", "intc_irq0", "intc"), /* VIN0 */ PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790", "vin0_data24", "vin0"), PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790", "vin0_sync", "vin0"), PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790", "vin0_field", "vin0"), PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790", "vin0_clkenb", "vin0"), PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790", "vin0_clk", "vin0"), /* VIN1 */ PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.1", "pfc-r8a7790", "vin1_data8", "vin1"), PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.1", "pfc-r8a7790", "vin1_clk", "vin1"), /* USB0 */ PIN_MAP_MUX_GROUP_DEFAULT("renesas_usbhs", "pfc-r8a7790", "usb0_ovc_vbus", "usb0"), /* USB1 */ PIN_MAP_MUX_GROUP_DEFAULT("pci-rcar-gen2.1", "pfc-r8a7790", "usb1", "usb1"), /* USB2 */ PIN_MAP_MUX_GROUP_DEFAULT("pci-rcar-gen2.2", "pfc-r8a7790", "usb2", "usb2"), }; static void __init lager_add_standard_devices(void) { int fixed_regulator_idx = 0; int gpio_regulator_idx = 0; r8a7790_clock_init(); pinctrl_register_mappings(lager_pinctrl_map, ARRAY_SIZE(lager_pinctrl_map)); r8a7790_pinmux_init(); r8a7790_add_standard_devices(); platform_device_register_data(&platform_bus, "leds-gpio", -1, &lager_leds_pdata, sizeof(lager_leds_pdata)); platform_device_register_data(&platform_bus, "gpio-keys", -1, &lager_keys_pdata, sizeof(lager_keys_pdata)); regulator_register_always_on(fixed_regulator_idx++, "fixed-3.3V", fixed3v3_power_consumers, ARRAY_SIZE(fixed3v3_power_consumers), 3300000); platform_device_register_resndata(&platform_bus, "sh_mmcif", 1, mmcif1_resources, ARRAY_SIZE(mmcif1_resources), &mmcif1_pdata, sizeof(mmcif1_pdata)); platform_device_register_full(ðer_info); lager_add_du_device(); platform_device_register_resndata(&platform_bus, "qspi", 0, qspi_resources, ARRAY_SIZE(qspi_resources), &qspi_pdata, sizeof(qspi_pdata)); spi_register_board_info(spi_info, ARRAY_SIZE(spi_info)); platform_device_register_data(&platform_bus, "reg-fixed-voltage", fixed_regulator_idx++, &vcc_sdhi0_info, sizeof(struct fixed_voltage_config)); platform_device_register_data(&platform_bus, "reg-fixed-voltage", fixed_regulator_idx++, &vcc_sdhi2_info, sizeof(struct fixed_voltage_config)); platform_device_register_data(&platform_bus, "gpio-regulator", gpio_regulator_idx++, &vccq_sdhi0_info, sizeof(struct gpio_regulator_config)); platform_device_register_data(&platform_bus, "gpio-regulator", gpio_regulator_idx++, &vccq_sdhi2_info, sizeof(struct gpio_regulator_config)); lager_add_camera1_device(); platform_device_register_full(&sata1_info); platform_device_register_resndata(&platform_bus, "usb_phy_rcar_gen2", -1, usbhs_phy_resources, ARRAY_SIZE(usbhs_phy_resources), &usbhs_phy_pdata, sizeof(usbhs_phy_pdata)); lager_register_usbhs(); lager_add_usb1_device(); lager_add_usb2_device(); lager_add_rsnd_device(); platform_device_register_resndata(&platform_bus, "sh_mobile_sdhi", 0, sdhi0_resources, ARRAY_SIZE(sdhi0_resources), &sdhi0_info, sizeof(struct sh_mobile_sdhi_info)); platform_device_register_resndata(&platform_bus, "sh_mobile_sdhi", 2, sdhi2_resources, ARRAY_SIZE(sdhi2_resources), &sdhi2_info, sizeof(struct sh_mobile_sdhi_info)); } /* * Ether LEDs on the Lager board are named LINK and ACTIVE which corresponds * to non-default 01 setting of the Micrel KSZ8041 PHY control register 1 bits * 14-15. We have to set them back to 01 from the default 00 value each time * the PHY is reset. It's also important because the PHY's LED0 signal is * connected to SoC's ETH_LINK signal and in the PHY's default mode it will * bounce on and off after each packet, which we apparently want to avoid. */ static int lager_ksz8041_fixup(struct phy_device *phydev) { u16 phyctrl1 = phy_read(phydev, 0x1e); phyctrl1 &= ~0xc000; phyctrl1 |= 0x4000; return phy_write(phydev, 0x1e, phyctrl1); } static void __init lager_init(void) { lager_add_standard_devices(); irq_set_irq_type(irq_pin(0), IRQ_TYPE_LEVEL_LOW); if (IS_ENABLED(CONFIG_PHYLIB)) phy_register_fixup_for_id("r8a7790-ether-ff:01", lager_ksz8041_fixup); }
static int pcm038_devices_init(void) { int i; u64 uid = 0; char *envdev; long sram_size; unsigned int mode[] = { /* FEC */ PD0_AIN_FEC_TXD0, PD1_AIN_FEC_TXD1, PD2_AIN_FEC_TXD2, PD3_AIN_FEC_TXD3, PD4_AOUT_FEC_RX_ER, PD5_AOUT_FEC_RXD1, PD6_AOUT_FEC_RXD2, PD7_AOUT_FEC_RXD3, PD8_AF_FEC_MDIO, PD9_AIN_FEC_MDC | GPIO_PUEN, PD10_AOUT_FEC_CRS, PD11_AOUT_FEC_TX_CLK, PD12_AOUT_FEC_RXD0, PD13_AOUT_FEC_RX_DV, PD14_AOUT_FEC_RX_CLK, PD15_AOUT_FEC_COL, PD16_AIN_FEC_TX_ER, PF23_AIN_FEC_TX_EN, PCM038_GPIO_FEC_RST | GPIO_GPIO | GPIO_OUT, /* UART1 */ PE12_PF_UART1_TXD, PE13_PF_UART1_RXD, PE14_PF_UART1_CTS, PE15_PF_UART1_RTS, /* CSPI1 */ PD25_PF_CSPI1_RDY, PD29_PF_CSPI1_SCLK, PD30_PF_CSPI1_MISO, PD31_PF_CSPI1_MOSI, PCM038_GPIO_SPI_CS0 | GPIO_GPIO | GPIO_OUT, #ifdef CONFIG_MACH_PCM970_BASEBOARD PCM970_GPIO_SPI_CS1 | GPIO_GPIO | GPIO_OUT, #endif /* Display */ PA5_PF_LSCLK, PA6_PF_LD0, PA7_PF_LD1, PA8_PF_LD2, PA9_PF_LD3, PA10_PF_LD4, PA11_PF_LD5, PA12_PF_LD6, PA13_PF_LD7, PA14_PF_LD8, PA15_PF_LD9, PA16_PF_LD10, PA17_PF_LD11, PA18_PF_LD12, PA19_PF_LD13, PA20_PF_LD14, PA21_PF_LD15, PA22_PF_LD16, PA23_PF_LD17, PA24_PF_REV, PA25_PF_CLS, PA26_PF_PS, PA27_PF_SPL_SPR, PA28_PF_HSYNC, PA29_PF_VSYNC, PA30_PF_CONTRAST, PA31_PF_OE_ACD, /* USB OTG */ PC7_PF_USBOTG_DATA5, PC8_PF_USBOTG_DATA6, PC9_PF_USBOTG_DATA0, PC10_PF_USBOTG_DATA2, PC11_PF_USBOTG_DATA1, PC12_PF_USBOTG_DATA4, PC13_PF_USBOTG_DATA3, PE0_PF_USBOTG_NXT, PCM038_GPIO_OTG_STP | GPIO_GPIO | GPIO_OUT, PE2_PF_USBOTG_DIR, PE24_PF_USBOTG_CLK, PE25_PF_USBOTG_DATA7, /* I2C1 */ PD17_PF_I2C_DATA | GPIO_PUEN, PD18_PF_I2C_CLK, /* I2C2 */ PC5_PF_I2C2_SDA, PC6_PF_I2C2_SCL, }; /* configure 16 bit nor flash on cs0 */ imx27_setup_weimcs(0, 0x22C2CF00, 0x75000D01, 0x00000900); /* configure SRAM on cs1 */ imx27_setup_weimcs(1, 0x0000d843, 0x22252521, 0x22220a00); /* SRAM can be up to 2MiB */ sram_size = get_ram_size((ulong *)MX27_CS1_BASE_ADDR, SZ_2M); if (sram_size) add_mem_device("ram1", MX27_CS1_BASE_ADDR, sram_size, IORESOURCE_MEM_WRITEABLE); /* initizalize gpios */ for (i = 0; i < ARRAY_SIZE(mode); i++) imx_gpio_mode(mode[i]); spi_register_board_info(pcm038_spi_board_info, ARRAY_SIZE(pcm038_spi_board_info)); imx27_add_spi0(&pcm038_spi_0_data); pcm038_power_init(); add_cfi_flash_device(DEVICE_ID_DYNAMIC, 0xC0000000, 32 * 1024 * 1024, 0); imx27_add_nand(&nand_info); imx27_add_fb(&pcm038_fb_data); imx27_add_i2c0(NULL); imx27_add_i2c1(NULL); /* Register the fec device after the PLL re-initialisation * as the fec depends on the (now higher) ipg clock */ gpio_set_value(PCM038_GPIO_FEC_RST, 1); imx27_add_fec(&fec_info); /* Apply delay for STP line to stop ULPI */ gpio_direction_output(PCM038_GPIO_OTG_STP, 1); mdelay(1); imx_gpio_mode(PE1_PF_USBOTG_STP); imx27_add_usbotg(&pcm038_otg_pdata); switch (bootsource_get()) { case BOOTSOURCE_NAND: devfs_add_partition("nand0", 0, SZ_512K, DEVFS_PARTITION_FIXED, "self_raw"); dev_add_bb_dev("self_raw", "self0"); devfs_add_partition("nand0", SZ_512K, SZ_128K, DEVFS_PARTITION_FIXED, "env_raw"); dev_add_bb_dev("env_raw", "env0"); envdev = "NAND"; break; default: devfs_add_partition("nor0", 0, SZ_512K, DEVFS_PARTITION_FIXED, "self0"); devfs_add_partition("nor0", SZ_512K, SZ_128K, DEVFS_PARTITION_FIXED, "env0"); protect_file("/dev/env0", 1); envdev = "NOR"; } pr_notice("Using environment in %s Flash\n", envdev); if (imx_iim_read(1, 0, &uid, 6) == 6) armlinux_set_serial(uid); armlinux_set_bootparams((void *)0xa0000100); armlinux_set_architecture(MACH_TYPE_PCM038); return 0; }
static void __init mango210_machine_init(void) { /* Find out S5PC110 chip version */ _hw_version_check(); #ifdef CONFIG_MTD_NAND // s3c_device_nand.dev.platform_data = &s5p_nand_data; #endif #ifdef CONFIG_SMSC911X mango210_smsc911x_set(); #endif #ifdef CONFIG_ANDROID_PMEM android_pmem_set_platdata(); #endif /* i2c */ s3c_i2c0_set_platdata(NULL); s3c_i2c1_set_platdata(NULL); s3c_i2c2_set_platdata(NULL); i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0)); i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1)); i2c_register_board_info(2, i2c_devs2, ARRAY_SIZE(i2c_devs2)); /* to support system shut down */ pm_power_off = mango210_power_off; #if defined(CONFIG_SPI_CNTRLR_0) s3cspi_set_slaves(BUSNUM(0), ARRAY_SIZE(s3c_slv_pdata_0), s3c_slv_pdata_0); #endif #if defined(CONFIG_SPI_CNTRLR_1) s3cspi_set_slaves(BUSNUM(1), ARRAY_SIZE(s3c_slv_pdata_1), s3c_slv_pdata_1); #endif #if defined(CONFIG_SPI_CNTRLR_2) s3cspi_set_slaves(BUSNUM(2), ARRAY_SIZE(s3c_slv_pdata_2), s3c_slv_pdata_2); #endif spi_register_board_info(s3c_spi_devs, ARRAY_SIZE(s3c_spi_devs)); #if defined(CONFIG_FB_S3C_LB070WV6) || defined(CONFIG_FB_S3C_LTN101NT05) s3cfb_set_platdata(&mango_fb_data); #endif #if defined(CONFIG_TOUCHSCREEN_S3C) s3c_ts_set_platdata(&s3c_ts_platform); #endif #if defined(CONFIG_S5PV210_ADC) s3c_adc_set_platdata(&s3c_adc_platform); #endif #if defined(CONFIG_PM) s3c_pm_init(); #endif #ifdef CONFIG_VIDEO_FIMC #ifdef CONFIG_S5PV210_SETUP_FIMC0 s3c_fimc0_set_platdata(&fimc_plat); #endif #ifdef CONFIG_S5PV210_SETUP_FIMC1 s3c_fimc1_set_platdata(&fimc_plat); #endif #ifdef CONFIG_S5PV210_SETUP_FIMC2 s3c_fimc2_set_platdata(&fimc_plat); #endif mango210_camera_set(); mango210_cam0_power(1); #else #ifdef CONFIG_S5PV210_SETUP_FIMC0 s3c_fimc0_set_platdata(NULL); #endif #ifdef CONFIG_S5PV210_SETUP_FIMC1 s3c_fimc1_set_platdata(NULL); #endif #ifdef CONFIG_S5PV210_SETUP_FIMC2 s3c_fimc2_set_platdata(NULL); #endif #endif #ifdef CONFIG_SMSC911X mango210_smsc911x_set(); #endif #ifdef CONFIG_VIDEO_MFC50 /* mfc */ s3c_mfc_set_platdata(NULL); #endif #ifdef CONFIG_VIDEO_TV20 s3c_set_qos(); #endif #ifdef CONFIG_S3C_DEV_HSMMC s5pv210_default_sdhci0(); #endif #ifdef CONFIG_S3C_DEV_HSMMC1 s5pv210_default_sdhci1(); #endif #ifdef CONFIG_S3C_DEV_HSMMC2 s5pv210_default_sdhci2(); #endif #ifdef CONFIG_S3C_DEV_HSMMC3 s5pv210_default_sdhci3(); #endif #ifdef CONFIG_S5PV210_SETUP_SDHCI s3c_sdhci_set_platdata(); #endif platform_add_devices(mango210_devices, ARRAY_SIZE(mango210_devices)); #if defined(CONFIG_HAVE_PWM) mango_backlight_register(); #endif #ifdef CONFIG_USB_SUPPORT mango210_usb_host_set(); #endif }
static void __init p852_register_spidev(void) { spi_register_board_info(tegra_spi_devices, ARRAY_SIZE(tegra_spi_devices)); }
static void __init mx31_3ds_init(void) { int ret; imx31_soc_init(); /* Configure SPI1 IOMUX */ mxc_iomux_set_gpr(MUX_PGP_CSPI_BB, true); mxc_iomux_setup_multiple_pins(mx31_3ds_pins, ARRAY_SIZE(mx31_3ds_pins), "mx31_3ds"); imx31_add_imx_uart0(&uart_pdata); imx31_add_mxc_nand(&mx31_3ds_nand_board_info); imx31_add_spi_imx1(&spi1_pdata); mx31_3ds_spi_devs[0].irq = gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3)); spi_register_board_info(mx31_3ds_spi_devs, ARRAY_SIZE(mx31_3ds_spi_devs)); platform_add_devices(devices, ARRAY_SIZE(devices)); imx31_add_imx_keypad(&mx31_3ds_keymap_data); mx31_3ds_usbotg_init(); if (otg_mode_host) { otg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT); if (otg_pdata.otg) imx31_add_mxc_ehci_otg(&otg_pdata); } usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT); if (usbh2_pdata.otg) imx31_add_mxc_ehci_hs(2, &usbh2_pdata); if (!otg_mode_host) imx31_add_fsl_usb2_udc(&usbotg_pdata); if (mxc_expio_init(MX31_CS5_BASE_ADDR, IOMUX_TO_GPIO(MX31_PIN_GPIO1_1))) printk(KERN_WARNING "Init of the debug board failed, all " "devices on the debug board are unusable.\n"); imx31_add_imx2_wdt(); imx31_add_imx_i2c0(&mx31_3ds_i2c0_data); imx31_add_mxc_mmc(0, &sdhc1_pdata); imx31_add_spi_imx0(&spi0_pdata); imx31_add_ipu_core(); imx31_add_mx3_sdc_fb(&mx3fb_pdata); /* CSI */ /* Camera power: default - off */ ret = gpio_request_array(mx31_3ds_camera_gpios, ARRAY_SIZE(mx31_3ds_camera_gpios)); if (ret) { pr_err("Failed to request camera gpios"); iclink_ov2640.power = NULL; } mx31_3ds_init_camera(); imx31_add_imx_ssi(0, &mx31_3ds_ssi_pdata); imx_add_platform_device("imx_mc13783", 0, NULL, 0, NULL, 0); }
static void __init bockw_init(void) { void __iomem *base; struct clk *clk; int i; r8a7778_clock_init(); r8a7778_init_irq_extpin(1); r8a7778_add_standard_devices(); platform_device_register_full(ðer_info); platform_device_register_full(&vin0_info); /* VIN1 has a pin conflict with Ether */ if (!IS_ENABLED(CONFIG_SH_ETH)) platform_device_register_full(&vin1_info); platform_device_register_data(&platform_bus, "soc-camera-pdrv", 0, &iclink0_ml86v7667, sizeof(iclink0_ml86v7667)); platform_device_register_data(&platform_bus, "soc-camera-pdrv", 1, &iclink1_ml86v7667, sizeof(iclink1_ml86v7667)); i2c_register_board_info(0, i2c0_devices, ARRAY_SIZE(i2c0_devices)); spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info)); pinctrl_register_mappings(bockw_pinctrl_map, ARRAY_SIZE(bockw_pinctrl_map)); r8a7778_pinmux_init(); platform_device_register_resndata( &platform_bus, "sh_mmcif", -1, mmc_resources, ARRAY_SIZE(mmc_resources), &sh_mmcif_plat, sizeof(struct sh_mmcif_plat_data)); platform_device_register_resndata( &platform_bus, "rcar_usb_phy", -1, usb_phy_resources, ARRAY_SIZE(usb_phy_resources), &usb_phy_platform_data, sizeof(struct rcar_phy_platform_data)); regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies)); regulator_register_always_on(1, "fixed-3.3V", fixed3v3_power_consumers, ARRAY_SIZE(fixed3v3_power_consumers), 3300000); /* for SMSC */ fpga = ioremap_nocache(FPGA, SZ_1M); if (fpga) { /* * CAUTION * * IRQ0/1 is cascaded interrupt from FPGA. * it should be cared in the future * Now, it is assuming IRQ0 was used only from SMSC. */ u16 val = ioread16(fpga + IRQ0MR); val &= ~(1 << 4); /* enable SMSC911x */ iowrite16(val, fpga + IRQ0MR); platform_device_register_resndata( &platform_bus, "smsc911x", -1, smsc911x_resources, ARRAY_SIZE(smsc911x_resources), &smsc911x_data, sizeof(smsc911x_data)); } /* for SDHI */ base = ioremap_nocache(PFC, 0x200); if (base) { /* * FIXME * * SDHI CD/WP pin needs pull-up */ iowrite32(ioread32(base + PUPR4) | (3 << 26), base + PUPR4); iounmap(base); platform_device_register_resndata( &platform_bus, "sh_mobile_sdhi", 0, sdhi0_resources, ARRAY_SIZE(sdhi0_resources), &sdhi0_info, sizeof(struct sh_mobile_sdhi_info)); } /* for Audio */ clk = clk_get(NULL, "audio_clk_b"); clk_set_rate(clk, 24576000); clk_put(clk); rsnd_codec_power(5, 1); /* enable ak4642 */ platform_device_register_simple( "ak4554-adc-dac", 0, NULL, 0); platform_device_register_simple( "ak4554-adc-dac", 1, NULL, 0); platform_device_register_resndata( &platform_bus, "rcar_sound", -1, rsnd_resources, ARRAY_SIZE(rsnd_resources), &rsnd_info, sizeof(rsnd_info)); for (i = 0; i < ARRAY_SIZE(rsnd_card_info); i++) { struct platform_device_info cardinfo = { .parent = &platform_bus, .name = "asoc-simple-card", .id = i, .data = &rsnd_card_info[i], .size_data = sizeof(struct asoc_simple_card_info), .dma_mask = DMA_BIT_MASK(32), }; platform_device_register_full(&cardinfo); } } static void __init bockw_init_late(void) { r8a7778_init_late(); ADD_USB_FUNC_DEVICE_IF_POSSIBLE(); }
static int __init arch_setup(void) { struct clk *clk; /* register board specific self-refresh code */ sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF | SUSP_SH_RSTANDBY, &ecovec24_sdram_enter_start, &ecovec24_sdram_enter_end, &ecovec24_sdram_leave_start, &ecovec24_sdram_leave_end); /* enable STATUS0, STATUS2 and PDSTATUS */ gpio_request(GPIO_FN_STATUS0, NULL); gpio_request(GPIO_FN_STATUS2, NULL); gpio_request(GPIO_FN_PDSTATUS, NULL); /* enable SCIFA0 */ gpio_request(GPIO_FN_SCIF0_TXD, NULL); gpio_request(GPIO_FN_SCIF0_RXD, NULL); /* enable debug LED */ gpio_request(GPIO_PTG0, NULL); gpio_request(GPIO_PTG1, NULL); gpio_request(GPIO_PTG2, NULL); gpio_request(GPIO_PTG3, NULL); gpio_direction_output(GPIO_PTG0, 0); gpio_direction_output(GPIO_PTG1, 0); gpio_direction_output(GPIO_PTG2, 0); gpio_direction_output(GPIO_PTG3, 0); __raw_writew((__raw_readw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA); /* enable SH-Eth */ gpio_request(GPIO_PTA1, NULL); gpio_direction_output(GPIO_PTA1, 1); mdelay(20); gpio_request(GPIO_FN_RMII_RXD0, NULL); gpio_request(GPIO_FN_RMII_RXD1, NULL); gpio_request(GPIO_FN_RMII_TXD0, NULL); gpio_request(GPIO_FN_RMII_TXD1, NULL); gpio_request(GPIO_FN_RMII_REF_CLK, NULL); gpio_request(GPIO_FN_RMII_TX_EN, NULL); gpio_request(GPIO_FN_RMII_RX_ER, NULL); gpio_request(GPIO_FN_RMII_CRS_DV, NULL); gpio_request(GPIO_FN_MDIO, NULL); gpio_request(GPIO_FN_MDC, NULL); gpio_request(GPIO_FN_LNKSTA, NULL); /* enable USB */ __raw_writew(0x0000, 0xA4D80000); __raw_writew(0x0000, 0xA4D90000); gpio_request(GPIO_PTB3, NULL); gpio_request(GPIO_PTB4, NULL); gpio_request(GPIO_PTB5, NULL); gpio_direction_input(GPIO_PTB3); gpio_direction_output(GPIO_PTB4, 0); gpio_direction_output(GPIO_PTB5, 0); __raw_writew(0x0600, 0xa40501d4); __raw_writew(0x0600, 0xa4050192); if (gpio_get_value(GPIO_PTB3)) { printk(KERN_INFO "USB1 function is selected\n"); usb1_common_device.name = "r8a66597_udc"; } else { printk(KERN_INFO "USB1 host is selected\n"); usb1_common_device.name = "r8a66597_hcd"; } /* enable LCDC */ gpio_request(GPIO_FN_LCDD23, NULL); gpio_request(GPIO_FN_LCDD22, NULL); gpio_request(GPIO_FN_LCDD21, NULL); gpio_request(GPIO_FN_LCDD20, NULL); gpio_request(GPIO_FN_LCDD19, NULL); gpio_request(GPIO_FN_LCDD18, NULL); gpio_request(GPIO_FN_LCDD17, NULL); gpio_request(GPIO_FN_LCDD16, NULL); gpio_request(GPIO_FN_LCDD15, NULL); gpio_request(GPIO_FN_LCDD14, NULL); gpio_request(GPIO_FN_LCDD13, NULL); gpio_request(GPIO_FN_LCDD12, NULL); gpio_request(GPIO_FN_LCDD11, NULL); gpio_request(GPIO_FN_LCDD10, NULL); gpio_request(GPIO_FN_LCDD9, NULL); gpio_request(GPIO_FN_LCDD8, NULL); gpio_request(GPIO_FN_LCDD7, NULL); gpio_request(GPIO_FN_LCDD6, NULL); gpio_request(GPIO_FN_LCDD5, NULL); gpio_request(GPIO_FN_LCDD4, NULL); gpio_request(GPIO_FN_LCDD3, NULL); gpio_request(GPIO_FN_LCDD2, NULL); gpio_request(GPIO_FN_LCDD1, NULL); gpio_request(GPIO_FN_LCDD0, NULL); gpio_request(GPIO_FN_LCDDISP, NULL); gpio_request(GPIO_FN_LCDHSYN, NULL); gpio_request(GPIO_FN_LCDDCK, NULL); gpio_request(GPIO_FN_LCDVSYN, NULL); gpio_request(GPIO_FN_LCDDON, NULL); gpio_request(GPIO_FN_LCDLCLK, NULL); __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA); gpio_request(GPIO_PTE6, NULL); gpio_request(GPIO_PTU1, NULL); gpio_request(GPIO_PTR1, NULL); gpio_request(GPIO_PTA2, NULL); gpio_direction_input(GPIO_PTE6); gpio_direction_output(GPIO_PTU1, 0); gpio_direction_output(GPIO_PTR1, 0); gpio_direction_output(GPIO_PTA2, 0); /* I/O buffer drive ability is high */ __raw_writew((__raw_readw(IODRIVEA) & ~0x00c0) | 0x0080 , IODRIVEA); if (gpio_get_value(GPIO_PTE6)) { /* DVI */ lcdc_info.clock_source = LCDC_CLK_EXTERNAL; lcdc_info.ch[0].clock_divider = 1; lcdc_info.ch[0].lcd_cfg = ecovec_dvi_modes; lcdc_info.ch[0].num_cfg = ARRAY_SIZE(ecovec_dvi_modes); gpio_set_value(GPIO_PTA2, 1); gpio_set_value(GPIO_PTU1, 1); } else { /* Panel */ lcdc_info.clock_source = LCDC_CLK_PERIPHERAL; lcdc_info.ch[0].clock_divider = 2; lcdc_info.ch[0].lcd_cfg = ecovec_lcd_modes; lcdc_info.ch[0].num_cfg = ARRAY_SIZE(ecovec_lcd_modes); gpio_set_value(GPIO_PTR1, 1); /* FIXME * * LCDDON control is needed for Panel, * but current sh_mobile_lcdc driver doesn't control it. * It is temporary correspondence */ gpio_request(GPIO_PTF4, NULL); gpio_direction_output(GPIO_PTF4, 1); /* enable TouchScreen */ i2c_register_board_info(0, &ts_i2c_clients, 1); irq_set_irq_type(IRQ0, IRQ_TYPE_LEVEL_LOW); } /* enable CEU0 */ gpio_request(GPIO_FN_VIO0_D15, NULL); gpio_request(GPIO_FN_VIO0_D14, NULL); gpio_request(GPIO_FN_VIO0_D13, NULL); gpio_request(GPIO_FN_VIO0_D12, NULL); gpio_request(GPIO_FN_VIO0_D11, NULL); gpio_request(GPIO_FN_VIO0_D10, NULL); gpio_request(GPIO_FN_VIO0_D9, NULL); gpio_request(GPIO_FN_VIO0_D8, NULL); gpio_request(GPIO_FN_VIO0_D7, NULL); gpio_request(GPIO_FN_VIO0_D6, NULL); gpio_request(GPIO_FN_VIO0_D5, NULL); gpio_request(GPIO_FN_VIO0_D4, NULL); gpio_request(GPIO_FN_VIO0_D3, NULL); gpio_request(GPIO_FN_VIO0_D2, NULL); gpio_request(GPIO_FN_VIO0_D1, NULL); gpio_request(GPIO_FN_VIO0_D0, NULL); gpio_request(GPIO_FN_VIO0_VD, NULL); gpio_request(GPIO_FN_VIO0_CLK, NULL); gpio_request(GPIO_FN_VIO0_FLD, NULL); gpio_request(GPIO_FN_VIO0_HD, NULL); platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20); /* enable CEU1 */ gpio_request(GPIO_FN_VIO1_D7, NULL); gpio_request(GPIO_FN_VIO1_D6, NULL); gpio_request(GPIO_FN_VIO1_D5, NULL); gpio_request(GPIO_FN_VIO1_D4, NULL); gpio_request(GPIO_FN_VIO1_D3, NULL); gpio_request(GPIO_FN_VIO1_D2, NULL); gpio_request(GPIO_FN_VIO1_D1, NULL); gpio_request(GPIO_FN_VIO1_D0, NULL); gpio_request(GPIO_FN_VIO1_FLD, NULL); gpio_request(GPIO_FN_VIO1_HD, NULL); gpio_request(GPIO_FN_VIO1_VD, NULL); gpio_request(GPIO_FN_VIO1_CLK, NULL); platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20); /* enable KEYSC */ gpio_request(GPIO_FN_KEYOUT5_IN5, NULL); gpio_request(GPIO_FN_KEYOUT4_IN6, NULL); gpio_request(GPIO_FN_KEYOUT3, NULL); gpio_request(GPIO_FN_KEYOUT2, NULL); gpio_request(GPIO_FN_KEYOUT1, NULL); gpio_request(GPIO_FN_KEYOUT0, NULL); gpio_request(GPIO_FN_KEYIN0, NULL); /* enable user debug switch */ gpio_request(GPIO_PTR0, NULL); gpio_request(GPIO_PTR4, NULL); gpio_request(GPIO_PTR5, NULL); gpio_request(GPIO_PTR6, NULL); gpio_direction_input(GPIO_PTR0); gpio_direction_input(GPIO_PTR4); gpio_direction_input(GPIO_PTR5); gpio_direction_input(GPIO_PTR6); #if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE) /* enable SDHI0 on CN11 (needs DS2.4 set to ON) */ gpio_request(GPIO_FN_SDHI0CD, NULL); gpio_request(GPIO_FN_SDHI0WP, NULL); gpio_request(GPIO_FN_SDHI0CMD, NULL); gpio_request(GPIO_FN_SDHI0CLK, NULL); gpio_request(GPIO_FN_SDHI0D3, NULL); gpio_request(GPIO_FN_SDHI0D2, NULL); gpio_request(GPIO_FN_SDHI0D1, NULL); gpio_request(GPIO_FN_SDHI0D0, NULL); gpio_request(GPIO_PTB6, NULL); gpio_direction_output(GPIO_PTB6, 0); #if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE) /* enable SDHI1 on CN12 (needs DS2.6,7 set to ON,OFF) */ gpio_request(GPIO_FN_SDHI1CD, NULL); gpio_request(GPIO_FN_SDHI1WP, NULL); gpio_request(GPIO_FN_SDHI1CMD, NULL); gpio_request(GPIO_FN_SDHI1CLK, NULL); gpio_request(GPIO_FN_SDHI1D3, NULL); gpio_request(GPIO_FN_SDHI1D2, NULL); gpio_request(GPIO_FN_SDHI1D1, NULL); gpio_request(GPIO_FN_SDHI1D0, NULL); gpio_request(GPIO_PTB7, NULL); gpio_direction_output(GPIO_PTB7, 0); /* I/O buffer drive ability is high for SDHI1 */ __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA); #endif /* CONFIG_MMC_SH_MMCIF */ #else /* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */ gpio_request(GPIO_FN_MSIOF0_TXD, NULL); gpio_request(GPIO_FN_MSIOF0_RXD, NULL); gpio_request(GPIO_FN_MSIOF0_TSCK, NULL); gpio_request(GPIO_PTM4, NULL); /* software CS control of TSYNC pin */ gpio_direction_output(GPIO_PTM4, 1); /* active low CS */ gpio_request(GPIO_PTB6, NULL); /* 3.3V power control */ gpio_direction_output(GPIO_PTB6, 0); /* disable power by default */ gpio_request(GPIO_PTY6, NULL); /* write protect */ gpio_direction_input(GPIO_PTY6); gpio_request(GPIO_PTY7, NULL); /* card detect */ gpio_direction_input(GPIO_PTY7); spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus)); #endif /* enable Video */ gpio_request(GPIO_PTU2, NULL); gpio_direction_output(GPIO_PTU2, 1); /* enable Camera */ gpio_request(GPIO_PTA3, NULL); gpio_request(GPIO_PTA4, NULL); gpio_direction_output(GPIO_PTA3, 0); gpio_direction_output(GPIO_PTA4, 0); /* enable FSI */ gpio_request(GPIO_FN_FSIMCKB, NULL); gpio_request(GPIO_FN_FSIIBSD, NULL); gpio_request(GPIO_FN_FSIOBSD, NULL); gpio_request(GPIO_FN_FSIIBBCK, NULL); gpio_request(GPIO_FN_FSIIBLRCK, NULL); gpio_request(GPIO_FN_FSIOBBCK, NULL); gpio_request(GPIO_FN_FSIOBLRCK, NULL); gpio_request(GPIO_FN_CLKAUDIOBO, NULL); /* set SPU2 clock to 83.4 MHz */ clk = clk_get(NULL, "spu_clk"); if (!IS_ERR(clk)) { clk_set_rate(clk, clk_round_rate(clk, 83333333)); clk_put(clk); } /* change parent of FSI B */ clk = clk_get(NULL, "fsib_clk"); if (!IS_ERR(clk)) { /* 48kHz dummy clock was used to make sure 1/1 divide */ clk_set_rate(&sh7724_fsimckb_clk, 48000); clk_set_parent(clk, &sh7724_fsimckb_clk); clk_set_rate(clk, 48000); clk_put(clk); } gpio_request(GPIO_PTU0, NULL); gpio_direction_output(GPIO_PTU0, 0); mdelay(20); /* enable motion sensor */ gpio_request(GPIO_FN_INTC_IRQ1, NULL); gpio_direction_input(GPIO_FN_INTC_IRQ1); /* set VPU clock to 166 MHz */ clk = clk_get(NULL, "vpu_clk"); if (!IS_ERR(clk)) { clk_set_rate(clk, clk_round_rate(clk, 166000000)); clk_put(clk); } /* enable IrDA */ gpio_request(GPIO_FN_IRDA_OUT, NULL); gpio_request(GPIO_FN_IRDA_IN, NULL); gpio_request(GPIO_PTU5, NULL); gpio_direction_output(GPIO_PTU5, 0); #if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE) /* enable MMCIF (needs DS2.6,7 set to OFF,ON) */ gpio_request(GPIO_FN_MMC_D7, NULL); gpio_request(GPIO_FN_MMC_D6, NULL); gpio_request(GPIO_FN_MMC_D5, NULL); gpio_request(GPIO_FN_MMC_D4, NULL); gpio_request(GPIO_FN_MMC_D3, NULL); gpio_request(GPIO_FN_MMC_D2, NULL); gpio_request(GPIO_FN_MMC_D1, NULL); gpio_request(GPIO_FN_MMC_D0, NULL); gpio_request(GPIO_FN_MMC_CLK, NULL); gpio_request(GPIO_FN_MMC_CMD, NULL); gpio_request(GPIO_PTB7, NULL); gpio_direction_output(GPIO_PTB7, 0); /* I/O buffer drive ability is high for MMCIF */ __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA); #endif /* enable I2C device */ i2c_register_board_info(0, i2c0_devices, ARRAY_SIZE(i2c0_devices)); i2c_register_board_info(1, i2c1_devices, ARRAY_SIZE(i2c1_devices)); #if defined(CONFIG_VIDEO_SH_VOU) || defined(CONFIG_VIDEO_SH_VOU_MODULE) /* VOU */ gpio_request(GPIO_FN_DV_D15, NULL); gpio_request(GPIO_FN_DV_D14, NULL); gpio_request(GPIO_FN_DV_D13, NULL); gpio_request(GPIO_FN_DV_D12, NULL); gpio_request(GPIO_FN_DV_D11, NULL); gpio_request(GPIO_FN_DV_D10, NULL); gpio_request(GPIO_FN_DV_D9, NULL); gpio_request(GPIO_FN_DV_D8, NULL); gpio_request(GPIO_FN_DV_CLKI, NULL); gpio_request(GPIO_FN_DV_CLK, NULL); gpio_request(GPIO_FN_DV_VSYNC, NULL); gpio_request(GPIO_FN_DV_HSYNC, NULL); /* AK8813 power / reset sequence */ gpio_request(GPIO_PTG4, NULL); gpio_request(GPIO_PTU3, NULL); /* Reset */ gpio_direction_output(GPIO_PTG4, 0); /* Power down */ gpio_direction_output(GPIO_PTU3, 1); udelay(10); /* Power up, reset */ gpio_set_value(GPIO_PTU3, 0); udelay(10); /* Remove reset */ gpio_set_value(GPIO_PTG4, 1); #endif return platform_add_devices(ecovec_devices, ARRAY_SIZE(ecovec_devices)); }
static void __init osk_mistral_init(void) { /* NOTE: we could actually tell if there's a Mistral board * attached, e.g. by trying to read something from the ads7846. * But this arch_init() code is too early for that, since we * can't talk to the ads or even the i2c eeprom. */ /* parallel camera interface */ omap_cfg_reg(J15_1610_CAM_LCLK); omap_cfg_reg(J18_1610_CAM_D7); omap_cfg_reg(J19_1610_CAM_D6); omap_cfg_reg(J14_1610_CAM_D5); omap_cfg_reg(K18_1610_CAM_D4); omap_cfg_reg(K19_1610_CAM_D3); omap_cfg_reg(K15_1610_CAM_D2); omap_cfg_reg(K14_1610_CAM_D1); omap_cfg_reg(L19_1610_CAM_D0); omap_cfg_reg(L18_1610_CAM_VS); omap_cfg_reg(L15_1610_CAM_HS); omap_cfg_reg(M19_1610_CAM_RSTZ); omap_cfg_reg(Y15_1610_CAM_OUTCLK); /* serial camera interface */ omap_cfg_reg(H19_1610_CAM_EXCLK); omap_cfg_reg(W13_1610_CCP_CLKM); omap_cfg_reg(Y12_1610_CCP_CLKP); /* CCP_DATAM CONFLICTS WITH UART1.TX (and serial console) */ /* omap_cfg_reg(Y14_1610_CCP_DATAM); */ omap_cfg_reg(W14_1610_CCP_DATAP); /* CAM_PWDN */ if (gpio_request(11, "cam_pwdn") == 0) { omap_cfg_reg(N20_1610_GPIO11); gpio_direction_output(11, 0); } else pr_debug("OSK+Mistral: CAM_PWDN is awol\n"); /* omap_cfg_reg(P19_1610_GPIO6); */ /* BUSY */ gpio_request(6, "ts_busy"); gpio_direction_input(6); omap_cfg_reg(P20_1610_GPIO4); /* PENIRQ */ gpio_request(4, "ts_int"); gpio_direction_input(4); irq_set_irq_type(gpio_to_irq(4), IRQ_TYPE_EDGE_FALLING); mistral_boardinfo[0].irq = gpio_to_irq(4); spi_register_board_info(mistral_boardinfo, ARRAY_SIZE(mistral_boardinfo)); /* the sideways button (SW1) is for use as a "wakeup" button * * NOTE: The Mistral board has the wakeup button (SW1) wired * to the LCD 3.3V rail, which is powered down during suspend. * To allow this button to wake up the omap, work around this * HW bug by rewiring SW1 to use the main 3.3V rail. */ omap_cfg_reg(N15_1610_MPUIO2); if (gpio_request(OMAP_MPUIO(2), "wakeup") == 0) { int ret = 0; int irq = gpio_to_irq(OMAP_MPUIO(2)); gpio_direction_input(OMAP_MPUIO(2)); irq_set_irq_type(irq, IRQ_TYPE_EDGE_RISING); #ifdef CONFIG_PM /* share the IRQ in case someone wants to use the * button for more than wakeup from system sleep. */ ret = request_irq(irq, &osk_mistral_wake_interrupt, IRQF_SHARED, "mistral_wakeup", &osk_mistral_wake_interrupt); if (ret != 0) { gpio_free(OMAP_MPUIO(2)); printk(KERN_ERR "OSK+Mistral: no wakeup irq, %d?\n", ret); } else enable_irq_wake(irq); #endif } else printk(KERN_ERR "OSK+Mistral: wakeup button is awol\n"); /* LCD: backlight, and power; power controls other devices on the * board, like the touchscreen, EEPROM, and wakeup (!) switch. */ omap_cfg_reg(PWL); if (gpio_request(2, "lcd_pwr") == 0) gpio_direction_output(2, 1); /* * GPIO based LEDs */ omap_cfg_reg(P18_1610_GPIO3); omap_cfg_reg(MPUIO4); i2c_register_board_info(1, mistral_i2c_board_info, ARRAY_SIZE(mistral_i2c_board_info)); platform_add_devices(mistral_devices, ARRAY_SIZE(mistral_devices)); }
static void ek_add_device_spi(void) { spi_register_board_info(ek_spi_devices, ARRAY_SIZE(ek_spi_devices)); at91_add_device_spi(0, &spi_pdata); }
static void __init smdkc110_machine_init(void) { struct clk *arm_clk; arm_clk = clk_get(NULL, "fclk"); if (arm_clk == NULL) { memcpy(&max8698_platform_default_data, &max8698_platform_data_1, sizeof(struct max8698_platform_data)); printk(KERN_ERR "get fclk clock failed\n"); } else { printk(KERN_INFO "arm_clk = %lu\n", arm_clk->rate); switch (arm_clk->rate) { case 800*1000*1000: memcpy(&max8698_platform_default_data, &max8698_platform_data_0, sizeof(struct max8698_platform_data)); break; case 1000*1000*1000: memcpy(&max8698_platform_default_data, &max8698_platform_data_1, sizeof(struct max8698_platform_data)); break; default: printk(KERN_ERR "Set to default voltage value\n"); memcpy(&max8698_platform_default_data, &max8698_platform_data_1, sizeof(struct max8698_platform_data)); break; } clk_put(arm_clk); } #ifdef CONFIG_DM9000 smdkv210_dm9000_set(); #endif s3c_pm_init(); s3c_i2c0_set_platdata(NULL); s3c_i2c1_set_platdata(NULL); s3c_i2c2_set_platdata(NULL); i2c_register_board_info(0, smdkc110_i2c_devs0, ARRAY_SIZE(smdkc110_i2c_devs0)); i2c_register_board_info(1, smdkc110_i2c_devs1, ARRAY_SIZE(smdkc110_i2c_devs1)); i2c_register_board_info(2, smdkc110_i2c_devs2, ARRAY_SIZE(smdkc110_i2c_devs2)); s3c_ide_set_platdata(&smdkc110_ide_pdata); #ifdef CONFIG_S3C64XX_DEV_SPI if (!gpio_request(S5PV210_GPB(1), "SPI_CS0")) { gpio_direction_output(S5PV210_GPB(1), 1); s3c_gpio_cfgpin(S5PV210_GPB(1), S3C_GPIO_SFN(1)); s3c_gpio_setpull(S5PV210_GPB(1), S3C_GPIO_PULL_UP); s5pv210_spi_set_info(0, S5PV210_SPI_SRCCLK_PCLK, ARRAY_SIZE(smdk_spi0_csi)); } if (!gpio_request(S5PV210_GPB(5), "SPI_CS1")) { gpio_direction_output(S5PV210_GPB(5), 1); s3c_gpio_cfgpin(S5PV210_GPB(5), S3C_GPIO_SFN(1)); s3c_gpio_setpull(S5PV210_GPB(5), S3C_GPIO_PULL_UP); s5pv210_spi_set_info(1, S5PV210_SPI_SRCCLK_PCLK, ARRAY_SIZE(smdk_spi1_csi)); } spi_register_board_info(s3c_spi_devs, ARRAY_SIZE(s3c_spi_devs)); #endif #ifdef CONFIG_S3C_DEV_HSMMC s3c_sdhci0_set_platdata(&smdkc110_hsmmc0_pdata); #endif #ifdef CONFIG_S3C_DEV_HSMMC1 s3c_sdhci1_set_platdata(&smdkc110_hsmmc1_pdata); #endif #ifdef CONFIG_S3C_DEV_HSMMC2 s3c_sdhci2_set_platdata(&smdkc110_hsmmc2_pdata); #endif #ifdef CONFIG_S3C_DEV_HSMMC3 s3c_sdhci3_set_platdata(&smdkc110_hsmmc3_pdata); #endif #ifdef CONFIG_S3C_DEV_HWMON s3c_hwmon_set_platdata(&smdkc110_hwmon_pdata); #endif #ifdef CONFIG_TOUCHSCREEN_S3C2410 #ifdef CONFIG_S3C_DEV_ADC s3c24xx_ts_set_platdata(&s3c_ts_platform); #endif #ifdef CONFIG_S3C_DEV_ADC1 s3c24xx_ts1_set_platdata(&s3c_ts_platform); #endif #endif #if defined(CONFIG_VIDEO_TV20) || defined(CONFIG_VIDEO_TVOUT) s5p_hdmi_hpd_set_platdata(&hdmi_hpd_data); s5p_hdmi_cec_set_platdata(&hdmi_cec_data); #endif platform_add_devices(smdkc110_devices, ARRAY_SIZE(smdkc110_devices)); }
static void __init cm_x300_init_spi(void) { spi_register_board_info(cm_x300_spi_devices, ARRAY_SIZE(cm_x300_spi_devices)); platform_device_register(&cm_x300_spi_gpio); }
static void __init corgi_init_spi(void) { pxa2xx_set_spi_info(1, &corgi_spi_info); spi_register_board_info(ARRAY_AND_SIZE(corgi_spi_devices)); }
static __init void da850_evm_init(void) { int ret; ret = da850_register_gpio(); if (ret) pr_warn("%s: GPIO init failed: %d\n", __func__, ret); ret = pmic_tps65070_init(); if (ret) pr_warn("%s: TPS65070 PMIC init failed: %d\n", __func__, ret); ret = da850_register_edma(da850_edma_rsv); if (ret) pr_warn("%s: EDMA registration failed: %d\n", __func__, ret); ret = davinci_cfg_reg_list(da850_i2c0_pins); if (ret) pr_warn("%s: I2C0 mux setup failed: %d\n", __func__, ret); ret = da8xx_register_i2c(0, &da850_evm_i2c_0_pdata); if (ret) pr_warn("%s: I2C0 registration failed: %d\n", __func__, ret); ret = da8xx_register_watchdog(); if (ret) pr_warn("%s: watchdog registration failed: %d\n", __func__, ret); if (HAS_MMC) { ret = davinci_cfg_reg_list(da850_evm_mmcsd0_pins); if (ret) pr_warn("%s: MMCSD0 mux setup failed: %d\n", __func__, ret); ret = gpio_request(DA850_MMCSD_CD_PIN, "MMC CD\n"); if (ret) pr_warn("%s: can not open GPIO %d\n", __func__, DA850_MMCSD_CD_PIN); gpio_direction_input(DA850_MMCSD_CD_PIN); ret = gpio_request(DA850_MMCSD_WP_PIN, "MMC WP\n"); if (ret) pr_warn("%s: can not open GPIO %d\n", __func__, DA850_MMCSD_WP_PIN); gpio_direction_input(DA850_MMCSD_WP_PIN); ret = da8xx_register_mmcsd0(&da850_mmc_config); if (ret) pr_warn("%s: MMCSD0 registration failed: %d\n", __func__, ret); ret = da850_wl12xx_init(); if (ret) pr_warn("%s: WL12xx initialization failed: %d\n", __func__, ret); } davinci_serial_init(da8xx_serial_device); i2c_register_board_info(1, da850_evm_i2c_devices, ARRAY_SIZE(da850_evm_i2c_devices)); /* * shut down uart 0 and 1; they are not used on the board and * accessing them causes endless "too much work in irq53" messages * with arago fs */ __raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30); __raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30); ret = davinci_cfg_reg_list(da850_evm_mcasp_pins); if (ret) pr_warn("%s: McASP mux setup failed: %d\n", __func__, ret); da850_evm_snd_data.sram_pool = sram_get_gen_pool(); da8xx_register_mcasp(0, &da850_evm_snd_data); ret = davinci_cfg_reg_list(da850_lcdcntl_pins); if (ret) pr_warn("%s: LCDC mux setup failed: %d\n", __func__, ret); ret = da8xx_register_uio_pruss(); if (ret) pr_warn("da850_evm_init: pruss initialization failed: %d\n", ret); /* Handle board specific muxing for LCD here */ ret = davinci_cfg_reg_list(da850_evm_lcdc_pins); if (ret) pr_warn("%s: EVM specific LCD mux setup failed: %d\n", __func__, ret); ret = da850_lcd_hw_init(); if (ret) pr_warn("%s: LCD initialization failed: %d\n", __func__, ret); sharp_lk043t1dg01_pdata.panel_power_ctrl = da850_panel_power_ctrl, ret = da8xx_register_lcdc(&sharp_lk043t1dg01_pdata); if (ret) pr_warn("%s: LCDC registration failed: %d\n", __func__, ret); ret = da8xx_register_rtc(); if (ret) pr_warn("%s: RTC setup failed: %d\n", __func__, ret); ret = da850_evm_init_cpufreq(); if (ret) pr_warn("%s: cpufreq registration failed: %d\n", __func__, ret); ret = da8xx_register_cpuidle(); if (ret) pr_warn("%s: cpuidle registration failed: %d\n", __func__, ret); ret = da850_register_pm(&da850_pm_device); if (ret) pr_warn("%s: suspend registration failed: %d\n", __func__, ret); da850_vpif_init(); ret = spi_register_board_info(da850evm_spi_info, ARRAY_SIZE(da850evm_spi_info)); if (ret) pr_warn("%s: spi info registration failed: %d\n", __func__, ret); ret = da8xx_register_spi_bus(1, ARRAY_SIZE(da850evm_spi_info)); if (ret) pr_warn("%s: SPI 1 registration failed: %d\n", __func__, ret); ret = da850_register_sata(DA850EVM_SATA_REFCLKPN_RATE); if (ret) pr_warn("%s: SATA registration failed: %d\n", __func__, ret); da850_evm_setup_mac_addr(); ret = da8xx_register_rproc(); if (ret) pr_warn("%s: dsp/rproc registration failed: %d\n", __func__, ret); }
static void __init z2_spi_init(void) { pxa2xx_set_spi_info(1, &pxa_ssp1_master_info); pxa2xx_set_spi_info(2, &pxa_ssp2_master_info); spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info)); }
static void __init pca100_init(void) { int ret; /* SSI unit */ mxc_audmux_v1_configure_port(MX27_AUDMUX_HPCR1_SSI0, MXC_AUDMUX_V1_PCR_SYN | /* 4wire mode */ MXC_AUDMUX_V1_PCR_TFCSEL(3) | MXC_AUDMUX_V1_PCR_TCLKDIR | /* clock is output */ MXC_AUDMUX_V1_PCR_RXDSEL(3)); mxc_audmux_v1_configure_port(3, MXC_AUDMUX_V1_PCR_SYN | /* 4wire mode */ MXC_AUDMUX_V1_PCR_TFCSEL(0) | MXC_AUDMUX_V1_PCR_TFSDIR | MXC_AUDMUX_V1_PCR_RXDSEL(0)); ret = mxc_gpio_setup_multiple_pins(pca100_pins, ARRAY_SIZE(pca100_pins), "PCA100"); if (ret) printk(KERN_ERR "pca100: Failed to setup pins (%d)\n", ret); mxc_register_device(&imx_ssi_device0, &pca100_ssi_pdata); imx27_add_imx_uart0(&uart_pdata); mxc_register_device(&mxc_sdhc_device1, &sdhc_pdata); imx27_add_mxc_nand(&pca100_nand_board_info); /* only the i2c master 1 is used on this CPU card */ i2c_register_board_info(1, pca100_i2c_devices, ARRAY_SIZE(pca100_i2c_devices)); imx27_add_i2c_imx1(&pca100_i2c1_data); #if defined(CONFIG_SPI_IMX) || defined(CONFIG_SPI_IMX_MODULE) mxc_gpio_mode(GPIO_PORTD | 28 | GPIO_GPIO | GPIO_IN); mxc_gpio_mode(GPIO_PORTD | 27 | GPIO_GPIO | GPIO_IN); spi_register_board_info(pca100_spi_board_info, ARRAY_SIZE(pca100_spi_board_info)); imx27_add_spi_imx0(&pca100_spi0_data); #endif gpio_request(OTG_PHY_CS_GPIO, "usb-otg-cs"); gpio_direction_output(OTG_PHY_CS_GPIO, 1); gpio_request(USBH2_PHY_CS_GPIO, "usb-host2-cs"); gpio_direction_output(USBH2_PHY_CS_GPIO, 1); #if defined(CONFIG_USB_ULPI) if (otg_mode_host) { otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); mxc_register_device(&mxc_otg_host, &otg_pdata); } usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); mxc_register_device(&mxc_usbh2, &usbh2_pdata); #endif if (!otg_mode_host) { gpio_set_value(OTG_PHY_CS_GPIO, 0); mxc_register_device(&mxc_otg_udc_device, &otg_device_pdata); } mxc_register_device(&mxc_fb_device, &pca100_fb_data); platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); }
/* * system init for baseboard usage. Will be called by cpuimx27 init. * * Add platform devices present on this baseboard and init * them from CPU side as far as required to use them later on */ void __init eukrea_mbimx27_baseboard_init(void) { mxc_gpio_setup_multiple_pins(eukrea_mbimx27_pins, ARRAY_SIZE(eukrea_mbimx27_pins), "MBIMX27"); #if defined(CONFIG_SND_SOC_EUKREA_TLV320) \ || defined(CONFIG_SND_SOC_EUKREA_TLV320_MODULE) /* SSI unit master I2S codec connected to SSI_PINS_4*/ mxc_audmux_v1_configure_port(MX27_AUDMUX_HPCR1_SSI0, MXC_AUDMUX_V1_PCR_SYN | MXC_AUDMUX_V1_PCR_TFSDIR | MXC_AUDMUX_V1_PCR_TCLKDIR | MXC_AUDMUX_V1_PCR_RFSDIR | MXC_AUDMUX_V1_PCR_RCLKDIR | MXC_AUDMUX_V1_PCR_TFCSEL(MX27_AUDMUX_HPCR3_SSI_PINS_4) | MXC_AUDMUX_V1_PCR_RFCSEL(MX27_AUDMUX_HPCR3_SSI_PINS_4) | MXC_AUDMUX_V1_PCR_RXDSEL(MX27_AUDMUX_HPCR3_SSI_PINS_4) ); mxc_audmux_v1_configure_port(MX27_AUDMUX_HPCR3_SSI_PINS_4, MXC_AUDMUX_V1_PCR_SYN | MXC_AUDMUX_V1_PCR_RXDSEL(MX27_AUDMUX_HPCR1_SSI0) ); #endif imx27_add_imx_uart1(&uart_pdata); imx27_add_imx_uart2(&uart_pdata); #if !defined(MACH_EUKREA_CPUIMX27_USEUART4) imx27_add_imx_uart3(&uart_pdata); #endif imx27_add_imx_fb(&eukrea_mbimx27_fb_data); imx27_add_mxc_mmc(0, &sdhc_pdata); i2c_register_board_info(0, eukrea_mbimx27_i2c_devices, ARRAY_SIZE(eukrea_mbimx27_i2c_devices)); imx27_add_imx_ssi(0, &eukrea_mbimx27_ssi_pdata); #if defined(CONFIG_TOUCHSCREEN_ADS7846) \ || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) /* ADS7846 Touchscreen controller init */ mxc_gpio_mode(GPIO_PORTD | 25 | GPIO_GPIO | GPIO_IN); ads7846_dev_init(); #endif /* SPI_CS0 init */ mxc_gpio_mode(GPIO_PORTD | 28 | GPIO_GPIO | GPIO_OUT); imx27_add_spi_imx0(&eukrea_mbimx27_spi0_data); spi_register_board_info(eukrea_mbimx27_spi_board_info, ARRAY_SIZE(eukrea_mbimx27_spi_board_info)); /* Leds configuration */ mxc_gpio_mode(GPIO_PORTF | 16 | GPIO_GPIO | GPIO_OUT); mxc_gpio_mode(GPIO_PORTF | 19 | GPIO_GPIO | GPIO_OUT); /* Backlight */ mxc_gpio_mode(GPIO_PORTE | 5 | GPIO_GPIO | GPIO_OUT); gpio_request(GPIO_PORTE | 5, "backlight"); platform_device_register(&eukrea_mbimx27_bl_dev); /* LCD Reset */ mxc_gpio_mode(GPIO_PORTA | 25 | GPIO_GPIO | GPIO_OUT); gpio_request(GPIO_PORTA | 25, "lcd_enable"); platform_device_register(&eukrea_mbimx27_lcd_powerdev); imx27_add_imx_keypad(&eukrea_mbimx27_keymap_data); platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); }