INT32 mtk_wcn_cmb_hw_state_show(VOID) { wmt_plat_gpio_ctrl(PIN_PMU, PIN_STA_SHOW); wmt_plat_gpio_ctrl(PIN_RST, PIN_STA_SHOW); wmt_plat_gpio_ctrl(PIN_RTC, PIN_STA_SHOW); return 0; }
/*! * \brief audio control callback function for CMB_STUB on ALPS * * A platform function required for dynamic binding with CMB_STUB on ALPS. * * \param state desired audio interface state to use * \param flag audio interface control options * * \retval 0 operation success * \retval -1 invalid parameters * \retval < 0 error for operation fail */ INT32 wmt_plat_audio_ctrl(CMB_STUB_AIF_X state, CMB_STUB_AIF_CTRL ctrl) { INT32 iRet = 0; /* input sanity check */ if ((CMB_STUB_AIF_MAX <= state) || (CMB_STUB_AIF_CTRL_MAX <= ctrl)) { return -1; } iRet = 0; /* set host side first */ switch (state) { case CMB_STUB_AIF_0: /* BT_PCM_OFF & FM line in/out */ iRet += wmt_plat_gpio_ctrl(PIN_I2S_GRP, PIN_STA_DEINIT); break; case CMB_STUB_AIF_1: iRet += wmt_plat_gpio_ctrl(PIN_I2S_GRP, PIN_STA_DEINIT); break; case CMB_STUB_AIF_2: iRet += wmt_plat_gpio_ctrl(PIN_I2S_GRP, PIN_STA_INIT); break; case CMB_STUB_AIF_3: iRet += wmt_plat_gpio_ctrl(PIN_I2S_GRP, PIN_STA_INIT); break; default: /* FIXME: move to cust folder? */ WMT_PLAT_ERR_FUNC("invalid state [%d]\n", state); iRet = -1; break; } if (CMB_STUB_AIF_CTRL_EN == ctrl) { WMT_PLAT_INFO_FUNC("call chip aif setting\n"); /* need to control chip side GPIO */ if (NULL != wmt_plat_audio_if_cb) { iRet += (*wmt_plat_audio_if_cb) (state, MTK_WCN_BOOL_FALSE); } else { WMT_PLAT_WARN_FUNC("wmt_plat_audio_if_cb is not registered\n"); iRet -= 1; } } else { WMT_PLAT_INFO_FUNC("skip chip aif setting\n"); } return iRet; }
INT32 mtk_wcn_cmb_hw_rst (VOID) { INT32 iRet = 0; WMT_INFO_FUNC("CMB-HW, hw_rst start, eirq should be disabled before this step\n"); /*1. PMU->output low, RST->output low, sleep off stable time*/ iRet += wmt_plat_gpio_ctrl(PIN_PMU, PIN_STA_OUT_L); iRet += wmt_plat_gpio_ctrl(PIN_RST, PIN_STA_OUT_L); osal_msleep(gPwrSeqTime.offStableTime); /*2. PMU->output high, sleep rst stable time*/ iRet += wmt_plat_gpio_ctrl(PIN_PMU, PIN_STA_OUT_H); osal_msleep(gPwrSeqTime.rstStableTime); /*3. RST->output high, sleep on stable time*/ iRet += wmt_plat_gpio_ctrl(PIN_RST, PIN_STA_OUT_H); osal_msleep(gPwrSeqTime.onStableTime); WMT_INFO_FUNC("CMB-HW, hw_rst finish, eirq should be enabled after this step\n"); return 0; }
/******************************************************************************* * F U N C T I O N S ******************************************************************************** */ INT32 mtk_wcn_cmb_hw_pwr_off(VOID) { INT32 iRet = 0; WMT_INFO_FUNC("CMB-HW, hw_pwr_off start\n"); /*1. disable irq --> should be done when do wmt-ic swDeinit period*/ /* TODO:[FixMe][GeorgeKuo] clarify this */ /*2. set bgf eint/all eint to deinit state, namely input low state*/ iRet += wmt_plat_eirq_ctrl(PIN_BGF_EINT, PIN_STA_DEINIT); iRet += wmt_plat_gpio_ctrl(PIN_BGF_EINT, PIN_STA_DEINIT); WMT_INFO_FUNC ("CMB-HW, BGF_EINT IRQ unregistered and set BGF_EINT GPIO to correct state!\n"); /* 2.1 set ALL_EINT pin to correct state even it is not used currently */ iRet += wmt_plat_eirq_ctrl(PIN_ALL_EINT, PIN_STA_EINT_DIS); WMT_INFO_FUNC("CMB-HW, ALL_EINT IRQ unregistered and disabled\n"); iRet += wmt_plat_gpio_ctrl(PIN_ALL_EINT, PIN_STA_DEINIT); /* 2.2 deinit gps sync */ iRet += wmt_plat_gpio_ctrl(PIN_GPS_SYNC, PIN_STA_DEINIT); /*3. set audio interface to CMB_STUB_AIF_0, BT PCM OFF, I2S OFF*/ iRet += wmt_plat_audio_ctrl(CMB_STUB_AIF_0, CMB_STUB_AIF_CTRL_DIS); /*4. set control gpio into deinit state, namely input low state*/ iRet += wmt_plat_gpio_ctrl(PIN_SDIO_GRP, PIN_STA_DEINIT); iRet += wmt_plat_gpio_ctrl(PIN_RST, PIN_STA_OUT_L); iRet += wmt_plat_gpio_ctrl(PIN_PMU, PIN_STA_OUT_L); /*5. set uart tx/rx into deinit state, namely input low state*/ iRet += wmt_plat_gpio_ctrl(PIN_UART_GRP, PIN_STA_DEINIT); /* 6. Last, LDO output low */ iRet += wmt_plat_gpio_ctrl(PIN_LDO, PIN_STA_OUT_L); /*7. deinit gps_lna*/ iRet += wmt_plat_gpio_ctrl(PIN_GPS_LNA, PIN_STA_DEINIT); WMT_INFO_FUNC("CMB-HW, hw_pwr_off finish\n"); return iRet; }
INT32 mtk_wcn_consys_hw_gpio_ctrl (UINT32 on) { INT32 iRet = 0; WMT_PLAT_INFO_FUNC("CONSYS-HW-GPIO-CTRL(0x%08x), start\n",on); if(on) { /*if external modem used,GPS_SYNC still needed to control*/ iRet += wmt_plat_gpio_ctrl(PIN_GPS_SYNC, PIN_STA_INIT); iRet += wmt_plat_gpio_ctrl(PIN_GPS_LNA, PIN_STA_INIT); iRet += wmt_plat_gpio_ctrl(PIN_I2S_GRP,PIN_STA_INIT); /*set EINT< -ommited-> move this to WMT-IC module, where common sdio interface will be identified and do proper operation*/ // TODO: [FixMe][GeorgeKuo] double check if BGF_INT is implemented ok //iRet += wmt_plat_gpio_ctrl(PIN_BGF_EINT, PIN_STA_MUX); #if CFG_WMT_DUMP_INT_STATUS wmt_plat_BGF_irq_dump_status(); #endif iRet += wmt_plat_eirq_ctrl(PIN_BGF_EINT, PIN_STA_INIT); #if CFG_WMT_DUMP_INT_STATUS wmt_plat_BGF_irq_dump_status(); #endif iRet += wmt_plat_eirq_ctrl(PIN_BGF_EINT, PIN_STA_EINT_DIS); #if CFG_WMT_DUMP_INT_STATUS wmt_plat_BGF_irq_dump_status(); #endif WMT_PLAT_INFO_FUNC("CONSYS-HW, BGF IRQ registered and disabled \n"); }else{ /* set bgf eint/all eint to deinit state, namely input low state*/ iRet += wmt_plat_eirq_ctrl(PIN_BGF_EINT, PIN_STA_EINT_DIS); iRet += wmt_plat_eirq_ctrl(PIN_BGF_EINT, PIN_STA_DEINIT); #if CFG_WMT_DUMP_INT_STATUS wmt_plat_BGF_irq_dump_status(); #endif WMT_PLAT_INFO_FUNC("CONSYS-HW, BGF IRQ unregistered and disabled\n"); //iRet += wmt_plat_gpio_ctrl(PIN_BGF_EINT, PIN_STA_DEINIT); /*if external modem used,GPS_SYNC still needed to control*/ iRet += wmt_plat_gpio_ctrl(PIN_GPS_SYNC, PIN_STA_DEINIT); iRet += wmt_plat_gpio_ctrl(PIN_I2S_GRP,PIN_STA_DEINIT); /* deinit gps_lna*/ iRet += wmt_plat_gpio_ctrl(PIN_GPS_LNA, PIN_STA_DEINIT); } WMT_PLAT_INFO_FUNC("CONSYS-HW-GPIO-CTRL(0x%08x), finish\n",on); return iRet; }
static INT32 wmt_ctrl_gps_lna_set(P_WMT_CTRL_DATA pData) { INT32 iret; WMT_INFO_FUNC("ctrl GPS_LNA(%d)\n", (0 == pData->au4CtrlData[0]) ? PIN_STA_DEINIT : PIN_STA_OUT_H); iret = wmt_plat_gpio_ctrl(PIN_GPS_LNA, (0 == pData->au4CtrlData[0]) ? PIN_STA_DEINIT : PIN_STA_OUT_H); if (iret) { WMT_WARN_FUNC("ctrl GPS_SYNC(%d) fail!(%d) ignore it...\n", (0 == pData->au4CtrlData[0]) ? PIN_STA_DEINIT : PIN_STA_OUT_H, iret); } return 0; }
INT32 mtk_wcn_consys_hw_gpio_ctrl(UINT32 on) { INT32 iRet = 0; WMT_PLAT_DBG_FUNC("CONSYS-HW-GPIO-CTRL(0x%08x), start\n", on); if (on) { /*if external modem used,GPS_SYNC still needed to control */ iRet += wmt_plat_gpio_ctrl(PIN_GPS_SYNC, PIN_STA_INIT); iRet += wmt_plat_gpio_ctrl(PIN_GPS_LNA, PIN_STA_INIT); iRet += wmt_plat_gpio_ctrl(PIN_I2S_GRP, PIN_STA_INIT); /* TODO: [FixMe][GeorgeKuo] double check if BGF_INT is implemented ok */ /* iRet += wmt_plat_gpio_ctrl(PIN_BGF_EINT, PIN_STA_MUX); */ iRet += wmt_plat_eirq_ctrl(PIN_BGF_EINT, PIN_STA_INIT); iRet += wmt_plat_eirq_ctrl(PIN_BGF_EINT, PIN_STA_EINT_DIS); WMT_PLAT_DBG_FUNC("CONSYS-HW, BGF IRQ registered and disabled\n"); } else { /* set bgf eint/all eint to deinit state, namely input low state */ iRet += wmt_plat_eirq_ctrl(PIN_BGF_EINT, PIN_STA_EINT_DIS); iRet += wmt_plat_eirq_ctrl(PIN_BGF_EINT, PIN_STA_DEINIT); WMT_PLAT_DBG_FUNC("CONSYS-HW, BGF IRQ unregistered and disabled\n"); /* iRet += wmt_plat_gpio_ctrl(PIN_BGF_EINT, PIN_STA_DEINIT); */ /*if external modem used,GPS_SYNC still needed to control */ iRet += wmt_plat_gpio_ctrl(PIN_GPS_SYNC, PIN_STA_DEINIT); iRet += wmt_plat_gpio_ctrl(PIN_I2S_GRP, PIN_STA_DEINIT); /* deinit gps_lna */ iRet += wmt_plat_gpio_ctrl(PIN_GPS_LNA, PIN_STA_DEINIT); } WMT_PLAT_DBG_FUNC("CONSYS-HW-GPIO-CTRL(0x%08x), finish\n", on); return iRet; }
INT32 mtk_wcn_cmb_hw_pwr_on (VOID) { static UINT32 _pwr_first_time = 1; INT32 iRet = 0; WMT_INFO_FUNC("CMB-HW, hw_pwr_on start\n"); #if 0 //IRQ should in inact state before power on, so this step is not needed /* disable interrupt firstly */ iRet += wmt_plat_eirq_ctrl(PIN_BGF_EINT, PIN_STA_EINT_DIS); iRet += wmt_plat_eirq_ctrl(PIN_ALL_EINT, PIN_STA_EINT_DIS); #endif /*set all control and eint gpio to init state, namely input low mode*/ iRet += wmt_plat_gpio_ctrl(PIN_LDO, PIN_STA_INIT); iRet += wmt_plat_gpio_ctrl(PIN_PMU, PIN_STA_INIT); iRet += wmt_plat_gpio_ctrl(PIN_RST, PIN_STA_INIT); iRet += wmt_plat_gpio_ctrl(PIN_SDIO_GRP, PIN_STA_INIT); iRet += wmt_plat_gpio_ctrl(PIN_BGF_EINT, PIN_STA_INIT); iRet += wmt_plat_gpio_ctrl(PIN_ALL_EINT, PIN_STA_INIT); iRet += wmt_plat_gpio_ctrl(PIN_GPS_SYNC, PIN_STA_INIT); iRet += wmt_plat_gpio_ctrl(PIN_GPS_LNA, PIN_STA_INIT); // wmt_plat_gpio_ctrl(PIN_WIFI_EINT, PIN_STA_INIT); /* WIFI_EINT is controlled by SDIO host driver */ // TODO: [FixMe][George]:WIFI_EINT is used in common SDIO /*1. pull high LDO to supply power to chip*/ iRet += wmt_plat_gpio_ctrl(PIN_LDO, PIN_STA_OUT_H); osal_msleep(gPwrSeqTime.ldoStableTime); /* 2. export RTC clock to chip*/ if (_pwr_first_time) { /* rtc clock should be output all the time, so no need to enable output again*/ iRet += wmt_plat_gpio_ctrl(PIN_RTC, PIN_STA_INIT); osal_msleep(gPwrSeqTime.rtcStableTime); WMT_INFO_FUNC("CMB-HW, rtc clock exported\n"); } /*3. set UART Tx/Rx to UART mode*/ iRet += wmt_plat_gpio_ctrl(PIN_UART_GRP, PIN_STA_INIT); /*4. PMU->output low, RST->output low, sleep off stable time*/ iRet += wmt_plat_gpio_ctrl(PIN_PMU, PIN_STA_OUT_L); iRet += wmt_plat_gpio_ctrl(PIN_RST, PIN_STA_OUT_L); osal_msleep(gPwrSeqTime.offStableTime); /*5. PMU->output high, sleep rst stable time*/ iRet += wmt_plat_gpio_ctrl(PIN_PMU, PIN_STA_OUT_H); osal_msleep(gPwrSeqTime.rstStableTime); /*6. RST->output high, sleep on stable time*/ iRet += wmt_plat_gpio_ctrl(PIN_RST, PIN_STA_OUT_H); osal_msleep(gPwrSeqTime.onStableTime); /*7. set audio interface to CMB_STUB_AIF_1, BT PCM ON, I2S OFF*/ /* BT PCM bus default mode. Real control is done by audio */ iRet += wmt_plat_audio_ctrl(CMB_STUB_AIF_1, CMB_STUB_AIF_CTRL_DIS); /*8. set EINT< -ommited-> move this to WMT-IC module, where common sdio interface will be identified and do proper operation*/ // TODO: [FixMe][GeorgeKuo] double check if BGF_INT is implemented ok iRet += wmt_plat_gpio_ctrl(PIN_BGF_EINT, PIN_STA_MUX); iRet += wmt_plat_eirq_ctrl(PIN_BGF_EINT, PIN_STA_INIT); iRet += wmt_plat_eirq_ctrl(PIN_BGF_EINT, PIN_STA_EINT_DIS); WMT_INFO_FUNC("CMB-HW, BGF_EINT IRQ registered and disabled \n"); /* 8.1 set ALL_EINT pin to correct state even it is not used currently */ iRet += wmt_plat_gpio_ctrl(PIN_ALL_EINT, PIN_STA_MUX); iRet += wmt_plat_eirq_ctrl(PIN_ALL_EINT, PIN_STA_INIT); iRet += wmt_plat_eirq_ctrl(PIN_ALL_EINT, PIN_STA_EINT_DIS); WMT_INFO_FUNC("CMB-HW, hw_pwr_on finish (%d)\n", iRet); _pwr_first_time = 0; return iRet; }
/*! * \brief audio control callback function for CMB_STUB on ALPS * * A platform function required for dynamic binding with CMB_STUB on ALPS. * * \param state desired audio interface state to use * \param flag audio interface control options * * \retval 0 operation success * \retval -1 invalid parameters * \retval < 0 error for operation fail */ INT32 wmt_plat_audio_ctrl(CMB_STUB_AIF_X state, CMB_STUB_AIF_CTRL ctrl) { INT32 iRet = 0; UINT32 pinShare; /* input sanity check */ if ((CMB_STUB_AIF_MAX <= state) || (CMB_STUB_AIF_CTRL_MAX <= ctrl)) { iRet = -1; WMT_ERR_FUNC ("WMT-PLAT: invalid para, state(%d), ctrl(%d),iRet(%d) \n", state, ctrl, iRet); return iRet; } if (0 /*I2S/PCM share pin */ ) { /* TODO: [FixMe][GeorgeKuo] how about MT6575? The following is applied to MT6573E1 only!! */ pinShare = 1; WMT_INFO_FUNC("PCM/I2S pin share\n"); } else { /* E1 later */ pinShare = 0; WMT_INFO_FUNC("PCM/I2S pin seperate\n"); } iRet = 0; /* set host side first */ switch (state) { case CMB_STUB_AIF_0: /* BT_PCM_OFF & FM line in/out */ iRet += wmt_plat_gpio_ctrl(PIN_PCM_GRP, PIN_STA_DEINIT); iRet += wmt_plat_gpio_ctrl(PIN_I2S_GRP, PIN_STA_DEINIT); break; case CMB_STUB_AIF_1: iRet += wmt_plat_gpio_ctrl(PIN_PCM_GRP, PIN_STA_INIT); iRet += wmt_plat_gpio_ctrl(PIN_I2S_GRP, PIN_STA_DEINIT); break; case CMB_STUB_AIF_2: iRet += wmt_plat_gpio_ctrl(PIN_PCM_GRP, PIN_STA_DEINIT); iRet += wmt_plat_gpio_ctrl(PIN_I2S_GRP, PIN_STA_INIT); break; case CMB_STUB_AIF_3: iRet += wmt_plat_gpio_ctrl(PIN_PCM_GRP, PIN_STA_INIT); iRet += wmt_plat_gpio_ctrl(PIN_I2S_GRP, PIN_STA_INIT); break; default: /* FIXME: move to cust folder? */ WMT_ERR_FUNC("invalid state [%d]\n", state); return -1; break; } if (CMB_STUB_AIF_CTRL_EN == ctrl) { WMT_INFO_FUNC("call chip aif setting \n"); /* need to control chip side GPIO */ /* iRet += wmt_lib_set_aif(state, (pinShare) ? MTK_WCN_BOOL_TRUE : MTK_WCN_BOOL_FALSE); */ if (NULL != wmt_plat_audio_if_cb) { iRet += (*wmt_plat_audio_if_cb) (state, (pinShare) ? MTK_WCN_BOOL_TRUE : MTK_WCN_BOOL_FALSE); } else { WMT_WARN_FUNC ("wmt_plat_audio_if_cb is not registered \n"); iRet -= 1; } } else { WMT_INFO_FUNC("skip chip aif setting \n"); } return iRet; }
/*! * \brief audio control callback function for CMB_STUB on ALPS * * A platform function required for dynamic binding with CMB_STUB on ALPS. * * \param state desired audio interface state to use * \param flag audio interface control options * * \retval 0 operation success * \retval -1 invalid parameters * \retval < 0 error for operation fail */ INT32 wmt_plat_audio_ctrl (CMB_STUB_AIF_X state, CMB_STUB_AIF_CTRL ctrl) { INT32 iRet = 0; UINT32 pinShare = 0; UINT32 mergeIfSupport = 0; /* input sanity check */ if ( (CMB_STUB_AIF_MAX <= state) || (CMB_STUB_AIF_CTRL_MAX <= ctrl) ) { return -1; } iRet = 0; /* set host side first */ switch (state) { case CMB_STUB_AIF_0: /* BT_PCM_OFF & FM line in/out */ iRet += wmt_plat_gpio_ctrl(PIN_PCM_GRP, PIN_STA_DEINIT); iRet += wmt_plat_gpio_ctrl(PIN_I2S_GRP, PIN_STA_DEINIT); break; case CMB_STUB_AIF_1: iRet += wmt_plat_gpio_ctrl(PIN_I2S_GRP, PIN_STA_DEINIT); iRet += wmt_plat_gpio_ctrl(PIN_PCM_GRP, PIN_STA_INIT); break; case CMB_STUB_AIF_2: iRet += wmt_plat_gpio_ctrl(PIN_PCM_GRP, PIN_STA_DEINIT); iRet += wmt_plat_gpio_ctrl(PIN_I2S_GRP, PIN_STA_INIT); break; case CMB_STUB_AIF_3: iRet += wmt_plat_gpio_ctrl(PIN_PCM_GRP, PIN_STA_INIT); iRet += wmt_plat_gpio_ctrl(PIN_I2S_GRP, PIN_STA_INIT); break; default: /* FIXME: move to cust folder? */ WMT_ERR_FUNC("invalid state [%d]\n", state); return -1; break; } if (0 != wmt_plat_merge_if_flag_get()) { #if (MTK_WCN_CMB_MERGE_INTERFACE_SUPPORT) WMT_INFO_FUNC("[MT6628]<Merge IF> no need to ctrl combo chip side GPIO \n"); #else mergeIfSupport = 1; #endif } else { mergeIfSupport = 1; } if (0 != mergeIfSupport) { if (CMB_STUB_AIF_CTRL_EN == ctrl) { WMT_INFO_FUNC("call chip aif setting \n"); /* need to control chip side GPIO */ if (NULL != wmt_plat_audio_if_cb) { iRet += (*wmt_plat_audio_if_cb)(state, (pinShare) ? MTK_WCN_BOOL_TRUE : MTK_WCN_BOOL_FALSE); } else { WMT_WARN_FUNC("wmt_plat_audio_if_cb is not registered \n"); iRet -= 1; } } else { WMT_INFO_FUNC("skip chip aif setting \n"); } } return iRet; }
/*! * \brief audio control callback function for CMB_STUB on ALPS * * A platform function required for dynamic binding with CMB_STUB on ALPS. * * \param state desired audio interface state to use * \param flag audio interface control options * * \retval 0 operation success * \retval -1 invalid parameters * \retval < 0 error for operation fail */ INT32 wmt_plat_audio_ctrl (CMB_STUB_AIF_X state, CMB_STUB_AIF_CTRL ctrl) { INT32 iRet; UINT32 pinShare; /* input sanity check */ if ( (CMB_STUB_AIF_MAX <= state) || (CMB_STUB_AIF_CTRL_MAX <= ctrl) ) { return -1; } if (get_chip_eco_ver() == CHIP_E1) { // TODO: [FixMe][GeorgeKuo] how about MT6575? The following is applied to MT6573E1 only!! pinShare = 1; WMT_INFO_FUNC( "ALPS MT6573 CHIP_E1 PCM/I2S pin share\n"); } else{ //E1 later pinShare = 0; WMT_INFO_FUNC( "PCM/I2S pin seperate\n"); } iRet = 0; /* set host side first */ switch (state) { case CMB_STUB_AIF_0: /* BT_PCM_OFF & FM line in/out */ iRet += wmt_plat_gpio_ctrl(PIN_PCM_GRP, PIN_STA_DEINIT); iRet += wmt_plat_gpio_ctrl(PIN_I2S_GRP, PIN_STA_DEINIT); break; case CMB_STUB_AIF_1: iRet += wmt_plat_gpio_ctrl(PIN_PCM_GRP, PIN_STA_INIT); iRet += wmt_plat_gpio_ctrl(PIN_I2S_GRP, PIN_STA_DEINIT); break; case CMB_STUB_AIF_2: iRet += wmt_plat_gpio_ctrl(PIN_PCM_GRP, PIN_STA_DEINIT); iRet += wmt_plat_gpio_ctrl(PIN_I2S_GRP, PIN_STA_INIT); break; case CMB_STUB_AIF_3: iRet += wmt_plat_gpio_ctrl(PIN_PCM_GRP, PIN_STA_INIT); iRet += wmt_plat_gpio_ctrl(PIN_I2S_GRP, PIN_STA_INIT); break; default: /* FIXME: move to cust folder? */ WMT_ERR_FUNC("invalid state [%d]\n", state); return -1; break; } if (CMB_STUB_AIF_CTRL_EN == ctrl) { WMT_INFO_FUNC("call chip aif setting \n"); /* need to control chip side GPIO */ iRet += wmt_lib_set_aif(state, (pinShare) ? MTK_WCN_BOOL_TRUE : MTK_WCN_BOOL_FALSE); } else { WMT_INFO_FUNC("skip chip aif setting \n"); } return iRet; }