MCOperand SampleMCInstLower::
LowerOperand(const MachineOperand& MO) const {
DEBUG(dbgs()
<< ">>> LowerOperand:" << MO
<< " type:" << MO.getType() << "\n");
MachineOperandType MOTy = MO.getType();
switch (MOTy) {
case MachineOperand::MO_Register:
// Ignore all implicit register operands.
if (MO.isImplicit()) break;
return MCOperand::CreateReg(MO.getReg());
case MachineOperand::MO_Immediate:
return MCOperand::CreateImm(MO.getImm());
case MachineOperand::MO_MachineBasicBlock:
case MachineOperand::MO_GlobalAddress:
case MachineOperand::MO_ExternalSymbol:
case MachineOperand::MO_JumpTableIndex:
case MachineOperand::MO_ConstantPoolIndex:
case MachineOperand::MO_BlockAddress:
return LowerSymbolOperand(MO, MOTy);
case MachineOperand::MO_RegisterMask:
break;
default:
llvm_unreachable("unknown operand type");
}
return MCOperand();
}
void MIPrinter::print(const MachineOperand &Op, const TargetRegisterInfo *TRI) {
switch (Op.getType()) {
case MachineOperand::MO_Register:
// TODO: Print register flags.
printReg(Op.getReg(), OS, TRI);
// TODO: Print sub register.
break;
case MachineOperand::MO_Immediate:
OS << Op.getImm();
break;
case MachineOperand::MO_MachineBasicBlock:
OS << "%bb." << Op.getMBB()->getNumber();
if (const auto *BB = Op.getMBB()->getBasicBlock()) {
if (BB->hasName())
OS << '.' << BB->getName();
}
break;
case MachineOperand::MO_GlobalAddress:
// FIXME: Make this faster - print as operand will create a slot tracker to
// print unnamed values for the whole module every time it's called, which
// is inefficient.
Op.getGlobal()->printAsOperand(OS, /*PrintType=*/false, &M);
// TODO: Print offset and target flags.
break;
default:
// TODO: Print the other machine operands.
llvm_unreachable("Can't print this machine operand at the moment");
}
}
Optional<MCOperand>
X86MCInstLower::LowerMachineOperand(const MachineInstr *MI,
const MachineOperand &MO) const {
switch (MO.getType()) {
default:
MI->dump();
llvm_unreachable("unknown operand type");
case MachineOperand::MO_Register:
// Ignore all implicit register operands.
if (MO.isImplicit())
return None;
return MCOperand::createReg(MO.getReg());
case MachineOperand::MO_Immediate:
return MCOperand::createImm(MO.getImm());
case MachineOperand::MO_MachineBasicBlock:
case MachineOperand::MO_GlobalAddress:
case MachineOperand::MO_ExternalSymbol:
return LowerSymbolOperand(MO, GetSymbolFromOperand(MO));
case MachineOperand::MO_MCSymbol:
return LowerSymbolOperand(MO, MO.getMCSymbol());
case MachineOperand::MO_JumpTableIndex:
return LowerSymbolOperand(MO, AsmPrinter.GetJTISymbol(MO.getIndex()));
case MachineOperand::MO_ConstantPoolIndex:
return LowerSymbolOperand(MO, AsmPrinter.GetCPISymbol(MO.getIndex()));
case MachineOperand::MO_BlockAddress:
return LowerSymbolOperand(
MO, AsmPrinter.GetBlockAddressSymbol(MO.getBlockAddress()));
case MachineOperand::MO_RegisterMask:
// Ignore call clobbers.
return None;
}
}
unsigned MipsCodeEmitter::getOperandValue(const MachineOperand &MO,
unsigned relocType) {
switch (MO.getType()) {
case MachineOperand::MO_Immediate:
return MO.getImm();
case MachineOperand::MO_GlobalAddress:
emitGlobalAddress(MO.getGlobal(), relocType, false);
return 0;
case MachineOperand::MO_ExternalSymbol:
emitExternalSymbolAddress(MO.getSymbolName(), relocType);
return 0;
case MachineOperand::MO_MachineBasicBlock:
emitMachineBasicBlock(MO.getMBB(), relocType, MCE.getCurrentPCValue());
return 0;
case MachineOperand::MO_Register:
return MipsRegisterInfo::getRegisterNumbering(MO.getReg());
case MachineOperand::MO_JumpTableIndex:
emitJumpTableAddress(MO.getIndex(), relocType);
return 0;
case MachineOperand::MO_ConstantPoolIndex:
emitConstPoolAddress(MO.getIndex(), relocType);
return 0;
default: return 0;
}
}
static MCOperand LowerOperand(const MachineInstr *MI,
const MachineOperand &MO,
AsmPrinter &AP) {
switch(MO.getType()) {
default: llvm_unreachable("unknown operand type"); break;
case MachineOperand::MO_Register:
if (MO.isImplicit())
break;
return MCOperand::createReg(MO.getReg());
case MachineOperand::MO_Immediate:
return MCOperand::createImm(MO.getImm());
case MachineOperand::MO_MachineBasicBlock:
case MachineOperand::MO_GlobalAddress:
case MachineOperand::MO_BlockAddress:
case MachineOperand::MO_ExternalSymbol:
case MachineOperand::MO_ConstantPoolIndex:
return LowerSymbolOperand(MI, MO, AP);
case MachineOperand::MO_RegisterMask: break;
}
return MCOperand();
}
void HexagonPeephole::ChangeOpInto(MachineOperand &Dst, MachineOperand &Src) {
assert (&Dst != &Src && "Cannot duplicate into itself");
switch (Dst.getType()) {
case MachineOperand::MO_Register:
if (Src.isReg()) {
Dst.setReg(Src.getReg());
} else if (Src.isImm()) {
Dst.ChangeToImmediate(Src.getImm());
} else {
llvm_unreachable("Unexpected src operand type");
}
break;
case MachineOperand::MO_Immediate:
if (Src.isImm()) {
Dst.setImm(Src.getImm());
} else if (Src.isReg()) {
Dst.ChangeToRegister(Src.getReg(), Src.isDef(), Src.isImplicit(),
Src.isKill(), Src.isDead(), Src.isUndef(),
Src.isDebug());
} else {
llvm_unreachable("Unexpected src operand type");
}
break;
default:
llvm_unreachable("Unexpected dst operand type");
break;
}
}
/// isIdenticalTo - Return true if this operand is identical to the specified
/// operand.
bool MachineOperand::isIdenticalTo(const MachineOperand &Other) const {
if (getType() != Other.getType()) return false;
switch (getType()) {
default: assert(0 && "Unrecognized operand type");
case MachineOperand::MO_Register:
return getReg() == Other.getReg() && isDef() == Other.isDef() &&
getSubReg() == Other.getSubReg();
case MachineOperand::MO_Immediate:
return getImm() == Other.getImm();
case MachineOperand::MO_FPImmediate:
return getFPImm() == Other.getFPImm();
case MachineOperand::MO_MachineBasicBlock:
return getMBB() == Other.getMBB();
case MachineOperand::MO_FrameIndex:
return getIndex() == Other.getIndex();
case MachineOperand::MO_ConstantPoolIndex:
return getIndex() == Other.getIndex() && getOffset() == Other.getOffset();
case MachineOperand::MO_JumpTableIndex:
return getIndex() == Other.getIndex();
case MachineOperand::MO_GlobalAddress:
return getGlobal() == Other.getGlobal() && getOffset() == Other.getOffset();
case MachineOperand::MO_ExternalSymbol:
return !strcmp(getSymbolName(), Other.getSymbolName()) &&
getOffset() == Other.getOffset();
}
}
MCOperand MipsMCInstLower::LowerOperand(const MachineOperand &MO,
unsigned offset) const {
MachineOperandType MOTy = MO.getType();
switch (MOTy) {
default: llvm_unreachable("unknown operand type");
case MachineOperand::MO_Register:
// Ignore all implicit register operands.
if (MO.isImplicit()) break;
return MCOperand::CreateReg(MO.getReg());
case MachineOperand::MO_Immediate:
return MCOperand::CreateImm(MO.getImm() + offset);
case MachineOperand::MO_MachineBasicBlock:
case MachineOperand::MO_GlobalAddress:
case MachineOperand::MO_ExternalSymbol:
case MachineOperand::MO_JumpTableIndex:
case MachineOperand::MO_ConstantPoolIndex:
case MachineOperand::MO_BlockAddress:
return LowerSymbolOperand(MO, MOTy, offset);
case MachineOperand::MO_RegisterMask:
break;
}
return MCOperand();
}
void AlphaAsmPrinter::printOp(const MachineOperand &MO, bool IsCallOp) {
const TargetRegisterInfo &RI = *TM.getRegisterInfo();
switch (MO.getType()) {
case MachineOperand::MO_Register:
O << RI.get(MO.getReg()).AsmName;
return;
case MachineOperand::MO_Immediate:
cerr << "printOp() does not handle immediate values\n";
abort();
return;
case MachineOperand::MO_MachineBasicBlock:
printBasicBlockLabel(MO.getMBB());
return;
case MachineOperand::MO_ConstantPoolIndex:
O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << "_"
<< MO.getIndex();
return;
case MachineOperand::MO_ExternalSymbol:
O << MO.getSymbolName();
return;
case MachineOperand::MO_GlobalAddress: {
GlobalValue *GV = MO.getGlobal();
O << Mang->getValueName(GV);
if (GV->isDeclaration() && GV->hasExternalWeakLinkage())
ExtWeakSymbols.insert(GV);
return;
}
case MachineOperand::MO_JumpTableIndex:
O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
<< '_' << MO.getIndex();
return;
default:
O << "<unknown operand type: " << MO.getType() << ">";
return;
}
}
MCOperand LM32MCInstLower::lowerOperand(const MachineOperand &MO) const {
switch (MO.getType()) {
case MachineOperand::MO_Register:
return MCOperand::CreateReg(MO.getReg());
case MachineOperand::MO_Immediate:
return MCOperand::CreateImm(MO.getImm());
default:
return MCOperand::CreateExpr(getExpr(MO));
}
}
void AlphaAsmPrinter::printOp(const MachineOperand &MO, bool IsCallOp) {
const TargetRegisterInfo &RI = *TM.getRegisterInfo();
switch (MO.getType()) {
case MachineOperand::MO_Register:
O << RI.get(MO.getReg()).AsmName;
return;
case MachineOperand::MO_Immediate:
llvm_unreachable("printOp() does not handle immediate values");
return;
case MachineOperand::MO_MachineBasicBlock:
printBasicBlockLabel(MO.getMBB());
return;
case MachineOperand::MO_ConstantPoolIndex:
O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << "_"
<< MO.getIndex();
return;
case MachineOperand::MO_ExternalSymbol:
O << MO.getSymbolName();
return;
case MachineOperand::MO_GlobalAddress:
O << Mang->getMangledName(MO.getGlobal());
return;
case MachineOperand::MO_JumpTableIndex:
O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
<< '_' << MO.getIndex();
return;
default:
O << "<unknown operand type: " << MO.getType() << ">";
return;
}
}
bool EpiphanyAsmPrinter::printSymbolicAddress(const MachineOperand &MO,
bool PrintImmediatePrefix,
StringRef Suffix, raw_ostream &O) {
StringRef Name;
StringRef Modifier;
switch (MO.getType()) {
default:
llvm_unreachable("Unexpected operand for symbolic address constraint");
case MachineOperand::MO_GlobalAddress:
Name = Mang->getSymbol(MO.getGlobal())->getName();
// Global variables may be accessed either via a GOT or in various fun and
// interesting TLS-model specific ways. Set the prefix modifier as
// appropriate here.
if (const GlobalVariable *GV = dyn_cast<GlobalVariable>(MO.getGlobal())) {
Reloc::Model RelocM = TM.getRelocationModel();
if (Subtarget->GVIsIndirectSymbol(GV, RelocM)) {
Modifier = "got";
}
}
break;
case MachineOperand::MO_BlockAddress:
Name = GetBlockAddressSymbol(MO.getBlockAddress())->getName();
break;
case MachineOperand::MO_ExternalSymbol:
Name = MO.getSymbolName();
break;
case MachineOperand::MO_ConstantPoolIndex:
Name = GetCPISymbol(MO.getIndex())->getName();
break;
}
// Some instructions (notably ADRP) don't take the # prefix for
// immediates. Only print it if asked to.
if (PrintImmediatePrefix)
O << '#';
// Only need the joining "_" if both the prefix and the suffix are
// non-null. This little block simply takes care of the four possibly
// combinations involved there.
if (Modifier == "" && Suffix == "")
O << Name;
else if (Modifier == "" && Suffix != "")
O << ":" << Suffix << ':' << Name;
else if (Modifier != "" && Suffix == "")
O << ":" << Modifier << ':' << Name;
else
O << ":" << Modifier << '_' << Suffix << ':' << Name;
return false;
}
bool ARMAsmPrinter::lowerOperand(const MachineOperand &MO,
MCOperand &MCOp) {
switch (MO.getType()) {
default: llvm_unreachable("unknown operand type");
case MachineOperand::MO_Register:
// Ignore all non-CPSR implicit register operands.
if (MO.isImplicit() && MO.getReg() != ARM::CPSR)
return false;
assert(!MO.getSubReg() && "Subregs should be eliminated!");
MCOp = MCOperand::createReg(MO.getReg());
break;
case MachineOperand::MO_Immediate:
MCOp = MCOperand::createImm(MO.getImm());
break;
case MachineOperand::MO_MachineBasicBlock:
MCOp = MCOperand::createExpr(MCSymbolRefExpr::create(
MO.getMBB()->getSymbol(), OutContext));
break;
case MachineOperand::MO_GlobalAddress:
MCOp = GetSymbolRef(MO,
GetARMGVSymbol(MO.getGlobal(), MO.getTargetFlags()));
break;
case MachineOperand::MO_ExternalSymbol:
MCOp = GetSymbolRef(MO,
GetExternalSymbolSymbol(MO.getSymbolName()));
break;
case MachineOperand::MO_JumpTableIndex:
MCOp = GetSymbolRef(MO, GetJTISymbol(MO.getIndex()));
break;
case MachineOperand::MO_ConstantPoolIndex:
if (Subtarget->genExecuteOnly())
llvm_unreachable("execute-only should not generate constant pools");
MCOp = GetSymbolRef(MO, GetCPISymbol(MO.getIndex()));
break;
case MachineOperand::MO_BlockAddress:
MCOp = GetSymbolRef(MO, GetBlockAddressSymbol(MO.getBlockAddress()));
break;
case MachineOperand::MO_FPImmediate: {
APFloat Val = MO.getFPImm()->getValueAPF();
bool ignored;
Val.convert(APFloat::IEEEdouble(), APFloat::rmTowardZero, &ignored);
MCOp = MCOperand::createFPImm(Val.convertToDouble());
break;
}
case MachineOperand::MO_RegisterMask:
// Ignore call clobbers.
return false;
}
return true;
}
MCOperand SystemZMCInstLower::lowerOperand(const MachineOperand &MO) const {
switch (MO.getType()) {
case MachineOperand::MO_Register:
return MCOperand::CreateReg(MO.getReg());
case MachineOperand::MO_Immediate:
return MCOperand::CreateImm(MO.getImm());
default: {
MCSymbolRefExpr::VariantKind Kind = getVariantKind(MO.getTargetFlags());
return MCOperand::CreateExpr(getExpr(MO, Kind));
}
}
}
void AlphaAsmPrinter::printOp(const MachineOperand &MO, raw_ostream &O) {
switch (MO.getType()) {
case MachineOperand::MO_Register:
O << getRegisterName(MO.getReg());
return;
case MachineOperand::MO_Immediate:
assert(0 && "printOp() does not handle immediate values");
return;
case MachineOperand::MO_MachineBasicBlock:
O << *MO.getMBB()->getSymbol();
return;
case MachineOperand::MO_ConstantPoolIndex:
O << MAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << "_"
<< MO.getIndex();
return;
case MachineOperand::MO_ExternalSymbol:
O << MO.getSymbolName();
return;
case MachineOperand::MO_GlobalAddress:
O << *Mang->getSymbol(MO.getGlobal());
return;
case MachineOperand::MO_JumpTableIndex:
O << MAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
<< '_' << MO.getIndex();
return;
default:
O << "<unknown operand type: " << MO.getType() << ">";
return;
}
}
MCOperand SimpleMCInstLower::LowerOperand(const MachineOperand &MO,
unsigned offset) const {
MachineOperandType MOTy = MO.getType();
switch (MOTy)
{
default: llvm_unreachable("unknown operand type");
case MachineOperand::MO_Register:
return MCOperand::CreateReg(MO.getReg());
case MachineOperand::MO_Immediate:
return MCOperand::CreateImm(MO.getImm() + offset);
}
return MCOperand();
}
void MIPrinter::print(const MachineOperand &Op, const TargetRegisterInfo *TRI) {
switch (Op.getType()) {
case MachineOperand::MO_Register:
// TODO: Print register flags.
printReg(Op.getReg(), OS, TRI);
// TODO: Print sub register.
break;
case MachineOperand::MO_Immediate:
OS << Op.getImm();
break;
default:
// TODO: Print the other machine operands.
llvm_unreachable("Can't print this machine operand at the moment");
}
}
bool EpiphanyAsmPrinter::lowerOperand(const MachineOperand &MO,
MCOperand &MCOp) const {
switch (MO.getType()) {
default:
llvm_unreachable("unknown operand type");
case MachineOperand::MO_Register:
if (MO.isImplicit())
return false;
assert(!MO.getSubReg() && "Subregs should be eliminated!");
MCOp = MCOperand::CreateReg(MO.getReg());
break;
case MachineOperand::MO_Immediate:
MCOp = MCOperand::CreateImm(MO.getImm());
break;
case MachineOperand::MO_FPImmediate: {// a bit hacky, see arm
APFloat Val = MO.getFPImm()->getValueAPF();
bool ignored;
Val.convert(APFloat::IEEEdouble, APFloat::rmTowardZero, &ignored);
MCOp = MCOperand::CreateFPImm(Val.convertToDouble());
break;
}
case MachineOperand::MO_BlockAddress:
MCOp = lowerSymbolOperand(MO, GetBlockAddressSymbol(MO.getBlockAddress()));
break;
case MachineOperand::MO_ExternalSymbol:
MCOp = lowerSymbolOperand(MO, GetExternalSymbolSymbol(MO.getSymbolName()));
break;
case MachineOperand::MO_GlobalAddress:
MCOp = lowerSymbolOperand(MO, Mang->getSymbol(MO.getGlobal()));
break;
case MachineOperand::MO_MachineBasicBlock:
MCOp = MCOperand::CreateExpr(MCSymbolRefExpr::Create(
MO.getMBB()->getSymbol(), OutContext));
break;
case MachineOperand::MO_JumpTableIndex:
MCOp = lowerSymbolOperand(MO, GetJTISymbol(MO.getIndex()));
break;
case MachineOperand::MO_ConstantPoolIndex:
MCOp = lowerSymbolOperand(MO, GetCPISymbol(MO.getIndex()));
break;
case MachineOperand::MO_RegisterMask:
// Ignore call clobbers
return false;
}
return true;
}
/// Add 4 to the displacement of operand MO.
static void fixDisp(MachineOperand &MO) {
switch (MO.getType()) {
default:
llvm_unreachable("Unhandled operand type.");
case MachineOperand::MO_Immediate:
MO.setImm(MO.getImm() + 4);
break;
case MachineOperand::MO_GlobalAddress:
case MachineOperand::MO_ConstantPoolIndex:
case MachineOperand::MO_BlockAddress:
case MachineOperand::MO_TargetIndex:
case MachineOperand::MO_ExternalSymbol:
MO.setOffset(MO.getOffset() + 4);
break;
}
}
bool AMDGPUMCInstLower::lowerOperand(const MachineOperand &MO,
MCOperand &MCOp) const {
switch (MO.getType()) {
default:
llvm_unreachable("unknown operand type");
case MachineOperand::MO_Immediate:
MCOp = MCOperand::createImm(MO.getImm());
return true;
case MachineOperand::MO_Register:
MCOp = MCOperand::createReg(AMDGPU::getMCReg(MO.getReg(), ST));
return true;
case MachineOperand::MO_MachineBasicBlock: {
if (MO.getTargetFlags() != 0) {
MCOp = MCOperand::createExpr(
getLongBranchBlockExpr(*MO.getParent()->getParent(), MO));
} else {
MCOp = MCOperand::createExpr(
MCSymbolRefExpr::create(MO.getMBB()->getSymbol(), Ctx));
}
return true;
}
case MachineOperand::MO_GlobalAddress: {
const GlobalValue *GV = MO.getGlobal();
SmallString<128> SymbolName;
AP.getNameWithPrefix(SymbolName, GV);
MCSymbol *Sym = Ctx.getOrCreateSymbol(SymbolName);
const MCExpr *SymExpr =
MCSymbolRefExpr::create(Sym, getVariantKind(MO.getTargetFlags()),Ctx);
const MCExpr *Expr = MCBinaryExpr::createAdd(SymExpr,
MCConstantExpr::create(MO.getOffset(), Ctx), Ctx);
MCOp = MCOperand::createExpr(Expr);
return true;
}
case MachineOperand::MO_ExternalSymbol: {
MCSymbol *Sym = Ctx.getOrCreateSymbol(StringRef(MO.getSymbolName()));
Sym->setExternal(true);
const MCSymbolRefExpr *Expr = MCSymbolRefExpr::create(Sym, Ctx);
MCOp = MCOperand::createExpr(Expr);
return true;
}
case MachineOperand::MO_RegisterMask:
// Regmasks are like implicit defs.
return false;
}
}
bool ARMAsmPrinter::lowerOperand(const MachineOperand &MO,
MCOperand &MCOp) {
switch (MO.getType()) {
default:
assert(0 && "unknown operand type");
return false;
case MachineOperand::MO_Register:
// Ignore all non-CPSR implicit register operands.
if (MO.isImplicit() && MO.getReg() != ARM::CPSR)
return false;
assert(!MO.getSubReg() && "Subregs should be eliminated!");
MCOp = MCOperand::CreateReg(MO.getReg());
break;
case MachineOperand::MO_Immediate:
MCOp = MCOperand::CreateImm(MO.getImm());
break;
case MachineOperand::MO_MachineBasicBlock:
MCOp = MCOperand::CreateExpr(MCSymbolRefExpr::Create(
MO.getMBB()->getSymbol(), OutContext));
break;
case MachineOperand::MO_GlobalAddress:
MCOp = GetSymbolRef(MO, Mang->getSymbol(MO.getGlobal()));
break;
case MachineOperand::MO_ExternalSymbol:
MCOp = GetSymbolRef(MO,
GetExternalSymbolSymbol(MO.getSymbolName()));
break;
case MachineOperand::MO_JumpTableIndex:
MCOp = GetSymbolRef(MO, GetJTISymbol(MO.getIndex()));
break;
case MachineOperand::MO_ConstantPoolIndex:
MCOp = GetSymbolRef(MO, GetCPISymbol(MO.getIndex()));
break;
case MachineOperand::MO_BlockAddress:
MCOp = GetSymbolRef(MO, GetBlockAddressSymbol(MO.getBlockAddress()));
break;
case MachineOperand::MO_FPImmediate: {
APFloat Val = MO.getFPImm()->getValueAPF();
bool ignored;
Val.convert(APFloat::IEEEdouble, APFloat::rmTowardZero, &ignored);
MCOp = MCOperand::CreateFPImm(Val.convertToDouble());
break;
}
}
return true;
}
bool AArch64AsmPrinter::lowerOperand(const MachineOperand &MO,
MCOperand &MCOp) const {
switch (MO.getType()) {
default: llvm_unreachable("unknown operand type");
case MachineOperand::MO_Register:
if (MO.isImplicit())
return false;
assert(!MO.getSubReg() && "Subregs should be eliminated!");
MCOp = MCOperand::CreateReg(MO.getReg());
break;
case MachineOperand::MO_Immediate:
MCOp = MCOperand::CreateImm(MO.getImm());
break;
case MachineOperand::MO_FPImmediate: {
assert(MO.getFPImm()->isZero() && "Only fp imm 0.0 is supported");
MCOp = MCOperand::CreateFPImm(0.0);
break;
}
case MachineOperand::MO_BlockAddress:
MCOp = lowerSymbolOperand(MO, GetBlockAddressSymbol(MO.getBlockAddress()));
break;
case MachineOperand::MO_ExternalSymbol:
MCOp = lowerSymbolOperand(MO, GetExternalSymbolSymbol(MO.getSymbolName()));
break;
case MachineOperand::MO_GlobalAddress:
MCOp = lowerSymbolOperand(MO, getSymbol(MO.getGlobal()));
break;
case MachineOperand::MO_MachineBasicBlock:
MCOp = MCOperand::CreateExpr(MCSymbolRefExpr::Create(
MO.getMBB()->getSymbol(), OutContext));
break;
case MachineOperand::MO_JumpTableIndex:
MCOp = lowerSymbolOperand(MO, GetJTISymbol(MO.getIndex()));
break;
case MachineOperand::MO_ConstantPoolIndex:
MCOp = lowerSymbolOperand(MO, GetCPISymbol(MO.getIndex()));
break;
case MachineOperand::MO_RegisterMask:
// Ignore call clobbers
return false;
}
return true;
}
bool AArch64MCInstLower::lowerOperand(const MachineOperand &MO,
MCOperand &MCOp) const {
switch (MO.getType()) {
default:
llvm_unreachable("unknown operand type");
case MachineOperand::MO_Register:
// Ignore all implicit register operands.
if (MO.isImplicit())
return false;
MCOp = MCOperand::createReg(MO.getReg());
break;
case MachineOperand::MO_RegisterMask:
// Regmasks are like implicit defs.
return false;
case MachineOperand::MO_Immediate:
MCOp = MCOperand::createImm(MO.getImm());
break;
case MachineOperand::MO_MachineBasicBlock:
MCOp = MCOperand::createExpr(
MCSymbolRefExpr::create(MO.getMBB()->getSymbol(), Ctx));
break;
case MachineOperand::MO_GlobalAddress:
MCOp = LowerSymbolOperand(MO, GetGlobalAddressSymbol(MO));
break;
case MachineOperand::MO_ExternalSymbol:
MCOp = LowerSymbolOperand(MO, GetExternalSymbolSymbol(MO));
break;
case MachineOperand::MO_MCSymbol:
MCOp = LowerSymbolOperand(MO, MO.getMCSymbol());
break;
case MachineOperand::MO_JumpTableIndex:
MCOp = LowerSymbolOperand(MO, Printer.GetJTISymbol(MO.getIndex()));
break;
case MachineOperand::MO_ConstantPoolIndex:
MCOp = LowerSymbolOperand(MO, Printer.GetCPISymbol(MO.getIndex()));
break;
case MachineOperand::MO_BlockAddress:
MCOp = LowerSymbolOperand(
MO, Printer.GetBlockAddressSymbol(MO.getBlockAddress()));
break;
}
return true;
}
MCOperand PTXAsmPrinter::lowerOperand(const MachineOperand &MO) {
MCOperand MCOp;
const PTXMachineFunctionInfo *MFI = MF->getInfo<PTXMachineFunctionInfo>();
const MCExpr *Expr;
const char *RegSymbolName;
switch (MO.getType()) {
default:
llvm_unreachable("Unknown operand type");
case MachineOperand::MO_Register:
// We create register operands as symbols, since the PTXInstPrinter class
// has no way to map virtual registers back to a name without some ugly
// hacks.
// FIXME: Figure out a better way to handle virtual register naming.
RegSymbolName = MFI->getRegisterName(MO.getReg());
Expr = MCSymbolRefExpr::Create(RegSymbolName, MCSymbolRefExpr::VK_None,
OutContext);
MCOp = MCOperand::CreateExpr(Expr);
break;
case MachineOperand::MO_Immediate:
MCOp = MCOperand::CreateImm(MO.getImm());
break;
case MachineOperand::MO_MachineBasicBlock:
MCOp = MCOperand::CreateExpr(MCSymbolRefExpr::Create(
MO.getMBB()->getSymbol(), OutContext));
break;
case MachineOperand::MO_GlobalAddress:
MCOp = GetSymbolRef(MO, Mang->getSymbol(MO.getGlobal()));
break;
case MachineOperand::MO_ExternalSymbol:
MCOp = GetSymbolRef(MO, GetExternalSymbolSymbol(MO.getSymbolName()));
break;
case MachineOperand::MO_FPImmediate:
APFloat Val = MO.getFPImm()->getValueAPF();
bool ignored;
Val.convert(APFloat::IEEEdouble, APFloat::rmTowardZero, &ignored);
MCOp = MCOperand::CreateFPImm(Val.convertToDouble());
break;
}
return MCOp;
}
/// Get the opcode for a conditional transfer of the value in SO (source
/// operand). The condition (true/false) is given in Cond.
unsigned HexagonExpandCondsets::getCondTfrOpcode(const MachineOperand &SO,
bool IfTrue) {
using namespace Hexagon;
if (SO.isReg()) {
unsigned PhysR;
RegisterRef RS = SO;
if (TargetRegisterInfo::isVirtualRegister(RS.Reg)) {
const TargetRegisterClass *VC = MRI->getRegClass(RS.Reg);
assert(VC->begin() != VC->end() && "Empty register class");
PhysR = *VC->begin();
} else {
assert(TargetRegisterInfo::isPhysicalRegister(RS.Reg));
PhysR = RS.Reg;
}
unsigned PhysS = (RS.Sub == 0) ? PhysR : TRI->getSubReg(PhysR, RS.Sub);
const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(PhysS);
switch (TRI->getRegSizeInBits(*RC)) {
case 32:
return IfTrue ? A2_tfrt : A2_tfrf;
case 64:
return IfTrue ? A2_tfrpt : A2_tfrpf;
}
llvm_unreachable("Invalid register operand");
}
switch (SO.getType()) {
case MachineOperand::MO_Immediate:
case MachineOperand::MO_FPImmediate:
case MachineOperand::MO_ConstantPoolIndex:
case MachineOperand::MO_TargetIndex:
case MachineOperand::MO_JumpTableIndex:
case MachineOperand::MO_ExternalSymbol:
case MachineOperand::MO_GlobalAddress:
case MachineOperand::MO_BlockAddress:
return IfTrue ? C2_cmoveit : C2_cmoveif;
default:
break;
}
llvm_unreachable("Unexpected source operand");
}
MCOperand SystemZMCInstLower::lowerOperand(const MachineOperand &MO) const {
switch (MO.getType()) {
default:
llvm_unreachable("unknown operand type");
case MachineOperand::MO_Register:
return MCOperand::CreateReg(MO.getReg());
case MachineOperand::MO_Immediate:
return MCOperand::CreateImm(MO.getImm());
case MachineOperand::MO_MachineBasicBlock:
return lowerSymbolOperand(MO, MO.getMBB()->getSymbol(),
/* MO has no offset field */0);
case MachineOperand::MO_GlobalAddress:
return lowerSymbolOperand(MO, Mang->getSymbol(MO.getGlobal()),
MO.getOffset());
case MachineOperand::MO_ExternalSymbol: {
StringRef Name = MO.getSymbolName();
return lowerSymbolOperand(MO, AsmPrinter.GetExternalSymbolSymbol(Name),
MO.getOffset());
}
case MachineOperand::MO_JumpTableIndex:
return lowerSymbolOperand(MO, AsmPrinter.GetJTISymbol(MO.getIndex()),
/* MO has no offset field */0);
case MachineOperand::MO_ConstantPoolIndex:
return lowerSymbolOperand(MO, AsmPrinter.GetCPISymbol(MO.getIndex()),
MO.getOffset());
case MachineOperand::MO_BlockAddress: {
const BlockAddress *BA = MO.getBlockAddress();
return lowerSymbolOperand(MO, AsmPrinter.GetBlockAddressSymbol(BA),
MO.getOffset());
}
}
}
bool llvm::LowerPPCMachineOperandToMCOperand(const MachineOperand &MO,
MCOperand &OutMO, AsmPrinter &AP,
bool isDarwin) {
switch (MO.getType()) {
default:
llvm_unreachable("unknown operand type");
case MachineOperand::MO_Register:
assert(!MO.getSubReg() && "Subregs should be eliminated!");
assert(MO.getReg() > PPC::NoRegister &&
MO.getReg() < PPC::NUM_TARGET_REGS &&
"Invalid register for this target!");
OutMO = MCOperand::createReg(MO.getReg());
return true;
case MachineOperand::MO_Immediate:
OutMO = MCOperand::createImm(MO.getImm());
return true;
case MachineOperand::MO_MachineBasicBlock:
OutMO = MCOperand::createExpr(
MCSymbolRefExpr::create(MO.getMBB()->getSymbol(), AP.OutContext));
return true;
case MachineOperand::MO_GlobalAddress:
case MachineOperand::MO_ExternalSymbol:
OutMO = GetSymbolRef(MO, GetSymbolFromOperand(MO, AP), AP, isDarwin);
return true;
case MachineOperand::MO_JumpTableIndex:
OutMO = GetSymbolRef(MO, AP.GetJTISymbol(MO.getIndex()), AP, isDarwin);
return true;
case MachineOperand::MO_ConstantPoolIndex:
OutMO = GetSymbolRef(MO, AP.GetCPISymbol(MO.getIndex()), AP, isDarwin);
return true;
case MachineOperand::MO_BlockAddress:
OutMO = GetSymbolRef(MO, AP.GetBlockAddressSymbol(MO.getBlockAddress()), AP,
isDarwin);
return true;
case MachineOperand::MO_RegisterMask:
return false;
}
}
void MIPrinter::print(const MachineOperand &Op, const TargetRegisterInfo *TRI) {
switch (Op.getType()) {
case MachineOperand::MO_Register:
// TODO: Print the other register flags.
if (Op.isImplicit())
OS << (Op.isDef() ? "implicit-def " : "implicit ");
if (Op.isDead())
OS << "dead ";
if (Op.isKill())
OS << "killed ";
if (Op.isUndef())
OS << "undef ";
printReg(Op.getReg(), OS, TRI);
// TODO: Print sub register.
break;
case MachineOperand::MO_Immediate:
OS << Op.getImm();
break;
case MachineOperand::MO_MachineBasicBlock:
printMBBReference(*Op.getMBB());
break;
case MachineOperand::MO_GlobalAddress:
Op.getGlobal()->printAsOperand(OS, /*PrintType=*/false, MST);
// TODO: Print offset and target flags.
break;
case MachineOperand::MO_RegisterMask: {
auto RegMaskInfo = RegisterMaskIds.find(Op.getRegMask());
if (RegMaskInfo != RegisterMaskIds.end())
OS << StringRef(TRI->getRegMaskNames()[RegMaskInfo->second]).lower();
else
llvm_unreachable("Can't print this machine register mask yet.");
break;
}
default:
// TODO: Print the other machine operands.
llvm_unreachable("Can't print this machine operand at the moment");
}
}
bool llvm::LowerRISCVMachineOperandToMCOperand(const MachineOperand &MO,
MCOperand &MCOp,
const AsmPrinter &AP) {
switch (MO.getType()) {
default:
report_fatal_error("LowerRISCVMachineInstrToMCInst: unknown operand type");
case MachineOperand::MO_Register:
// Ignore all implicit register operands.
if (MO.isImplicit())
return false;
MCOp = MCOperand::createReg(MO.getReg());
break;
case MachineOperand::MO_RegisterMask:
// Regmasks are like implicit defs.
return false;
case MachineOperand::MO_Immediate:
MCOp = MCOperand::createImm(MO.getImm());
break;
case MachineOperand::MO_MachineBasicBlock:
MCOp = lowerSymbolOperand(MO, MO.getMBB()->getSymbol(), AP);
break;
case MachineOperand::MO_GlobalAddress:
MCOp = lowerSymbolOperand(MO, AP.getSymbol(MO.getGlobal()), AP);
break;
case MachineOperand::MO_BlockAddress:
MCOp = lowerSymbolOperand(
MO, AP.GetBlockAddressSymbol(MO.getBlockAddress()), AP);
break;
case MachineOperand::MO_ExternalSymbol:
MCOp = lowerSymbolOperand(
MO, AP.GetExternalSymbolSymbol(MO.getSymbolName()), AP);
break;
case MachineOperand::MO_ConstantPoolIndex:
MCOp = lowerSymbolOperand(MO, AP.GetCPISymbol(MO.getIndex()), AP);
break;
}
return true;
}
static MCOperand LowerSymbolOperand(const MachineInstr *MI,
const MachineOperand &MO,
AsmPrinter &AP) {
SparcMCExpr::VariantKind Kind =
(SparcMCExpr::VariantKind)MO.getTargetFlags();
const MCSymbol *Symbol = nullptr;
switch(MO.getType()) {
default: llvm_unreachable("Unknown type in LowerSymbolOperand");
case MachineOperand::MO_MachineBasicBlock:
Symbol = MO.getMBB()->getSymbol();
break;
case MachineOperand::MO_GlobalAddress:
Symbol = AP.getSymbol(MO.getGlobal());
break;
case MachineOperand::MO_BlockAddress:
Symbol = AP.GetBlockAddressSymbol(MO.getBlockAddress());
break;
case MachineOperand::MO_ExternalSymbol:
Symbol = AP.GetExternalSymbolSymbol(MO.getSymbolName());
break;
case MachineOperand::MO_ConstantPoolIndex:
Symbol = AP.GetCPISymbol(MO.getIndex());
break;
}
const MCSymbolRefExpr *MCSym = MCSymbolRefExpr::Create(Symbol,
AP.OutContext);
const SparcMCExpr *expr = SparcMCExpr::Create(Kind, MCSym,
AP.OutContext);
return MCOperand::createExpr(expr);
}
