llvm::MachineFunction::iterator mbbit; for (mbbit = MF.begin(); mbbit != MF.end(); ++mbbit) { for (llvm::MachineBasicBlock::iterator mbit = mbbit->begin(); mbit != mbbit->end(); ++mbit) { if (mbit->getOpcode() == llvm::Mips::ADDi) { int64_t imm = mbit->getOperand(2).getImm(); llvm::dbgs() << "Immediate Value: " << imm << "\n"; } } }
for (auto &MI : MBB){ if (MI.getOpcode() == ARM::LDRB_PP){ for (unsigned int i = 0; i < MI.getNumOperands(); i++){ const MachineOperand &MO = MI.getOperand(i); if (MO.isReg()){ llvm::dbgs() << "Register: " << MO.getReg() << "\n"; } } } }This example also loops through all the instructions in a basic block, but uses the getNumOperands function alongside getOperand to iterate over all the operands of the instruction. If the operand is a register, its ID is printed out using the LLVM debugging support. Package library: LLVM